oweals/u-boot.git
8 years agoarmv8: Support loading 32-bit OS in AArch32 execution state
Alison Wang [Thu, 10 Nov 2016 02:49:03 +0000 (10:49 +0800)]
armv8: Support loading 32-bit OS in AArch32 execution state

To support loading a 32-bit OS, the execution state will change from
AArch64 to AArch32 when jumping to kernel.

The architecture information will be got through checking FIT image,
then U-Boot will load 32-bit OS or 64-bit OS automatically.

Signed-off-by: Ebony Zhu <ebony.zhu@nxp.com>
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarm: exynos7420: remove custome low level init function
Thomas Abraham [Wed, 16 Nov 2016 13:19:16 +0000 (18:49 +0530)]
arm: exynos7420: remove custome low level init function

Remove the custom low-level initialization function and reuse the
default low-level initialization function. But this requires the
ARMV8_MULTIENTRY config option to be enabled for Exynos7420.

On Exynos7420, the boot CPU belongs to the second cluster and so
with ARMV8_MULTIENTRY config option enabled, the 'branch_if_master'
macro fails to detect the CPU as boot CPU. As a temporary workaround
the CPU_RELEASE_ADDR is set to point to '_main'.

Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Alison Wang <alison.wang@nxp.com>
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Reviewed-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8/fsl-lsch3: Update code to release secondary cores
Priyanka Jain [Thu, 17 Nov 2016 06:59:56 +0000 (12:29 +0530)]
armv8/fsl-lsch3: Update code to release secondary cores

NXP ARMv8 SoC LS2080A release all secondary cores in one-go.
But other new SoCs like LS2088A, LS1088A release secondary
cores one by one.

Update code to release secondary cores based on SoC SVR
Add code to release cores one by one for non LS2080A SoCs

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
[YS: remove "inline" from declaration of initiator_type]
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: fsl-layerscape: Add NXP LS2088A SoC support
Priyanka Jain [Thu, 17 Nov 2016 06:59:55 +0000 (12:29 +0530)]
armv8: fsl-layerscape: Add NXP LS2088A SoC support

The QorIQ LS2088A SoC is built on layerscape architecture.

It is similar to LS2080A SoC with some differences like
1)Timer controller offset is different
2)It has A72 cores
3)It supports TZASC module

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: fsl-layerscape : Check SVR for initializing TZASC
Priyanka Jain [Thu, 17 Nov 2016 06:59:54 +0000 (12:29 +0530)]
armv8: fsl-layerscape : Check SVR for initializing TZASC

LS2080 SoC and its personalities does not support TZASC
But other new SoCs like LS2088A, LS1088A supports TZASC

Hence, skip initializing TZASC for Ls2080A based on SVR

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: fsl-layerscape: Update TZASC registers type
Priyanka Jain [Thu, 17 Nov 2016 06:59:53 +0000 (12:29 +0530)]
armv8: fsl-layerscape: Update TZASC registers type

TZASC registers like TZASC_GATE_KEEPER, TZASC_REGION_ATTRIBUTES
are 32-bit regsiters.
So while doing register load-store operations, 32-bit intermediate
register, w0 should be used.
Update x0 register to w0 register type.

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: lsch3: Use SVR based timer base address detection
Priyanka Jain [Thu, 17 Nov 2016 06:59:52 +0000 (12:29 +0530)]
armv8: lsch3: Use SVR based timer base address detection

Timer controller base address has been changed from
LS2080A SoC (and its personalities) to new SoCs like
LS2088A, LS1088A.

Use SVR based timer base address detection to avoid compile time #ifdef.

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: lsch3: Add generic get_svr() in assembly
Priyanka Jain [Thu, 17 Nov 2016 06:59:51 +0000 (12:29 +0530)]
armv8: lsch3: Add generic get_svr() in assembly

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8/fsl-layerscape: Update CONFIG_LS2080A to CONFIG_FSL_LSCH3
Shengzhou Liu [Fri, 11 Nov 2016 10:11:05 +0000 (18:11 +0800)]
armv8/fsl-layerscape: Update CONFIG_LS2080A to CONFIG_FSL_LSCH3

Update CONFIG_LS2080A to CONFIG_FSL_LSCH3 to make those workaround
implementing of erratum reusable for more SoCs.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: fsl-layerscape: Add README for deploying QSPI image
Yuan Yao [Wed, 9 Nov 2016 03:50:46 +0000 (11:50 +0800)]
armv8: fsl-layerscape: Add README for deploying QSPI image

Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
[YS: Reviese commit subject]
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarm: ls1021a: improve the core frequency to 1.2GHZ
Yuan Yao [Wed, 9 Nov 2016 03:19:54 +0000 (11:19 +0800)]
arm: ls1021a: improve the core frequency to 1.2GHZ

Change core clock to 1.2GHz in the configurations for SD and NAND boot.

Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: ls2080aqds: fix SGMII repeater settings
Shaohui Xie [Mon, 17 Oct 2016 08:20:48 +0000 (16:20 +0800)]
armv8: ls2080aqds: fix SGMII repeater settings

The current value to check whether the PHY was configured has dependency
on MC, it expects MC to start PCS AN, this is not true during boot up,
so it should be changed to remove the dependency.

The PHY's register space should be restore to default after accessing
extended space.

Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agofsl: serdes: fix a deadloop issue for P4080
Hou Zhiqiang [Mon, 31 Oct 2016 02:59:16 +0000 (10:59 +0800)]
fsl: serdes: fix a deadloop issue for P4080

This deadloop is introduced by commit:
71fe222 fsl: serdes: ensure accessing the initialized maps of serdes protocol

deadloop detail:
cpu_init_r => fsl_serdes_init => p4080_erratum_serdes_a005 =>
is_serdes_configured => fsl_serdes_init

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agopowerpc: mpc512x: Add support for get_svr() for mpc512x devices
Sriram Dash [Fri, 14 Oct 2016 06:33:50 +0000 (12:03 +0530)]
powerpc: mpc512x: Add support for get_svr() for mpc512x devices

Defines get_svr() for mpc512x devices

Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agodriver: net: ldpaa_eth: Fix missing bracket issue
Priyanka Jain [Thu, 3 Nov 2016 12:35:09 +0000 (18:05 +0530)]
driver: net: ldpaa_eth: Fix missing bracket issue

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: ls2080a: Update serdes protocol support
Priyanka Jain [Thu, 3 Nov 2016 12:20:51 +0000 (17:50 +0530)]
armv8: ls2080a: Update serdes protocol support

Add these serdes protocols
Serdes1: 0x39, 0x4B, 0x4C, 0x4D
Serdes2: 0x47, 0x57

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
[YS: Revise commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: ls1046aqds: add lpuart support
Shaohui Xie [Fri, 28 Oct 2016 06:24:02 +0000 (14:24 +0800)]
armv8: ls1046aqds: add lpuart support

LPUART0 is used by default, and it's using platform clock.

Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agolpuart: add a get_lpuart_clk function
Shaohui Xie [Fri, 28 Oct 2016 06:23:30 +0000 (14:23 +0800)]
lpuart: add a get_lpuart_clk function

It's not always true that LPUART clock is CONFIG_SYS_CLK_FREQ. This
patch provides a weak function get_lpuart_clk(), so that the clock
can be ovreridden on a specific board which uses different clock
for LPUART.

Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
[YS: Reformat commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv7: Add support of ls1021a-iot board
Feng Li [Thu, 3 Nov 2016 06:15:17 +0000 (14:15 +0800)]
armv7: Add support of ls1021a-iot board

The patch adds support for Freescale ls1021a-iot board.

Signed-off-by: Feng Li <feng.li_2@nxp.com>
[YS: rewrite commit message, fix whitespace in Kconfig]
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoconfigs: ls2080ardb: Enable DSPI flash support
Yuan Yao [Tue, 11 Oct 2016 04:13:40 +0000 (12:13 +0800)]
configs: ls2080ardb: Enable DSPI flash support

There is the stmicro DSPI flash on LS12080ARDB.
Enable DSPI flash related configure options.

Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8:ls1012a: Update bootargs for fast-boot
Pratiyush Srivastava [Mon, 10 Oct 2016 13:15:15 +0000 (18:45 +0530)]
armv8:ls1012a: Update bootargs for fast-boot

Add optimization parameters like "quiet" in bootargs to reduce the system
boot time

Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com>
Signed-off-by: Harninder Rai <harninder.rai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agospl: Remove CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS
Semen Protsenko [Wed, 16 Nov 2016 17:19:06 +0000 (19:19 +0200)]
spl: Remove CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS

This option isn't used for anything, so get rid of it.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
8 years agospl: Convert CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR to Kconfig
Semen Protsenko [Wed, 16 Nov 2016 17:19:05 +0000 (19:19 +0200)]
spl: Convert CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR to Kconfig

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
[trini: Fix sniper and kc1 migration]
Signed-off-by: Tom Rini <trini@konsulko.com>
8 years agoMerge branch 'master' of http://git.denx.de/u-boot-mmc
Tom Rini [Thu, 17 Nov 2016 16:46:56 +0000 (11:46 -0500)]
Merge branch 'master' of git.denx.de/u-boot-mmc

8 years agoMerge tag 'signed-efi-next' of git://github.com/agraf/u-boot
Tom Rini [Thu, 17 Nov 2016 16:46:45 +0000 (11:46 -0500)]
Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot

Patch queue for efi - 2016-11-17

Highlights this time around:

  - x86 efi_loader support
  - hello world efi test case
  - network device name is now representative
  - terminal output reports modes correctly
  - fix psci reset for ls1043/ls1046
  - fix efi_add_runtime_mmio definition for x86
  - efi_loader support for ls2080

8 years agols2080ardb: Convert to distro boot
Alexander Graf [Thu, 17 Nov 2016 00:03:02 +0000 (01:03 +0100)]
ls2080ardb: Convert to distro boot

Most new systems in U-Boot these days make use of the generic "distro"
framework which allows a user to have U-Boot scan for a bootable OS
on all available media types.

This patch extends the LS2080ARDB board to use that framework if the
hard coded NOR flash location does not contain a bootable image.

Signed-off-by: Alexander Graf <agraf@suse.de>
8 years agoarmv8: fsl-layerscape: Add support for efi_loader RTS reset
Alexander Graf [Thu, 17 Nov 2016 00:03:01 +0000 (01:03 +0100)]
armv8: fsl-layerscape: Add support for efi_loader RTS reset

When implementing efi loader support, we can expose runtime services
for payloads. One such service is CPU reset.

This patch implements RTS CPU reset support for layerscape systems.

Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agoarmv8: ls2080a: Declare spin tables as reserved for efi loader
Alexander Graf [Thu, 17 Nov 2016 00:03:00 +0000 (01:03 +0100)]
armv8: ls2080a: Declare spin tables as reserved for efi loader

The efi loader code has its own memory map, so it needs to be aware where
the spin tables are located, to ensure that no code writes into those
regions.

Signed-off-by: Alexander Graf <agraf@suse.de>
8 years agols2080ardb: Reserve DP-DDR RAM
Alexander Graf [Thu, 17 Nov 2016 00:02:59 +0000 (01:02 +0100)]
ls2080ardb: Reserve DP-DDR RAM

The DP-DDR shouldn't be exposed as conventional memory to an OS, so let's
rather claim it's a reserved region in the EFI memory map

Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agols2080: Exit dpaa only right before exiting U-Boot
Alexander Graf [Thu, 17 Nov 2016 00:02:57 +0000 (01:02 +0100)]
ls2080: Exit dpaa only right before exiting U-Boot

On ls2080 we have a separate network fabric component which we need to
shut down before we enter Linux (or any other OS). Along with that also
comes configuration of the fabric using a description file.

Today we always stop and configure the fabric in the boot script and
(again) exit it on device tree generation. This works ok for the normal
booti case, but with bootefi the payload we're running may still want to
access the network.

So let's add a new fsl_mc command that defers configuration and stopping
the hardware to when we actually exit U-Boot, so that we can still use
the fabric from an EFI payload.

For existing boot scripts, nothing should change with this patch.

Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: York Sun <york.sun@nxp.com>
[agraf: Fix x86 build]

8 years agoefi_loader: Fix efi_add_runtime_mmio definition
Alexander Graf [Thu, 17 Nov 2016 00:02:56 +0000 (01:02 +0100)]
efi_loader: Fix efi_add_runtime_mmio definition

The efi_add_runtime_mmio prototype for disabled CONFIG_EFI_LOADER
was different from the enabled one. Sync them.

Signed-off-by: Alexander Graf <agraf@suse.de>
8 years agoefi_loader: Disable PSCI reset for ls1043 and ls1046
Alexander Graf [Thu, 17 Nov 2016 00:02:55 +0000 (01:02 +0100)]
efi_loader: Disable PSCI reset for ls1043 and ls1046

The NXP ls1043 and ls1046 systems do not (yet) have PSCI enablement
for reset. Don't enable generic PSCI reset code on them.

Signed-off-by: Alexander Graf <agraf@suse.de>
8 years agoefi_loader: AArch64: Run EFI payloads in EL2 if U-Boot runs in EL3
Alexander Graf [Thu, 17 Nov 2016 00:02:58 +0000 (01:02 +0100)]
efi_loader: AArch64: Run EFI payloads in EL2 if U-Boot runs in EL3

Some boards decided not to run ATF or other secure firmware in EL3, so
they instead run U-Boot there. The uEFI spec doesn't know what EL3 is
though - it only knows about EL2 and EL1. So if we see that we're running
in EL3, let's get into EL2 to make payloads happy.

Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: York Sun <york.sun@nxp.com>
8 years agosunxi: sina33: Enable the LCD
Maxime Ripard [Fri, 4 Nov 2016 15:18:11 +0000 (16:18 +0100)]
sunxi: sina33: Enable the LCD

The SinA33 comes with an optional 7" display. Enable it in the
configuration.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
8 years agosunxi: sina33: Enable the eMMC
Maxime Ripard [Fri, 4 Nov 2016 15:18:10 +0000 (16:18 +0100)]
sunxi: sina33: Enable the eMMC

The SinA33 has an 4GB Toshiba eMMC connected to the MMC2 controller.
Enable it.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
8 years agommc: sunxi: Enable 8bits bus width for sun8i
Maxime Ripard [Fri, 4 Nov 2016 15:18:09 +0000 (16:18 +0100)]
mmc: sunxi: Enable 8bits bus width for sun8i

The sun8i SoCs also have a 8 bits capable MMC2 controller. Enable the
support for those too.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
8 years agommc: Retry the switch command
Maxime Ripard [Fri, 4 Nov 2016 15:18:08 +0000 (16:18 +0100)]
mmc: Retry the switch command

Some eMMC will fail at the first switch, but would succeed in a subsequent
one.

Make sure we try several times to cover those cases. The number of retries
(and the behaviour) is currently what is being used in Linux.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
8 years agoARM64: zynqmp: Adding prefetchable memory space to pcie
Bharat Kumar Gogada [Tue, 2 Aug 2016 15:04:13 +0000 (20:34 +0530)]
ARM64: zynqmp: Adding prefetchable memory space to pcie

Adding prefetchable memory space to pcie device tree node.
Shifting configuration space to 64-bit address space.
Removing pcie device tree node from amba as it requires size-cells=<2>
in order to access 64-bit address space.

Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Add clocks for LPDDMA
Kedareswara rao Appana [Fri, 30 Sep 2016 05:04:59 +0000 (10:34 +0530)]
ARM64: zynqmp: Add clocks for LPDDMA

Zynqmp DMA driver expects two clocks (main clock and apb clock)
For LPDDMA channels the two clocks are missing in the
Dma node resulting probe failure.

xilinx-zynqmp-dma ffa80000.dma: main clock not found.
xilinx-zynqmp-dma ffa80000.dma: Probing channel failed
xilinx-zynqmp-dma: probe of ffa80000.dma failed with error -2

This patch fixes this issue.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Add description for LPDDMA channel usage
Kedareswara rao Appana [Fri, 9 Sep 2016 07:06:01 +0000 (12:36 +0530)]
ARM64: zynqmp: Add description for LPDDMA channel usage

LPDDMA default allows only secured access.
inorder to enable these dma channels,
one should ensure that it allows non secure access.
This patch updates the same.

Reported-by: Sai Pavan Boddu <saipava@xilinx.com>
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Use 64bit size cell format for main amba bus
Michal Simek [Thu, 11 Feb 2016 06:19:06 +0000 (07:19 +0100)]
ARM64: zynqmp: Use 64bit size cell format for main amba bus

Use 64bit size cell for main amba bus instead of 32bit because PCIe
node requires it Change 64bit sizes also for all others IPs.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Add ocm node in dtsi
Naga Sureshkumar Relli [Wed, 18 May 2016 06:53:13 +0000 (12:23 +0530)]
ARM64: zynqmp: Add ocm node in dtsi

This patch adds ocm controller node in zynqmp.dtsi.
needed for OCM edac support.

Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Add device tree properties for ZynqMP GT core
Anurag Kumar Vulisha [Tue, 17 May 2016 11:19:01 +0000 (16:49 +0530)]
ARM64: zynqmp: Add device tree properties for ZynqMP GT core

This patch adds the ZynqMP GT core device-tree properties for
zynqmp.dtsi file.

Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Tested-by: Hyun Kwon <hyunk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoRevert "ARM64: zynqmp: Added broken-tuning property to SD, eMMC nodes"
Michal Simek [Thu, 20 Oct 2016 08:36:05 +0000 (10:36 +0200)]
Revert "ARM64: zynqmp: Added broken-tuning property to SD, eMMC nodes"

This reverts commit bd750e7a6c515c081b72d4ef108a2bfa691a3fd1

Implemented the new workaround for auto tuning based on
zynqmp compatible string, so removed the 'broken-tuning'
property.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: change sdhci compatible string.
Sai Krishna Potthuri [Tue, 16 Aug 2016 09:11:35 +0000 (14:41 +0530)]
ARM64: zynqmp: change sdhci compatible string.

This patch changes the compatible string for sdhci node,
adds "xlnx,device_id" and "xlnx,mio_bank" property to sdhci node.

Signed-off-by: Sai Krishna Potthuri <lakshmis@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: List all SMMU ids
Michal Simek [Wed, 6 Apr 2016 08:43:23 +0000 (10:43 +0200)]
ARM64: zynqmp: List all SMMU ids

Add SMMU description for all tested IPs.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Add support for zynqmp fpga manager
Nava kishore Manne [Sat, 20 Aug 2016 18:47:52 +0000 (00:17 +0530)]
ARM64: zynqmp: Add support for zynqmp fpga manager

Add support for zynqmp fpga manager.

Signed-off-by: Nava kishore Manne <navam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Add cortexa53 edac node
Naga Sureshkumar Relli [Mon, 20 Jun 2016 10:18:30 +0000 (15:48 +0530)]
ARM64: zynqmp: Add cortexa53 edac node

This patch adds edac node for arm cortexa53 to report
errors on L1 and L2 caches.

Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoRevert "ARM64: zynqmp: Add serdes address space dp driver"
Michal Simek [Thu, 20 Oct 2016 08:38:16 +0000 (10:38 +0200)]
Revert "ARM64: zynqmp: Add serdes address space dp driver"

This reverts commit 786db82bd5bf09cc8f78c8b14445e843d7566b1c.

Since we are using serdes driver , no need of mapping serdes register
space into DP driver.

Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Tested-by: Hyun Kwon <hyunk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: drm: Add DMA index
Hyun Kwon [Fri, 15 Jul 2016 00:42:44 +0000 (17:42 -0700)]
ARM64: zynqmp: drm: Add DMA index

Each plane can be associated with multiple DMA channels. So add
index for each DMA channel.

Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Sync gpio node properties
Michal Simek [Thu, 20 Oct 2016 08:26:13 +0000 (10:26 +0200)]
ARM64: zynqmp: Sync gpio node properties

Keep dtsi in sync with mainline kernel.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Remove xlnx,id property
Michal Simek [Tue, 9 Aug 2016 13:06:58 +0000 (15:06 +0200)]
ARM64: zynqmp: Remove xlnx,id property

Remove unused xlnx,id property because it is not the part of
DT binding.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: pci: Updating device tree as per upstream
Bharat Kumar Gogada [Tue, 19 Jul 2016 15:19:29 +0000 (20:49 +0530)]
ARM64: zynqmp: pci: Updating device tree as per upstream

Updating required device tree changes as per mainlined driver
from 4.6 kernel.

Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Support for multiple PM IDs assigned to a PM domain
Filip Drazic [Mon, 29 Aug 2016 17:32:59 +0000 (19:32 +0200)]
ARM64: zynqmp: Support for multiple PM IDs assigned to a PM domain

Previously, it was assumed that there is a 1:1 mapping between
PM ID defined in the platform firmware and a PM domain. However, there
can be a situation where multiple PM IDs belong to a single PM domain
(e.g. PM IDs for GPU and two pixel processors correspond to a single
PM domain).

This patch adds support for assigning more than one PM ID to
a single PM domain.

Updated documentation accordingly.

Assigned pixel processors PM IDs to GPU PM domain.

Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: DT: Add PM domains for GPU and PCIE
Filip Drazic [Mon, 29 Aug 2016 17:32:56 +0000 (19:32 +0200)]
ARM64: zynqmp: DT: Add PM domains for GPU and PCIE

Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: DT: Remove unused PM domains for PLL
Filip Drazic [Thu, 25 Aug 2016 16:58:51 +0000 (18:58 +0200)]
ARM64: zynqmp: DT: Remove unused PM domains for PLL

Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: DT: Remove unused DDR PM domain
Filip Drazic [Thu, 25 Aug 2016 16:58:49 +0000 (18:58 +0200)]
ARM64: zynqmp: DT: Remove unused DDR PM domain

DDR power states are handled by the PM firmware, so this domain is
redundant. Also, since there is no device using this PM domain,
it will be powered off during boot, which is wrong.

Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Remove note about level shifter on zcu102
Michal Simek [Wed, 19 Oct 2016 14:07:58 +0000 (16:07 +0200)]
ARM64: zynqmp: Remove note about level shifter on zcu102

i2c device is just level shifter. Remove reference from dts.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Add dcc port to dtsi
Michal Simek [Fri, 9 Sep 2016 06:46:39 +0000 (08:46 +0200)]
ARM64: zynqmp: Add dcc port to dtsi

Add dcc to dtsi for supporting system without serial port.
DCC is enabled by default on ZynqMP.
Adding dcc to zcu100 and zcu102 which were tested.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Add gpio-keys for zcu102
Michal Simek [Wed, 25 May 2016 18:09:35 +0000 (20:09 +0200)]
ARM64: zynqmp: Add gpio-keys for zcu102

There is gpio push button on MIO22. Add it to DTS to have full board
description.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Enable gpio-led as heartbeat on zcu102
Michal Simek [Wed, 20 Apr 2016 11:12:25 +0000 (13:12 +0200)]
ARM64: zynqmp: Enable gpio-led as heartbeat on zcu102

Show user that Linux is alive on the board.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Enable can1 for ep108
Naga Sureshkumar Relli [Tue, 12 Apr 2016 06:16:11 +0000 (11:46 +0530)]
ARM64: zynqmp: Enable can1 for ep108

This patch enables can1 for ep108.

Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
Reviewed-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Added clocks to DT for ep108
VNSL Durga [Mon, 11 Apr 2016 12:13:47 +0000 (17:43 +0530)]
ARM64: zynqmp: Added clocks to DT for ep108

Added clks for ep108 platform.

Signed-off-by: VNSL Durga <vnsldurg@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Add clocks for LPDDMA
Kedareswara rao Appana [Fri, 9 Sep 2016 07:06:00 +0000 (12:36 +0530)]
ARM64: zynqmp: Add clocks for LPDDMA

Zynqmp DMA driver expects two clocks (main clock and apb clock)
LPDDMA clock cofiguration is missing for the same in the
zynqmp-clk.dtsi file.

This patch updates for the same.

Reported-by: Sai Pavan Boddu <saipava@xilinx.com>
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Remove DTC 1.4.2 warnings
Michal Simek [Fri, 11 Nov 2016 12:21:04 +0000 (13:21 +0100)]
ARM64: zynqmp: Remove DTC 1.4.2 warnings

DTC 1.4.2 reports these warnings:
Warning (unit_address_vs_reg): Node /amba_apu has a reg or ranges
property, but no unit name
Warning (unit_address_vs_reg): Node /amba has a reg or ranges property,
but no unit name
Warning (unit_address_vs_reg): Node /amba/usb@fe200000 has a unit name,
but no reg property
Warning (unit_address_vs_reg): Node /amba/usb@fe300000 has a unit name,
but no reg property
Warning (unit_address_vs_reg): Node
/amba/dma@fd4c0000/dma-video0channel@fd4c0000 has a unit name, but no
reg property
Warning (unit_address_vs_reg): Node
/amba/dma@fd4c0000/dma-video1channel@fd4c0000 has a unit name, but no
reg property
Warning (unit_address_vs_reg): Node
/amba/dma@fd4c0000/dma-video2channel@fd4c0000 has a unit name, but no
reg property
Warning (unit_address_vs_reg): Node
/amba/dma@fd4c0000/dma-graphicschannel@fd4c0000 has a unit name, but no
reg property
Warning (unit_address_vs_reg): Node
/amba/dma@fd4c0000/dma-audio0channel@fd4c0000 has a unit name, but no
reg property
Warning (unit_address_vs_reg): Node
/amba/dma@fd4c0000/dma-audio1channel@fd4c0000 has a unit name, but no
reg property
Warning (unit_address_vs_reg): Node /memory has a reg or ranges
property, but no unit name

This patch is fixing them.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: Remove DTC 1.4.2 warnings
Michal Simek [Fri, 11 Nov 2016 12:11:37 +0000 (13:11 +0100)]
ARM: zynq: Remove DTC 1.4.2 warnings

DTC 1.4.2 reports these warnings:
Warning (unit_address_vs_reg): Node /memory has a reg or ranges
property, but no unit name
Warning (unit_address_vs_reg): Node /pmu has a reg or ranges property,
but no unit name
Warning (unit_address_vs_reg): Node /fixedregulator@0 has a unit name,
but no reg property

This patch is fixing them.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Correct the sdhci minimum frequency for ep108
Siva Durga Prasad Paladugu [Tue, 1 Nov 2016 18:19:53 +0000 (23:49 +0530)]
ARM64: zynqmp: Correct the sdhci minimum frequency for ep108

Correct the sdhci minimum frequency for ep platform.
It should be right shift instead of left shift operand.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Ignore warnings from autogenerated files
Michal Simek [Thu, 14 Jul 2016 09:13:04 +0000 (11:13 +0200)]
ARM64: zynqmp: Ignore warnings from autogenerated files

Autogenerated files contain casting issues and missing function
declaration and even usleep implementation. Suppress them for now
till these files are fixed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Fix secondary bootmode enabling
Michal Simek [Tue, 25 Oct 2016 09:43:02 +0000 (11:43 +0200)]
ARM64: zynqmp: Fix secondary bootmode enabling

Do not setup use_alt bit which copy alternative boot mode to
boot mode. The reason is that this bit is cleared after POR
but not after any software reset which will cause
that after SW reset bootrom will look for different boot image.

This patch setups alternative boot mode selection (purely SW
handling) and extends code to read this alternative boot mode first and
use it if it is setup.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Add support for SD1 with level shifters bootmode
Siva Durga Prasad Paladugu [Wed, 21 Sep 2016 06:15:05 +0000 (11:45 +0530)]
ARM64: zynqmp: Add support for SD1 with level shifters bootmode

Add support for SD1 with level shifters bootmode.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Record board name as serial number for DFU/FASTBOOT
Michal Simek [Thu, 1 Sep 2016 09:27:32 +0000 (11:27 +0200)]
ARM64: zynqmp: Record board name as serial number for DFU/FASTBOOT

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Adjust to new SMC interface to get silicon version
Soren Brinkmann [Thu, 29 Sep 2016 18:44:41 +0000 (11:44 -0700)]
ARM64: zynqmp: Adjust to new SMC interface to get silicon version

The new FW interface returns the IDCODE and version register, leaving
extracting bitfields to the caller.

Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: Add support for Zynq 7000S 7007s/7012s/7014s devices
Michal Simek [Tue, 18 Oct 2016 14:10:25 +0000 (16:10 +0200)]
ARM: zynq: Add support for Zynq 7000S 7007s/7012s/7014s devices

Zynq 7000S (Single A9 core) devices is using different ID code.
This patch adds this new codes and assign them.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agonet: zynq_gem: Correct SGMII enable bit setting
Siva Durga Prasad Paladugu [Mon, 16 May 2016 10:01:38 +0000 (15:31 +0530)]
net: zynq_gem: Correct SGMII enable bit setting

Correct the SGMII enable bit position to 27 instead
of 31.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
8 years agonet: zynq_gem: Modify the nwcfg bit definitions
Siva Durga Prasad Paladugu [Mon, 16 May 2016 10:01:37 +0000 (15:31 +0530)]
net: zynq_gem: Modify the nwcfg bit definitions

Modify the nwcfg bit definitions to have 32-bit
by removing the extra nibble.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
8 years agonand: arasan_nfc: Clear ecc on bit while sending read command
Siva Durga Prasad Paladugu [Thu, 25 Aug 2016 10:30:04 +0000 (16:00 +0530)]
nand: arasan_nfc: Clear ecc on bit while sending read command

Clear ecc ON bit while sending read command as all types
of read command(like reading spare) doesnt need ECC to be
enabled. It has been anyway taken care in other places
whereever required using arasan_nand_enable_ecc().

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agozynq: nand: Runtime detection of nand buswidth through slcr
Michal Simek [Wed, 26 Oct 2016 08:49:37 +0000 (10:49 +0200)]
zynq: nand: Runtime detection of nand buswidth through slcr

This patch adds support to check the buswidth on nand flash
at runtime based on nand MIO configurations done by FSBL.

User needs to correctly configure the MIO's based on the
buswidth supported by the nand flash which is present on the board.

Added nand8 and nand16 @periph names on slcr driver.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agozynq: nand: Enable Nand flash controller driver a zynq board
Siva Durga Prasad Paladugu [Tue, 27 Sep 2016 05:25:47 +0000 (10:55 +0530)]
zynq: nand: Enable Nand flash controller driver a zynq board

Enable zynq Nand flash controller driver for a zynq ZC770
XM011(dc2) board.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agomtd: nand: zynq_nand: Add nand driver support for zynq
Siva Durga Prasad Paladugu [Tue, 27 Sep 2016 05:25:46 +0000 (10:55 +0530)]
mtd: nand: zynq_nand: Add nand driver support for zynq

Add nand flash controller driver support for zynq SoC.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: Add support for the topic-miami system-on-modules and carrier boards
Mike Looijmans [Fri, 30 Sep 2016 06:13:13 +0000 (08:13 +0200)]
ARM: zynq: Add support for the topic-miami system-on-modules and carrier boards

The topic-miami SoMs contain a Zynq xc7z015 or xc7z030 SoC, 1GB DDR3L RAM,
32MB QSPI NOR flash and 256MB NAND flash.

The topic-miamiplus SoMs contain a Zynq xc7z035, xc7z045 or xc7z100 SoC,
2x 1GB DDR3L RAM, 64MB dual-parallel QSPI flash, clock sources
and a fan controller.

The "Florida" carrier boards add SD, USB, ethernet and other interfaces.

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: Make SYS_VENDOR configurable
Mike Looijmans [Wed, 28 Sep 2016 05:46:30 +0000 (07:46 +0200)]
ARM: zynq: Make SYS_VENDOR configurable

Add a string description for SYS_VENDOR to allow configuring boards from
other vendors than just "xilinx".

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agotools: mkimage: Check if file is regular file
Michal Simek [Fri, 21 Oct 2016 11:16:13 +0000 (13:16 +0200)]
tools: mkimage: Check if file is regular file

Current Makefile.spl passes -R parameter which is not empty
and pointing to ./ folder.
"./tools/mkimage -T zynqmpimage -R ./"" -d spl/u-boot-spl.bin
spl/boot.bin"
That's why mkimage is trying to parse ./ file and generate
register init which is wrong.
Check that passed filename is regular file. If not do not work with it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agotools: mkimage: Add support for initialization table for Zynq and ZynqMP
Mike Looijmans [Tue, 20 Sep 2016 09:37:24 +0000 (11:37 +0200)]
tools: mkimage: Add support for initialization table for Zynq and ZynqMP

The Zynq/ZynqMP boot.bin file contains a region for register initialization
data. Filling in proper values in this table can reduce boot time
(e.g. about 50ms faster on QSPI boot) and also reduce the size of
the SPL binary.

The table is a simple text file with register+data on each line. Other
lines are simply skipped. The file can be passed to mkimage using the
"-R" parameter.

It is recommended to add reg init file to board folder.
For example:
CONFIG_BOOT_INIT_FILE="board/xilinx/zynqmp/xilinx_zynqmp_zcu102/reg.int

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agox86: Enable EFI loader support
Simon Glass [Mon, 7 Nov 2016 15:47:16 +0000 (08:47 -0700)]
x86: Enable EFI loader support

Enable this so that EFI applications (notably grub) can be run under U-Boot
on x86 platforms.

At present the 'hello world' EFI application is not supported for the
qemu-x86_efi_payload64 board. That board builds a payload consisting of a
64-bit header and a 32-bit U-Boot, which is incompatible with the way the
EFI loader builds its EFI application. The following error is obtained:

x86_64-linux-ld.bfd: i386 architecture of input file
   `lib/efi_loader/helloworld.o' is incompatible with i386:x86-64 output

This could be corrected with additional Makefile rules. For now, this
feature is disabled for that board.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[agraf: drop hello kconfig bits]
Signed-off-by: Alexander Graf <agraf@suse.de>
8 years agoefi: x86: Adjust EFI files support efi_loader
Simon Glass [Mon, 7 Nov 2016 15:47:15 +0000 (08:47 -0700)]
efi: x86: Adjust EFI files support efi_loader

Add compiler flags and make a few minor adjustments to support the efi
loader.

Signed-off-by: Simon Glass <sjg@chromium.org>
[agraf: Add Kconfig dep]
Signed-off-by: Alexander Graf <agraf@suse.de>
8 years agox86: Move efi .S files into the 'lib' directory
Simon Glass [Mon, 7 Nov 2016 15:47:14 +0000 (08:47 -0700)]
x86: Move efi .S files into the 'lib' directory

These files now need to be in a standard place so that they can be located
by generic Makefile rules. Move them to the 'lib' directory.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
8 years agox86: Move efi .lds files into the 'lib' directory
Simon Glass [Mon, 7 Nov 2016 15:47:13 +0000 (08:47 -0700)]
x86: Move efi .lds files into the 'lib' directory

These files now need to be in a standard place so that they can be located
by generic Makefile rules. Move them to the 'lib' directory.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
8 years agoefi: arm: Add aarch64 EFI app support
Simon Glass [Mon, 7 Nov 2016 15:47:11 +0000 (08:47 -0700)]
efi: arm: Add aarch64 EFI app support

Add support for EFI apps on aarch64. This includes start-up and relocation
code plus a link script.

Signed-off-by: Simon Glass <sjg@chromium.org>
[agraf: add kconfig dep]
Signed-off-by: Alexander Graf <agraf@suse.de>
8 years agoefi: arm: Add EFI app support
Simon Glass [Mon, 7 Nov 2016 15:47:10 +0000 (08:47 -0700)]
efi: arm: Add EFI app support

Add support for EFI apps on ARM. This includes start-up and relocation
code, plus a link script and some compiler setting changes.

Signed-off-by: Simon Glass <sjg@chromium.org>
[agraf: Remove whitespace change, add kconfig dep]
Signed-off-by: Alexander Graf <agraf@suse.de>
8 years agoelf: arm: Add a few ARM relocation types
Simon Glass [Mon, 7 Nov 2016 15:47:09 +0000 (08:47 -0700)]
elf: arm: Add a few ARM relocation types

Rather than hard-coding the relocation type, add it to the ELF header file
and use it from there.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
8 years agoefi: Add support for a hello world test program
Simon Glass [Mon, 7 Nov 2016 15:47:08 +0000 (08:47 -0700)]
efi: Add support for a hello world test program

It is useful to have a basic sanity check for EFI loader support. Add a
'bootefi hello' command which loads HelloWord.efi and runs it under U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
[agraf: Fix documentation, add unfulfilled kconfig dep]
Signed-off-by: Alexander Graf <agraf@suse.de>
8 years agoefi: Makefile: Export variables for use with EFI
Simon Glass [Mon, 7 Nov 2016 15:47:07 +0000 (08:47 -0700)]
efi: Makefile: Export variables for use with EFI

When building an EFI app we need three things:

   - start-up code
   - relocation code
   - link script

These are all different for each architecture. We also need special
compiler flags in some cases.

Add top-level Makefile variables for these along with documentation.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
8 years agox86: Tidy up selection of building the EFI stub
Simon Glass [Mon, 7 Nov 2016 15:47:06 +0000 (08:47 -0700)]
x86: Tidy up selection of building the EFI stub

At present we use a CONFIG option in efi.h to determine whether we are
building the EFI stub or not. This means that the same header cannot be
used for EFI_LOADER support. The CONFIG option will be enabled for the
whole build, even when not building the stub.

Use a different define instead, set up just for the files that make up the
stub.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
8 years agoefi: Fix debug message address format
Simon Glass [Mon, 7 Nov 2016 15:47:05 +0000 (08:47 -0700)]
efi: Fix debug message address format

This should use U-Boot's standard format for hex address. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
8 years agoefi: Correct cache flush alignment
Simon Glass [Mon, 7 Nov 2016 15:47:04 +0000 (08:47 -0700)]
efi: Correct cache flush alignment

Make sure that the cache flushes correctly by ensuring that the end
address is correctly aligned.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
8 years agox86: Correct a build warning in x86 tables
Simon Glass [Mon, 7 Nov 2016 15:47:03 +0000 (08:47 -0700)]
x86: Correct a build warning in x86 tables

There is a build warning for three x86 boards since
write_smbios_table_wrapper() is not used. Fix it.

Fixes: e824cf3f (smbios: Allow compilation on 64bit systems)
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
8 years agoefi_loader: console: Correctly report modes
Emmanuel Vadot [Tue, 8 Nov 2016 05:03:29 +0000 (06:03 +0100)]
efi_loader: console: Correctly report modes

Add support for EFI console modes.
Mode 0 is always 80x25 and present by EFI specification.
Mode 1 is always 80x50 and not mandatory.
Mode 2 and above is freely usable.

If the terminal can handle mode 1, we mark it as supported.
If the terminal size is greater than mode 0 and different than mode 1,
we install it as mode 2.

Modes can be switch with cout_set_mode.

Changes in V5:
 Correctly detect mode before enabling mode 2.

Changes in V4:
 Reset cursor positon on mode switch
 Use local variables in console query code

Changes in V3:
 Valid mode are 0 to EFIMode-1
 Fix style

Changes in V2:
 Add mode switch
 Report only the modes that we support

Signed-off-by: Emmanuel Vadot <manu@bidouilliste.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
8 years agoefi: Use device device path type Messaging for network interface node
Oleksandr Tymoshenko [Mon, 24 Oct 2016 17:47:01 +0000 (10:47 -0700)]
efi: Use device device path type Messaging for network interface node

When adding network interface node use Messaging device path with
subtype MAC Address and device's MAC address as a value instead
of Media Device path type with subtype File Path and path "Net"

Signed-off-by: Oleksandr Tymoshenko <gonzo@bluezbox.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
8 years agoefi_loader: fix depends on line of EFI_LOADER
Masahiro Yamada [Wed, 19 Oct 2016 15:23:43 +0000 (00:23 +0900)]
efi_loader: fix depends on line of EFI_LOADER

This line is shown as

   depends on (ARM64 ||\302\240ARM) && OF_LIBFDT

on my Emacs.  Use ASCII characters only.

Assuming it is (ARM64 || ARM), remove the redundancy.
Unlike Linux, CONFIG_ARM includes CONFIG_ARM64 in U-Boot.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
8 years agoPrepare v2016.11 v2016.11
Tom Rini [Mon, 14 Nov 2016 16:27:11 +0000 (11:27 -0500)]
Prepare v2016.11

Signed-off-by: Tom Rini <trini@konsulko.com>