Piotr Dymacz [Sat, 20 Aug 2016 20:18:12 +0000 (22:18 +0200)]
Cosmetic cleanups in various files
Piotr Dymacz [Sat, 20 Aug 2016 20:04:22 +0000 (22:04 +0200)]
Use defines for selecting commands instead of bitmask
Bitmask limits number of commands which can be predefined,
so switch to the approach already used in mainline version.
Piotr Dymacz [Tue, 16 Aug 2016 20:58:52 +0000 (22:58 +0200)]
Add support for Zbtlink ZBT-WE1526 (QCA9531 based)
Piotr Dymacz [Tue, 16 Aug 2016 20:28:17 +0000 (22:28 +0200)]
Merge branch 'build_cleanups' into dev
Piotr Dymacz [Tue, 16 Aug 2016 17:50:30 +0000 (19:50 +0200)]
Cleanups in QCA953x eth/phy related code
Get rid of some warnings from compilator.
This also fixes #111 (don't drop broadcast packets).
Piotr Dymacz [Sun, 14 Aug 2016 14:02:42 +0000 (16:02 +0200)]
Add function for printing command usage
DRY... move duplicated code into common function. This saves
around 900 bytes in uncompressed version and around 200 bytes
in compressed one.
Also, cleanup little bit coding style in command.{c,h}
Piotr Dymacz [Sun, 14 Aug 2016 11:31:05 +0000 (13:31 +0200)]
Enable iminfo command by default for all devices
Since we support both types of image headers, we can enable
"iminfo" command by default for all devices.
Example output for image with custom TP-Link header:
uboot> imi 0x9F020000
Checking image at 0x9F020000...
Vendor/image name: TP-LINK Technologies ver. 1.0
Firmware version: 3.16.9
Hardware ID: 0x8410009
Whole image size: 3.8 MB (
3932160 bytes)
Kernel size: 706.1 kB (723022 bytes)
Rootfs size: 2.8 MB (
2883584 bytes)
Kernel load address: 0x80002000
Kernel entry point: 0x801856F0
Header CRC... skipped
Data CRC... skipped
And for default U-Boot image header (Multi-File image here):
uboot> imi 0x9FE80000
Checking image at 0x9FE80000...
Image name: MIPS OpenWrt Linux-3.3.8
Build date: 2015-10-22 03:41:11 UTC
Architecture: MIPS
OS/image type: Linux Multi-File
Compression: LZMA
Data size: 1 MB (
1090582 bytes)
Load address: 0x80060000
Entry point: 0x80060000
Multi-Image:
> 1 MB (
1090574 bytes)
Header CRC... OK!
Data CRC... OK!
Piotr Dymacz [Sun, 14 Aug 2016 11:06:01 +0000 (13:06 +0200)]
Enable silent console feature support by default
As we already support writable environment on most of the
devices, it makes sense to include support for silent console
by default.
It's up to the user to enable it, using "silent" environment
variable, ex. "setenv silent 1; saveenv".
Piotr Dymacz [Sun, 14 Aug 2016 08:51:21 +0000 (10:51 +0200)]
Remove CONFIG_TPLINK_IMAGE_HEADER define
Piotr Dymacz [Sun, 14 Aug 2016 08:33:03 +0000 (10:33 +0200)]
Cleanups in bootm command and related code
Instead of selecting supported header type (standard U-Boot image
or custom TP-Link) at compile time, from now both headers are
supported. This allows to use both image types on all devices,
which sometimes might be useful.
Other changes:
- clean up code style, use tab size = 8
- restore support for Multi-File image, used in some ZBT routers
- add new TP-Link image header definition, get rid of old one
- restore CRC checksum tests (for image header and data)
- make image header information look better, include more data
- remove bootd command, as it was only alias for boot command
Piotr Dymacz [Thu, 11 Aug 2016 11:33:30 +0000 (13:33 +0200)]
Add support for Winbond W25Q128FW (16 MB, low voltage) FLASH chip
Piotr Dymacz [Thu, 11 Aug 2016 10:40:06 +0000 (12:40 +0200)]
trivial: fix typo (writting -> writing)
David Thornley [Tue, 31 May 2016 07:20:44 +0000 (17:20 +1000)]
Cleaned up build process, added lzma bin for x86_64
Supplied compiled host_util for linux-x86_32 (original compiled)
and newly compiled linux-x86_64 and darwin-x86_64.
Split across different subfolders depending on HOSTOS-HOSTARCH,
made HOSTOS consistent in root Makefile.
Added LIBS_SHARED variable that is independently compiled,
as opposed to including common files in both LIBS and LIBS_BOOTSTRAP.
Cleaned up documentation (removed lzma mention in OS X build, now using macOS).
Piotr Dymacz [Sat, 23 Jul 2016 17:01:42 +0000 (19:01 +0200)]
Use CONFIG_TPLINK_IMAGE_HEADER for GL.iNet
Fixes #114
Piotr Dymacz [Wed, 20 Jul 2016 07:24:04 +0000 (09:24 +0200)]
Add original U-Boot images for more devices
Piotr Dymacz [Wed, 15 Jun 2016 09:24:53 +0000 (11:24 +0200)]
Fix RAM version (don't initialize DDR controller)
Piotr Dymacz [Wed, 15 Jun 2016 09:12:26 +0000 (11:12 +0200)]
Update README
Piotr Dymacz [Wed, 15 Jun 2016 09:05:20 +0000 (11:05 +0200)]
Change remaining /bin/echo to echo in Makefile
David Thornley [Tue, 31 May 2016 01:21:44 +0000 (11:21 +1000)]
Improvements to build process for OSX build support
Requires updated bash and gnu coreutils, gnu-sed via brew.
Added HostOS platform sanity check (only linux and osx supported/tested)
Makefile and u-boot/Makefile forces SHELL to bash which addresses issues with cross platform "echo" and nullifies previous workaround /bin/echo (for -e and -n).
Added documentation for building on OS X
Piotr Dymacz [Tue, 14 Jun 2016 21:35:06 +0000 (23:35 +0200)]
Remove some old defines from Makefile
Piotr Dymacz [Tue, 14 Jun 2016 21:23:25 +0000 (23:23 +0200)]
Define CONFIG_PCI only for boards which use PCIe bus
Piotr Dymacz [Tue, 14 Jun 2016 20:29:40 +0000 (22:29 +0200)]
Add info about Wallys DR531 in README
Piotr Dymacz [Tue, 14 Jun 2016 19:32:51 +0000 (21:32 +0200)]
Remove some old and not needed anymore defines from configs
Piotr Dymacz [Tue, 14 Jun 2016 19:24:52 +0000 (21:24 +0200)]
Add support for Wallys DR531 (QCA9531 v2)
Piotr Dymacz [Tue, 14 Jun 2016 19:16:52 +0000 (21:16 +0200)]
Introduce new, common PCIe setup code for QC/A WiSoCs
New code setups PCIe PLL and resets PCIe controller.
For now, it was tested only on real hardware based
on QCA9531 and AR9344.
For information purposes, include also new line in
board info message, with vendor and device ID of
device/s connected on PCIe bus/es.
Piotr Dymacz [Tue, 14 Jun 2016 19:12:34 +0000 (21:12 +0200)]
trivial: drop executable file attribute on source files
Piotr Dymacz [Tue, 14 Jun 2016 18:53:58 +0000 (20:53 +0200)]
Drop old PCI/E related code
Piotr Dymacz [Tue, 14 Jun 2016 17:48:34 +0000 (19:48 +0200)]
Add PCIe and reset related registers/bit fields for QCA, plus minor fixes
Piotr Dymacz [Sun, 12 Jun 2016 14:17:12 +0000 (16:17 +0200)]
Rework PLL/clock related registers/bit fields in common QCA header
Piotr Dymacz [Fri, 3 Jun 2016 10:30:41 +0000 (12:30 +0200)]
Setup GPIO_OUT register before GPIO_OUT_FUNCx and GPIO_IN_ENx in low level GPIO init
Piotr Dymacz [Thu, 31 Mar 2016 09:30:35 +0000 (11:30 +0200)]
Ignore null character when waiting for autoboot abort
Piotr Dymacz [Thu, 31 Mar 2016 09:19:47 +0000 (11:19 +0200)]
Cosmetic cleanups in QC/A LSUART driver
Piotr Dymacz [Wed, 30 Mar 2016 18:24:43 +0000 (20:24 +0200)]
Add missing timer_init function in init sequence for not compressed U-Boot version
Piotr Dymacz [Tue, 29 Mar 2016 22:28:28 +0000 (00:28 +0200)]
Fix new gcc compile errors (do not use extern inline functions)
Piotr Dymacz [Tue, 29 Mar 2016 22:09:08 +0000 (00:09 +0200)]
Fix mess with inline QC/A related functions
Piotr Dymacz [Tue, 22 Mar 2016 01:31:16 +0000 (02:31 +0100)]
Merge pull request #88 from bittorf/readme_fix_url_to_uIP0.9
README: fix URL to IP-stack uIP 0.9
Piotr Dymacz [Tue, 22 Mar 2016 01:09:21 +0000 (02:09 +0100)]
Update READMEs
Piotr Dymacz [Tue, 22 Mar 2016 01:07:44 +0000 (02:07 +0100)]
Switch to OpenWrt toolchain (musl based)
Piotr Dymacz [Tue, 22 Mar 2016 00:22:41 +0000 (01:22 +0100)]
Remove old and not needed anymore code from old QC/A headers
Piotr Dymacz [Tue, 22 Mar 2016 00:15:11 +0000 (01:15 +0100)]
Clean little bit mess in code included from Atheros (Q)SDK, remove all printf()
Piotr Dymacz [Tue, 22 Mar 2016 00:12:56 +0000 (01:12 +0100)]
Remove atheros.h include from ap143.h config file
Piotr Dymacz [Mon, 21 Mar 2016 23:53:34 +0000 (00:53 +0100)]
Add SWITCH_CLOCK_CONTROL register definition in common QC/A header
Piotr Dymacz [Mon, 21 Mar 2016 23:17:34 +0000 (00:17 +0100)]
Add support for TP-Link TL-WR802N (QCA9533)
Piotr Dymacz [Mon, 21 Mar 2016 22:32:28 +0000 (23:32 +0100)]
Make use of new PLL/clock profiles, remove some not really useful, fix profiles for QCA95xx and mark tested
Piotr Dymacz [Mon, 21 Mar 2016 22:30:10 +0000 (23:30 +0100)]
Add more PLL/clock profiles for AR933x, mark tested
Piotr Dymacz [Mon, 21 Mar 2016 20:43:08 +0000 (21:43 +0100)]
Don't use CPU/DDR sync mode with fractional multipliers in PLL/clocks config
Piotr Dymacz [Mon, 21 Mar 2016 19:00:44 +0000 (20:00 +0100)]
cmd_qcaclk: show proper nfrac values plus cosmetic changes
Piotr Dymacz [Mon, 21 Mar 2016 01:19:03 +0000 (02:19 +0100)]
Drop CFG_HZ_FALLBACK as we don't need it anymore, clean in time.c
Piotr Dymacz [Mon, 21 Mar 2016 01:11:43 +0000 (02:11 +0100)]
Fix AR933x PLL/clock profiles
Piotr Dymacz [Sun, 20 Mar 2016 21:22:45 +0000 (22:22 +0100)]
Reset also DDR controller in AR9331 during first boot
Piotr Dymacz [Sun, 20 Mar 2016 21:12:14 +0000 (22:12 +0100)]
Remove time/delay related functions from lib_bootstrap, we don't need them anymore
Piotr Dymacz [Sun, 20 Mar 2016 17:31:28 +0000 (18:31 +0100)]
Clean config headers from old and not needed defines
Piotr Dymacz [Sun, 20 Mar 2016 17:29:50 +0000 (18:29 +0100)]
Remove old code for ap143
Piotr Dymacz [Sun, 20 Mar 2016 16:30:51 +0000 (17:30 +0100)]
Add more information about DDR timing values and print them in board info
Piotr Dymacz [Sun, 20 Mar 2016 16:12:32 +0000 (17:12 +0100)]
Be consistent with register names in common QC/A header
Piotr Dymacz [Sun, 20 Mar 2016 16:05:51 +0000 (17:05 +0100)]
Use BIT() macro in common QC/A header
Piotr Dymacz [Sun, 20 Mar 2016 16:00:21 +0000 (17:00 +0100)]
Restore workaround for AR9331 hang at boot issue
It looks that we really need it, so restore workaround
from original Atheros (Q)SDK. In future we should try
to find better way to deal with this problem.
Piotr Dymacz [Sun, 20 Mar 2016 14:09:33 +0000 (15:09 +0100)]
Add new, common setup code for QC/A WiSoC DDR controllers
In old code, based on Qualcomm/Atheros (Q)SDK, most of the
DDR controller related registers where setup with static
values, based on selected PLL/clocks configuration or
chosen board type.
New setup code is universal and configures DDR controller
based on real hardware state (clocks, memory type).
For now, the code doesn't support SDRAM memory type,
as I don't have access to any QC/A based platform with
such type of memory chip. But it seems, that newer QC/A
WiSoCs don't support it (excluding QCA953x v1?) anyway.
New code contains also fixed DQS delay tap controller tune
for AR93xx WiSoCs, which for now is used only for AR933x,
as it turned out that DDR BITS is available also on AR934x.
In old code, tune routine starts with some hardcoded values,
which leads to an assumption that this starting value is
inside working tap range. As it turned out after some tests,
this assumption is wrong and on some real hardware platforms
gives wrong delay tap values, outside correct/working range.
New code was tested on many different QC/A platforms, but
will need changes and fixes in future, mostly because of
missing (at the moment) descriptions of DDR BIST registers.
Piotr Dymacz [Thu, 17 Mar 2016 20:51:18 +0000 (21:51 +0100)]
For AR933x always return 16-bit DDR width
Piotr Dymacz [Mon, 14 Mar 2016 00:10:52 +0000 (01:10 +0100)]
Add DDR_FSM_WAIT_CONTROL register address in common QC/A header
Piotr Dymacz [Mon, 14 Mar 2016 00:09:38 +0000 (01:09 +0100)]
Setup AHB master tout in QCA95xx low level init, as it's done for AR933x
Piotr Dymacz [Sun, 13 Mar 2016 23:18:46 +0000 (00:18 +0100)]
Add DDR_BURST{,2} register defines in common QC/A header
Piotr Dymacz [Sun, 13 Mar 2016 21:57:04 +0000 (22:57 +0100)]
Add functions which return DDR width and CAS latency, use them in printing board info
Piotr Dymacz [Sun, 13 Mar 2016 21:43:07 +0000 (22:43 +0100)]
Calculate SPI clock only if needed in qca_clocks.c
Piotr Dymacz [Sun, 13 Mar 2016 21:41:46 +0000 (22:41 +0100)]
Adjust qca_dram.h after last changes in bit fields define names
Piotr Dymacz [Sun, 13 Mar 2016 21:39:36 +0000 (22:39 +0100)]
Add and fix DRAM register defines and two func prototypes in common QC/A header
Piotr Dymacz [Sun, 13 Mar 2016 10:48:28 +0000 (11:48 +0100)]
Cosmetic changes and fixes in qca_clocks.c
Piotr Dymacz [Thu, 10 Mar 2016 22:25:01 +0000 (23:25 +0100)]
Move DDR_RD_DATA_THIS_CYCLE reg setup in new AR933x dram init code before timing setup
Piotr Dymacz [Thu, 10 Mar 2016 17:19:08 +0000 (18:19 +0100)]
Add some bootstrap register related defines in common QC/A header
Piotr Dymacz [Thu, 10 Mar 2016 17:15:07 +0000 (18:15 +0100)]
Move up DDR_RD_DATA_THIS_CYCLE register setup in new AR933x dram init code
Piotr Dymacz [Wed, 9 Mar 2016 01:25:42 +0000 (02:25 +0100)]
Introduce new DRAM related init code for QC/A (for now AR933x)
Piotr Dymacz [Sun, 6 Mar 2016 15:02:51 +0000 (16:02 +0100)]
Include workaround for AR933x PLL init from old code, should fix problem with hang on start/restart
Piotr Dymacz [Fri, 4 Mar 2016 01:12:21 +0000 (02:12 +0100)]
Add QC/A DRAM related reg defines, function prototypes and use defines from soc_common.h for memory types
Piotr Dymacz [Thu, 3 Mar 2016 14:30:51 +0000 (15:30 +0100)]
Change GPIO_RST_BUTTON_* define names
Piotr Dymacz [Thu, 3 Mar 2016 13:05:27 +0000 (14:05 +0100)]
Change DEFAULT_FLASH_SIZE_IN_MB define name, use 4 by default, throw error on not supported value
Piotr Dymacz [Thu, 3 Mar 2016 12:57:16 +0000 (13:57 +0100)]
Change BOARD_CUSTOM_STRING define name, add default value if not defined
Piotr Dymacz [Thu, 3 Mar 2016 11:44:17 +0000 (12:44 +0100)]
Minor changes in common spi_flash.c
Piotr Dymacz [Wed, 2 Mar 2016 22:36:29 +0000 (23:36 +0100)]
Add support for TP-Link TL-WR841N v9 (QCA953x based)
Piotr Dymacz [Wed, 2 Mar 2016 22:33:50 +0000 (23:33 +0100)]
Fix ap143 Makefile
Piotr Dymacz [Wed, 2 Mar 2016 17:19:37 +0000 (18:19 +0100)]
Fix logic mistake in QC/A low level GPIO init
Piotr Dymacz [Wed, 2 Mar 2016 14:47:01 +0000 (15:47 +0100)]
Use 'CN' instead of 'CH' for indicate that device is for China market, plus minor fixes in Makefiles
Piotr Dymacz [Wed, 2 Mar 2016 14:24:03 +0000 (15:24 +0100)]
Include repository status (-{clean,dirty}) in version string
Piotr Dymacz [Wed, 2 Mar 2016 01:32:28 +0000 (02:32 +0100)]
Use CONFIG_TPLINK_IMAGE_HEADER define to select TP-Link img header, plus minor changes in Makefile
Piotr Dymacz [Tue, 1 Mar 2016 20:54:04 +0000 (21:54 +0100)]
Add original U-Boot image for TP-Link TL-WR841N v9
Piotr Dymacz [Tue, 1 Mar 2016 10:45:27 +0000 (11:45 +0100)]
Move reset_button_status function to common qca file
Piotr Dymacz [Mon, 29 Feb 2016 23:21:04 +0000 (00:21 +0100)]
Remove old and not used anymore code for QCA953x low level init
Piotr Dymacz [Sun, 28 Feb 2016 22:48:00 +0000 (23:48 +0100)]
Configure LSUART TX pin in low level GPIO init even if input/output masks are not defined
Piotr Dymacz [Tue, 23 Feb 2016 08:57:49 +0000 (09:57 +0100)]
Adjust apu143.h config file for new PLL/clock and GPIO configuration code, minor changes for WR820
Piotr Dymacz [Sun, 21 Feb 2016 13:18:40 +0000 (14:18 +0100)]
Adjust db12x.h config file for new PLL/clock configuration code
Piotr Dymacz [Sun, 21 Feb 2016 11:43:43 +0000 (12:43 +0100)]
Adjust ap121.h config file for new PLL/clock configuration code
Piotr Dymacz [Sun, 21 Feb 2016 11:40:15 +0000 (12:40 +0100)]
Remove old and unused ar933x header file
Piotr Dymacz [Sun, 21 Feb 2016 09:45:04 +0000 (10:45 +0100)]
Add cmd_qcaclk to Makefile
Piotr Dymacz [Sun, 21 Feb 2016 09:40:44 +0000 (10:40 +0100)]
Add new setclk/clearclk custom commands for QC/A
New code is universal, supports not only AR933x, but also
new QCA95xx and AR934x WiSoCs.
Piotr Dymacz [Sun, 21 Feb 2016 09:29:34 +0000 (10:29 +0100)]
Introduce new low level init code for AR934x/QCA95xx and AR933x
New code is simpler, more universal and supports:
- clock configuration stored in FLASH
- non-fractional PLL/clocks configuration
- recovery mode (sets safe clocks when recovery button is pressed)
This was tested on many different QC/A WiSoCs and platforms,
including new QCA95xx chips.
Code for AR933x still needs some additional work. The original code
from Atheros SDK is very buggy and includes lot of (still) unknown
parts, like "pmu setup", "meas", etc. It seems that most of that
is related with radio configuration.
Piotr Dymacz [Sun, 21 Feb 2016 09:22:41 +0000 (10:22 +0100)]
Remove platform related code from start{_bootstrap}.S code, we will have it new low level init code
Piotr Dymacz [Sun, 21 Feb 2016 09:18:09 +0000 (10:18 +0100)]
Don't use dash in defines
Piotr Dymacz [Sun, 21 Feb 2016 09:13:36 +0000 (10:13 +0100)]
Remove old code of setclk and clearclk custom commands
Piotr Dymacz [Sun, 21 Feb 2016 01:30:33 +0000 (02:30 +0100)]
Add GPIO_FUNCTION_2 register defines, setup GPIO11/12 if needed in low level init code for AR933x
Piotr Dymacz [Sat, 20 Feb 2016 01:17:26 +0000 (02:17 +0100)]
Fix CPU PLL dither register definitions; add some other needed defines in common QCA header file
Piotr Dymacz [Fri, 19 Feb 2016 12:54:18 +0000 (13:54 +0100)]
Introduce new, low level GPIO initialization code
New code is universal and allows to predefine several config options:
- JTAG enable
- bitmasks for GPIOs set as inputs and outputs
- bitmasks for GPIO driven LEDs (active in low and hi)
- bitmasks for initial values on configured GPIOs
- LSUART GPIO lines
Code was tested on all supported WiSoCs: AR933x, AR934x and QCA95xx.
This commit removes also old GPIO related code and adds needed
bitmasks definitions in ap121 and db12x configs.