oweals/u-boot.git
6 years agofix: nand: pxa3xx: Add WA for eliminating flash ready timeout
David Sniatkiwicz [Wed, 29 Aug 2018 08:56:18 +0000 (11:56 +0300)]
fix: nand: pxa3xx: Add WA for eliminating flash ready timeout

add delay before processing the status flags in pxa3xx_nand_irq().

Signed-off-by: David Sniatkiwicz <davidsn@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
c: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agonand: pxa3xx: Add support for 8KB page 4 and 8 bit ECC NAND
Konstantin Porotchkin [Wed, 29 Aug 2018 08:56:17 +0000 (11:56 +0300)]
nand: pxa3xx: Add support for 8KB page 4 and 8 bit ECC NAND

Add support for NAND chips with 8KB page, 4 and 8 bit ECC (ONFI).

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Ofer Heifetz <oferh@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agonand: pxa3xx: cosmetic: add comments to the timing layout structures
Konstantin Porotchkin [Wed, 29 Aug 2018 08:56:16 +0000 (11:56 +0300)]
nand: pxa3xx: cosmetic: add comments to the timing layout structures

Add comments with timing parameter names and some details about
nand layout fileds.
Remove unneeded definition.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agofix: nand: Replace hardcoded page chunk size with calculated one
Konstantin Porotchkin [Wed, 29 Aug 2018 08:56:15 +0000 (11:56 +0300)]
fix: nand: Replace hardcoded page chunk size with calculated one

Replace the hardcoded value of page chink with value that
depends on flash page size and ECC strength.
This fixes nand access errors for 2K page flashes with 8-bit ECC.
Move the initial flash commannd function assignment past the ECC
structures initialization for eliminating usage of hardcoded page
chunk size value.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agomtd: nand: pxa3xx: add support for Toshiba flash
Konstantin Porotchkin [Wed, 29 Aug 2018 08:56:14 +0000 (11:56 +0300)]
mtd: nand: pxa3xx: add support for Toshiba flash

Add timings and device ID for Toshiba TC58NVG1S3HTA00 flash

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agomtd: nand: pxa3xx: add support for 2KB 8-bit flash
Victor Axelrod [Wed, 29 Aug 2018 08:56:13 +0000 (11:56 +0300)]
mtd: nand: pxa3xx: add support for 2KB 8-bit flash

Add support for 2KB page 8-bit ECC strength flash layout

Signed-off-by: Victor Axelrod <victora@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agomtd: nand: pxa3xx: Fix READOOB implementation
Boris Brezillon [Wed, 29 Aug 2018 08:56:12 +0000 (11:56 +0300)]
mtd: nand: pxa3xx: Fix READOOB implementation

In the current driver, OOB bytes are accessed in raw mode, and when a
page access is done with NDCR_SPARE_EN set and NDCR_ECC_EN cleared, the
driver must read the whole spare area (64 bytes in case of a 2k page,
16 bytes for a 512 page). The driver was only reading the free OOB
bytes, which was leaving some unread data in the FIFO and was somehow
leading to a timeout.

We could patch the driver to read ->spare_size + ->ecc_size instead of
just ->spare_size when READOOB is requested, but we'd better make
in-band and OOB accesses consistent.
Since the driver is always accessing in-band data in non-raw mode (with
the ECC engine enabled), we should also access OOB data in this mode.
That's particularly useful when using the BCH engine because in this
mode the free OOB bytes are also ECC protected.

Fixes: 43bcfd2bb24a ("mtd: nand: pxa3xx: Add driver-specific ECC BCH support")
Cc: stable@vger.kernel.org
Reported-by: Sean Nyekjær <sean.nyekjaer@prevas.dk>
Tested-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Tested-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agomtd: nand: pxa3xx_nand: add support for partial chunks
Ofer Heifetz [Wed, 29 Aug 2018 08:56:09 +0000 (11:56 +0300)]
mtd: nand: pxa3xx_nand: add support for partial chunks

This commit is needed to properly support the 8-bits ECC configuration
with 4KB pages.

When pages larger than 2 KB are used on platforms using the PXA3xx
NAND controller, the reading/programming operations need to be split
in chunks of 2 KBs or less because the controller FIFO is limited to
about 2 KB (i.e a bit more than 2 KB to accommodate OOB data). Due to
this requirement, the data layout on NAND is a bit strange, with ECC
interleaved with data, at the end of each chunk.

When a 4-bits ECC configuration is used with 4 KB pages, the physical
data layout on the NAND looks like this:

| 2048 data | 32 spare | 30 ECC | 2048 data | 32 spare | 30 ECC |

So the data chunks have an equal size, 2080 bytes for each chunk,
which the driver supports properly.

When a 8-bits ECC configuration is used with 4KB pages, the physical
data layout on the NAND looks like this:

| 1024 data | 30 ECC | 1024 data | 30 ECC | 1024 data | 30 ECC | 1024 data | 30 ECC | 64 spare | 30 ECC |

So, the spare area is stored in its own chunk, which has a different
size than the other chunks. Since OOB is not used by UBIFS, the initial
implementation of the driver has chosen to not support reading this
additional "spare" chunk of data.

Unfortunately, Marvell has chosen to store the BBT signature in the
OOB area. Therefore, if the driver doesn't read this spare area, Linux
has no way of finding the BBT. It thinks there is no BBT, and rewrites
one, which U-Boot does not recognize, causing compatibility problems
between the bootloader and the kernel in terms of NAND usage.

To fix this, this commit implements the support for reading a partial
last chunk. This support is currently only useful for the case of 8
bits ECC with 4 KB pages, but it will be useful in the future to
enable other configurations such as 12 bits and 16 bits ECC with 4 KB
pages, or 8 bits ECC with 8 KB pages, etc. All those configurations
have a "last" chunk that doesn't have the same size as the other
chunks.

In order to implement reading of the last chunk, this commit:

 - Adds a number of new fields to the pxa3xx_nand_info to describe how
   many full chunks and how many chunks we have, the size of full
   chunks and partial chunks, both in terms of data area and spare
   area.

 - Fills in the step_chunk_size and step_spare_size variables to
   describe how much data and spare should be read/written for the
   current read/program step.

 - Reworks the state machine to accommodate doing the additional read
   or program step when a last partial chunk is used.

This commit is taken from Linux:
'commit c2cdace755b'
("mtd: nand: pxa3xx_nand: add support for partial chunks")

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agomtd: pxa3xx_nand: Simplify pxa3xx_nand_scan
Ofer Heifetz [Wed, 29 Aug 2018 08:56:08 +0000 (11:56 +0300)]
mtd: pxa3xx_nand: Simplify pxa3xx_nand_scan

This commit simplifies the initial configuration performed
by pxa3xx_nand_scan. No functionality change is intended.

This commit is taken from Linux:
'commit 154f50fbde53'
("mtd: pxa3xx_nand: Simplify pxa3xx_nand_scan")

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agomtd: pxa3xx_nand: Fix initial controller configuration
Ofer Heifetz [Wed, 29 Aug 2018 08:56:07 +0000 (11:56 +0300)]
mtd: pxa3xx_nand: Fix initial controller configuration

The Data Flash Control Register (NDCR) contains two types
of parameters: those that are needed for device identification,
and those that can only be set after device identification.

Therefore, the driver can't set them all at once and instead
needs to configure the first group before nand_scan_ident()
and the second group later.

Let's split pxa3xx_nand_config in two halves, and set the
parameters that depend on the device geometry once this is known.

This commit is taken from Linux:
'commit 66e8e47eae65'
("mtd: pxa3xx_nand: Fix initial controller configuration")

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agomtd: pxa3xx_nand: Increase the initial chunk size
Ofer Heifetz [Wed, 29 Aug 2018 08:56:06 +0000 (11:56 +0300)]
mtd: pxa3xx_nand: Increase the initial chunk size

The chunk size represents the size of the data chunks, which
is used by the controllers that allow to split transferred data.

However, the initial chunk size is used in a non-split way,
during device identification. Therefore, it must be large enough
for all the NAND commands issued during device identification.
This includes NAND_CMD_PARAM which was recently changed to
transfer up to 2048 bytes (for the redundant parameter pages).

Thus, the initial chunk size should be 2048 as well.

On Armada 370/XP platforms (NFCv2) booted without the keep-config
devicetree property, this commit fixes a timeout on the NAND_CMD_PARAM
command:

  [..]
  pxa3xx-nand f10d0000.nand: This platform can't do DMA on this device
  pxa3xx-nand f10d0000.nand: Wait time out!!!
  nand: device found, Manufacturer ID: 0x2c, Chip ID: 0x38
  nand: Micron MT29F8G08ABABAWP
  nand: 1024 MiB, SLC, erase size: 512 KiB, page size: 4096, OOB size: 224

This commit is taken from Linux:
'commit c7f00c29aa8'
("mtd: pxa3xx_nand: Increase the initial chunk size")

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agonand: pxa3xx: Increase READ_ID buffer and make the size static
Ofer Heifetz [Wed, 29 Aug 2018 08:56:05 +0000 (11:56 +0300)]
nand: pxa3xx: Increase READ_ID buffer and make the size static

The read ID count should be made as large as the maximum READ_ID size,
so there's no need to have dynamic size. This commit sets the hardware
maximum read ID count, which should be more than enough on all cases.
Also, we get rid of the read_id_bytes, and use a macro instead.

This commit is taken from Linux:
'commit b226eca2088'
("nand: pxa3xx: Increase READ_ID buffer and make the size static")

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agomtd: nand: pxa3xx-nand: fix random command timeouts
Ofer Heifetz [Wed, 29 Aug 2018 08:56:04 +0000 (11:56 +0300)]
mtd: nand: pxa3xx-nand: fix random command timeouts

When 2 commands are submitted in a row, and the second is very quick,
the completion of the second command might never come. This happens
especially if the second command is quick, such as a status read
after an erase

This patch is taken from Linux:
'commit 21fc0ef9652f'
("mtd: nand: pxa3xx-nand: fix random command timeouts")

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agomtd: nand: pxa3xx_nand: fix early spurious interrupt
Ofer Heifetz [Wed, 29 Aug 2018 08:56:03 +0000 (11:56 +0300)]
mtd: nand: pxa3xx_nand: fix early spurious interrupt

When the nand is first probe, and upon the first command start, the
status bits should be cleared before the interrupts are unmasked.

This commit is taken from Linux:
'commit 0b14392db2e'
("mtd: nand: pxa3xx_nand: fix early spurious interrupt")

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agomtd: nand: pxa3xx_nand: sync pxa3xx_nand_set_sdr_timing()
Ofer Heifetz [Wed, 29 Aug 2018 08:56:02 +0000 (11:56 +0300)]
mtd: nand: pxa3xx_nand: sync pxa3xx_nand_set_sdr_timing()

Since the pxa3xx_nand driver was added there has been a discrepancy in
pxa3xx_nand_set_sdr_timing() around the setting of tWP_min and tRP_min.
This brings us into line with the current Linux code.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agomtd: nand: pxa3xx_nand: use nand_to_mtd()
Ofer Heifetz [Wed, 29 Aug 2018 08:56:01 +0000 (11:56 +0300)]
mtd: nand: pxa3xx_nand: use nand_to_mtd()

Don't store struct mtd_info in struct pxa3xx_nand_host. Instead use the
one that is already part of struct nand_chip. This brings us in line
with current U-boot and Linux conventions.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agomtd: nand: pxa3xx_nand: Increase initial buffer size
Ofer Heifetz [Wed, 29 Aug 2018 08:56:00 +0000 (11:56 +0300)]
mtd: nand: pxa3xx_nand: Increase initial buffer size

The initial buffer is used for the initial commands used to detect
a flash device (STATUS, READID and PARAM).

ONFI param page is 256 bytes, and there are three redundant copies
to be read. JEDEC param page is 512 bytes, and there are also three
redundant copies to be read. Hence this buffer should be at least
512 x 3. This commits rounds the buffer size to 2048.

This commit is taken from Linux:
'commit c16340973fcb64614' ("nand: pxa3xx: Increase initial buffer size")

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoboard: turris_mox: Fixup U-Boot's device tree if PCIe connected
Marek Behún [Tue, 21 Aug 2018 10:22:09 +0000 (12:22 +0200)]
board: turris_mox: Fixup U-Boot's device tree if PCIe connected

If PCIe Mox module is connected we want to have PCIe node enabled
in U-Boot's device tree.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agodts: mvebu: mcbin: drop redundant SD slot node
Baruch Siach [Mon, 20 Aug 2018 12:12:10 +0000 (15:12 +0300)]
dts: mvebu: mcbin: drop redundant SD slot node

Commit 61dccf73d302 (dts: mvebu: a80x0: Enable SD/eMMC interfaces) added
a redundant DT node for SD card slot. Drop it.

Cc: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoarch/arm/dts: Update Turris Mox device tree
Marek Behún [Fri, 17 Aug 2018 10:59:01 +0000 (12:59 +0200)]
arch/arm/dts: Update Turris Mox device tree

Remove smi_pins definition since it is already in armada-37xx.dtsi.
Add assigned-clocks definitions to spi0.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoboard: turris_mox: Enable PCI in defconfig
Marek Behún [Fri, 17 Aug 2018 10:58:55 +0000 (12:58 +0200)]
board: turris_mox: Enable PCI in defconfig

Enable the pci-aardvark driver in defconfig for Turris Mox and also
enable the pci command.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoboard: turris_mox: Fix watchdog macro name
Marek Behún [Fri, 17 Aug 2018 10:58:53 +0000 (12:58 +0200)]
board: turris_mox: Fix watchdog macro name

The macro name CONFIG_WDT_ARMADA_3720 is called CONFIG_WDT_ARMADA_37XX
instead. Fix this so that watchdog really is enabled in board_init.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoclk: armada-37xx-periph: Support changing clock parent and rate
Marek Behún [Fri, 17 Aug 2018 10:58:52 +0000 (12:58 +0200)]
clk: armada-37xx-periph: Support changing clock parent and rate

Add support for changing clock rate and parent clock for Armada 37xx
peripheral clocks.

Only clocks which can be disabled (.can_gate is true) can have parent
or rate changed.

This is needed so that Turris Mox can change SPI clock in device tree.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agophy: marvell: Support changing SERDES map in board file
Marek Behún [Fri, 17 Aug 2018 10:58:51 +0000 (12:58 +0200)]
phy: marvell: Support changing SERDES map in board file

This adds a weak definition of comphy_update_map to comphy_core,
which does nothing. If this function is defined elsewhere, for example
in board file, the board file can change some parameters of SERDES
configuration.

This is needed on Turris Mox, where the SERDES speed on lane 1 has to
be set differently when SFP module is connected and when Topaz Switch
module is connected.

This is a temporary solution. When the comphy driver for armada-3720
will be added to the kernel, the comphy driver in u-boot shall also be
updated and this should be done differently then.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoARM: mach-mvebu: handle fall-back to UART boot
Chris Packham [Fri, 17 Aug 2018 08:47:42 +0000 (20:47 +1200)]
ARM: mach-mvebu: handle fall-back to UART boot

The bootROM in the Armada-38x (and similar) SoC has two modes for UART
boot. The first is when the normal boot media is blank (or otherwise
missing the kwb header). The second is when the boot sequence has been
interrupted with the magic byte sequence on the UART lines.

In the first mode the bootROM routine and error code register will
indicate that there was an error booting from the configured media in
bits 7:0. In the second mode there is no error to indicate but the boot
source is provided via bits 31:28.

Handle both situations so that kwboot can be used for both boot
strapping a blank board and for intercepting a regular boot sequence.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoRevert "arm: mvebu: fix boot from UART when in fallback mode"
Chris Packham [Fri, 17 Aug 2018 08:47:41 +0000 (20:47 +1200)]
Revert "arm: mvebu: fix boot from UART when in fallback mode"

This reverts commit e83e2b390038c9075642cb243a6292241beb8d73. This
prevents kwboot from overriding the hardware strapped boot source.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoarm64: mvebu: armada-8k: support environment in SD/eMMC
Baruch Siach [Tue, 14 Aug 2018 15:05:46 +0000 (18:05 +0300)]
arm64: mvebu: armada-8k: support environment in SD/eMMC

Detect the SD/eMMC boot device at run-time. Load the environment from
the boot deice, as well as save to it.

Leave the environment offset the same as in the SPI flash.

Make SD/eMMC 0 the default environment device when the boot device is
not detected.

Cc: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agotools: kwboot: Make kwboot more robust on a38x
Jon Nettleton [Mon, 13 Aug 2018 15:24:38 +0000 (18:24 +0300)]
tools: kwboot: Make kwboot more robust on a38x

This patch accomplishes 2 things to make the kwboot procedure
on the a38x more reliable.

1)  We fill the tty with 1K of the magic bootparam.  This helps
with the timing of where the microcode picks up in the read of
the line to ensure we actually catch the break to go into recovery
mode

2)  Before starting the xmodem transfer we sleep for 2 seconds
and then flush the line.  This allows all the magic bootparam
to be flushed from the line and makes the xmodem transfer reliable
and removes the Bad message failures.

Signed-off-by: Jon Nettleton <jon@solid-run.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agodoc/git-mailrc: add Stefan Roese to the kirkwood alias
Baruch Siach [Mon, 13 Aug 2018 14:57:21 +0000 (17:57 +0300)]
doc/git-mailrc: add Stefan Roese to the kirkwood alias

Stefan is listed as a kirkwood maintainer since commit f822d8578ba3
(MAINTAINERS: Update Marvell custodianship).

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoKirkwood: NAS220: remove bootdelay from CONFIG_EXTRA_ENV_SETTINGS
Evgeni Dobrev [Sun, 5 Aug 2018 19:56:20 +0000 (21:56 +0200)]
Kirkwood: NAS220: remove bootdelay from CONFIG_EXTRA_ENV_SETTINGS

The default bootdelay of 3 seconds is good enough and there is no need
to duplicate it in CONFIG_EXTRA_ENV_SETTINGS.

Signed-off-by: Evgeni Dobrev <evgeni@studio-punkt.com>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoMerge git://git.denx.de/u-boot-x86
Tom Rini [Mon, 17 Sep 2018 12:04:25 +0000 (08:04 -0400)]
Merge git://git.denx.de/u-boot-x86

6 years agox86: cpu: add docstring to scu_ipc_command()
Georgii Staroselskii [Tue, 11 Sep 2018 10:31:10 +0000 (13:31 +0300)]
x86: cpu: add docstring to scu_ipc_command()

These comments were copied from the Linux kernel driver in
drivers/platform/x86/intel_scu_ipc.c

Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
6 years agox86: tangier: acpi: add I2C6 node
Georgii Staroselskii [Tue, 11 Sep 2018 10:31:09 +0000 (13:31 +0300)]
x86: tangier: acpi: add I2C6 node

Now that we have I2C#6 working, it's time to add a corresponsing
ACPI binding.

Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
6 years agox86: dts: edison: configure I2C#6 pins
Georgii Staroselskii [Tue, 11 Sep 2018 10:31:08 +0000 (13:31 +0300)]
x86: dts: edison: configure I2C#6 pins

Now that we have the pinctrl driver for Merrifield in place we can make
use of it and set I2C#6 pins appropriately.

Initial configuration came from the firmware.  Which quite likely has
been used in the phones, where that is not part of Atom peripheral, is
in use. Thus we need to override the leftover.

Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
6 years agox86: tangier: pinmux: add API to configure protected pins
Georgii Staroselskii [Tue, 11 Sep 2018 10:31:07 +0000 (13:31 +0300)]
x86: tangier: pinmux: add API to configure protected pins

This API is going to be used to configure some pins that are protected
for simple modification.

It's not a comprehensive pinctrl driver but can be turned into one
when we need this in the future. Now it is planned to be used only
in one place. So that's why I decided not to pollute the codebase with a
full-blown pinctrl-merrifield nobody will use.

This driver reads corresponding fields in DT and configures pins
accordingly.

The "protected" flag is used to distinguish configuration of SCU-owned
pins from the ordinary ones.

The code has been adapted from Linux work done by Andy Shevchenko
in pinctrl-merrfifield.c

Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fix build warning]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
6 years agox86: cpu: introduce scu_ipc_raw_command()
Georgii Staroselskii [Tue, 11 Sep 2018 10:31:06 +0000 (13:31 +0300)]
x86: cpu: introduce scu_ipc_raw_command()

This interface will be used to configure properly some pins on
Merrifield that are shared with SCU.

scu_ipc_raw_command() writes SPTR and DPTR registers before sending
a command to SCU.

This code has been ported from Linux work done by Andy Shevchenko.

Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
6 years agox86: drop custom CONFIG_SYS_BAUDRATE_TABLE define
Christian Gmeiner [Fri, 7 Sep 2018 07:30:00 +0000 (09:30 +0200)]
x86: drop custom CONFIG_SYS_BAUDRATE_TABLE define

This will add support for a baud rate of 57600.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-coldfire
Tom Rini [Sun, 16 Sep 2018 14:32:33 +0000 (10:32 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-coldfire

6 years agoMerge branch 'master' of git://git.denx.de/u-boot-socfpga
Tom Rini [Sun, 16 Sep 2018 14:30:16 +0000 (10:30 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-socfpga

6 years agoMerge branch 'master' of git://git.denx.de/u-boot-usb
Tom Rini [Sun, 16 Sep 2018 14:29:47 +0000 (10:29 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-usb

6 years agoMerge branch 'master' of git://git.denx.de/u-boot-sh
Tom Rini [Sun, 16 Sep 2018 14:29:39 +0000 (10:29 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-sh

6 years agom68k: ColdFire mcf5441x, add eSDHC support
Angelo Dureghello [Thu, 25 Jan 2018 21:42:52 +0000 (22:42 +0100)]
m68k: ColdFire mcf5441x, add eSDHC support

This patch adds mcf5441x eSDHC support for the mcf5441x family.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>
6 years agom68k: fix multiple memory accesses on swap operations
Angelo Dureghello [Sat, 4 Aug 2018 21:02:56 +0000 (23:02 +0200)]
m68k: fix multiple memory accesses on swap operations

On a
u32 val = __sw32(*addr);

multiple memory accesses are not welcome, since "addr" may
be an IO peripheral register address.
This patch changes __sw16/32 to perform a single memory
access for the source value.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>
6 years agom68k: fix mcf5441x total interrupt number
Angelo Dureghello [Sun, 4 Feb 2018 20:13:12 +0000 (21:13 +0100)]
m68k: fix mcf5441x total interrupt number

Signed-off-by: Angelo Dureghello <angelo@sysam.it>
6 years agoARM: rmobile: Repair TMU clock on Gen2
Marek Vasut [Fri, 24 Aug 2018 20:36:18 +0000 (22:36 +0200)]
ARM: rmobile: Repair TMU clock on Gen2

The Gen2 TMU is fed with fixed 32.5 MHz signal from CP .
This is then divided by 4 in TMU. Fix the timer clock
setting in Gen2.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
6 years agosh: tmu: Zap get_tbclk and timer_read_counter
Marek Vasut [Fri, 24 Aug 2018 19:52:53 +0000 (21:52 +0200)]
sh: tmu: Zap get_tbclk and timer_read_counter

Replace those two functions with generic ones by defining the
timer macros in include/config/*.h .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
6 years agosh: tmu: Clean up register usage
Marek Vasut [Fri, 24 Aug 2018 19:43:17 +0000 (21:43 +0200)]
sh: tmu: Clean up register usage

The code uses all in all three TMU registers, drop the massive
register layout structures and just define the required timer
registers and use them throughout the code.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
6 years agosh: tmu: Inline sh_tmu.h
Marek Vasut [Fri, 24 Aug 2018 19:37:14 +0000 (21:37 +0200)]
sh: tmu: Inline sh_tmu.h

The header contains only the TMU register layout, just inline it
into the TMU timer implementation and drop the header completely.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
6 years agosh: tmu: Clean up CONFIG_SH_TMU_CLK_FREQ
Marek Vasut [Fri, 24 Aug 2018 19:34:07 +0000 (21:34 +0200)]
sh: tmu: Clean up CONFIG_SH_TMU_CLK_FREQ

The R-Car Gen2 feeds the TMU with CONFIG_SYS_CLK_FREQ / 2,
while the old SH parts use CONFIG_SYS_CLK_FREQ directly.
Just put this into the TMU implementation and drop the
CONFIG_SH_TMU_CLK_FREQ config option.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
6 years agosh: tmu: Inline get_tmu0_clk_rate()
Marek Vasut [Fri, 24 Aug 2018 19:29:04 +0000 (21:29 +0200)]
sh: tmu: Inline get_tmu0_clk_rate()

This function just returns CONFIG_SH_TMU_CLK_FREQ, use the constant
directly instead.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
6 years agosh: tmu: Inline tmu_timer_{start,stop}()
Marek Vasut [Fri, 24 Aug 2018 19:23:04 +0000 (21:23 +0200)]
sh: tmu: Inline tmu_timer_{start,stop}()

These functions are always called for timer = 0, so drop the
timer check. Since these functions are called from one place
only and they are reduced to one line of code, just inline
them.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
6 years agosh: tmu: Simplify the tmu_bit math
Marek Vasut [Fri, 24 Aug 2018 19:20:31 +0000 (21:20 +0200)]
sh: tmu: Simplify the tmu_bit math

The tmu_bit value evaluates to (ffs(4) >> 1) - 1 = (3 >> 1) - 1 = 0.
Just drop the tmu_bit completely as well as CONFIG_SYS_TMU_CLK_DIV.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
6 years agosh: tmu: Clean up CONFIG_SYS_TMU_CLK_DIV
Marek Vasut [Fri, 24 Aug 2018 19:19:15 +0000 (21:19 +0200)]
sh: tmu: Clean up CONFIG_SYS_TMU_CLK_DIV

This constant is always 4 , for all boards that exist. Define it
once in arch/sh/lib/time.c and remove it from the configs.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
6 years agosh: sh7724: Drop EDMR macro
Marek Vasut [Tue, 28 Aug 2018 09:44:44 +0000 (11:44 +0200)]
sh: sh7724: Drop EDMR macro

Drop the macro as it is never used and it collides with sh_eth.h macros.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agosh: sh7723: ap325rxa: Drop duplicate HIZCRB macro
Marek Vasut [Wed, 29 Aug 2018 01:18:30 +0000 (03:18 +0200)]
sh: sh7723: ap325rxa: Drop duplicate HIZCRB macro

Drop the macro as it is defined in sh7723.h already.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agousb: ehci-generic: Add vbus-supply regulator support
Patrice Chotard [Tue, 4 Sep 2018 09:37:25 +0000 (11:37 +0200)]
usb: ehci-generic: Add vbus-supply regulator support

Add vbus-supply regulator support.
On some board vbus is not controlled by the phy but by
an external regulator.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
6 years agoarm: socfpga: stratix10: Add CONFIG_OF_EMBED
Dalon Westergreen [Wed, 12 Sep 2018 00:25:00 +0000 (17:25 -0700)]
arm: socfpga: stratix10: Add CONFIG_OF_EMBED

The dtb should be embedded in the u-boot-spl image so that
the CONFIG_SPL_TARGET of spl/u-boot-spl.hex includes it.

This also affects the main u-boot image, so adjust
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME to u-boot.img which now
also includes the dtb.

Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
6 years agosocfpga: stratix10: fix sdram_calculate_size
Dalon Westergreen [Tue, 11 Sep 2018 17:06:14 +0000 (10:06 -0700)]
socfpga: stratix10: fix sdram_calculate_size

Incorrect type of size variable results in 0 being
returned for sdram sizes greater than or equal to
4GB.

Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
6 years agoarm: socfpga: stratix10: add CONFIG_SPL_TARGET
Dalon Westergreen [Mon, 10 Sep 2018 17:28:48 +0000 (10:28 -0700)]
arm: socfpga: stratix10: add CONFIG_SPL_TARGET

Stratix10 combines the u-boot-spl image into the fpga configuration
bitstream so that the SDM can load the processors memory.  This
process requires a hex format of the u-boot-spl image.
CONFIG_SPL_TARGET is set to "spl/u-boot-spl.hex"

Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
6 years agocommon: add spl/u-boot-spl.hex target
Dalon Westergreen [Mon, 10 Sep 2018 17:28:47 +0000 (10:28 -0700)]
common: add spl/u-boot-spl.hex target

Some devices, namely Intel's stratix10 SoC, require u-boot-spl in
a hex format.  This patch adds spl/u-boot-spl.hex as a possible
target.

Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
6 years agogpio: dwapb_gpio: Change to use dev_read_addr()
Ley Foon Tan [Wed, 15 Aug 2018 18:05:54 +0000 (02:05 +0800)]
gpio: dwapb_gpio: Change to use dev_read_addr()

This changes the driver to use dev_read_addr() which is safe both for
flat trees and live trees.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agogpio: dwapb_gpio: Add reset ctrl to driver
Ley Foon Tan [Tue, 4 Sep 2018 06:04:58 +0000 (14:04 +0800)]
gpio: dwapb_gpio: Add reset ctrl to driver

Add code to reset all reset signals as in gpio DT node. A reset property
is an optional feature, so only print out a warning and do not fail if a
reset property is not present.

If a reset property is discovered, then use it to deassert, thus
bringing the IP out of reset.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agogpio: dwapb_gpio: Enable get_function support
Ley Foon Tan [Thu, 16 Aug 2018 05:46:30 +0000 (13:46 +0800)]
gpio: dwapb_gpio: Enable get_function support

Enabled get_function support for dwapb where the function will
return the state of GPIO port.

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-ubi
Tom Rini [Fri, 14 Sep 2018 17:54:37 +0000 (13:54 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-ubi

6 years agoRevert "ARM: da850evm_direct_nor_defconfig: Enable DM_SERIAL"
Tom Rini [Fri, 14 Sep 2018 17:52:08 +0000 (13:52 -0400)]
Revert "ARM: da850evm_direct_nor_defconfig: Enable DM_SERIAL"

This commit is breaking several variants of da850, so:

This reverts commit 5f389201dece76b484443773dce2525dc205f5a1.

Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agoam3517_evm: Drop inadvertently added line
Tom Rini [Fri, 14 Sep 2018 17:41:31 +0000 (13:41 -0400)]
am3517_evm: Drop inadvertently added line

I added in the CONFIG_MISC_INIT_R line by mistake when applying the
previous patch, fix.

Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-i2c
Tom Rini [Fri, 14 Sep 2018 13:33:01 +0000 (09:33 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-i2c

6 years agofs: ubifs: Add missing newlines in super.c
Stefan Roese [Thu, 9 Aug 2018 07:09:20 +0000 (09:09 +0200)]
fs: ubifs: Add missing newlines in super.c

I just stumbled over some cluttered UBIFS messages. It seems some
newline chars are missing in the current U-Boot UBI source.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
6 years agoi2c: Drop CONFIG_SYS_I2C_MXS
Tuomas Tynkkynen [Wed, 15 Aug 2018 23:08:11 +0000 (02:08 +0300)]
i2c: Drop CONFIG_SYS_I2C_MXS

Last user of this driver went away in May 2017, in
commit eb5ba3aefdf0f6 ("i2c: Drop use of CONFIG_I2C_HARD")

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
6 years agoMMC: davinici_mmc: Enable CD and WP with DM and OF_CONTROL
Adam Ford [Mon, 3 Sep 2018 08:47:52 +0000 (03:47 -0500)]
MMC: davinici_mmc: Enable CD and WP with DM and OF_CONTROL

When used with a device tree, this will extract the card detect
and write protect pins from the device tree and configure them
accordingly.  This assumes the GPIO_ACTIVE_LOW/HIGH is supported
by da8xx_gpio.

Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agoARM: am3517_evm: Disable DM_I2C_COMPAT
Adam Ford [Sun, 19 Aug 2018 16:11:03 +0000 (11:11 -0500)]
ARM: am3517_evm: Disable DM_I2C_COMPAT

DM_I2C_COMPAT is somehow being enabled outside of Kconfig, so
this explicitly undefines it in the header file, and brackets
the I2C initialization around an #ifdef to not manually
initialize the I2C controller when the DM_I2C is enabled.

Signed-off-by: Adam Ford <aford173@gmail.com>
Tested-by: Derald D. Woods <woods.technical@gmail.com>
6 years agoConfigs: am3517_evm: Remove TWL4030 reference
Adam Ford [Sun, 19 Aug 2018 16:11:02 +0000 (11:11 -0500)]
Configs: am3517_evm: Remove TWL4030 reference

This SOM and kit do not nor have they ever had a twl4030 PMIC.
This patch removes the references to it.

Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agoARM: omap3_logic: Enable DM_PMIC and DM_REGULATOR
Adam Ford [Mon, 3 Sep 2018 19:05:41 +0000 (14:05 -0500)]
ARM: omap3_logic: Enable DM_PMIC and DM_REGULATOR

Enabling DM_PMIC, DM_REGULATOR_FIXED, and DM_REGULATOR_GPIO
gives us the ability to better monitor voltages and enable
hardware through the device tree. The TL4030 (TPS65950) is
not yet migrated to DM, so this patch only enables the fixed
and GPIO controlled regulators.

Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agoARM: da850evm_direct_nor_defconfig: Enable DM_SERIAL
Adam Ford [Tue, 14 Aug 2018 02:09:17 +0000 (21:09 -0500)]
ARM: da850evm_direct_nor_defconfig: Enable DM_SERIAL

With DM enabled, this patch enables DM_SERIAL and removes
the NS16550 initialization from da850_lowlevel since the driver
will take care of that itself.

Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agoARM: davinci: omapl138_lcdk: Enable DM_MMC
Adam Ford [Thu, 9 Aug 2018 11:15:14 +0000 (06:15 -0500)]
ARM: davinci: omapl138_lcdk: Enable DM_MMC

With DM_MMC now available, this patch enables DM_MMC for the
omapl138_lcdk in U-Boot and keeps the older style for SPL.

Signed-off-by: Peter Howard <phoward@gme.net.au>
Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agoARM: davinci: da850evm: Support DM_MMC
Adam Ford [Thu, 9 Aug 2018 11:15:13 +0000 (06:15 -0500)]
ARM: davinci: da850evm: Support DM_MMC

With the updated driver available to support DM_MMC, this patch
enables DM_MMC for da850evm.

Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agoMMC: Enable DM_MMC for Davinci
Adam Ford [Thu, 9 Aug 2018 11:15:12 +0000 (06:15 -0500)]
MMC: Enable DM_MMC for Davinci

With CONFIG_BLK becoming a requirement, the Davinci MMC driver
needs to be updated with DM_MMC support.  Since SPL is tiny and
many boards do not support DM in SPL, this retains the backwards
compatibility for those boards who need to initialize MMC manually
in SPL.

Signed-off-by: Peter Howard <phoward@gme.net.au>
Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agoARM: omap3_logic: Enable Pinctrl
Adam Ford [Mon, 3 Sep 2018 18:56:47 +0000 (13:56 -0500)]
ARM: omap3_logic: Enable Pinctrl

The simple pinctrl driver currently available works with the omap3.
Enabling this will use the device tree to automatically set the
pin-muxing for various drivers.

Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agoARM: omap3_logic_defconfig: Convert to DM_SPL
Adam Ford [Tue, 21 Aug 2018 15:43:30 +0000 (10:43 -0500)]
ARM: omap3_logic_defconfig: Convert to DM_SPL

The OF_CONTROL and OF_PLATDATA are not really useful without DM.
This patch supports DM_SPL, but it requires manual references
both Serial and MMC.

Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agommc: omap_hsmmc: Make DM_GPIO calls dependent on DM_GPIO
Adam Ford [Tue, 21 Aug 2018 12:16:56 +0000 (07:16 -0500)]
mmc: omap_hsmmc: Make DM_GPIO calls dependent on DM_GPIO

The getcd and getwp functions when DM_MMC is enabled are
assumming the DM_GPIO is enabled.  In cases (like SPL) where
DM_GPIO may not be enabled, wrap these calls in an #ifdef

Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agoDM: serial: ti_omap3_common: Don't define serial unless !DM_SERIAL
Adam Ford [Tue, 21 Aug 2018 01:43:00 +0000 (20:43 -0500)]
DM: serial: ti_omap3_common: Don't define serial unless !DM_SERIAL

The serial port was being manually configured during SPL build,
however in preparation to allow DM in SPL, this needs to change
to be based on whether or not DM_SERIAL is enabled because, soon
the assumption that SPL means no DM may not be accurate.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agoARM: mach-omap2: Don't initialize I2C if DM_I2C is enabled
Adam Ford [Tue, 21 Aug 2018 01:34:00 +0000 (20:34 -0500)]
ARM: mach-omap2: Don't initialize I2C if DM_I2C is enabled

boot-common.c checks to see if I2C is enabled in SPL, but
it doens't check for DM_I2C before initializing it.  This
will now only initialize the I2C is the DM_I2C is not enabled
to avoid initializing it more than once.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agoDM: omap_gpio: Reduce overhead when used with OF_PLATDATA
Adam Ford [Tue, 21 Aug 2018 01:27:48 +0000 (20:27 -0500)]
DM: omap_gpio: Reduce overhead when used with OF_PLATDATA

Platforms with limited resources in SPL may enable OF_PLATDATA,
this limits some of the library functions and cannot extract data
from the device tree.  This patch adds additional wrappers around
these functions to only allow them when OF_CONTROL is enabled and
OF_PLATDATA is not.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agoDM: OMAP24XX_I2C: Reduce overhead when used with OF_PLATDATA
Adam Ford [Tue, 21 Aug 2018 01:24:35 +0000 (20:24 -0500)]
DM: OMAP24XX_I2C: Reduce overhead when used with OF_PLATDATA

Platforms with limited resources in SPL may enably OF_PLATDATA,
this limits some of the library functions and cannot extract data
from the device tree.  This patch adds additional wrappers around
these functions to only allow them when OF_CONTROL is enabled and
OF_PLATDATA is not.

Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agoDM: I2C: Reduce overhead when used with OF_PLATDATA
Adam Ford [Tue, 21 Aug 2018 01:24:34 +0000 (20:24 -0500)]
DM: I2C: Reduce overhead when used with OF_PLATDATA

Platforms with limited resources in SPL may enably OF_PLATDATA,
this limits some of the library functions and cannot extract data
from the device tree.  This patch adds additional wrappers around
these functions to only allow them when OF_CONTROL is enabled and
OF_PLATDATA is not.

Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agoregulator: pbias: Add additional compatible flags
Adam Ford [Mon, 20 Aug 2018 01:54:00 +0000 (20:54 -0500)]
regulator: pbias: Add additional compatible flags

The driver was developed with references for more than just
dra7, but never included.  At least for omap3, this appears
to be functional.

Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agoGPIO: omap_gpio: Fix gpio name names with device tree
Adam Ford [Fri, 17 Aug 2018 19:37:58 +0000 (14:37 -0500)]
GPIO: omap_gpio: Fix gpio name names with device tree

The GPIO bank numbers do not appear in the device tree, so this
patch makes the gpio name based on the address
(ie gpio@49054000_31 vs gpio4_31)

adam

Signed-off-by: Adam Ford <aford173@gmail.com>
Tested-by: Derald D. Woods <woods.technical@gmail.com>
6 years agoARM: dts: da850-evm-u-boot: Remove redundant entries
Adam Ford [Fri, 17 Aug 2018 14:32:39 +0000 (09:32 -0500)]
ARM: dts: da850-evm-u-boot: Remove redundant entries

With the re-sync from Linux 4.18, several entries in
da850-evm-u-boot.dtsi are no longer necessary, so this patch
removes them.

Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agoarm: dts: da850: Re-sync da850-evm.dts from Linux 4.18
Adam Ford [Fri, 17 Aug 2018 13:56:15 +0000 (08:56 -0500)]
arm: dts: da850: Re-sync da850-evm.dts from Linux 4.18

Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agodm: gpio: da8xx_gpio: Add support for GPIO_ACTIVE_LOW/HIGH
Adam Ford [Fri, 17 Aug 2018 04:21:57 +0000 (23:21 -0500)]
dm: gpio: da8xx_gpio: Add support for GPIO_ACTIVE_LOW/HIGH

With DM and device tree support, let's use the GPIO_ACTIVE_HIGH
and GPIO_ACTIVE_LOW from the device tree as they are intended.

Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agoDM: GPIO: Fix da8xx GPIO indexing over GPIO 32
Adam Ford [Fri, 17 Aug 2018 04:13:34 +0000 (23:13 -0500)]
DM: GPIO: Fix da8xx GPIO indexing over GPIO 32

The GPIO banks are broken up into two 16-bit registers for each
bank set.  Unfortunately, the math that determines how to shift
blindly shifted by the number of the gpio.  This worked for gpio
numbers under 32, but higher gpio's are broken.  This fixes the
gpio index, so the bank is passed and the shift amount within
the register is passed now instead of the gpio number.

Fixes: 8e51c0f25406("dm: gpio: Add DM compatibility to
GPIO driver for Davinci")

Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agoARM: configs: Add da850evm_nand to boot from NAND
Adam Ford [Wed, 15 Aug 2018 18:22:03 +0000 (13:22 -0500)]
ARM: configs: Add da850evm_nand to boot from NAND

The DA850-EVM supports booting from NAND when used with the
UI expander board.  da850evm_nand will create an ais file
that can be burned to NAND and booted while storing the env in
NAND along with some partitions tables for storing kernel,
dtb and rootfs in NAND.

Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agoARM: da850evm_direct_nor: Enable CONFIG_BLK
Adam Ford [Tue, 14 Aug 2018 01:44:08 +0000 (20:44 -0500)]
ARM: da850evm_direct_nor: Enable CONFIG_BLK

At least for now, CONFIG_BLK is working, but this variant of
the da850evm doesn't need/support SPL so it's OK to enable it
here.

Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-uniphier
Tom Rini [Tue, 11 Sep 2018 12:50:10 +0000 (08:50 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-uniphier

6 years agoMerge tag 'fpga-for-v2018.11' of git://git.denx.de/u-boot-microblaze
Tom Rini [Tue, 11 Sep 2018 12:49:21 +0000 (08:49 -0400)]
Merge tag 'fpga-for-v2018.11' of git://git.denx.de/u-boot-microblaze

FPGA changes for v2018.11

- add fpga tests to cover fpga commands
- fpga Kconfig cleanup
- fix cmd/fpga.c
- add support for missing fpga loadmk commands
- add fpga fragment to MAINTAINERS

6 years agoconfigs: am65x_evm_a53: Add initial support
Lokesh Vutla [Mon, 27 Aug 2018 10:29:10 +0000 (15:59 +0530)]
configs: am65x_evm_a53: Add initial support

Add initial defconfig support for AM65x that runs on A53.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
6 years agoarm64: dts: k3: Add u-boot specific nodes
Lokesh Vutla [Mon, 27 Aug 2018 10:29:09 +0000 (15:59 +0530)]
arm64: dts: k3: Add u-boot specific nodes

Add the minimum dt nodes required to boot. These nodes
will get deleted as kernel gets these nodes added in the
main dts files.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
6 years agoarm64: dts: k3: Add Support for AM654 SoC
Lokesh Vutla [Mon, 27 Aug 2018 10:29:08 +0000 (15:59 +0530)]
arm64: dts: k3: Add Support for AM654 SoC

Add initial DT support for AM654 EVM that runs on A53.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
6 years agoinclude: am654_evm: Establish initial environment for SD card boot
Andreas Dannenberg [Mon, 27 Aug 2018 10:29:07 +0000 (15:59 +0530)]
include: am654_evm: Establish initial environment for SD card boot

Create a basic U-Boot environment that allows the automatic loading
of a Linux Kernel located at /boot/Image and an associated device tree
blob located at /boot/k3-am654-base-board.dtb from the secondary
partition of an ext4-formatted SD card on the AM654x EVM. Furthermore
the boot.scr and uEnv.txt detection and loading schemes are supported
in a manner already known from other TI platforms.

Note that this is intended to be a starting point to enable initial
board use and will most certainly get extended and refactored as
different boot media become available.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
6 years agoboard: ti: am654: a53: Add initial support for am654
Lokesh Vutla [Mon, 27 Aug 2018 10:29:06 +0000 (15:59 +0530)]
board: ti: am654: a53: Add initial support for am654

Add initial support for AM654 based EVM running on A53. Enable
4GB of DDR available on the EVM so that kernel DTB file
can be updated accordingly.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[Andreas: Added 4GB ddr support]
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>