oweals/u-boot.git
5 years agosunxi: Fix pll1 clock calculation
Stefan Mavrodiev [Wed, 31 Jul 2019 13:15:52 +0000 (16:15 +0300)]
sunxi: Fix pll1 clock calculation

clock_sun6i.c is used for sun6i, sun8i and sun50i SoC families.
PLL1 clock sets the default system clock, defined as:
  sun6i: 1008000000
  sun8i: 1008000000
  sun50i: 816000000

With the current calculation, m = 2 and k = 3. Solving for n,
this results 28. Solving back:
  (24MHz * 28 * 3) / 2 = 1008MHz

However if the requested clock is 816, n is 22.66 rounded
to 22, which results:
  (24MHz * 28 * 3) / 2 = 792MHz

Changing k to 4 satisfies both system clocks:
  (24E6 * 21 * 4) / 2 = 1008MHz
  (24E6 * 17 * 4) / 2 = 816MHz

Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
5 years agoarm64: dts: sun50i: Add support for A64 OLinuXino (with eMMC)
Sunil Mohan Adapa [Tue, 10 Sep 2019 18:43:40 +0000 (11:43 -0700)]
arm64: dts: sun50i: Add support for A64 OLinuXino (with eMMC)

A64 OLinuXino board from Olimex has three variants with onboard eMMC:
A64-OLinuXino-1Ge16GW, A64-OLinuXino-1Ge4GW and A64-OLinuXino-2Ge8G-IND. In
addition, there are two variants without eMMC. One without eMMC and one with SPI
flash. This suggests the need for separate device tree for the three eMMC
variants.

The Linux kernel upstream has chosen to create and use a separate device tree
for the eMMC variants instead of adding eMMC support existing device tree. These
changes to Linux kernel are queued for Linux 5.4.

commit <02bb66b347ff8115f53948f86b884e008ba385b9> ("arm64: dts:
allwinner: a64: Add A64 OlinuXino board (with eMMC)")

This patch has been tested on A64-OLinuXino-1Ge16GW and is based on Linux
device-tree and a64-olinuxino_defconfig.

Signed-off-by: Sunil Mohan Adapa <sunil@medhas.org>
[jagan: updated linux-next commit details]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
5 years agosunxi: H6: DRAM: Add support for half DQ
Jernej Skrabec [Fri, 23 Aug 2019 17:24:04 +0000 (19:24 +0200)]
sunxi: H6: DRAM: Add support for half DQ

Half DQ configuration seems to be very rare for H6 based boards/STBs,
but exists nevertheless. Currently the only known product which needs
this support is Tanix TX6 mini.

This commit adds support for half DQ configuration. Code was tested
for regressions on other configurations (OrangePi 3 1 GiB/LPDDR3, Tanix
TX6 4 GiB/DDR3) and none were found.

Thanks to Icenowy Zheng for help with this code.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: thomas graichen <thomas.graichen@gmail.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Maxime Ripard <mripard@kernel.org>
5 years agospi-nor-ids: Add support for Adesto AT25SL321
Fabio Estevam [Mon, 21 Oct 2019 13:51:16 +0000 (10:51 -0300)]
spi-nor-ids: Add support for Adesto AT25SL321

Add an entry for the Adesto AT25SL321 SPI NOR chip.

This SPI NOR chip is found in the Embedded Artist i.MX7ULP COM board.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
5 years agomtd: spi: Clean up usage of CONFIG_SPI_FLASH_MTD
Frieder Schrempf [Wed, 23 Oct 2019 07:41:20 +0000 (07:41 +0000)]
mtd: spi: Clean up usage of CONFIG_SPI_FLASH_MTD

Most boards currently use SPI_FLASH_MTD only in U-Boot proper, not in
SPL. They often rely on hacks in the board header files to include
this option conditionally. To be able to fix this, we previously
introduced a separate option SPL_SPI_FLASH_MTD.

Therefore we can now adjust the Makefile and change the code in
sf_probe.c and sf_internal.h to use CONFIG_IS_ENABLED(SPI_FLASH_MTD).

We also need to move all occurences of CONFIG_SPI_FLASH_MTD from the
header files to the according defconfigs. The affected boards are
socfpga, aristainetos, cm_fx6, display5, ventana, rcar-gen2, dh_imx6
and da850evm.

We do this all in one patch to guarantee bisectibility.

This change was tested with buildman to make sure it does not
introduce any regressions by comparing the resulting binary sizes.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
5 years agospi-nor: spi-nor-ids: Add USE_FSR flag for mt25q* and n25q* entry
Vignesh Raghavendra [Fri, 11 Oct 2019 07:58:20 +0000 (13:28 +0530)]
spi-nor: spi-nor-ids: Add USE_FSR flag for mt25q* and n25q* entry

n25q* and mt25q* (both 256Mb and 512Mb) flashes support Flag status
register that indicates various errors that may be encountered during
erase/write operations. Therefore add USE_FSR flag wherever missing.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
5 years agospi-nor: spi-nor-ids: Add entries for mt25q variants
Vignesh Raghavendra [Fri, 11 Oct 2019 07:58:19 +0000 (13:28 +0530)]
spi-nor: spi-nor-ids: Add entries for mt25q variants

mt25q* flashes support stateless 4 byte addressing opcodes. Add entries
for the same. These flashes have bit 6 set in 5th byte of READ ID
response when compared to n25q* variants.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
5 years agospi-nor: spi-nor-ids: Disable SPI_NOR_4B_OPCODES for n25q512* and n25q256*
Vignesh Raghavendra [Fri, 11 Oct 2019 07:58:18 +0000 (13:28 +0530)]
spi-nor: spi-nor-ids: Disable SPI_NOR_4B_OPCODES for n25q512* and n25q256*

Per datasheets of n25q256* and n25q512* not all variants of n25q256* and
n25q512* support 4 Byte stateless addressing opcodes. Therefore drop
SPI_NOR_4B_OPCODES flag from these entries

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
5 years agospi: designware_spi: Disable and free clock when remove driver
Ley Foon Tan [Wed, 19 Sep 2018 08:27:19 +0000 (16:27 +0800)]
spi: designware_spi: Disable and free clock when remove driver

Disable and free clock when remove driver.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
5 years agomtd: spi-nor-core: Replace MTD_SPI_NOR_USE_4K_SECTORS with SPI_FLASH_USE_4K_SECTORS
Vignesh Raghavendra [Thu, 26 Sep 2019 13:34:27 +0000 (19:04 +0530)]
mtd: spi-nor-core: Replace MTD_SPI_NOR_USE_4K_SECTORS with SPI_FLASH_USE_4K_SECTORS

U-Boot uses CONFIG_SPI_FLASH_USE_4K_SECTORS to enable 4K small sector
support. Use that instead of MTD_SPI_NOR_USE_4K_SECTORS.

Reported-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
5 years agomtd: spi-nor-core: Use dev_err for reporting erase/write failures
Vignesh Raghavendra [Thu, 26 Sep 2019 13:34:26 +0000 (19:04 +0530)]
mtd: spi-nor-core: Use dev_err for reporting erase/write failures

Use dev_err() when reporting reason for erase/write failures so that
users can be made aware of the reason for failure.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
5 years agostm32mp1: configs: Add CONFIG_SPL_SPI_FLASH_MTD
Frieder Schrempf [Tue, 22 Oct 2019 18:07:43 +0000 (23:37 +0530)]
stm32mp1: configs: Add CONFIG_SPL_SPI_FLASH_MTD

As SPI_FLASH_MTD is used in SPL and U-Boot proper, we enable both,
now that a separate option for SPL was introduced.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
[jagan: drop unrelated change]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
5 years agomtd: spi: Add a new option SPL_SPI_FLASH_MTD to Kconfig
Frieder Schrempf [Fri, 13 Sep 2019 22:43:42 +0000 (22:43 +0000)]
mtd: spi: Add a new option SPL_SPI_FLASH_MTD to Kconfig

To allow SPI_FLASH_MTD being enabled separately in SPL we add a new
option. The only user currently is the stm32mp15_basic board.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Acked-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
5 years agoconfigs: sopine-baseboard: Enable SPI-FLASH
Jagan Teki [Wed, 16 Oct 2019 13:49:25 +0000 (19:19 +0530)]
configs: sopine-baseboard: Enable SPI-FLASH

SoPine has winbond SPI-FLASH, so enable the same in defconfig
and add aliases for spi0 in -u-boot.dtsi

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
5 years agoarm: sunxi: Enable SPI/SPI-FLASH support for A64
Jagan Teki [Wed, 16 Oct 2019 12:38:26 +0000 (18:08 +0530)]
arm: sunxi: Enable SPI/SPI-FLASH support for A64

SPI is available in Allwinner A64 SoC, so enable it
globally in Kconfig.

- CONFIG_SPI
- CONFIG_DM_SPI
- CONFIG_DM_SPI_FLASH

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
5 years agospi: Kconfig: Enable SPI_SUNXI for SUNXI
Jagan Teki [Wed, 16 Oct 2019 12:35:56 +0000 (18:05 +0530)]
spi: Kconfig: Enable SPI_SUNXI for SUNXI

SPI_SUNXI driver is fully dm-aware and the Allwinner
architecture kconfig would have logic to enable the
DM_SPI. So, select default spi sunxi driver for
sunxi architecture.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
5 years agomtd: spi: Kconfig: Imply SPI_FLASH if DM_SPI_FLASH
Jagan Teki [Wed, 16 Oct 2019 12:37:24 +0000 (18:07 +0530)]
mtd: spi: Kconfig: Imply SPI_FLASH if DM_SPI_FLASH

DM_SPI_FLASH should require spi flash interface code for dm
version, so imply SPI_FLASH core by default if any board
enabled DM_SPI_FLASH.

This overcome the explicit enablement of CONFIG_SPI_FLASH on
respective boards when DM_SPI_FLASH being used.

Acked-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
5 years agocmd: sf: Mark it default if DM_SPI_FLASH enabled
Jagan Teki [Wed, 16 Oct 2019 12:29:42 +0000 (17:59 +0530)]
cmd: sf: Mark it default if DM_SPI_FLASH enabled

If DM_SPI_FLASH enabled that means it is using sf command
for flash interface to access.

SPI_FLASH can be used via sf command and board/driver
functions to call spi flash ops, so mark it default only
for DM_SPI_FLASH.

This would prevent explicit adding of CONFIG_CMD_SF when
DM_SPI_FLASH being enabled.

Cc: Tom Rini <trini@konsulko.com>
Acked-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
5 years agodm: spi: Change cs_info op to return -EINVAL for invalid cs num
Bin Meng [Mon, 9 Sep 2019 13:00:01 +0000 (06:00 -0700)]
dm: spi: Change cs_info op to return -EINVAL for invalid cs num

We need distinguish the following two situations in various SPI APIs:

- given chip select num is invalid
- given chip select num is valid, but no device is attached

Currently -ENODEV is returned for both cases.

For the first case, it's more reasonable to return -EINVAL instead of
-ENODEV for invalid chip select numbers.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # SoPine
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
5 years agodm: spi: Return 0 if driver does not implement ops->cs_info
Bin Meng [Mon, 9 Sep 2019 13:00:00 +0000 (06:00 -0700)]
dm: spi: Return 0 if driver does not implement ops->cs_info

If an SPI controller driver does not implement ops->cs_info, that
probably means any chip select number could be valid, hence let's
return 0 for spi_cs_info().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # SoPine
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
5 years agospi: Kconfig: Add help text
Jagan Teki [Wed, 16 Oct 2019 12:34:13 +0000 (18:04 +0530)]
spi: Kconfig: Add help text

Add detailed help text for SPI support.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
5 years agomtd: spi-nor: ids: Add is25wp256 chip
Jagan Teki [Sun, 29 Sep 2019 07:42:37 +0000 (13:12 +0530)]
mtd: spi-nor: ids: Add is25wp256 chip

Add is25wp256, chip to spi-nor id table.

Tested on SiFive FU540 board.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
5 years agomtd: spi: Kconfig: Update CONFIG_SPI_FLASH
Jagan Teki [Sat, 9 Feb 2019 12:15:42 +0000 (17:45 +0530)]
mtd: spi: Kconfig: Update CONFIG_SPI_FLASH

1) CONFIG_SPI_FLASH is not just a legacy code, but it has common
   core code which handle both dm and non-dm spi flash code. So
   fix the info text to make it clear globally.

2) Since it's flash core it shouldn't depends on legacy SPI,
   so remove the 'depends on SPI'

Cc: Vignesh R <vigneshr@ti.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
5 years agoMerge branch '2019-10-24-UFS-support'
Tom Rini [Thu, 24 Oct 2019 13:51:48 +0000 (09:51 -0400)]
Merge branch '2019-10-24-UFS-support'

- Add Universal Flash Storage (UFS) support

5 years agoMerge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
Tom Rini [Thu, 24 Oct 2019 11:32:21 +0000 (07:32 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell

- Add support for HyperBus Memory Controller of TI's J721e
  and AM654 SoCs (Vignesh)

5 years agoconfigs: j721e_evm_a72_defconfig: Add HBMC related configs
Vignesh Raghavendra [Wed, 23 Oct 2019 08:00:05 +0000 (13:30 +0530)]
configs: j721e_evm_a72_defconfig: Add HBMC related configs

Enable HBMC and HyperFlash in A72 SPL and A72 U-Boot

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Stefan Roese <sr@denx.de>
5 years agoconfigs: j721e_evm.h: Define CONFIG_SYS_MAX_FLASH_BANKS_DETECT
Vignesh Raghavendra [Wed, 23 Oct 2019 08:00:04 +0000 (13:30 +0530)]
configs: j721e_evm.h: Define CONFIG_SYS_MAX_FLASH_BANKS_DETECT

Define CONFIG_SYS_MAX_FLASH_BANKS_DETECT so that number of flash banks
are automatically detected by CFI flash driver

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Stefan Roese <sr@denx.de>
5 years agoarm: dts: k3-j721e-som-p0: Add HyperFlash node
Vignesh Raghavendra [Wed, 23 Oct 2019 08:00:03 +0000 (13:30 +0530)]
arm: dts: k3-j721e-som-p0: Add HyperFlash node

J721e SoM as a 64MB HyperFlash on board. Add pinmux and DT node for the
same.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Stefan Roese <sr@denx.de>
5 years agoarm: dts: k3-j721e-mcu-wakeup: Add HyperBus Controller node
Vignesh Raghavendra [Wed, 23 Oct 2019 08:00:02 +0000 (13:30 +0530)]
arm: dts: k3-j721e-mcu-wakeup: Add HyperBus Controller node

Add DT node for HyperBus Memory Controller in the FSS. On J721e, its not
possible to use OSPI0 and HBMC simultaneously as they are muxed within
the Flash Subsystem hence disable HBMC by default as keep OSPI enabled.
Bootloader will fixup DT when it detects HyperFlash instead of OSPI.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Stefan Roese <sr@denx.de>
5 years agomtd: Add TI HyperBus Memory Controller driver
Vignesh Raghavendra [Wed, 23 Oct 2019 08:00:01 +0000 (13:30 +0530)]
mtd: Add TI HyperBus Memory Controller driver

AM654/J721e has HyperBus Memory Controller that supports HyperFlash and
HyperRAM devices. It provides a memory mapped interface to interact with
these devices. Add a driver to support the same.
Driver calibrates the controller, setups up for MMIO access and probes
HyperFlash child node.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Stefan Roese <sr@denx.de>
5 years agomtd: cfi_flash: Use CONFIG_SYS_MONITOR_BASE only when defined
Vignesh Raghavendra [Wed, 23 Oct 2019 08:00:00 +0000 (13:30 +0530)]
mtd: cfi_flash: Use CONFIG_SYS_MONITOR_BASE only when defined

Make use of CONFIG_SYS_MONITOR_BASE only when available to avoid build
error when CONFIG_SYS_MONITOR_BASE is not defined.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Stefan Roese <sr@denx.de>
5 years agoconfigs: j721e_evm_a72: Enable configs for UFS
Faiz Abbas [Tue, 15 Oct 2019 12:54:42 +0000 (18:24 +0530)]
configs: j721e_evm_a72: Enable configs for UFS

Enable SCSI and UFS related configs.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
5 years agoenv: ti: Add environment variables to boot from UFS
Faiz Abbas [Tue, 15 Oct 2019 12:54:41 +0000 (18:24 +0530)]
env: ti: Add environment variables to boot from UFS

Add environment variables to boot kernel from a filesystem contained in
the 2nd UFS LUN. The user can boot from a ufs filesystem just by
entering the following commands.

=> setenv boot ufs
=> boot

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
5 years agocmd: Add Support for UFS commands
Faiz Abbas [Tue, 15 Oct 2019 12:54:40 +0000 (18:24 +0530)]
cmd: Add Support for UFS commands

Add Support for commands to initialize and configure UFS devices.

TODO: Add Support for commands to resize and reconfigure LUNs
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
5 years agoarm: dts: k3-j721e-main: Add UFS nodes
Faiz Abbas [Tue, 15 Oct 2019 12:54:39 +0000 (18:24 +0530)]
arm: dts: k3-j721e-main: Add UFS nodes

Add TI UFS glue layer and Cadence UFS Host controller DT nodes.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
5 years agoufs: Add glue layer driver for TI J721E devices
Faiz Abbas [Tue, 15 Oct 2019 12:54:38 +0000 (18:24 +0530)]
ufs: Add glue layer driver for TI J721E devices

Add glue layer driver for the controller present on TI's J721E devices.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
5 years agoufs: Add Support for Cadence platform UFS driver
Faiz Abbas [Tue, 15 Oct 2019 12:54:37 +0000 (18:24 +0530)]
ufs: Add Support for Cadence platform UFS driver

Add Support for the platform driver for the Cadence device present on
TI's J721e device.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
5 years agoufs: Add Initial Support for UFS subsystem
Faiz Abbas [Tue, 15 Oct 2019 12:54:36 +0000 (18:24 +0530)]
ufs: Add Initial Support for UFS subsystem

Add Support for UFS Host Controller Interface (UFSHCI) for communicating
with Universal Flash Storage (UFS) devices. The steps to initialize the
host controller interface are the following:

- Initiate the Host Controller Initialization process by writing to the
Host controller enable register.
- Configure the Host Controller base address registers by allocating a
host memory space and related data structures.
- Unipro link startup procedure
- Check for connected device
- Configure UFS host controller to process requests

Also register this host controller as a SCSI host controller.

Taken from Linux Kernel v5.2 (drivers/scsi/ufs/ufshcd.c) and ported to
U-boot.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
5 years agoscsi: Add dma direction member to command structure
Faiz Abbas [Tue, 15 Oct 2019 12:54:35 +0000 (18:24 +0530)]
scsi: Add dma direction member to command structure

Some SCSI devices like UFS use DMA for executing scsi commands and hence
need to know the direction of transfer of the dma. Add a dma_dir element
to the command structure to facilitate this.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
5 years agoscsi: Retry inquiry 3 times to overcome Unit Attention condition
Faiz Abbas [Tue, 15 Oct 2019 12:54:34 +0000 (18:24 +0530)]
scsi: Retry inquiry 3 times to overcome Unit Attention condition

The UFS SCSI device LUNs are observed to return failure the first time a
unit ready inquiry is sent and pass on the second try. Send this
inquiry 3 times to make sure device is ready.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
5 years agoscsi: Add max_bytes_per_req to scsi_platdata
Faiz Abbas [Tue, 15 Oct 2019 12:54:33 +0000 (18:24 +0530)]
scsi: Add max_bytes_per_req to scsi_platdata

Add max_bytes_per_req to scsi_platdata to enable the host driver to limit
the number of bytes that can be read/written per request.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
5 years agoscsi: Simplify scsi_read()/_write()
Faiz Abbas [Tue, 15 Oct 2019 12:54:32 +0000 (18:24 +0530)]
scsi: Simplify scsi_read()/_write()

With no non-DM driver using scsi_read()/_write() APIs, remove
the legacy implementations.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
[trini: Reorder slightly and mark scsi_read/write behind BLK test to
avoid warnings]
Signed-off-by: Tom Rini <trini@konsulko.com>
5 years agoMerge tag 'u-boot-stm32-2019-10-23' of https://gitlab.denx.de/u-boot/custodians/u...
Tom Rini [Wed, 23 Oct 2019 18:04:02 +0000 (14:04 -0400)]
Merge tag 'u-boot-stm32-2019-10-23' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm

- Disable CONFIG_NET flag for MCU STM32
- Fix ramdisk_addr_r for stm32f746-disco
- Fix USB product id for stm32mp1

5 years agoMerge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
Tom Rini [Wed, 23 Oct 2019 11:55:20 +0000 (07:55 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq

- Add LS1027A, LS1018A, LS1017A support
- Few updates related to usb, ls1012a, lx2160a

5 years agoboard: stm32mp1: fixup the usb product id for USB download gadget
Patrick Delaunay [Fri, 13 Sep 2019 13:24:17 +0000 (15:24 +0200)]
board: stm32mp1: fixup the usb product id for USB download gadget

Select the correct USB product id used by the download gadget
for ST stm32mp1 boards.

The board stm32mp1 select the correct product id, as defined in
http://www.linux-usb.org/usb.ids for the STMicroelectronics
vendor id = 0x0483 (CONFIG_USB_GADGET_VENDOR_NUM):
- dfu = 0xdf11 : STM Device in DFU mode
  it is the value used by ROM code and reused for stm32prog
  command
- fasboot = 0x0afb : Android Fastboot device
- others = 0x5720 (CONFIG_USB_GADGET_PRODUCT_NUM)
  Mass Storage Device
  it is used for UMS command / usb_dnl_ums

This patch avoid conflict when the same USB VID/PID is used for
ums, fastboot or dfu command (two different protocols associated
to the same PID).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
5 years agoconfigs: stm32f746-disco: Fix ramdisk_addr_r
Patrice Chotard [Mon, 16 Sep 2019 08:56:51 +0000 (10:56 +0200)]
configs: stm32f746-disco: Fix ramdisk_addr_r

Set ramdisk_addr_r to 0xC0600000.

Reported-by: Christophe Priouzeau <christophe.priouzeau@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Patrick Delaunay <patrick.delaunay@st.com>
5 years agoconfigs: stm32h743-eval: Disable CONFIG_NET flag
Patrice Chotard [Tue, 17 Sep 2019 08:09:45 +0000 (10:09 +0200)]
configs: stm32h743-eval: Disable CONFIG_NET flag

Network support was never added on this board, disable
CONFIG_NET flag to avoid following warning:

===================== WARNING ======================
This board does not use CONFIG_DM_ETH (Driver Model
for Ethernet drivers). Please update the board to use
CONFIG_DM_ETH before the v2020.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Patrick Delaunay <patrick.delaunay@st.com>
5 years agoconfigs: stm32h743-disco: Disable CONFIG_NET flag
Patrice Chotard [Tue, 17 Sep 2019 08:09:44 +0000 (10:09 +0200)]
configs: stm32h743-disco: Disable CONFIG_NET flag

Network support was never added on this board, disable
CONFIG_NET flag to avoid following warning:

===================== WARNING ======================
This board does not use CONFIG_DM_ETH (Driver Model
for Ethernet drivers). Please update the board to use
CONFIG_DM_ETH before the v2020.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Patrick Delaunay <patrick.delaunay@st.com>
5 years agoconfigs: stm32f469-discovery: Disable CONFIG_NET flag
Patrice Chotard [Tue, 17 Sep 2019 08:09:43 +0000 (10:09 +0200)]
configs: stm32f469-discovery: Disable CONFIG_NET flag

Network support was never added on this board, disable
CONFIG_NET flag to avoid following warning:

===================== WARNING ======================
This board does not use CONFIG_DM_ETH (Driver Model
for Ethernet drivers). Please update the board to use
CONFIG_DM_ETH before the v2020.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Patrick Delaunay <patrick.delaunay@st.com>
5 years agoconfigs: stm32f429-evaluation: Disable CONFIG_NET flag
Patrice Chotard [Tue, 17 Sep 2019 08:09:42 +0000 (10:09 +0200)]
configs: stm32f429-evaluation: Disable CONFIG_NET flag

Network support was never added on this board, disable
CONFIG_NET flag to avoid following warning:

===================== WARNING ======================
This board does not use CONFIG_DM_ETH (Driver Model
for Ethernet drivers). Please update the board to use
CONFIG_DM_ETH before the v2020.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Patrick Delaunay <patrick.delaunay@st.com>
5 years agoconfigs: stm32f429-discovery: Disable CONFIG_NET flag
Patrice Chotard [Tue, 17 Sep 2019 08:09:41 +0000 (10:09 +0200)]
configs: stm32f429-discovery: Disable CONFIG_NET flag

Network support was never added on this board, disable
CONFIG_NET flag to avoid following warning:

===================== WARNING ======================
This board does not use CONFIG_DM_ETH (Driver Model
for Ethernet drivers). Please update the board to use
CONFIG_DM_ETH before the v2020.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Patrick Delaunay <patrick.delaunay@st.com>
5 years agodm: pinctrl: fix for introduce PINCONF_RECURSIVE option
Patrick Delaunay [Mon, 21 Oct 2019 13:02:40 +0000 (15:02 +0200)]
dm: pinctrl: fix for introduce PINCONF_RECURSIVE option

Correct the name of the define used CONFIG_IS_ENABLED which is
not aligned with Kconfig name: CONFIG_$(SPL_)PINCONF_RECURSIVE.

The recursive calls is conditional only for UCLASS_PINCONFIG
"pinconfig" driver.
It is always needed to call pinctrl_post_bind for UCLASS_PINCTRL
"pinctrl", the test CONFIG_IS_ENABLED(PINCONF_RECURSIVE) need to
be removed for this driver.

This correct a regression introduced because the same patch is
applied twice times in u-boot-dm branch:
- commit e878b53a79d1 ("dm: pinctrl: introduce PINCONF_RECURSIVE
  option")
- commit c20851b3d850 ("dm: pinctrl: introduce PINCONF_RECURSIVE
  option")

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
5 years agopinctrl: Kconfig: remove duplicated nodes
Patrick Delaunay [Mon, 21 Oct 2019 13:07:54 +0000 (15:07 +0200)]
pinctrl: Kconfig: remove duplicated nodes

Remove the duplicated configs introduced when the same patch is
applied twice times:
- commit e878b53a79d1 ("dm: pinctrl: introduce PINCONF_RECURSIVE
  option")
- commit c20851b3d850 ("dm: pinctrl: introduce PINCONF_RECURSIVE
  option")

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
5 years agoarmv7: ls102xa: Don't power down OCRAM1 during deep sleep
Biwen Li [Mon, 21 Oct 2019 06:53:30 +0000 (12:23 +0530)]
armv7: ls102xa: Don't power down OCRAM1 during deep sleep

To allow OCRAM to be used as wakeup source in
deep sleep, do not power it down.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
5 years agoarmv7: ls102xa: add errata ID A-008646 for workaround
Biwen Li [Wed, 25 Sep 2019 10:40:42 +0000 (18:40 +0800)]
armv7: ls102xa: add errata ID A-008646 for workaround

The patch adds an errata ID A-008646 for workaround
to provide more information by errata ID.

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
5 years agoarmv8: Update LX2160A/LX2120A/LX2080A SVR value
Wasim Khan [Tue, 15 Oct 2019 08:54:11 +0000 (08:54 +0000)]
armv8: Update LX2160A/LX2120A/LX2080A SVR value

LX2160A/LX2120A/LX2080A SVR value should be
0x873600/0x873620/0x873602
Previous values were valid only if CAN fuse is blown.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
5 years agoarmv8: ls1028a: disable multimedia for ls1027a, ls1017a
Yuantian Tang [Thu, 10 Oct 2019 09:19:37 +0000 (17:19 +0800)]
armv8: ls1028a: disable multimedia for ls1027a, ls1017a

ls1028a has 4 personalities: ls1028a, ls1027a, ls1017a and ls1018a.
Both ls1027a and ls1017a personalities are lower functionality version
which doesn't support the multimedia subsystems, like LCD, GPU.

To disable multimedia feature on non-multimedia version,
set the status property to disabled in dts nodes.

Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
5 years agoboard/ls1028a: Add call to sec_init()
Udit Agarwal [Mon, 30 Sep 2019 10:16:57 +0000 (10:16 +0000)]
board/ls1028a: Add call to sec_init()

Adds sec_init call to initialise the job ring parameters
for secure boot operations.

Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
5 years agoconfigs: ls1012afrwy: Add CONFIG_ENV_ADDR
Kuldeep Singh [Mon, 30 Sep 2019 07:08:34 +0000 (12:38 +0530)]
configs: ls1012afrwy: Add CONFIG_ENV_ADDR

This configuration enables picking the environment from flash before
DDR init.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
5 years agoarmv7: ls102xa: Correct endianness of SCFG_SPARECR8 read
Biwen Li [Wed, 25 Sep 2019 09:48:11 +0000 (17:48 +0800)]
armv7: ls102xa: Correct endianness of SCFG_SPARECR8 read

The patch corrects endianness of register SCFG_SPARECR8 read
in_le32 -> in_be32

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
5 years agoarmv8: fsl-layerscape: Make USB masters snoopable
Ran Wang [Fri, 20 Sep 2019 09:34:29 +0000 (17:34 +0800)]
armv8: fsl-layerscape: Make USB masters snoopable

Program register bit of SCFG_SNPCNFGCR_USBxRDSNP and
SCFG_SNPCNFGCR_USBxWRSNP(x = 1, 2, 3) to drive USBx read/write
snoop signal on LS1043A and LS1046A.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
5 years agoarmv7: ls102xa: Update SCFG_QSPI_CLKSEL value
Kuldeep Singh [Wed, 18 Sep 2019 10:58:04 +0000 (16:28 +0530)]
armv7: ls102xa: Update SCFG_QSPI_CLKSEL value

Update SCFG_QSPI_CLKSEL value : 0xC -> 0x5
which means ClusterPLL/16

Signed-off-by: Ashish Kumar <Ashish.kumar@nxp.com>
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
5 years agoconfigs: ls1012ardb: Add CONFIG_ENV_ADDR
Kuldeep Singh [Wed, 18 Sep 2019 09:28:11 +0000 (14:58 +0530)]
configs: ls1012ardb: Add CONFIG_ENV_ADDR

CONFIG_ENV_ADDR config option enables picking the environment from
flash before DDR init.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
5 years agoarmv8: ls1028a: Add more personalities support
Yuantian Tang [Wed, 18 Sep 2019 08:50:52 +0000 (16:50 +0800)]
armv8: ls1028a: Add more personalities support

Add LS1027A, LS1018A and LS1017A personalities support to
LS1028A SoC family.

LS1028A is the prime personality of LS1028A SoC family.
LS1027A is a lower funtionality version of QorIQ LS1028A
which does not support the multimedia subsystems, such as LCD
controller, GPU, and eDP PHY.

The QorIQ LS1018A and LS1017A SoCs are single 64-bit Arm A72
core, low power versions of the QorIQ LS1028A and LS1027A
SoCs respectively.

Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
5 years agospl: mmc: make eMMC HW boot partition configuration optional
Anatolij Gustschin [Fri, 18 Oct 2019 19:38:33 +0000 (21:38 +0200)]
spl: mmc: make eMMC HW boot partition configuration optional

Loading U-Boot on i.MX8QXP MEK board is broken since recent changes
in spl_mmc:

  U-Boot SPL 2019.10-00162-gff5bd397e4 (Oct 18 2019 - 15:50:45 +0200)
  Normal Boot
  WDT:   Not found!
  Trying to boot from MMC2_2
  Load image from MMC/SD 0x46400
  spl: mmc partition switch failed
  SPL: failed to boot from all boot devices
  ### ERROR ### Please RESET the board ###

The newly added CONFIG_SYS_MMCSD_RAW_MODE_EMMC_BOOT_PARTITION option
is selected automatically and overrides the EXT_CSC_PART_CONFIG
configurations with default value, always selecting the eMMC boot
partition 1. Boards which place U-Boot image in other partitions
became not bootable.

Fix this by making the eMMC HW boot partition selection optional.

Fixes: 17241ea0543a (spl: mmc: Add option to set eMMC HW boot partition)
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
5 years agoMerge tag 'efi-2020-01-rc1-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Fri, 18 Oct 2019 20:37:03 +0000 (16:37 -0400)]
Merge tag 'efi-2020-01-rc1-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi

Pull request for UEFI sub-system for efi-2020-01-rc1 (2)

Install the simple file protocol only if there is a file system on the
partition.

Enable CONFIG_CMD_NVEDIT_EFI on QEMU.

5 years agoMerge tag 'u-boot-amlogic-20191018' of https://gitlab.denx.de/u-boot/custodians/u...
Tom Rini [Fri, 18 Oct 2019 20:36:44 +0000 (16:36 -0400)]
Merge tag 'u-boot-amlogic-20191018' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic

- document alternative libretech-cc installation methods, including upstream TF-A and opensource tools
- add HDMI/CVBS display support for Amlogic G12A SoCs and SEI510 board
- add support for Amlogic A311D based Khadas VIM3
- add support for Amlogic S905X3 based SEI610 board, targeting Android support like SEI510

5 years agoMerge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv
Tom Rini [Fri, 18 Oct 2019 20:36:16 +0000 (16:36 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv

- Support sifive DM based gpio driver for FU540-SoC.
- Align boot image header with Linux v5.3

5 years agoconfigs: sei610: Add config file to fix userdata size
Guillaume La Roque [Fri, 11 Oct 2019 15:33:58 +0000 (17:33 +0200)]
configs: sei610: Add config file to fix userdata size

Add separate config file to handle the different eMMC size on
the sei610 board.

Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
5 years agoconfigs: sei510: rework header and fix userdata size
Guillaume La Roque [Fri, 11 Oct 2019 15:33:57 +0000 (17:33 +0200)]
configs: sei510: rework header and fix userdata size

Move android generic config and boot sequence in meson64_android header
and fix size of userdata to use all eMMC on SEI510.

Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
5 years agoboards: amlogic: add SEI610 support
Neil Armstrong [Fri, 11 Oct 2019 15:33:56 +0000 (17:33 +0200)]
boards: amlogic: add SEI610 support

Add support for the customer board SEI610 manufactured by SEI Robotics
with the following specifications:
 - Amlogic S905X3 ARM Cortex-A55 quad-core SoC
 - 2GB DDR4 SDRAM
 - 10/100 Ethernet (Internal PHY)
 - 1 x USB 3.0 Host
 - 1 x USB Type-C DRD
 - 1 x FTDI USB Serial Debug Interface
 - eMMC
 - SDcard
 - Infrared receiver
 - SDIO WiFi Module

Like it's SEI510 counterpart, the boot flow is designed to boot
Android AOSP built for the Yukawa Android device.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
5 years agoARM: dts: meson-sm1: add U-Boot specific DT for graphics
Neil Armstrong [Fri, 11 Oct 2019 15:33:55 +0000 (17:33 +0200)]
ARM: dts: meson-sm1: add U-Boot specific DT for graphics

Rename meson-g12a-u-boot.dtsi into meson-g12-common-u-boot.dtsi to
match the new DT architecture and add meson-sm1-sei610-u-boot.dtsi
to handle the U-Boot specific DT for graphics.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
5 years agoconfigs: sei510: enable everything-else power domain
Neil Armstrong [Fri, 11 Oct 2019 13:12:20 +0000 (15:12 +0200)]
configs: sei510: enable everything-else power domain

The GX VPU Power Domain driver has been replaced by the Everything-Else
Power Domain driver for G12A and SM1.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
5 years agopower: domain: add Amlogic Everything-Else power domain driver
Neil Armstrong [Fri, 11 Oct 2019 13:12:19 +0000 (15:12 +0200)]
power: domain: add Amlogic Everything-Else power domain driver

Based on the 54ecb8f7028c ("Linux 5.4-rc1") Everything-Else power domain
driver for Amlogic SoCs.

This driver handles the VPU Power domain and other domains from the
Everything-Else part of the SM1 and G12A SoCs.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
5 years agoARM: dts: Import SEI610 DT from Linux 5.4-rc2
Neil Armstrong [Fri, 11 Oct 2019 15:33:54 +0000 (17:33 +0200)]
ARM: dts: Import SEI610 DT from Linux 5.4-rc2

Import the Amlogic SM1 DT and the SEI610 board DT from [1]

[1] da0c9ea146cb ("Linux 5.4-rc2")

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
5 years agoclk: meson-sm1: add compatible
Neil Armstrong [Fri, 11 Oct 2019 15:33:53 +0000 (17:33 +0200)]
clk: meson-sm1: add compatible

The SM1 clock controller is almost identical to the G12A and
so far the differences don't matter.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
5 years agommc: meson-gx: add support for mmc-pwrseq-emmc
Neil Armstrong [Fri, 11 Oct 2019 15:33:52 +0000 (17:33 +0200)]
mmc: meson-gx: add support for mmc-pwrseq-emmc

Add support for mmc-pwrseq-emmc in the meson-gx mmc driver to support
enabling the eMMC.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
5 years agoARM: meson: add SM1 SoC id
Neil Armstrong [Fri, 11 Oct 2019 15:33:51 +0000 (17:33 +0200)]
ARM: meson: add SM1 SoC id

Add the missing IDs to detect the SM1 S905X3 SoC.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
5 years agoarm: meson: Recognize A311D SoC
Andreas Färber [Wed, 9 Oct 2019 14:03:57 +0000 (16:03 +0200)]
arm: meson: Recognize A311D SoC

Values imported from Linux driver, but in correct numeric order.

Khadas VIM3 prints: Amlogic Meson G12B (A311D) Revision 29:b (10:2)

Cc: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
5 years agoarm: meson: Tidy SoC information output
Andreas Färber [Wed, 9 Oct 2019 14:03:56 +0000 (16:03 +0200)]
arm: meson: Tidy SoC information output

Write SoC instead of Soc. The Linux driver is not affected.

Fixes: f41d723b9f ("ARM: meson: display Amlogic SoC Information")
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
5 years agoconfigs: Add Khadas VIM3 defconfig
Andreas Färber [Wed, 9 Oct 2019 14:03:55 +0000 (16:03 +0200)]
configs: Add Khadas VIM3 defconfig

Derived from odroid-n2_defconfig and README.odroid-n2.

Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
5 years agoarm: dts: Import and update DT for Khadas VIM3
Andreas Färber [Wed, 9 Oct 2019 14:03:54 +0000 (16:03 +0200)]
arm: dts: Import and update DT for Khadas VIM3

In Linux meson-g12-common.dtsi was introduced as well as new g12b nodes
and headers, as dependencies of new meson-g12b-a311d-khadas-vim3.dts.

Copied from da0c9ea146cb ("Linux 5.4-rc2")

Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
5 years agoconfigs: sei510: enable Video Display support
Neil Armstrong [Fri, 30 Aug 2019 12:09:28 +0000 (14:09 +0200)]
configs: sei510: enable Video Display support

Add the necessary config options to support BMP display over HDMI,
and add a preboot command to load the BMP file from a predefined
eMMC partition.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
5 years agoARM: dts: meson-g12a: add U-Boot specific DT for graphics
Neil Armstrong [Fri, 30 Aug 2019 12:09:27 +0000 (14:09 +0200)]
ARM: dts: meson-g12a: add U-Boot specific DT for graphics

Like the meson-gx support, add the U-Boot specific bits in DT
to support graphics on G12A SoCs.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
5 years agoarm: meson: board-g12a: Setup VPU in fdt
Neil Armstrong [Fri, 30 Aug 2019 12:09:26 +0000 (14:09 +0200)]
arm: meson: board-g12a: Setup VPU in fdt

If VIDEO_MESON is enabled, we need to setup the fdt for the framebuffer.

Call meson_vpu_rsv_fb() which reserves the framebuffer memory region for
EFI, and sets up simple-framebuffer nodes if simplefb support is
enabled.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
5 years agovideo: meson: add compatible for Amlogic G12A
Neil Armstrong [Fri, 30 Aug 2019 12:09:25 +0000 (14:09 +0200)]
video: meson: add compatible for Amlogic G12A

Finally add the Amlogic G12A SoC compatible for the VPU driver.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
5 years agovideo: meson: sync with linux drm-misc tree
Neil Armstrong [Fri, 30 Aug 2019 12:09:24 +0000 (14:09 +0200)]
video: meson: sync with linux drm-misc tree

Synchronize the Amlogic Meson Video driver back with the latest
DRM misc tree, adding G12A platform support, from the latest commit:
528a25d040bc ("drm: meson: use match data to detect vpu compatibility")

The sync includes the following changes from Linux adapted to U-Boot:
- Add support for VIC alternate timings
- Switch PLL to 5.94GHz base for 297Mhz pixel clock
- Add registers for G12A SoC
- Add G12A Support for VPP setup
- Add G12A Support for VIU setup
- Add G12A support for OSD1 Plane
- Add G12A support for plane handling in CRTC driver
- Add G12A support for CVBS Encoder
- Add G12A Video Clock setup
- Add G12A support for the DW-HDMI Glue
- fix G12A HDMI PLL settings for 4K60 1000/1001 variations
- fix primary plane disabling
- fix G12A primary plane disabling
- mask value when writing bits relaxed
- crtc: drv: vpp: viu: venc: use proper macros instead of magic constants
- global clean-up
- add macro used to enable HDMI PLL
- venc: set the correct macrovision max amplitude value

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
5 years agovideo: meson: remove power domain get
Neil Armstrong [Fri, 30 Aug 2019 12:09:23 +0000 (14:09 +0200)]
video: meson: remove power domain get

Remove getting and enabling the node power domain since it's now handled
by the dm core directly.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
5 years agoclk: meson: g12a: add support for VPU/HDMI clocks
Neil Armstrong [Fri, 30 Aug 2019 12:09:22 +0000 (14:09 +0200)]
clk: meson: g12a: add support for VPU/HDMI clocks

Add necessary clock support to set up clock for the VPU and
HDMI support.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
5 years agopower: domain: meson-gx-pwrc: add G12A support
Neil Armstrong [Fri, 30 Aug 2019 12:09:21 +0000 (14:09 +0200)]
power: domain: meson-gx-pwrc: add G12A support

Add Amlogic G12A support for the gx-pwrc driver, aligned on the
Linux v5.2 driver.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
5 years agoboard: amlogic: document alternative libretech-cc installation methods
Daniel Drake [Tue, 6 Aug 2019 08:10:42 +0000 (16:10 +0800)]
board: amlogic: document alternative libretech-cc installation methods

As already documented in this README, several binaries must be
glued together in order to boot the device.

Extend the documentation to cover the prebuilt binaries
(saving you the hassle of installing ancient cross-compilers),
and also mention the open source replacements for the encryption
tool (which is especially useful if you want to avoid requiring
32-bit x86 binaries in your build system).

Signed-off-by: Daniel Drake <drake@endlessm.com>
Cc: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
5 years agoRISC-V: Align boot image header with Linux
Atish Patra [Wed, 9 Oct 2019 17:34:17 +0000 (10:34 -0700)]
RISC-V: Align boot image header with Linux

The released Linux boot image header in v5.3 is different from the
one present in U-Boot. Align the header with the new version. The
changes in Linux are backward compatible. Previous U-Boot releases
with older header will continue to work as well. As v5.3 kernel is
the first one to support image header, there is no compatibility
issue between new U-Boot (with this patch) and older kernel.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Rick Chen <rick@andestech.com>
5 years agoconfigs: fu540: enable gpio driver
Sagar Shrikant Kadam [Tue, 1 Oct 2019 17:00:47 +0000 (10:00 -0700)]
configs: fu540: enable gpio driver

Enable the DM based GPIO driver for FU540-C000 SoC.

Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
5 years agogpio: sifive: add support for DM based gpio driver for FU540-SoC
Sagar Shrikant Kadam [Tue, 1 Oct 2019 17:00:46 +0000 (10:00 -0700)]
gpio: sifive: add support for DM based gpio driver for FU540-SoC

This patch adds a DM based driver model for gpio controller present in
FU540-C000 SoC on HiFive Unleashed A00 board. This SoC has one GPIO
bank and 16 GPIO lines in total, out of which GPIO0 to GPIO9 and
GPIO15 are routed to the J1 header on the board.

This implementation is ported from linux based gpio driver submitted
for review by Wesley W. Terpstra <wesley@sifive.com> and/or Atish Patra
<atish.patra@wdc.com> (many thanks !!). The linux driver can be referred
here [1]

[1]: https://lkml.org/lkml/2018/10/9/1103

Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agoefi_loader: enable CONFIG_CMD_NVEDIT_EFI on QEMU
Heinrich Schuchardt [Sun, 13 Oct 2019 09:54:20 +0000 (11:54 +0200)]
efi_loader: enable CONFIG_CMD_NVEDIT_EFI on QEMU

To reduce the default image size CONFIG_CMD_NVEDIT_EFI was disabled by
default. Re-enable it on the QEMU platforms supporting the UEFI sub-system.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
5 years agoefi_loader: disk: install FILE_SYSTEM_PROTOCOL only if available
AKASHI Takahiro [Mon, 7 Oct 2019 05:59:38 +0000 (14:59 +0900)]
efi_loader: disk: install FILE_SYSTEM_PROTOCOL only if available

In the current implementation, EFI_SIMPLEFILE_SYSTEM_PROTOCOL is always
installed to all the partitions even if some of them may house no file
system.

With this patch, that protocol will be installed only if any file system
exists.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
5 years agofs: add fs_get_type() for current filesystem type
AKASHI Takahiro [Mon, 7 Oct 2019 05:59:37 +0000 (14:59 +0900)]
fs: add fs_get_type() for current filesystem type

This function is a variant of fs_get_type_name() and returns a filesystem
type with which the current device is associated.
We don't want to export fs_type variable directly because we have to take
care of it consistently within fs.c.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
5 years agofs: clean up around fs_type
AKASHI Takahiro [Mon, 7 Oct 2019 05:59:36 +0000 (14:59 +0900)]
fs: clean up around fs_type

fs_ls(), fs_mkdir() and fs_unlink() sets fs_type to FS_TYPE_ANY
explicitly, but it is redundant as they call fs_close().
So just remove those lines.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
5 years agofs: update fs_close() description
Heinrich Schuchardt [Sun, 13 Oct 2019 08:26:26 +0000 (10:26 +0200)]
fs: update fs_close() description

Provide a more detailed description of fs_close().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
5 years agofs: export fs_close()
AKASHI Takahiro [Mon, 7 Oct 2019 05:59:35 +0000 (14:59 +0900)]
fs: export fs_close()

fs_close() closes the connection to a file system which opened with
either fs_set_blk_dev() or fs_set_dev_with_part(). Many file system
functions implicitly call fs_close(), e.g. fs_closedir(), fs_exist(),
fs_ln(), fs_ls(), fs_mkdir(), fs_read(), fs_size(), fs_write()
and fs_unlink().
So just export it.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>