Marek Vasut [Wed, 31 Oct 2018 14:06:50 +0000 (15:06 +0100)]
ARM: rmobile: Generate fitting mem_map on Gen3
Patch "ARM: rmobile: Mark 4-64GiB as DRAM on Gen3" marked the entire
64bit DRAM space as cachable. On CortexA57, this might result in odd
side effects, where the CPU tries to prefetch from those areas and if
there is no DRAM backing them, CPU bus hang can happen.
This patch fixes it by generating the mem_map structure based on the
actual memory layout obtained from the DT, thus not marking areas
without any DRAM behind them as cachable.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Fixes:
c1ec34763811d ("ARM: rmobile: Mark 4-64GiB as DRAM on Gen3")
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Wed, 31 Oct 2018 19:34:51 +0000 (20:34 +0100)]
pinctrl: renesas: Add POCCTRL handling to r8a77990
Add definition of the POCCTRL register and bits therein to R8A77990 E3
pincontrol driver. This allows the pincontrol driver to configure SDHI
pin voltage according to power-source DT property.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Wed, 13 Jun 2018 06:02:55 +0000 (08:02 +0200)]
pinctrl: renesas: Fix DRV register offset
Use fixed 4bit size for generating the DRV register element mask,
not the size of the value, which can be smaller.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Tom Rini [Wed, 31 Oct 2018 21:15:55 +0000 (17:15 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
Simon Goldschmidt [Tue, 30 Oct 2018 19:21:49 +0000 (20:21 +0100)]
arm: socfpga: imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
Using imply for SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION instead of
select ensures we can build without partition support (used to build
a network boot only version of SPL and U-Boot).
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Stefan Roese [Tue, 30 Oct 2018 09:00:22 +0000 (10:00 +0100)]
arm: socfpga: Fix bootcounter located at the end of internal SRAM
Commit
768f23dc8ae3 ("ARM: socfpga: Put stack at the end of SRAM") broke
those socfpga boards that keep the bootcounter at the end of the
internal SRAM as the bootcounter needs 8 bytes by default and thus the
very first SPL call to board_init_f_alloc_reserve overwrites the
bootcounter.
This patch allows to move the initial stack pointer down a bit by
checking if CONFIG_SYS_BOOTCOUNT_ADDR is located in the internal SRAM
area and then using this address as location for the start of the
stack pointer.
No new macros / defines are added by this approach.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Simon Goldschmidt [Mon, 15 Oct 2018 18:35:10 +0000 (20:35 +0200)]
arm: socfpga: fpga: fix type of local variable
The 'status' variable in 'socfpga_load()' for both gen5 and arria10
is of type 'unsigned long' while it is always used as 'int' only.
Change it to 'int'.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tom Rini [Tue, 30 Oct 2018 20:53:42 +0000 (16:53 -0400)]
Merge tag 'mpc85xx-for-v2018.11' of git://git.denx.de/u-boot-mpc85xx
Workaround and bug fix for Freescale PowerPC
Add workaround for Freescale USB erratum
A005275.
Correct RCW macros for T1080.
Bin Meng [Mon, 8 Oct 2018 13:55:57 +0000 (06:55 -0700)]
powerpc: t1040: Correct RCW EC2 settings
Per T1040RM (Rev. 1, 08/2015), there are 2 issues with the RCW EC2
settings.
- The value of FSL_CORENET_RCWSR13_EC2_FM1_GPIO is wrong and should
be 0x04000000 (value of 1 in RCW bit [420:421])
- Value of 2/3 are reserved in RCW bit [420:421], hence there is no
macro FSL_CORENET_RCWSR13_EC2_FM1_DTSEC5_MII.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Poonam Aggrwal <poonam.aggrwal@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Bin Meng [Mon, 8 Oct 2018 13:55:56 +0000 (06:55 -0700)]
powerpc: t1040: Correct RCW MAC2_GMII_SEL value
Per T1040RM (Rev. 1, 08/2015), the value of
FSL_CORENET_RCWSR13_MAC2_GMII_SEL_ENET_PORT is wrong
and should be 0x00000080 (bit 440 in the RCW).
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Poonam Aggrwal <poonam.aggrwal@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Chris Packham [Thu, 4 Oct 2018 07:03:53 +0000 (20:03 +1300)]
fsl/usb: Workaround for USB erratum-
A005275
Workaround makes FS as default mode on all affected socs.
Add support to check erratum-
A005275 validity for an soc. This info is
required to determine whether a given soc is affected by this erratum.
Add quirk for this erratum "has_fsl_erratum_a005275" . This quirk is used
to enable workaround for the errata
Force FS mode as default by:
- making EPS as FS
- setting PFSC bit to disable HS chirping
This workaround can be disabled by mentioning "no_erratum_a005275" in
hwconfig string
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Tom Rini [Mon, 29 Oct 2018 20:04:26 +0000 (16:04 -0400)]
Prepare v2018.11-rc3
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 29 Oct 2018 15:21:00 +0000 (11:21 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-sunxi
Andre Przywara [Thu, 25 Oct 2018 09:23:07 +0000 (17:23 +0800)]
sunxi: store DRAM size in SPL header
At the moment we rely on the infamous get_ram_size() function to learn
the actual DRAM size in U-Boot proper. This function has two issues:
1) It only works if the DRAM size is a power of two. We start to see
boards which have 3GB of (usable) DRAM, so this does not fit anymore.
2) As U-Boot has no notion of reserved memory so far, it will happily
ride through the DRAM, possibly stepping on secure-only memory. This
could be a region of DRAM reserved for OP-TEE or some other secure
payload, for instance. It will most likely crash in that case.
As the SPL DRAM init routine has very accurate knowledge of the actual
DRAM size, lets propagate this wisdom to U-Boot proper.
We re-purpose a currently reserved word in our SPL header for that.
The SPL itself stores the detected DRAM size there, and bumps the SPL
header version number in that case. U-Boot proper checks for a valid
SPL header and a high enough version number, then uses the DRAM size
from there. If the SPL header field is not sufficient, we fall back to
the old DRAM scanning routine.
Part of the DRAM might be present and probed by SPL, but not accessible
by the CPU. They're restricted in the main U-Boot binary, when accessing
the DRAM size from SPL header.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Icenowy Zheng [Thu, 25 Oct 2018 09:23:06 +0000 (17:23 +0800)]
sunxi: add Kconfig option for the maximum accessible DRAM
Allwinner 64-bit SoCs can use 4GiB DRAM chip, however their memory map
has only allocated 3GiB for DRAM, so only 3GiB of the DRAM is
accessible.
Add a Kconfig option for the maximum accessible DRAM.
For A80 it should be a much higher value (8GiB), but as I have no A80
device to test and originally U-Boot only supports 2GiB DRAM on A80, it
currently still falls under the 2GiB situation.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Icenowy Zheng [Thu, 25 Oct 2018 09:23:05 +0000 (17:23 +0800)]
sunxi: map DRAM part with 3G size
All Allwinner 64-bit SoCs now are known to be able to access 3GiB of
external DRAM, however the size of DRAM part in the MMU translation
table is still 2GiB.
Change the size of DRAM part in MMU table to 3GiB.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Andre Przywara [Thu, 25 Oct 2018 09:23:04 +0000 (17:23 +0800)]
sunxi: board.c: refactor SPL header checks
So far we have two users which want to look at the SPL header. We will
get more in the future.
Refactor the existing SPL header checks into a common function, to
simplify reusing the code.
Now that this is easy, add proper version checks to the DT name parsing.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
Andre Przywara [Thu, 25 Oct 2018 09:23:03 +0000 (17:23 +0800)]
sunxi: Extend SPL header versioning
On Allwinner SoCs we use some free bytes at the beginning of the SPL image
to store various information. We have a version byte to allow updates,
but changing this always requires all tools to be updated as well.
Introduce the concept of semantic versioning [1] to the SPL header:
The major part of the version number only changes on incompatible
updates, a minor number bump indicates backward compatibility.
This patch just documents the major/minor split, adds some comments
to the header file and uses the versioning information for the existing
users.
[1] https://semver.org
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
Icenowy Zheng [Thu, 25 Oct 2018 09:23:02 +0000 (17:23 +0800)]
sunxi: disable Pine A64 model detection code on other boards
The Pine A64 Plus/non-Plus model detection code is now built on all
64-bit ARM SoCs, even if the code cannot be triggered when H5/H6 is in
use.
Disable them when the board is Pine A64 by adding a Kconfig option that
is only selected on Pine A64.
On GCC 7.3.1 this makes the size of the function reduces 184 bytes, and
saves a 104 byte strstr() function, then makes SPL on H6 succeed to
build.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tom Rini [Sun, 28 Oct 2018 13:28:26 +0000 (09:28 -0400)]
Merge git://git.denx.de/u-boot-x86
Patrick Delaunay [Fri, 26 Oct 2018 07:02:52 +0000 (09:02 +0200)]
drivers: cosmetic: Convert SPDX license tags to Linux Kernel style
Complete in the drivers directory the work started with
commit
83d290c56fab ("SPDX: Convert all of our single
license tags to Linux Kernel style").
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Bin Meng [Thu, 25 Oct 2018 10:05:37 +0000 (03:05 -0700)]
x86: Fix car_uninit weak symbol definition
Since commit
80df194f0165 ("x86: detect unsupported relocation types"),
an error message is seen on QEMU x86 target during boot:
do_elf_reloc_fixups32: unsupported relocation type 0x1 at
fff841f0, offset = 0xfff00087
do_elf_reloc_fixups32: unsupported relocation type 0x2 at
fff841f8, offset = 0xfff00091
Check offset 0xfff00087 and 0xfff00091 in the u-boot ELF image,
fff00087 000df401 R_386_32
00000000 car_uninit
fff00091 000df402 R_386_PC32
00000000 car_uninit
we see R_386_32 and R_386_PC32 relocation type is generated for
symbol car_uninit, which is declared as a weak symbol in start.S.
However the actual weak symbol implementation ends up nowhere. As
we can see below, it's *UND*.
$ objdump -t u-boot | grep car_uninit
00000000 w *UND*
00000000 car_uninit
With this fix, it is normal now.
$ objdump -t u-boot | grep car_uninit
fff00094 w F .text.start
00000001 car_uninit
Reported-by: Hannes Schmelzer <hannes@schmelzer.or.at>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Stefan Roese [Mon, 22 Oct 2018 12:07:56 +0000 (14:07 +0200)]
x86: theadorable-x86-xxx_defconfig: Move VGA BIOS to make room for U-Boot
The build breaks because its not fitting the U-Boot binary into the ROM
image. So lets move VGA BIOS a bit to make room for the grown U-Boot
binary.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Stefan Roese [Mon, 22 Oct 2018 12:07:55 +0000 (14:07 +0200)]
x86: theadorable-x86: Generate and pass root=PARTUUID instead of /dev/sdaX
To enable the root device selection (kernel cmd-line) via PARTUUID, this
patch enables CMD_PART on all missing theadorable-x86 boards and
changes the default environment to generate the root=PARTUUID string
automatically.
This fixes problems that have been noticed on systems with multiple
SATA/AHCI controller connected via PCIe, where the device name for the
root device / partition (/dev/sdaX) was incorrect.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Stefan Roese [Mon, 22 Oct 2018 12:07:54 +0000 (14:07 +0200)]
x86: theadorable-x86-common: Change pci hotplug cmdline parameters (again)
This is needed for the PCIe hotplug to work correctly on some boards
with the newer Linux kernel versions.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Stefan Roese [Mon, 22 Oct 2018 12:07:53 +0000 (14:07 +0200)]
x86: BayTrail: southcluster.asl: Change PCI 64 bit address range / region
To allow bigger 64 bit prefetchable PCI regions in Linux, this patch
changes the base address and range of the ACPI area passed to Linux.
BayTrail can only physically access 36 bit of PCI address space. So
just chaning the range without changing the base address won't work
here, as 0xf.ffff.ffff is already the maximum address.
With this patch, a maximum of 16 GiB of local DDR is supported. This
should be enough for all BayTrail boards though.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tom Rini [Fri, 26 Oct 2018 12:40:53 +0000 (08:40 -0400)]
vf610twr: Enable thumb2 for builds
To help with size constraints, enable thumb2 when building.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 26 Oct 2018 00:30:05 +0000 (20:30 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-net
Tom Rini [Thu, 25 Oct 2018 14:16:21 +0000 (10:16 -0400)]
Merge tag 'u-boot-imx-
20181025' of git://git.denx.de/u-boot-imx
Merged imx8 architecture, fix build for imx8 + warnings
Peng Fan [Thu, 25 Oct 2018 08:36:49 +0000 (08:36 +0000)]
arm: dts: imx8qxp: fix build warining
Fix below build warning.
arch/arm/dts/fsl-imx8qxp-mek.dtb: Warning (avoid_unnecessary_addr_size):
/regulators: unnecessary #address-cells/#size-cells without "ranges"
or child "reg" property
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Thu, 25 Oct 2018 08:32:40 +0000 (08:32 +0000)]
imx: mkimage: avoid stop CI when required files not exists
Introduce a new script to check whether file exists and
use that check in Makefile to avoid break CI system.
The script return 1 when the required files not exists, return 0
when files exists. The script will ignore check to u-boot-dtb.bin,
because if there is something wrong to generate u-boot-dtb.bin,
there must be some code error.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Anatolij Gustschin [Thu, 18 Oct 2018 14:15:11 +0000 (16:15 +0200)]
net: fec_mxc: add support for i.MX8X
Add compatible property and enable the FEC ipg clock when probing
on i.MX8X. Add specific function for reading FEC clock rate via
clock driver when configuring MII speed register. Allow FEC_MXC
selection for i.MX8.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Baruch Siach [Mon, 15 Oct 2018 10:16:48 +0000 (13:16 +0300)]
net: mvpp2: increase PHY reset pulse
The default Linux PHY reset delay is 10ms. This is also the requirement
for Marvell 88E151x PHYs, which are likely to be used with this Ethernet
MAC.
Cc: Stefan Chulski <stefanc@marvell.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Baruch Siach [Mon, 15 Oct 2018 10:16:47 +0000 (13:16 +0300)]
net: mvpp2: fix polarity of PHY reset signal
The dm_gpio_set_value() call sets the logical level of the GPIO signal.
That is, it takes the GPIO_ACTIVE_{LOW,HIGH} property into account. The
driver needs to assert the reset, and then deassert it. Not the other
way around.
Cc: Stefan Chulski <stefanc@marvell.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Priyanka Jain [Thu, 11 Oct 2018 04:47:05 +0000 (04:47 +0000)]
net/phy: Add phy-id for IN112525_S03
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Martin Fuzzey [Thu, 4 Oct 2018 17:59:21 +0000 (19:59 +0200)]
net: dm: fec: Obtain the transceiver type from the DT
The DT property "phy-mode" already provides the transceiver type.
Use it so that we do not have to also set CONFIG_FEC_XCV_TYPE
Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Martin Fuzzey [Thu, 4 Oct 2018 17:59:20 +0000 (19:59 +0200)]
net: dm: fec: Support the phy-supply binding
Configure the phy regulator if defined by the "phy-supply" DT phandle.
Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Martin Fuzzey [Thu, 4 Oct 2018 17:59:19 +0000 (19:59 +0200)]
net: dm: fec: Fix phy-reset-duration clamping and defaults
The DT binding says:
- phy-reset-duration : Reset duration in milliseconds. Should present
only if property "phy-reset-gpios" is available. Missing the property
will have the duration be 1 millisecond. Numbers greater than 1000 are
invalid and 1 millisecond will be used instead.
However the current code:
- clamps values greater than 1000ms to 1000ms rather than 1.
- does not initialize the delay if the property does not exist
(else clause mismatch)
- returns an error if phy-reset-gpios is not defined
Fix all this and simplify by using dev_read_u32_default()
Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Martin Fuzzey [Thu, 4 Oct 2018 17:59:18 +0000 (19:59 +0200)]
net: dm: fec: Fix time unit error in phy-reset-duration
The DT binding says that phy-reset-duration is in ms, but the driver
currently uses udelay().
Switch to mdelay() to fix this.
Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Jeremy Gebben [Tue, 18 Sep 2018 21:49:37 +0000 (15:49 -0600)]
net: phy: aquantia: autodetect if firmware needs to be loaded
If the phy reports a valid firmware version and doesn't indicate
a fault, skip loading the firmware. This allows the same image
to be used on boards that have firmware storage and those that do not.
Signed-off-by: Jeremy Gebben <jgebben@sweptlaser.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Jeremy Gebben [Tue, 18 Sep 2018 21:49:36 +0000 (15:49 -0600)]
net: phy: aquantia: add firmware loading support
Aquantia phys have firmware that can be loaded automatically
from storage directly attached to the phy or via MDIO commands.
Add support for loading firmware from either a file or a
raw location on an MMC device.
Signed-off-by: Jeremy Gebben <jgebben@sweptlaser.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Jeremy Gebben [Tue, 18 Sep 2018 21:49:35 +0000 (15:49 -0600)]
configs: migrate CONFIG_PHY_AQUANTIA to Kconfig
The aquantia driver requires both CONFIG_PHY_GIGE and CONFIG_PHYLIB_10G.
Signed-off-by: Jeremy Gebben <jgebben@sweptlaser.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Pankaj Bansal [Tue, 18 Sep 2018 10:16:48 +0000 (15:46 +0530)]
miiphy: Add function to retrieve MDIO bus list head
In upcoming freescale board LX2160AQDS, the MDIO bus is muxed.
i.e. same MDIO bus can be routed to eight different slots depending
on mux register settings.
To support this mdio mux behavior, we add each MDIO bus mux as a
separate MDIO bus.
Now, various phy devices can be attached to each of these slots(mux).
The information about these devices is passed to OS via device tree.
To do the fdt fixups related to MDIO bus, its necessary that MDIO bus
list is accessed.Therefore, add a function to retrieve the list head.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Hector Palacios [Fri, 17 Aug 2018 11:06:40 +0000 (13:06 +0200)]
cmd: mii: don't check address for 'device' subcommand
All mii operations require a valid PHY address except the 'device'
command, which expects the PHY name rather than the address.
Signed-off-by: Hector Palacios <hector.palacios@digi.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Priit Laes [Tue, 23 Oct 2018 17:20:31 +0000 (20:20 +0300)]
sunxi: display: Mark sunxi_rgb2yuv_coef array as const
sunxi_rgb2yuv_coef is readonly and never modified.
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Priit Laes [Tue, 23 Oct 2018 17:20:30 +0000 (20:20 +0300)]
sunxi: docs: Mention CONFIG_NAND requirement
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Priit Laes [Tue, 23 Oct 2018 17:20:28 +0000 (20:20 +0300)]
sunxi: Fix typos of spelling Allwinner
Signed-off-by: Priit Laes <plaes@plaes.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Vasily Khoruzhick [Wed, 17 Oct 2018 04:56:35 +0000 (21:56 -0700)]
pwm: sunxi: choose best prescaler to improve PWM resolution
Choose best prescaler to improve PWM resolution. Without this change
driver chooses first prescaler that gives us period value within
range, but it could be not the best one.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Vasily Khoruzhick [Wed, 17 Oct 2018 04:56:34 +0000 (21:56 -0700)]
pwm: sunxi: use new prescaler when configuring PWM
Looks like old prescaler was used when configuring PWM, fix it.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Vasily Khoruzhick [Wed, 17 Oct 2018 04:56:33 +0000 (21:56 -0700)]
pwm: sunxi: fix off-by-one that prevented PWM to use prescaler bypass
Fix off-by-one that prevented PWM driver to use prescaler bypass.
Without this change prescaler is always enabled.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Fabio Estevam [Tue, 23 Oct 2018 15:38:18 +0000 (12:38 -0300)]
warp7: MAINTAINERS: Add an entry for warp7_bl33_defconfig
Add an entry for the warp7_bl33_defconfig target.
This fixes the following warnings:
WARNING: no status info for 'warp7_bl33'
WARNING: no maintainers for 'warp7_bl33'
Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tom Rini [Wed, 24 Oct 2018 01:13:32 +0000 (21:13 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-samsung
Tom Rini [Tue, 23 Oct 2018 15:58:44 +0000 (11:58 -0400)]
travis: Rework Freescale ARM jobs a bit
- Split the AArch64 LS10xx and LS20xx builds into their own jobs, and
then exclude only ls1/ls2 from the catch-all. This moves the S32V234
job (and future i.MX8*) to the catch-all.
- Split spear out from arm926ejs and exclude freescale, not mx from that
job. The older Freescale i.MX boards are caught by the catch-all job
for Freescale but now we build the non-Freescale older i.MX platforms.
Signed-off-by: Tom Rini <trini@konsulko.com>
Dirk Meul [Sun, 14 Oct 2018 15:14:17 +0000 (17:14 +0200)]
ARM: Samsung: Add Exynos5422-based Odroid HC2 support
Odroid HC2 board is based on Odroid XU4 board, like the Odroid HC1.
The linux kernel does not provide a hc2 DTB so the hc1 DTB is also used
for the Odroid HC2.
Resend because MUA changed whitespace.
Signed-off-by: Dirk Meul <dirk.meul@rwth-aachen.de>
Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Simon Glass [Mon, 1 Oct 2018 18:22:31 +0000 (12:22 -0600)]
binman: Add a test for Intel reference code
Unfortunately the test was not included in the original implementation.
Add one.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Tom Rini [Mon, 22 Oct 2018 17:56:10 +0000 (13:56 -0400)]
Merge git://git.denx.de/u-boot-x86
Bernhard Messerklinger [Mon, 3 Sep 2018 08:17:35 +0000 (10:17 +0200)]
serial: mxc: Add match string for i.mx6 quad/dual lite serial
Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Reviewed-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Tested-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Sam Protsenko [Thu, 18 Oct 2018 19:47:17 +0000 (22:47 +0300)]
arm: ti: boot: Remove environment partition
Remove "environment" partition and do not read it when booting Android
from eMMC. We don't use this partition anymore, so this is just an
unintentional leftover.
Earlier we were reading dtb file from "environment" partition to feed it
further to kernel. Now we are using dtb from FIT image ("boot" partition
contains boot_fit.img image), which can be seen from this command:
bootm ${loadaddr}#${fdtfile}
where "#" character means we have FIT image in ${loadaddr} RAM address.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Acked-by: Praneeth Bajjuri <praneeth@ti.com>
Cédric Le Goater [Tue, 16 Oct 2018 11:57:11 +0000 (13:57 +0200)]
watchdog: aspeed: restore default value of reset_mask
This is required for the current Linux kernel to reboot. It should also
probably be fixed in Linux.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Adam Ford [Sun, 14 Oct 2018 20:53:17 +0000 (15:53 -0500)]
ARM: omap3_logic: Add NOR Flash Support for SOM-LV
The DM37 and OMAP35 SOM-LV SOM-LV products both support a NOR
flash part connected to CS2 in addition to the NAND part on CS0.
This patch setups the GPMC timings for the MT28 NOR Flash and
enables the CFI-Flash driver now that the CFI stuff is in Kconfig
Signed-off-by: Adam Ford <aford173@gmail.com>
Meul, Dirk [Sat, 13 Oct 2018 12:54:01 +0000 (12:54 +0000)]
arm: udoo: Convert to distro config
Instead of keeping a custom environment, use a more generic approach
by switching to distro config.
Signed-off-by: Dirk Meul <dirk.meul@rwth-aachen.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Heinrich Schuchardt [Thu, 11 Oct 2018 00:16:46 +0000 (02:16 +0200)]
test: overlay: add missing include
Compiling the overlay unit test fails with odroid-c2_defconfig showing
errors like:
test/overlay/cmd_ut_overlay.c:29:8:
error: unknown type name ‘fdt32_t’
Add the missing include.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 8 Oct 2018 09:27:44 +0000 (02:27 -0700)]
nand: atmel: Initialize pmecc smu with correct size
Currently in pmecc_get_sigma(), the code tries to clear the memory
pointed by smu with wrong size 'sizeof(int16_t) * ARRAY_SIZE(smu)'.
Since smu is actually a pointer, not an array, so ARRAY_SIZE(smu)
does not generate correct size to be cleared.
In fact, GCC 8.1.0 reports a warning against it:
error: division 'sizeof (int16_t * {aka short int *}) / sizeof (int16_t
{aka short int})' does not compute the number of array elements
[-Werror=sizeof-pointer-div]
Fix it by using the correct size.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Eugen Hristev [Mon, 8 Oct 2018 07:37:00 +0000 (10:37 +0300)]
configs: sama5d2_ptc_ek: add default bootargs for MMC defconfig
Add default bootargs for the MMC defconfig to use SD-Card as rootfs
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Eugen Hristev [Mon, 8 Oct 2018 07:36:59 +0000 (10:36 +0300)]
configs: sama5d2_ptc_ek: add default bootargs for NAND defconfig
Add the default kernel bootargs according to our NAND flash demo layout:
http://www.at91.com/linux4sam/bin/view/Linux4SAM/Sama5d2PtcEKMainPage#NAND_Flash_demo_Memory_map
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Eugen Hristev [Mon, 8 Oct 2018 07:20:04 +0000 (10:20 +0300)]
configs: sama5d2_xplained: enable w1 and overlay for emmc defconfig
Enable onewire support and commands, fdt overlay for the emmc defconfig.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Eugen Hristev [Mon, 8 Oct 2018 07:12:56 +0000 (10:12 +0300)]
configs: sama5d27_som1_ek: enable w1 and overlay for mmc1 defconfig
Enable onewire support and commands, fdt overlay for the mmc1 defconfig.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Eugen Hristev [Mon, 8 Oct 2018 07:03:01 +0000 (10:03 +0300)]
configs: at91: sama5: enable CMD_IMI
Enable iminfo command with CONFIG_CMD_IMI
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Eugen Hristev [Mon, 8 Oct 2018 06:55:19 +0000 (09:55 +0300)]
configs: at91: sam9x5: added FIT and iminfo support
Enabled FIT image support and iminfo command for FIT information.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Eugen Hristev [Mon, 8 Oct 2018 06:54:27 +0000 (09:54 +0300)]
board: at91sam9x5: add environment var for cpu type
When booting and CPU is detected from cpuid, we also need an environment
variable that will be used in boot commands to load the proper devicetree.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Adam Ford [Sun, 7 Oct 2018 22:47:50 +0000 (17:47 -0500)]
ARM: omap3logic: Fix MMC name
In my haste to migrate SPL to DM, I copied the wrong name.
While it really doesn't matter, I'd prefer the name to match
the board, so am335x_mmc0 is now called omap3_logic_mmc0
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Sun, 7 Oct 2018 22:42:42 +0000 (17:42 -0500)]
ARM: omap3logic: Specify DM serial driver as omap_serial
With the new omap_serial driver, this patch uses this instead
from the former ns16550_serial driver. Even though the
omap_serial driver is essentially the same.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Sun, 7 Oct 2018 22:39:29 +0000 (17:39 -0500)]
ARM: omap3logic: Encapsulate the MUSB functions in check for DM
With the DM_USB working for USB host features, encapsulate the
USB gadget initialization in a precomiler check. If DM is enabled,
we don't need to manually initialize the MUSB driver.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Sun, 7 Oct 2018 14:20:45 +0000 (09:20 -0500)]
ARM: omap3_logic.c: Optimize DDR timings based on OMAP35 or 36/37
The default timings are assumming an OMAP36 / AM37 / DM37, but
the OMAP35 controller is a bit slower, so DDR may operate out of
spec when under stress. This patch checks the processor type and
sets the DDR timings according to processor type.
Fixes:
5ad4212ce0d5 ("ARM: DTS: Add Logic PD OMAP35/DM37 SOM-LV
and OMAP35 Torpedo")
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Sun, 7 Oct 2018 13:39:21 +0000 (08:39 -0500)]
ARM: da850evm_direct_nor: Remove DM_I2C_COMPAT
The da850evm does not need this enabled, so this removes a
notice that appears during compile time that says
"Please remove"
Signed-off-by: Adam Ford <aford173@gmail.com>
Rui Miguel Silva [Wed, 5 Sep 2018 10:56:08 +0000 (11:56 +0100)]
warp7: configs: add bl33 defconfig
Add default configuration to run u-boot as BL33 in the ARM Trusted Firmware
boot flow for AArch32 case.
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Cc: u-boot@lists.denx.de
Rui Miguel Silva [Wed, 5 Sep 2018 10:56:07 +0000 (11:56 +0100)]
warp7: include: configs: set skip low level init
If we have defined the OPTEE ram size and not OPTEE means that we are in
the case where OPTEE is loaded already (maybe by ARM Trusted Firmware) and
that most of the low level initialization is already done and that we
may/should skip it doing them here.
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: u-boot@lists.denx.de
Rui Miguel Silva [Wed, 5 Sep 2018 10:56:06 +0000 (11:56 +0100)]
optee: adjust dependencies and default values for dram
We may have, the not yet considered, scenario where OPTEE is loaded before
u-boot and *not* by u-boot, e.g, the boot flow using the ARM Trusted
Firmware (ATF), where in the 32bit flow is:
BootRom->ATF(BL2)->Optee(BL32)->u-boot(BL33)
In this case we need still to reserve the memory used by optee, to avoid
for example to realocate ourself to the same address at the end of DRAM.
So, we change here the dependencies on the OPTEE lib and we set the default
size and base of TZRAM to zero.
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Ryan Harkin <ryan.harkin@linaro.org>
Cc: u-boot@lists.denx.de
Rui Miguel Silva [Wed, 5 Sep 2018 10:56:05 +0000 (11:56 +0100)]
imx: mx7: avoid some initialization if low level is skipped
We can have the case where u-boot is launched after some other low level
enabler, like for example when u-boot runs after arm-trusted-firmware
and/or optee. So, because of that we may need to jump the initialization of
some IP blocks even because we may no longer have the permission for that.
So, if the config option to skip low level init is set disable also timer,
board and csu initialization.
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: u-boot@lists.denx.de
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Anatolij Gustschin [Thu, 18 Oct 2018 14:36:01 +0000 (16:36 +0200)]
i2c: imx_lpi2c: fix typo and register base address format
Output the register base address in hex notation.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
Xiaoliang Yang [Thu, 18 Oct 2018 09:14:19 +0000 (17:14 +0800)]
Kconfig: Convert CONFIG_IMX_WATCHDOG to Kconfig
Move this option to Kconfig and tidy up the config file of eight
boards which use it.
Signed-off-by: Xiaoliang Yang <xiaoliang.yang_1@nxp.com>
Dan Cimpoca [Mon, 15 Oct 2018 10:09:56 +0000 (12:09 +0200)]
board: ge: bx50v3: fix initialization of i2c bus0
I2C bus 0 was not initialized correctly. There is an offset between i2c
index and the structure number of pad info. So i2c bus 0 can be in an
inconsistent state.
This problem become visible on B{4,6}50v3 with the CPUC HW watchdog enabled.
Sometimes when the CPUC HW watchdog interrupted the boot process, U-Boot was
not able to read VPD from I2C/EEPROM and the system failed to boot up again,
because a device connected to that bus was stuck in data transfer state (from
previous boot attempt) and there was no method to recover (struct
mxc_i2c_bus::idle_bus_fn was not set) courtesy of incorrect initialization.
Signed-off-by: Dan Cimpoca <dan.I.cimpoca@ge.com>
Signed-off-by: Fabien Lahoudere <fabien.lahoudere@collabora.com>
Ian Ray [Mon, 15 Oct 2018 07:59:45 +0000 (09:59 +0200)]
board: ge: bx50v3: b{4,6}50v3 modeline
The b{4,6}50v3 kernel framebuffer console requires a modeline otherwise
the LVDS panel shows garbage.
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Fabien Lahoudere <fabien.lahoudere@collabora.com>
Ian Ray [Mon, 15 Oct 2018 07:59:44 +0000 (09:59 +0200)]
board: ge: bx50v3: correct LDB clock
Use Video PLL to provide 65MHz for all displays.
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Fabien Lahoudere <fabien.lahoudere@collabora.com>
Fabien Lahoudere [Mon, 15 Oct 2018 07:29:27 +0000 (09:29 +0200)]
board: ge: bx50v3: Change maintainer
While using ./scripts/get_maintainer.pl I detect that the Maintainer name
and address for bx50v3 boards are not valid.
The new maintainer for GE bx50v3 products must be Ian Ray.
Signed-off-by: Fabien Lahoudere <fabien.lahoudere@collabora.com>
Breno Matheus Lima [Wed, 10 Oct 2018 01:10:51 +0000 (01:10 +0000)]
doc: imx: Improve i.MX documentation naming
There is no need to have README in all i.MX documents name.
Remove README from i.MX docs name and add .txt file extension.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Breno Matheus Lima [Wed, 10 Oct 2018 01:10:48 +0000 (01:10 +0000)]
doc: imx: misc: Reorganize miscellaneous documentation
The Serial Download Protocol feature is availible in various
i.MX SoCs.
Move README.sdp document to imx/misc directory.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Breno Matheus Lima [Wed, 10 Oct 2018 01:10:44 +0000 (01:10 +0000)]
doc: imx: hab: Reorganize High Assurance Boot documentation
The current High Assurance Boot document README.mxc_hab
include details for the following features in a single file:
- HAB Secure Boot
- HAB Encrypted Boot
Split HAB documentation in a specific directory for a cleaner
documentation structure, subsequent patches will include more
content in HAB documentation.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Breno Matheus Lima [Wed, 10 Oct 2018 01:10:40 +0000 (01:10 +0000)]
doc: imx: Reorganize i.MX SoC common documentation
The following documents describe device details according to the
i.MX family:
- README.imx25
- README.imx27
- README.imx5
- README.imx6
- README.mxs
Move all device common related document to doc/imx/common for a better
directory structure.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Breno Matheus Lima [Wed, 10 Oct 2018 01:10:35 +0000 (01:10 +0000)]
doc: imx: mkimage: reorganize i.MX mkimage documentation
The following documents describe the image type used by the mkimage
tool to generate U-Boot images for i.MX devices.
- README.imximage
- README.mxsimage
Move all mkimage related document to doc/imx/mkimage for a better
directory structure.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Breno Matheus Lima [Wed, 10 Oct 2018 01:10:31 +0000 (01:10 +0000)]
doc: imx: Move SPD related info to the appropriate doc
Currently the Serial Download Protocol tools and procedure are
documented in two places:
- doc/imx/README.sdp
- doc/imx/README.imx6
It is better to consolidate all SDP related information into
README.sdp file, so move the content from README.imx6 to
README.sdp.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Breno Matheus Lima [Wed, 10 Oct 2018 01:10:27 +0000 (01:10 +0000)]
doc: imx: reorganize i.MX documentation
Currently the U-Boot doc/ directory contains the following files
that are only relevant for i.MX devices:
- doc/README.imx25
- doc/README.imx27
- doc/README.imx5
- doc/README.imx6
- doc/README.imximage
- doc/README.mxc_hab
- doc/README.mxs
- doc/README.mxsimage
- doc/README.sdp
Move all content to a common i.MX folder for a better documentation
structure.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Peng Fan [Tue, 16 Oct 2018 04:50:39 +0000 (04:50 +0000)]
imx: imx8qxp_mek: update to build image in U-Boot
Update README
Add imximage.cfg
Update defconfig to include imximage.cfg
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 16 Oct 2018 04:50:35 +0000 (04:50 +0000)]
arm: imx: include imx8image support
When building i.MX8/8X board, use imx8image type.
`-e $(CONFIG_SYS_TEXT_BASE)` is not needed, but
no harm to keep it for i.MX8/8X
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 16 Oct 2018 04:50:30 +0000 (04:50 +0000)]
tools: add i.MX8/8X image support
i.MX8/8X bootable image type is container type.
The bootable image, containers a container set which supports two
container. The 1st container is for SECO firmware, the 2nd container
needs to include scfw, m4_0/1 image, ACore images per your requirement.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Thu, 18 Oct 2018 12:28:37 +0000 (14:28 +0200)]
imx: add i.MX8QXP MEK board support
Add i.MX8QXP MEK board support
Enabled pinctrl/clk/power-domain/mmc/i2c/fec driver.
Added README file.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Peng Fan [Thu, 18 Oct 2018 12:28:36 +0000 (14:28 +0200)]
arm: dts: introduce dtsi for i.MX8QXP
Introduce dtsi for i.MX8QXP, since there is other variants i.MX8DX(P),
so add them there, because i.MX8QXP includes the dtsi of them.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Peng Fan [Thu, 18 Oct 2018 12:28:35 +0000 (14:28 +0200)]
mmc: fsl_esdhc: add uclass clk support
When CONIFG_CLK is enabled, use uclass clk api to handle
the clock.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
Ye Li [Thu, 18 Oct 2018 12:28:34 +0000 (14:28 +0200)]
fsl_esdhc: Update usdhc driver to support i.MX8
Add CONFIG_ARCH_IMX8 to use the 64bits support in usdhc driver.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Peng Fan [Thu, 18 Oct 2018 22:26:23 +0000 (00:26 +0200)]
serial: lpuart: support uclass clk api
Modify most APIs to use udevice as the first parameter, then
it will be easy to get the clk reference by using udevice pointer.
Use uclass api to get lpuart clk when CONFIG_CLK is enabled.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>