Eugeniu Rosca [Fri, 19 Jul 2019 21:26:12 +0000 (23:26 +0200)]
cmd: bcb: Fix duplicated handling in two case-branches
Fix warning V1037 reported by PVS-Studio Static Analyzer:
Two or more case-branches perform the same actions. Check lines: 49, 53
Fixes:
db7b7a05b267 ("cmd: Add 'bcb' command to read/modify/write BCB fields")
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@gmail.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Eugeniu Rosca [Fri, 19 Jul 2019 21:26:11 +0000 (23:26 +0200)]
treewide: Fix stale references of Android docs
Commit
9bdf0e8fef86 ("doc: relocate/rename Android README and add BCB
overview") left some obsolete references of Android documents/paths.
This has been pointed out by Sam (thanks!) in:
https://patchwork.ozlabs.org/patch/
1104245/#
2208134
Fixes:
9bdf0e8fef86 ("doc: relocate/rename Android README and add BCB overview")
Reported-by: Sam Protsenko <semen.protsenko@linaro.org>
Suggested-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@gmail.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Roman Stratiienko [Mon, 3 Jun 2019 12:38:13 +0000 (15:38 +0300)]
image: android: allow to wrap uImage into the Android boot image
This allows to use any available compression format with Android boot image
Since not all available compression formats have a magic number we should
explicitly specify type of compression.
For this purpose using uImage format becomes very useful, as this format is
well-known by the community and mkimage tool is already available.
Usage example:
mkimage -A ARM64 -T kernel -C lzma -d Image.lzma out/kernel
At this moment only -C option is handled, but specifying -A and -T options
are recommended for compatibility reasons in the future.
Kernel that compressed with LZ4 can be already used without wrapping into
the uImage, but I recommend wrapping it into the uImage in order to avoid
situations when by some mistake legacy LZ4 is used, that is interpreted as
raw Image and causes CPU to enter Exception Handler without providing any
meaningful explanation to the user.
Signed-off-by: Roman Stratiienko <roman.stratiienko@globallogic.com>
Leon Yu [Fri, 21 Jun 2019 04:12:39 +0000 (12:12 +0800)]
menu: don't bother going interactive with just one menu item
If there is only one menu item available, prompting user to enter
choice makes little sense and just causes unnecessary boot delay. This
change makes menu_get_choice return the only one item when there is no
other choices.
Signed-off-by: Leon Yu <leoyu@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Thierry Reding <treding@nvidia.com>
Ruslan Trofymenko [Fri, 14 Jun 2019 14:01:26 +0000 (17:01 +0300)]
cmd: part: Add 'number' sub-command
This sub-command serves for getting the partition index from
partition name. Also it can be used to test the existence of specified
partition.
Use case:
For example, in most CI environments this U-Boot command for automatic
testing of Linux rootfs is used:
=> setenv bootpart 1:f
where 0xf is "userdata" partition. But the number of "userdata"
partition can be changed any time, when partition table is changed.
So it would be nice to get rid of that 0xf magic number and use
partition name instead, like this:
=> part number mmc 1 userdata part_num
=> setenv bootpart 1:${part_num}
Signed-off-by: Ruslan Trofymenko <ruslan.trofymenko@linaro.org>
Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com>
Reviewed-by: Alistair Strachan <astrachan@google.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Tom Rini [Wed, 24 Jul 2019 02:29:53 +0000 (22:29 -0400)]
Merge tag 'efi-2019-10-rc1-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for v2019.10-rc1 (2)
* Implement the EVT_SIGNAL_VIRTUAL_ADDRESS_CHANGE event.
* Address errors of type -Werror=address-of-packed-member when building
with GCC9.1
* Fix an error when adding memory add addres 0x00000000.
* Rework some code comments for Sphinx compliance.
Tom Rini [Tue, 23 Jul 2019 18:16:21 +0000 (14:16 -0400)]
Merge tag 'u-boot-stm32-
20190723' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- add rtc driver for stm32mp1
- add remoteproc driver for stm32mp1
- use kernel qspi compatible string for stm32
Tom Rini [Tue, 23 Jul 2019 13:48:16 +0000 (09:48 -0400)]
Merge tag 'rockchip-for-v2019.07-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- rk3399 sdhci driver fixup
- TPL BANNER fixup
Chris Webb [Fri, 19 Jul 2019 13:23:55 +0000 (14:23 +0100)]
rockchip: TPL banner should depend on CONFIG_TPL_BANNER_PRINT
The generic code in common/spl/spl.c allows TPL/SPL banners to be
silenced by unsetting CONFIG_TPL_BANNER_PRINT or CONFIG_SPL_BANNER_PRINT
respectively. However, arch/arm/mach-rockchip/tpl.c prints this banner
unconditionally.
Fix the rockchip-specific tpl.c so that the TPL banner depends on
CONFIG_TPL_BANNER_PRINT in the same way as the generic code.
Signed-off-by: <chris@arachsys.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Chris Webb [Fri, 19 Jul 2019 13:23:11 +0000 (14:23 +0100)]
rockchip: Fix TPL build without CONFIG_TPL_SERIAL_SUPPORT
If CONFIG_DEBUG_UART is set but CONFIG_TPL_SERIAL_SUPPORT is not, the
serial output should be available in SPL and full U-Boot, but not built
in TPL. However, the rockchip tpl.c instead fails to compile with
undefined references to the debug UART.
Instead, initialise the debug UART and print the TPL banner only if both
CONFIG_DEBUG_UART and CONFIG_TPL_SERIAL_SUPPORT are set.
Signed-off-by: <chris@arachsys.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Patrick Delaunay [Mon, 22 Jul 2019 09:02:34 +0000 (11:02 +0200)]
rtc: Add rtc driver for stm32mp1
Add support of STM32MP1 rtc driver.
Enable it for basic and trusted configurations.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Patrick Delaunay [Thu, 11 Jul 2019 10:03:37 +0000 (12:03 +0200)]
clk: stm32mp1: Add RTC clock entry
Add RTCAPB and RTC clock support.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrice Chotard [Fri, 28 Jun 2019 13:03:01 +0000 (15:03 +0200)]
doc: device-tree-bindings: alignment with v5.2-rc6 for spi-stm32-qspi.txt
Align doc/device-tree-bindings/spi/spi-stm32-qspi.txt with kernel v5.2-rc6
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Fri, 28 Jun 2019 13:03:00 +0000 (15:03 +0200)]
spi: stm32_qspi: Remove "st, stm32-qspi" compatible string
"st,stm32-qspi" is no more used, remove it.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Fri, 28 Jun 2019 13:02:59 +0000 (15:02 +0200)]
ARM: dts: stm32: Use kernel qspi compatible string for stm32f469-disco-uboot.dtsi
For STM32 QSPI driver, "st,stm32-qspi" compatible string was first
introduced in U-boot. But later in kernel side, "st,stm32f469-qspi"
was used.
To simplify, align U-boot QSPI compatible string with kernel one.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Fri, 28 Jun 2019 13:02:58 +0000 (15:02 +0200)]
ARM: dts: stm32: Use kernel qspi compatible string for stm32f7-uboot.dtsi
For STM32 QSPI driver, "st,stm32-qspi" compatible string was first
introduced in U-boot. But later in kernel side, "st,stm32f469-qspi"
was used.
To simplify, align U-boot QSPI compatible string with kernel one.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Mon, 22 Jul 2019 09:04:31 +0000 (11:04 +0200)]
configs: stm32mp15: enable stm32 remoteproc
Activate the remote processor support for stm32mp15 configs.
Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Fabien Dessenne [Fri, 31 May 2019 13:11:35 +0000 (15:11 +0200)]
MAINTAINERS: Add stm32 remoteproc driver
Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Fabien Dessenne [Fri, 31 May 2019 13:11:34 +0000 (15:11 +0200)]
remoteproc: Introduce STM32 Cortex-M4 remoteproc driver
This patch introduces support of Cortex-M4 remote processor for STM32
MCU and MPU families.
Signed-off-by: Loic Pallardy <loic.pallardy@st.com>
Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Fabien Dessenne [Fri, 31 May 2019 13:11:33 +0000 (15:11 +0200)]
remoteproc: add elf file load support
The current implementation supports only binary file load.
Add helpers to support ELF32 format (sanity check, and load).
Note that since an ELF32 image is built for the remote processor, the
load function uses the device_to_virt ops to translate the addresses.
Implement a basic translation for sandbox_testproc.
Add related tests. Test result:
=> ut dm remoteproc_elf
Test: dm_test_remoteproc_elf: remoteproc.c
Test: dm_test_remoteproc_elf: remoteproc.c (flat tree)
Failures: 0
Signed-off-by: Loic Pallardy <loic.pallardy@st.com>
Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Fabien Dessenne [Fri, 31 May 2019 13:11:32 +0000 (15:11 +0200)]
remoteproc: add device_to_virt ops
Introduce the device_to_virt function to allow translation between
device address (remote processor view) and virtual address (main
processor view).
Signed-off-by: Loic Pallardy <loic.pallardy@st.com>
Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Fabien Dessenne [Fri, 31 May 2019 13:11:31 +0000 (15:11 +0200)]
remoteproc: fix function headers
Add full function comment headers.
Fix rproc_is_initialized() return value description.
Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Fabien Dessenne [Fri, 31 May 2019 13:11:30 +0000 (15:11 +0200)]
dm: core: Introduce xxx_translate_dma_address()
Add the following functions to translate DMA address to CPU address:
- dev_translate_dma_address()
- ofnode_translate_dma_address()
- of_translate_dma_address()
- fdt_translate_dma_address()
These functions work the same way as xxx_translate_address(), with the
difference that the translation relies on the "dma-ranges" property
instead of the "ranges" property.
Add related test. Test report:
=> ut dm fdt_translation
Test: dm_test_fdt_translation: test-fdt.c
Test: dm_test_fdt_translation: test-fdt.c (flat tree)
Failures: 0
Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Tom Rini [Sun, 21 Jul 2019 19:40:21 +0000 (15:40 -0400)]
Merge tag 'rockchip-for-v2019.07' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- rk3399 lpddr4 support
- rk3399-rock960 board support improvement
- Eliminate pyelftools dependency by make_fit_atf.py
- clean up rockchip dts to use -u-boot.dtsi
- use ARM arch/generic timer instead of rk_timer
- clean up Kconfig options for board support
Kever Yang [Fri, 19 Jul 2019 10:01:11 +0000 (18:01 +0800)]
rockchip: sdhci: Fix sdhci mmc driver probe abort
This patch fix mmc driver abort caused by below patch:
3d296365e4 mmc: sdhci: Add support for sdhci-caps-mask
After the patch sdhci_setup_cfg() access to host->mmc->dev,
so we have to do init before make the call to the function()
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Chris Webb [Tue, 16 Jul 2019 19:53:26 +0000 (20:53 +0100)]
rockchip: Remove obsolete references to pyelftools
make_fit_atf.py no longer requires pyelftools, and nothing else in the
rockchip build requires it either, so remove references to installing it
from the documentation.
Signed-off-by: Chris Webb <chris@arachsys.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Chris Webb [Tue, 16 Jul 2019 19:52:57 +0000 (20:52 +0100)]
rockchip: make_fit_atf.py: Eliminate pyelftools dependency
make_fit_aft.py depends on the non-standard library pyelftools to pull
out PT_LOAD segments from ELF files. However, this is as easy to do
manually, without imposing the extra dependency on users.
Structures in the ELF file are unpacked into variables named to exactly
match the ELF spec to ensure the destructuring code is reasonably
self-documenting.
Signed-off-by: Chris Webb <chris@arachsys.com>
Reviewed-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Kever Yang [Tue, 16 Jul 2019 12:40:17 +0000 (20:40 +0800)]
rockchip: enable rk322x TPL_BOOTROM_SUPPORT in Kconfig
The TPL_BOOTROM_SUPPORT is needed for boot from bootrom like
other storages.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Niklas Schulze [Sun, 14 Jul 2019 10:40:13 +0000 (10:40 +0000)]
rockchip: video: rk3288_hdmi: Add missing call to dw_hdmi_enable()
The RK3288 HDMI driver's rk3288_hdmi_enable() currently lacks a call to
dw_hdmi_enable(). Thus, the HDMI output never gets enabled.
Signed-off-by: Niklas Schulze <me@jns.io>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Kever Yang [Tue, 9 Jul 2019 14:06:01 +0000 (22:06 +0800)]
rockchip: rk3399: use common TPL board file
Use common tpl.c instead of rk3399-board-tpl.c
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 14:06:00 +0000 (22:06 +0800)]
rockchip: rk3399: remove TPL_BOARD_INIT
RK3399 TPL do not need a dedicate board init, print the firmware
info when debug init instead.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 14:05:59 +0000 (22:05 +0800)]
rockchip: rk3399: use common secure_timer_init() for spl/tpl
SPL/TPL share the same secure_timer_init(), update to use
one copy source code and update to use CONFIG_ROCKCHIP_STIMER_BASE
as base address and rename to function name to rockchip_stimer_init().
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 14:05:58 +0000 (22:05 +0800)]
rockchip: rk3368: use common TPL board file
Use common tpl.c instead of rk3368-board-tpl.c
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 14:05:57 +0000 (22:05 +0800)]
rockchip: rk3288: use common TPL board file
Use Common tpl.c instead of rk3288-board-tpl.c
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 14:05:56 +0000 (22:05 +0800)]
rockchip: rk322x: use common TPL board file
Use Common tpl.c instead of rk322x-board-tpl.c
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 14:05:55 +0000 (22:05 +0800)]
rockchip: add common tpl board file
Rockchip SoCs have similar boot process, prefer to use TPL for DRAM
init and back to bootrom, and SPL as Trust ATF/U-Boot loader. TPL
common board is a basic TPL board init which can be shared for most
of SoCs to avoid copy-pase for different SoCs.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 14:00:33 +0000 (22:00 +0800)]
rockchip: evb-px5: switch to use ARM generic timer
Default to use ARM generic timer in ARM64, switch from
rk timer to generic timer.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 14:00:32 +0000 (22:00 +0800)]
rockchip: rk3368-lion: switch to use ARM generic timer
Default to use ARM generic timer in ARM64, switch from
rk timer to generic timer.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 14:00:31 +0000 (22:00 +0800)]
rockchip: rk3368: enable stimer for rk3368
Add stimer_init() for spl/tpl so that we able to switch
to use arch timer.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 14:00:30 +0000 (22:00 +0800)]
rockchip: rk3368: move sgrf init to spl as arch_cpu_init()
The SoC related init will move to SPL and keep TPL clean,
so that we can reuse the common TPL board file.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 14:00:29 +0000 (22:00 +0800)]
rockchip: remove rk_timer
We have convert all SoC to use DM timer or ARM arch/generic
timer, we can remove this rk_timer now.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 14:00:28 +0000 (22:00 +0800)]
rockchip: remove no use header file in board code
The timer.h is no use any more, remove it from the board files.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 14:00:27 +0000 (22:00 +0800)]
rockchip: rk3128: use ARM arch timer instead of rk_timer
We prefer to use ARM arch timer instead of rockchip timer, so that
we are using the same timer for SPL, U-Boot and Kernel, which will
make things simple and easy to track to boot time.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 14:00:26 +0000 (22:00 +0800)]
rockchip: rk3288: use ARM arch timer instead of rk_timer
We prefer to use ARM arch timer instead of rockchip timer, so that
we are using the same timer for SPL, U-Boot and Kernel, which will
make things simple and easy to track to boot time.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 14:00:25 +0000 (22:00 +0800)]
rockchip: rk3036: use ARM arch timer instead of rk_timer
We prefer to use ARM arch timer instead of rockchip timer, so that
we are using the same timer for SPL, U-Boot and Kernel, which will
make things simple and easy to track the boot time.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 14:00:24 +0000 (22:00 +0800)]
rockchip: rk3036: sdram: use udelay instead of rockchip_udelay
Use system api for udelay instead of vendor defined api,
and rockchip_udelay() will be removed.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 14:00:23 +0000 (22:00 +0800)]
rockchip: rk322x: use ARM arch timer instead of rk_timer
We prefer to use ARM arch timer instead of rockchip timer, so that
we are using the same timer for SPL, U-Boot and Kernel, which will
make things simple and easy to track to boot time.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 14:00:22 +0000 (22:00 +0800)]
rockchip: rk322x: sdram: use udelay instead of rockchip_udelay
Use system api for udelay instead of vendor defined api,
and rockchip_udelay() will be removed.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 13:58:55 +0000 (21:58 +0800)]
rockchip: board: rk3288: remove board_boot_order()
Prefer to use dts config instead, remove all board_boot_order()
for rk3288 boards.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 13:58:54 +0000 (21:58 +0800)]
rockchip: rk3288: dts: enable spl-boot-order
We share the same default SPL boot order for all rk3288 boards,
use dts instead of hard code in board file.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Wed, 17 Jul 2019 10:12:20 +0000 (18:12 +0800)]
rockchip: spl-boot-order: update dependency to OF_LIBFDT
The fdt interfaces are actuall depends on OF_LIBFDT instead
of OF_CONTROL, some boards may enable OF_CONTROL while disable
OF_LIBFDT.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 13:58:53 +0000 (21:58 +0800)]
rockchip: popmetal-rk3288: add -u-boot.dtsi
Move U-Boot relate dts node/property into -u-boot.dtsi
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 13:58:52 +0000 (21:58 +0800)]
rockchip: miqi-rk3288: add -u-boot.dtsi
Move U-Boot relate dts node/property into -u-boot.dtsi
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 13:58:51 +0000 (21:58 +0800)]
rockchip: rk3288-firefly: sync sdmmc pinctrl from mainline
The rk3288-firefly board have different setting for sdmmc
io, sync then from kernel mainline:
6fbc7275c7a9 Linux 5.2-rc7
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 13:58:50 +0000 (21:58 +0800)]
rockchip: firefly-rk3288: add -u-boot.dtsi
Move U-Boot relate dts node/property into -u-boot.dtsi
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 13:58:49 +0000 (21:58 +0800)]
rockchip: rk3288: update u-boot raw image size for all boards
Some rk3288 boards are using raw image of u-boot.bin, and now
it's much bigger than default 200KB, update CONFIG_SYS_MONITOR_LEN
to 600KB.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 13:58:48 +0000 (21:58 +0800)]
rockchip: fennec-rk3288: add -u-boot.dtsi
Move U-Boot relate dts node/property into -u-boot.dtsi
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 13:58:47 +0000 (21:58 +0800)]
rockchip: evb-rk3288: add -u-boot.dtsi
Move U-Boot relate dts node/property into -u-boot.dtsi
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 13:58:46 +0000 (21:58 +0800)]
rockchip: rk3288: enable TPL for evb-rk3288
Enable TPL for evb-rk3288 so that we can have a free size limited
SPL.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 13:58:45 +0000 (21:58 +0800)]
rockchip: rk3288: add default TPL_LDSCRIPT value in Kconfig
We share the same TPL_LDSCRIPT for all rk3288 board, add
default value in Kconfig.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 13:58:44 +0000 (21:58 +0800)]
rockchip: rk3288: move configure_l2ctlr back to rk3288
The configure_l2ctlr() is used only by rk3288, do not need to
locate in sys_proto.h
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 13:58:43 +0000 (21:58 +0800)]
rockchip: rk3288: add arch_cpu_init in spl
Add arch_cpu_init() in SPL for soc related init, and
move configure_l2ctlr() into it.
The arch_cpu_init() only need to run once, so no need
to run in TPL.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 14:14:29 +0000 (22:14 +0800)]
rockchip: rk3368: default enable SPL LIBCOMMON and LIBGENERIC
We needs SPL LIBCOMMON and LIBGENERIC for all boards,
so we can enable them by default and no need to define
in each board.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 14:14:28 +0000 (22:14 +0800)]
rockchip: rk322x: default enable SPL LIBCOMMON and LIBGENERIC
We needs SPL LIBCOMMON and LIBGENERIC for all boards,
so we can enable them by default and no need to define
in each board.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 14:14:27 +0000 (22:14 +0800)]
rockchip: rk3328: default enable SPL LIBCOMMON and LIBGENERIC
We needs SPL LIBCOMMON and LIBGENERIC for all boards,
so we can enable them by default and no need to define
in each board.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 14:14:26 +0000 (22:14 +0800)]
rockchip: rk3399: default enable SPL LIBCOMMON and LIBGENERIC
We needs SPL LIBCOMMON and LIBGENERIC for all boards,
so we can enable them by default and no need to define
in each board.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 14:14:25 +0000 (22:14 +0800)]
rockchip: rk3368: use defaule value for SYS_MALLOC_F_LEN
There is no difference in rk3368 board use for SYS_MALLOC_F_LEN,
so we can use default value.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 14:14:24 +0000 (22:14 +0800)]
rockchip: rk3328: use defaule value for SYS_MALLOC_F_LEN
There is no difference in rk3328 board use for SYS_MALLOC_F_LEN,
so we can use default value.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 14:14:23 +0000 (22:14 +0800)]
rockchip: rk3399: use default value for SYS_MALLOC_F_LEN
There is no difference in rk3399 board use for SYS_MALLOC_F_LEN,
so we can use default value.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 14:14:22 +0000 (22:14 +0800)]
rockchip: rk3288: use default value for SYS_MALLOC_F_LEN
There is no difference in rk3288 board use for SYS_MALLOC_F_LEN,
so we can use default value.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 14:14:21 +0000 (22:14 +0800)]
rockchip: rk322x: use defconfig for SYS_MALLOC_F_LEN
There is no difference in rk322x board use for SYS_MALLOC_F_LEN,
so we can use default value.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 14:14:20 +0000 (22:14 +0800)]
rockchip: Kconfig: move ROCKCHIP_BOOT_MODE_REG to soc Kconfig
Rockchip SoCs have different ROCKCHIP_BOOT_MODE_REG value,
move it to SoC's own Kconfig, and add address for rk3128 and
rk3328 so that all SoCs have available address.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 14:14:19 +0000 (22:14 +0800)]
rockchip: Kconfig: move rk3399 config into its Kconfig
Each SoC have its config setting and its Kconfig, move
the specific setting to its own Kconfig file.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 14:14:18 +0000 (22:14 +0800)]
rockchip: Kconfig: move rk3368 config into its Kconfig
Each SoC have its config setting and its Kconfig, move
the specific setting to its own Kconfig file.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 14:14:17 +0000 (22:14 +0800)]
rockchip: Kconfig: move rk3288 config into its Kconfig
Each SoC have its config setting and its Kconfig, move
the specific setting to its own Kconfig file.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 14:14:16 +0000 (22:14 +0800)]
rockchip: Kconfig: move rk322x config into its Kconfig
Each SoC have its config setting and its Kconfig, move
the specific setting to its own Kconfig file.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 14:14:15 +0000 (22:14 +0800)]
rockchip: fixup board choice in Kconfig
Kconfig for board target select is choice option, fixup for
rk3036, rk3288 and rv1108.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 13:55:30 +0000 (21:55 +0800)]
rockchip: remove redundant pinctrl header including
No code is using this header file, remove it.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 13:55:29 +0000 (21:55 +0800)]
rockchip: rk3288: remove pinctrl init in spl_board_init
The pinctrl will default init the io while driver is probe
with new pinctrl driver.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 13:55:28 +0000 (21:55 +0800)]
rockchip: rk3188: remove pinctrl init in spl_board_init
The pinctrl will default init the io while driver is probe
with new pinctrl driver.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 9 Jul 2019 13:55:27 +0000 (21:55 +0800)]
rockchip: rk3399: remove pinctrl init in spl_board_init
The pinctrl will default init the io while driver is probe
with new pinctrl driver.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Jagan Teki [Tue, 16 Jul 2019 11:57:45 +0000 (17:27 +0530)]
rockchip: dts: rk3399: rock-pi-4: Use LPDDR4-100 dtsi
Use LPDDR4-100 sdram timings dtsi for RockPI-4 board.
All these timings are processed during TPL stage of rock-pi-4 board,
bootchain. This make TPL would replace rockchip in house rkbin in
current bootchain.
Bootchain after and before this change:
TPL -> SPL -> U-Boot proper
rkbin -> SPL -> U-Boot proper
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Mon, 15 Jul 2019 18:28:56 +0000 (23:58 +0530)]
rockchip: dts: rk3399: nanopi-neo4: Use DDR3-1866 dtsi
Use DDR3-1866 2GB ddr timings dtsi for 1GB NanoPi Neo4 board.
Since sdram rk3399 support dynamic stride and rank detection it
can able to detect 1GB ddr eventough the timings are meant for
dual channel, 2GB size.
Bootchain after and before this change are:
TPL -> SPL -> U-Boot proper
rkbin -> SPL -> U-Boot proper
This certainly fix the second channel data training initialization
since we have dynamic rank, stride where second channel capabilities
are clear or memset to 0.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Tue, 16 Jul 2019 11:57:44 +0000 (17:27 +0530)]
rockchip: dts: rk3399: rockpro64: Use LPDDR4-100 dtsi
Use LPDDR4-100 sdram timings dtsi for Rockpro64 board.
All these timings are processed during TPL stage of rockpro64 board,
bootchain. This make TPL would replace rockchip in house rkbin in
current bootchain.
Bootchain after and before this change:
TPL -> SPL -> U-Boot proper
rkbin -> SPL -> U-Boot proper
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Tue, 16 Jul 2019 11:57:43 +0000 (17:27 +0530)]
rockchip: dts: rk3399: Add LPDDR4-100 timings
Add sdram timings for LPDDR4-100 via rk3399-sdram-lpddr4-100.dtsi file.
all timings are dumped from rkbin/bin/rk33/rk3399_ddr_800MHz_v1.20.bin
Associated LPDDR4 board -u-boot.dtsi can include this to make these
timings available during SPL or TPL stages.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Tue, 16 Jul 2019 11:57:42 +0000 (17:27 +0530)]
configs: rock-pi-4: Enable LPDDR4 support
Due to foot-print issues, we have LPDDR4 code can be
marked as CONFIG_RAM_RK3399_LPDDR4.
So, enable it for Rock-PI-4 board.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Tue, 16 Jul 2019 11:57:41 +0000 (17:27 +0530)]
configs: rockpro64: Enable LPDDR4 support
Due to foot-print issues, we have LPDDR4 code can be
marked as CONFIG_RAM_RK3399_LPDDR4.
So, enable it for Rockpro64 board.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Tue, 16 Jul 2019 11:57:40 +0000 (17:27 +0530)]
ram: rk3399: Add lpddr4 set rate support
Unlike rest of dram type chips, LPDDR4 initialization start
with at board selected frequency (say 50MHz) and then it
switches into 400MHz and 800MHz simultaneously to make the
proper sequence work on each channel with associated training.
The lpddr4 set rate sequnce will follow by setting lpddr4
- dq out
- ca odt
- MR3
- MR12
- MR14
registers sets in sequential order.
Here is sameple log about LPDDR4-100 init sequence in Rockpro64:
Channel 0: LPDDR4, 50MHz
BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB
Channel 1: LPDDR4, 50MHz
BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB
256B stride
channel 0 training pass
channel 1 training pass
change freq to 400 MHz 0, 1
channel 0 training pass
channel 1 training pass
change freq to 800 MHz 1, 0
This patch add support to this init sequence via lpddr4 set rate
by taking sdram timing parameters from 400, 800 .inc files.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(Fix travis error, use one ret instead of ret[2] in set_ctrl)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Jagan Teki [Tue, 16 Jul 2019 11:57:39 +0000 (17:27 +0530)]
ram: rk3399: Add set_rate sdram rk3399 ops
DDR set rate can be even required for lpddr4 and we
need to keep the lpddr4 code to compile only for relevant
boards which do support lpddr4.
For this requirement, and for code readability handle
data training via sdram_rk3399_ops with .set_rate and
same will update in future while supporting lpddr4 code.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Tue, 16 Jul 2019 11:57:38 +0000 (17:27 +0530)]
ram: rk3399: Add LPPDDR4-800 timings inc
LPDDR4 initialization start with at board selected frequency
and then it switches into 400MHz and 800MHz simultaneously to
make the proper sequence work on each channel with associated
training.
So, add LPDDR4-800 timings inc file in driver area so-that
these timings will take during LPDDR4 initialization phase.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Tue, 16 Jul 2019 11:57:37 +0000 (17:27 +0530)]
ram: rk3399: Add LPPDDR4-400 timings inc
LPDDR4 initialization start with at board selected frequency
and then it switches into 400MHz and 800MHz simultaneously to
make the proper sequence work on each channel with associated
training.
So, add LPDDR4-400 timings inc file in driver area so-that
these timings will take during LPDDR4 initialization phase.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Tue, 16 Jul 2019 11:57:36 +0000 (17:27 +0530)]
clk: rockchip: rk3399: Set 400MHz ddr clock
Add support for setting 400MHz ddr clock.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Tue, 16 Jul 2019 11:57:35 +0000 (17:27 +0530)]
clk: rockchip: rk3399: Set 50MHz ddr clock
Add support for setting 50MHz ddr clock.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Tue, 16 Jul 2019 11:57:34 +0000 (17:27 +0530)]
rockchip: dts: rk3399: Add u-boot, dm-pre-reloc for pmu
Add u-boot,dm-pre-reloc property for pmu in rk3399-u-boot.dtsi
so-that SPL can access pmu.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Tue, 16 Jul 2019 11:57:33 +0000 (17:27 +0530)]
rockchip: rk3399: syscon: Add pmu support
Add pmu compatible with relevant U_BOOT_DRIVER for rk3399
via syscon rk3399 driver.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Tue, 16 Jul 2019 11:57:32 +0000 (17:27 +0530)]
arm: include: rockchip: Add rk3399 pmu file
Add pmu header file for rk3399 SoC, this will help
to configure pmu in sdram driver.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Tue, 16 Jul 2019 11:57:31 +0000 (17:27 +0530)]
ram: rk3399: Add LPPDR4 mr detection
Like data training in other sdram types, mr detection need
to taken care for lpddr4 with looped rank and associated
channel to make sure the proper configuration held.
Once the mr detection successful for active and configured
rank with channel number, the same can later reused during
actual LPDDR4 initialization.
So, add code to support for it.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Tue, 16 Jul 2019 11:57:30 +0000 (17:27 +0530)]
ram: rk3399: Handle data training via ops
data training can be even required for lpddr4 and we
need to keep the lpddr4 code to compile only for relevant
boards which do support lpddr4.
For this requirement, and for code readability handle
data training via sdram_rk3399_ops and same will update
in future while supporting lpddr4 code.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Tue, 16 Jul 2019 11:57:29 +0000 (17:27 +0530)]
ram: rk3399: Simplify data training first argument
data training is using chan_info as first argument with
channel number as second argument instead of that use
dram_info as first argument so-that we can get the
chan_info at data training definition.
This was the argument handling is meaningful, readable
and it would help to add similar data training for
lpddr4 in future.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Jagan Teki [Tue, 16 Jul 2019 11:57:28 +0000 (17:27 +0530)]
ram: rk3399: Update lpddr4 vref_mode_ac
Update vref_mode_ac for lpddr4 based on VDDQ/3/2=16.8%
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>