oweals/u-boot.git
7 years agoARM: DT: stm32f7: add qspi pin contol node
Vikas Manocha [Sun, 12 Feb 2017 18:25:53 +0000 (10:25 -0800)]
ARM: DT: stm32f7: add qspi pin contol node

It also removes the qspi pin configuration done during the
board initialization.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
7 years agoARM: DT: stm32f7: add ethernet pin contol node
Vikas Manocha [Sun, 12 Feb 2017 18:25:52 +0000 (10:25 -0800)]
ARM: DT: stm32f7: add ethernet pin contol node

It also removes the ethernet pin configuration done during the board
initialization.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
7 years agoARM: DT: stm32f7: add pin control node for serial port pins
Vikas Manocha [Sun, 12 Feb 2017 18:25:51 +0000 (10:25 -0800)]
ARM: DT: stm32f7: add pin control node for serial port pins

And remove the uart pin configuration from board initialization.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
7 years agoARM: DT: stm32f7: add pin control device node
Vikas Manocha [Sun, 12 Feb 2017 18:25:50 +0000 (10:25 -0800)]
ARM: DT: stm32f7: add pin control device node

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
7 years agoPINCTRL: stm32f7: add pin control driver
Vikas Manocha [Sun, 12 Feb 2017 18:25:49 +0000 (10:25 -0800)]
PINCTRL: stm32f7: add pin control driver

This driver uses the same pin control binding as that of linux, binding
document of this patch is copied from linux. One addition done is for
GPIO input and output mode configuration which was missing.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agostm32f7: clk: remove usart1 clock enable from board init
Vikas Manocha [Sun, 12 Feb 2017 18:25:48 +0000 (10:25 -0800)]
stm32f7: clk: remove usart1 clock enable from board init

Before clock driver availability it was required to enable usart1 clock
for serial init but now with clock driver is taking care of usart1 clock.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
7 years agoARM: DT: stm32f7: add usart1 & clock device tree nodes
Vikas Manocha [Sun, 12 Feb 2017 18:25:47 +0000 (10:25 -0800)]
ARM: DT: stm32f7: add usart1 & clock device tree nodes

Also created alias for usart1 and specified oscillator clock for stm32f7
discovery board.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
7 years agostm32f7: serial: use clock driver to enable clock
Vikas Manocha [Sun, 12 Feb 2017 18:25:46 +0000 (10:25 -0800)]
stm32f7: serial: use clock driver to enable clock

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoclk: stm32f7: add clock driver for stm32f7 family
Vikas Manocha [Sun, 12 Feb 2017 18:25:45 +0000 (10:25 -0800)]
clk: stm32f7: add clock driver for stm32f7 family

add basic clock driver support for stm32f7 to enable clocks required by
the peripherals.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoserial: stm32f7: add device tree support
Vikas Manocha [Sun, 12 Feb 2017 18:25:44 +0000 (10:25 -0800)]
serial: stm32f7: add device tree support

This patch adds device tree support for stm32f7 serial driver & removes serial
platform data structure.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoarm: use common instructions applicable to armv7m & other arm archs
Vikas Manocha [Fri, 5 Feb 2016 18:43:01 +0000 (10:43 -0800)]
arm: use common instructions applicable to armv7m & other arm archs

This patch cleans the code by using instructions allowed for armv7m as well as
other Arm archs.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
7 years agoarm: Update our 'ret' assembler macro slightly
Tom Rini [Thu, 2 Mar 2017 14:59:30 +0000 (09:59 -0500)]
arm: Update our 'ret' assembler macro slightly

We only support cores that do Thumb-1 or later.  So we add a comment to
explain this and remove the architecture test.

Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Mans Rullgard <mans@mansr.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agogpt: Fix uuid string format
Vincent Tinelli [Mon, 27 Feb 2017 14:11:15 +0000 (16:11 +0200)]
gpt: Fix uuid string format

Change GPT UUID string format from UUID to GUID per specification.

Signed-off-by: Vincent Tinelli <vincent.tinelli@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agocmd: itest: correct calculus for long format
Sebastien Colleur [Fri, 10 Feb 2017 12:59:15 +0000 (15:59 +0300)]
cmd: itest: correct calculus for long format

itest shell command doesn't work correctly in long format when
doing comparaison due to wrong mask value calculus that overflow
on 32 bits values.

Signed-off-by: Sebastien Colleur <sebastienx.colleur@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoconfigs: move CMD_MD5SUM definition to defconfigs
Andre Przywara [Wed, 15 Mar 2017 01:19:07 +0000 (01:19 +0000)]
configs: move CMD_MD5SUM definition to defconfigs

Boards with an apparent need for the md5sum command had the connected
config symbol defined in their board header file.
Move this over to the respective defconfig files now that md5sum is
configured via Kconfig.
(This is a manual effort, which differs from moveconfig.py, not sure
who is right here. Boards except sandbox loose the md5sum command with
moveconfig.py, though it was explicitly mentioned in their config.h's)

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: migrate stih410-b2260]
Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoKconfig: define MD5 dependency for FIT support
Andre Przywara [Wed, 15 Mar 2017 01:19:06 +0000 (01:19 +0000)]
Kconfig: define MD5 dependency for FIT support

FIT images require MD5 support to verify image checksums. So far this
was expressed by defining a CPP symbol in image.h. Since MD5 is now a
first class Kconfig citizen, express that in Kconfig instead.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoKconfig: introduce md5sum command selection
Andre Przywara [Wed, 15 Mar 2017 01:19:05 +0000 (01:19 +0000)]
Kconfig: introduce md5sum command selection

So far CONFIG_MD5SUM would need to be set by a board's include file.
Since the command is really generic, move it over to Kconfig to allow
it to be defined by either a board's defconfig, menuconfig or some
config snippet merged via mergeconfig.sh.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agokirkwood: remove get_random_hex() and MD5 dependency
Andre Przywara [Wed, 15 Mar 2017 01:19:04 +0000 (01:19 +0000)]
kirkwood: remove get_random_hex() and MD5 dependency

Commit 19a5944fcd62 ("mvgbe: remove setting of ethaddr within the
driver") removed the usage of get_random_hex() from the mvgbe driver
about six years ago. However the prototype of that function survived
till today in some kirkwood header file.
Remove that prototype and the CONFIG_MD5 dependency triggered by that.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
7 years agoMerge tag 'xilinx-for-v2017.05' of git://www.denx.de/git/u-boot-microblaze
Tom Rini [Thu, 16 Mar 2017 20:44:23 +0000 (16:44 -0400)]
Merge tag 'xilinx-for-v2017.05' of git://denx.de/git/u-boot-microblaze

Xilinx changes for v2017.05

- Move to DM clk driver
- Add clk support for zynq_sdhci

7 years agoMerge git://git.denx.de/u-boot-fsl-qoriq
Tom Rini [Thu, 16 Mar 2017 20:43:32 +0000 (16:43 -0400)]
Merge git://git.denx.de/u-boot-fsl-qoriq

7 years agoarm64: booti: allow to place kernel image anywhere in physical memory
Masahiro Yamada [Thu, 9 Mar 2017 07:28:25 +0000 (16:28 +0900)]
arm64: booti: allow to place kernel image anywhere in physical memory

At first, the ARM64 Linux booting requirement recommended that the
kernel image be placed text_offset bytes from 2MB aligned base near
the start of usable system RAM because memory below that base address
was unusable at that time.

This requirement was relaxed by Linux commit a7f8de168ace ("arm64:
allow kernel Image to be loaded anywhere in physical memory").
Since then, the bit 3 of the flags field indicates the tolerance
of the kernel physical placement.  If this bit is set, the 2MB
aligned base may be anywhere in physical memory.  For details, see
Documentation/arm64/booting.txt of Linux.

The booti command should be also relaxed.  If the bit 3 is set,
images->ep is respected, and the image is placed at the nearest
bootable location.  Otherwise, it is relocated to the start of the
system RAM to keep the original behavior.

Another wrinkle we need to take care of is the unknown endianness of
text_offset for a kernel older than commit a2c1d73b94ed (i.e. v3.16).
We can detect this based on the image_size field.  If the field is
zero, just use a fixed offset 0x80000.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agotools: fix cross-compiling tools when HOSTCC is overridden
Masahiro Yamada [Mon, 13 Mar 2017 08:43:16 +0000 (17:43 +0900)]
tools: fix cross-compiling tools when HOSTCC is overridden

Richard reported U-Boot tools issues in OpenEmbedded/Yocto project.

OE needs to be able to change the default compiler. If we pass in
HOSTCC through the make command, it overwrites all HOSTCC instances,
including ones in tools/Makefile and tools/env/Makefile, which breaks
"make cross_tools" and "make env", respectively.

Add "override" directives to avoid overriding HOSTCC instances that
really need to point to the cross-compiler.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reported-by: Richard Purdie <richard.purdie@linuxfoundation.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agotiny-printf: add static to locally used functions
Masahiro Yamada [Sun, 12 Feb 2017 09:08:43 +0000 (18:08 +0900)]
tiny-printf: add static to locally used functions

These two functions are only used in lib/tiny-printf.c .

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tested-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Stefan Roese <sr@denx.de>
7 years agoigep00x0: fixup FDT according to detected flash type
Ladislav Michl [Sat, 18 Feb 2017 23:24:49 +0000 (00:24 +0100)]
igep00x0: fixup FDT according to detected flash type

Leave only detected flash type enabled in FTD as otherwise GPMC CS is
claimed (and never freed) by Linux, causing 'concurent' flash type
not to be probed.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
7 years agoigep00x0: disable environment
Ladislav Michl [Sat, 18 Feb 2017 23:23:39 +0000 (00:23 +0100)]
igep00x0: disable environment

ISEE's U-Boot and Linux are using 1bit ECC scheme, while we
switched to 8bit ECC to fullfill flash specification requirements.
However when trying to run U-Boot on board with 1bit ECC'd data
on flash, UBI code takes several minutes to pass scan as reading
of every block ends with ecc error (which is also printed on
console).
So, until proper solution is developed, disable environment
alltogether.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
7 years agoboard: Add STMicroelectronics STiH410-B2260 support
Patrice Chotard [Tue, 21 Feb 2017 12:37:12 +0000 (13:37 +0100)]
board: Add STMicroelectronics STiH410-B2260 support

This is a 96Board compliant board based on STiH410 SoC:
  - 1GB DDR
  - On-Board USB combo WiFi/Bluetooth RTL8723BU
    with PCB soldered antenna
  - Ethernet 1000-BaseT
  - SATA
  - HDMI
  - 2 x USB2.0 type A
  - 1 x USB2.0 type micro-AB
  - SD card slot
  - High speed connector (SD/I2C/USB interfaces)
  - Low speed connector (UART/I2C/GPIO/SPI/PCM interfaces)

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoSTiH410-B2260: Add device tree
Patrice Chotard [Tue, 21 Feb 2017 12:37:11 +0000 (13:37 +0100)]
STiH410-B2260: Add device tree

This device tree has been extracted from v4.9 kernel

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoSTiH410: Add STi pinctrl driver
Patrice Chotard [Tue, 21 Feb 2017 12:37:10 +0000 (13:37 +0100)]
STiH410: Add STi pinctrl driver

Add STMicroelectronics STiH410 pinctrl driver

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoSTiH410: Add STi SDHCI driver
Patrice Chotard [Tue, 21 Feb 2017 12:37:09 +0000 (13:37 +0100)]
STiH410: Add STi SDHCI driver

Add SDHCI host controller found on STMicroelectronics SoCs

On some ST SoCs, i.e. STiH407/STiH410, the MMC devices can live
inside a dedicated flashSS sub-system that provides an extend subset
of registers that can be used to configure the Arasan MMC/SD Host
Controller.

This means, that the SDHCI Arasan Controller can be configured to be
eMMC4.5 or 4.3 spec compliant.

W/o these settings the SDHCI will configure and use the MMC/SD
controller with limited features e.g. PIO mode, no DMA, no HS etc.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
7 years agogpio: do not include <asm/arch/gpio.h> for ARCH_STI
Patrice Chotard [Tue, 21 Feb 2017 12:37:08 +0000 (13:37 +0100)]
gpio: do not include <asm/arch/gpio.h> for ARCH_STI

As no gpio.h is defined in arch/arm/include/asm/arch-stih410,
to avoid compilation failure, do not include asm/arch/gpio.h.

This is needed for example when including sdhci.h, which include
asm/gpio.h>.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoSTiH410: Add STi serial driver
Patrice Chotard [Tue, 21 Feb 2017 12:37:07 +0000 (13:37 +0100)]
STiH410: Add STi serial driver

This patch adds support to ASC (asynchronous serial controller)
driver, which is basically a standard serial driver. This IP
is common across other STMicroelectronics SoCs

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoSTiH410: Add STi sysreset driver
Patrice Chotard [Tue, 21 Feb 2017 12:37:06 +0000 (13:37 +0100)]
STiH410: Add STi sysreset driver

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoSTiH410: Add STi timer driver
Patrice Chotard [Tue, 21 Feb 2017 12:37:05 +0000 (13:37 +0100)]
STiH410: Add STi timer driver

Add ARM global timer based timer

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoarm: Add support for STMicroelectronics STiH410 soc
Patrice Chotard [Tue, 21 Feb 2017 12:37:04 +0000 (13:37 +0100)]
arm: Add support for STMicroelectronics STiH410 soc

The STiH410 is an advanced multi-HD AVC processor with 3D
graphics acceleration and 1.5-GHz ARM Cortex-A9 SMP CPU
part of the STiH407 family.

It has wide connectivity including USB 3.0, PCI-e, SATA
and gigabit ethernet.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
7 years agoarmv7m: Add SysTick timer driver
Phil Edworthy [Fri, 17 Feb 2017 08:22:17 +0000 (08:22 +0000)]
armv7m: Add SysTick timer driver

The SysTick is a 24-bit down counter that is found on all ARM Cortex
M3, M4, M7 devices and is always located at a fixed address.

The number of reference clock ticks that correspond to 10ms is normally
defined in the SysTick Calibration register's TENMS field. However, on some
devices this is wrong, so this driver allows the clock rate to be defined
using CONFIG_SYS_HZ_CLOCK.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Vikas MANOCHA <vikas.manocha@st.com>
7 years agotools: omapimage: Fix size in header
Lokesh Vutla [Wed, 15 Feb 2017 13:12:54 +0000 (18:42 +0530)]
tools: omapimage: Fix size in header

The size field in GP header that is expected by ROM is size of the
image + size of the header. But omapimage generates a gp header
only with size of the image as size field. Fix it

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
7 years agoarm: omap3: Bring back ARM errata workaround 725233
Siarhei Siamashka [Mon, 6 Mar 2017 01:16:53 +0000 (03:16 +0200)]
arm: omap3: Bring back ARM errata workaround 725233

The workaround for ARM errata 725233 had been lost since
commit 45bf05854bc94e (armv7: adapt omap3 to the new cache
maintenance framework). Bring it back in order to avoid
very difficult to reproduce, but actually encountered in
the wild CPU deadlocks when running software rendered
X11 desktop on OMAP3530 hardware.

Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Migrate to Kconfig]
Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoarm: omap3: Compile clock.c with -marm option to unbreak OMAP3530
Siarhei Siamashka [Mon, 6 Mar 2017 01:16:52 +0000 (03:16 +0200)]
arm: omap3: Compile clock.c with -marm option to unbreak OMAP3530

Boards with OMAP3530 SoC fail to boot since commit bd2c4522c26d5
("ti: armv7: enable EXT support in SPL (using ti_armv7_common.h)")
because it enabled the use of Thumb2 for the SPL.

Experiments have shown that the deadlock happens in the
prcm_init() function from 'arch/arm/mach-omap2/omap3/clock.c'.

This patch enforces the compilation of clock.c source file in
ARM mode and makes the deadlock disappear. We are yet to figure
out the root cause of the problem. Still this is somewhat
better than having non-bootable boards for years.

Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoomap3_overo: Reduce SPL size
Tom Rini [Fri, 10 Mar 2017 19:16:54 +0000 (14:16 -0500)]
omap3_overo: Reduce SPL size

Borrowing from omap3_logic, switch to SPL_SYS_MALLOC_SIMPLE and moving
the stack to DDR as soon as we're able.

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoLS1021ATWR: Modify u-boot size for sd secure boot
Vinitha Pillai [Wed, 1 Feb 2017 12:58:53 +0000 (18:28 +0530)]
LS1021ATWR: Modify u-boot size for sd secure boot

Raw uboot image is used in place of FIT image in secure boot.
The maximum allocated size of raw u-boot bin is 1MB in memory map.
Hence , CONFIG_SYS_MONITOR_LEN has been modified to 1 MB.
The bootscript  (BS_ADDR) and its header (BS_HDR_ADDR) offset on
MMC have also been modified to accommodate the increase in uboot size.

Signed-off-by: Vinitha Pillai-B57223 <vinitha.pillai@nxp.com>
Reviewed-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: fsl-layerscape: Add vid support for LS2080AQDS
Priyanka Jain [Thu, 19 Jan 2017 05:42:28 +0000 (11:12 +0530)]
armv8: fsl-layerscape: Add vid support for LS2080AQDS

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Arpit Goel <arpit.goel@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: fsl-lsch3: Update VID support
Priyanka Jain [Thu, 19 Jan 2017 05:42:27 +0000 (11:12 +0530)]
armv8: fsl-lsch3: Update VID support

VID support in NXP layerscape Chassis-3 (lsch3) compilant SoCs like
LS2088A, LS2080A differs from existing logic.
-VDD voltage array is different
-Registers are different
-VDD calculation logic is different

Add new function adjust_vdd() for LSCH3 compliant SoCs

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Arpit Goel <arpit.goel@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: fsl-layerscape: Updates DCFG register map
Priyanka Jain [Thu, 19 Jan 2017 05:42:26 +0000 (11:12 +0530)]
armv8: fsl-layerscape: Updates DCFG register map

Based on latest hardware documentation,
update ccsr_gur structure (represents DCFG register map)

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Arpit Goel <arpit.goel@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8/ls104xa: remove the DDR interactive debugging info from SPL
Hou Zhiqiang [Mon, 6 Feb 2017 03:29:00 +0000 (11:29 +0800)]
armv8/ls104xa: remove the DDR interactive debugging info from SPL

Remove the DDR interactive debugging to reduce the size of spl image.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: fsl-lsch2: add workaround for erratum A-010635
Tang Yuantian [Tue, 7 Feb 2017 06:18:59 +0000 (14:18 +0800)]
armv8: fsl-lsch2: add workaround for erratum A-010635

Read DMA operations causes CRC error on armv8 chassis 2 platforms
due to the erratum A-010635.
In order to support sata on these platforms, ECC needs to be disabled.

Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: layerscape: Update early MMU for DDR after initialization
York Sun [Mon, 6 Mar 2017 17:02:34 +0000 (09:02 -0800)]
armv8: layerscape: Update early MMU for DDR after initialization

In early MMU table, DDR has to be mapped as device memory to avoid
speculative access. After DDR is initialized, it needs to be updated
to normal memory to allow code execution. To simplify the code,
dram_init() is moved into a common file as a weak function.

Signed-off-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: mmu: Add a function to change mapping attributes
York Sun [Mon, 6 Mar 2017 17:02:33 +0000 (09:02 -0800)]
armv8: mmu: Add a function to change mapping attributes

Function mmu_change_region_attr() is added to change existing mapping
with updated PXN, UXN and memory type. This is a break-before-make
process during which the mapping becomes fault (invalid) before final
attributres are set.

Signed-off-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: ls2080a: Drop early MMU for SPL build
York Sun [Mon, 6 Mar 2017 17:02:32 +0000 (09:02 -0800)]
armv8: ls2080a: Drop early MMU for SPL build

Early MMU improves performance especially on emulators. However, the
early MMU is left enabled after the first stage of SPL boot. Instead
of flushing D-cache and dealing with re-enabling MMU for the second
stage U-Boot, disabling it for SPL build simplifies the process. The
performance penalty is unnoticeable on the real hardware. As of now,
SPL boot is not supported by existing emulators. So this should have
no impact on emulators.

Signed-off-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: layerscape: Fix the sequence of changing MMU table
York Sun [Mon, 6 Mar 2017 17:02:31 +0000 (09:02 -0800)]
armv8: layerscape: Fix the sequence of changing MMU table

This patch follows the break-before-make process when making changes
to MMU table. MMU is disabled before changing TTBR to avoid any
potential race condition.

Signed-off-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: layerscape: Update MMU mapping with actual DDR size
York Sun [Mon, 6 Mar 2017 17:02:30 +0000 (09:02 -0800)]
armv8: layerscape: Update MMU mapping with actual DDR size

Update mapping with actual DDR size. Non-existing memory should not
be mapped as "normal" memory to avoid speculative access.

Signed-off-by: York Sun <york.sun@nxp.com>
7 years agodriver: net: fsl-mc: Update calculation of MC RAM
York Sun [Mon, 6 Mar 2017 17:02:29 +0000 (09:02 -0800)]
driver: net: fsl-mc: Update calculation of MC RAM

Since the reserved RAM is tracked by gd->arch.resv_ram, calculation
of MC memory blocks can be simplified. The MC RAM is guaranteed to be
aligned by the reservation process.

Signed-off-by: York Sun <york.sun@nxp.com>
CC: Priyanka Jain <priyanka.jain@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
7 years agoarmv8: layerscape: Rewrite memory reservation
York Sun [Mon, 6 Mar 2017 17:02:28 +0000 (09:02 -0800)]
armv8: layerscape: Rewrite memory reservation

For ARMv8 Layerscape SoCs, secure memory and MC memorey are reserved
at the end of DDR. DDR is spit into two or three banks. This patch
reverts commit aabd7ddb and simplifies the calculation of reserved
memory, and moves the code into common SoC file. Secure memory is
carved out first. DDR bank size is reduced. Reserved memory is then
allocated on the top of available memory. U-Boot still has access
to reserved memory as data transferring is needed. Device tree is
fixed with reduced memory size to hide the reserved memory from OS.
The same region is reserved for efi_loader.

Signed-off-by: York Sun <york.sun@nxp.com>
7 years agoefi: Add a hook to allow adding memory mapping
York Sun [Mon, 6 Mar 2017 17:02:27 +0000 (09:02 -0800)]
efi: Add a hook to allow adding memory mapping

Instead of adding all memory banks, add a hook so individual SoC/board
can has its own implementation.

Signed-off-by: York Sun <york.sun@nxp.com>
CC: Alexander Graf <agraf@suse.de>
Reviewed-by: Alexander Graf <agraf@suse.de>
7 years agoarmv8: ls2080a: Move CONFIG_SYS_MC_RSV_MEM_ALIGN to Kconfig
York Sun [Mon, 6 Mar 2017 17:02:26 +0000 (09:02 -0800)]
armv8: ls2080a: Move CONFIG_SYS_MC_RSV_MEM_ALIGN to Kconfig

Use Kconfig option instead of config macro in header file.

Signed-off-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: ls2080a: Move CONFIG_FSL_MC_ENET to Kconfig
York Sun [Mon, 6 Mar 2017 17:02:25 +0000 (09:02 -0800)]
armv8: ls2080a: Move CONFIG_FSL_MC_ENET to Kconfig

Use Kconfig option instead of config macro in header file.
Clean up existing usage.

Signed-off-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: Add global variable resv_ram
York Sun [Mon, 6 Mar 2017 17:02:24 +0000 (09:02 -0800)]
armv8: Add global variable resv_ram

Use gd->arch.resv_ram to track reserved memory allocation.

Signed-off-by: York Sun <york.sun@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoARM: dts: uniphier: more re-sync DT with Linux
Masahiro Yamada [Sun, 12 Mar 2017 15:16:41 +0000 (00:16 +0900)]
ARM: dts: uniphier: more re-sync DT with Linux

For better maintainability.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agoARM: dts: uniphier: fix no unit name warnings
Masahiro Yamada [Sun, 12 Mar 2017 15:16:40 +0000 (00:16 +0900)]
ARM: dts: uniphier: fix no unit name warnings

Fix warnings reported when built with W=1, by DTC 1.4.2 or later:
  Node /memory has a reg or ranges property, but no unit name

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agoARM: dts: uniphier: remove skeleton.dtsi inclusion
Masahiro Yamada [Sun, 12 Mar 2017 15:16:39 +0000 (00:16 +0900)]
ARM: dts: uniphier: remove skeleton.dtsi inclusion

Linux Commit 9c0da3cc61f1 ("ARM: dts: explicitly mark skeleton.dtsi
as deprecated") declared that skeleton.dtsi was deprecated.

Move the memory node below to suppress warnings of FDTGREP.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agoARM: uniphier: set DRAM_SPARSE flag for LD21 boards
Masahiro Yamada [Mon, 6 Mar 2017 20:28:25 +0000 (05:28 +0900)]
ARM: uniphier: set DRAM_SPARSE flag for LD21 boards

Commit 04cd4e7215d3 ("ARM: uniphier: remove DRAM base address from
board parameters") accidentally unset the DRAM_SPARSE flag, and
changed the physical map of the DRAM channels.  Revive the original
behavior.

Fixes: 04cd4e7215d3 ("ARM: uniphier: remove DRAM base address from board parameters")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reported-by: Shunji Sato <sato.shunji@socionext.com>
7 years agoPrepare v2017.03 v2017.03
Tom Rini [Mon, 13 Mar 2017 17:54:16 +0000 (13:54 -0400)]
Prepare v2017.03

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoscripts/config_whitelist.txt: Regenerate
Tom Rini [Mon, 13 Mar 2017 17:50:17 +0000 (13:50 -0400)]
scripts/config_whitelist.txt: Regenerate

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoconfigs: Re-sync
Tom Rini [Mon, 13 Mar 2017 17:48:42 +0000 (13:48 -0400)]
configs: Re-sync

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoarm: omap-common: Fix typo in CONFIG_OMAP54XX guard
Matthijs van Duin [Tue, 7 Mar 2017 02:42:24 +0000 (03:42 +0100)]
arm: omap-common: Fix typo in CONFIG_OMAP54XX guard

Some initialization was unintentionally being skipped on omap5.

Fixes: f5af0827f276 ("arm: omap-common: Guard some parts of the code with CONFIG_OMAP44XX/OMAP54XX")
Signed-off-by: Matthijs van Duin <matthijsvanduin@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agotools: binman: change shebang from python into python2
Jörg Krause [Mon, 6 Mar 2017 20:07:11 +0000 (21:07 +0100)]
tools: binman: change shebang from python into python2

This tool does not work with Python 3. Change the shebang to make sure the
script is run by a Python 2 interpreter.

Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
7 years agoarm: OMAP2+: nandecc: propagate error to command return status
Ladislav Michl [Mon, 6 Mar 2017 12:54:30 +0000 (13:54 +0100)]
arm: OMAP2+: nandecc: propagate error to command return status

Currently nandecc returns zero even if underlaying
omap_nand_switch_ecc function fails. Fix that by
propagating error returned to command return value.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoMerge branch 'pmic' of git://git.denx.de/u-boot-mmc
Tom Rini [Fri, 10 Mar 2017 00:52:57 +0000 (19:52 -0500)]
Merge branch 'pmic' of git://git.denx.de/u-boot-mmc

7 years agoARM: Migrate errata to Kconfig
Tom Rini [Tue, 7 Mar 2017 12:13:42 +0000 (07:13 -0500)]
ARM: Migrate errata to Kconfig

This moves all of the current ARM errata from various header files and in to
Kconfig.  This allows for a minor amount of cleanup as we had some instances
where both a general common header file was enabling errata as well as the
board config.  We now just select these once at the higher level in Kconfig

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoomap4: Migrate to using imply
Tom Rini [Fri, 3 Mar 2017 20:33:33 +0000 (15:33 -0500)]
omap4: Migrate to using imply

Move the default y options under arch/arm/mach-omap2/omap4/Kconfig to be
using imply instead in arch/arm/Kconfig

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoomap3: Migrate to using imply
Tom Rini [Fri, 3 Mar 2017 20:33:32 +0000 (15:33 -0500)]
omap3: Migrate to using imply

Move the default y options under arch/arm/mach-omap2/omap3/Kconfig to be
using imply instead in arch/arm/Kconfig

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoTI: Migrate board/ti/common/Kconfig to imply
Tom Rini [Fri, 3 Mar 2017 20:33:31 +0000 (15:33 -0500)]
TI: Migrate board/ti/common/Kconfig to imply

The option that we had set in board/ti/common/Kconfig as default y are
best done with imply under the appropriate main Kconfig option instead.

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoam335x_evm: Switch to using imply keyword
Tom Rini [Fri, 3 Mar 2017 20:33:30 +0000 (15:33 -0500)]
am335x_evm: Switch to using imply keyword

These particular SPL options are part of what the ROM provides, but for
compatibility with how we have previously used them, move them to being
implied by the board being selected.

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agokconfiglib.py: Kludge in 'imply' support
Tom Rini [Fri, 3 Mar 2017 20:33:29 +0000 (15:33 -0500)]
kconfiglib.py: Kludge in 'imply' support

Currently upstream does not yet understand the imply keyword.  For what
we use kconfiglib.py for today, this is OK.  We only need to be able to
evaluate in order to make boards.cfg and none of those choices will
depend on how imply evaluates out.

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agodo_smhload: fix return code
Ryan Harkin [Thu, 2 Mar 2017 17:45:16 +0000 (17:45 +0000)]
do_smhload: fix return code

do_smhload was using a ulong to store the return value from
smh_load_file. That returns an int, where -1 indicates an error. As a
ulong will never be negative, smh_load_file errors were not detected and
so_smhload always returned zero.

Also, when errors were spotted, do_smhload was returning 1, rather than
the enumeration CMD_RET_FAILURE (which is also 1).

Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
7 years agoFreescale/NXP: Migrate CONFIG_FSL_CAAM to defconfigs
Tom Rini [Wed, 1 Mar 2017 21:51:58 +0000 (16:51 -0500)]
Freescale/NXP: Migrate CONFIG_FSL_CAAM to defconfigs

In some cases this is absolutely required, so select this for some secure
features.  This also requires migration of RSA_FREESCALE_EXP

Cc: Ruchika Gupta <ruchika.gupta@nxp.com>
Cc: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Cc: Naveen Burmi <NaveenBurmi@freescale.com>
Cc: Po Liu <po.liu@freescale.com>
Cc: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Cc: Priyanka Jain <Priyanka.Jain@freescale.com>
Cc: Sumit Garg <sumit.garg@nxp.com>
Cc: Shaohui Xie <Shaohui.Xie@freescale.com>
Cc: Chunhe Lan <Chunhe.Lan@freescale.com>
Cc: Feng Li <feng.li_2@nxp.com>
Cc: Alison Wang <alison.wang@freescale.com>
Cc: Mingkai Hu <Mingkai.Hu@freescale.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Saksham Jain <saksham.jain@nxp.freescale.com>
Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agotools: Remove CONFIG_SYS_TEXT_BASE in Makefile
Patrick Delaunay [Tue, 28 Feb 2017 18:29:11 +0000 (19:29 +0100)]
tools: Remove CONFIG_SYS_TEXT_BASE in Makefile

This define is not used in tools sources and can be removed
to avoid unnecessary link between tools and defconfig

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agokbuild: turn of dtc unit address warnings by default
Masahiro Yamada [Mon, 27 Feb 2017 06:24:45 +0000 (15:24 +0900)]
kbuild: turn of dtc unit address warnings by default

DTC 1.4.2 or later checks DT unit-address without reg property and
vice-versa, and generates lots of warnings.  Fixing DT files will
take for a while.  Until then, let's turn off the check unless
building with W=*.

Introduce a new helper dtc-option to check if the option is supported
in order to suppress warnings on older versions.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
7 years agosunxi: power: axp809.c: Fix aldo1-2 being disabled for mvolt != 0
Rask Ingemann Lambertsen [Wed, 18 Jan 2017 20:53:40 +0000 (21:53 +0100)]
sunxi: power: axp809.c: Fix aldo1-2 being disabled for mvolt != 0

The execution flow is currently like this for aldo_num == 1 or 2:

int axp_set_aldo(int aldo_num, unsigned int mvolt)
{
...
if (mvolt == 0)
return pmic_bus_clrbits(AXP809_OUTPUT_CTRL1,
AXP809_OUTPUT_CTRL1_ALDO1_EN << (aldo_num - 1));
...
return pmic_bus_clrbits(AXP809_OUTPUT_CTRL1,
  AXP809_OUTPUT_CTRL1_ALDO1_EN << (aldo_num - 1));
 }

I.e. aldo1 and aldo2 will always be disabled. This patch fixes it by
setting (rather than clearing) the enable bit when mvolt != 0.

Signed-off-by: Rask Ingemann Lambertsen <rask@formelder.dk>
Fixes: 795857df413a ("sunxi: power: add AXP809 support")

7 years agoMerge branch 'master' of git://git.denx.de/u-boot-video
Tom Rini [Wed, 8 Mar 2017 12:14:21 +0000 (07:14 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-video

7 years agoMerge branch 'master' of git://git.denx.de/u-boot-net
Tom Rini [Wed, 8 Mar 2017 12:14:18 +0000 (07:14 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-net

7 years agoomap3_logic: Move SPL Stack into SDRAM
Adam Ford [Wed, 8 Mar 2017 03:27:52 +0000 (21:27 -0600)]
omap3_logic: Move SPL Stack into SDRAM

A previous patch broke the board. This patch will add missing part
from the previous patch and also move the SPL Stack into SDRAM at
0x82000000.

Tested with GCC 4.8.2 and GCC 6.2

Fixes: 0959649dc6d9 ("omap3_logic: Switch to simple malloco in SPL")

Signed-off-by: Adam Ford <aford173@gmail.com>
Changes in V2:
  - Keep CONFIG_SPL_SYS_MALLOC_SIMPLE
  - Add CONFIG_SYS_MALLOC_F_LEN=0x2000 (8 MB)

7 years agovideo: cfb_console: fix 32-bit display on 64-bit architectures
Andre Przywara [Mon, 6 Mar 2017 01:13:38 +0000 (01:13 +0000)]
video: cfb_console: fix 32-bit display on 64-bit architectures

"unsigned long" is a lousy data type when it comes to match peripheral
hardware registers with a fixed size.
Just do the obvious and match a 32-bit display format with an "u32"
data type for casting.
This fixes the logo display on 64-bit architectures, which produced
a black line on the right side of the logo with non-black backgrounds.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
7 years agonet: zynq_gem: Fix masking of supported phydev features
Nathan Rossi [Sun, 5 Mar 2017 14:36:23 +0000 (00:36 +1000)]
net: zynq_gem: Fix masking of supported phydev features

When the zynq_gem driver initializes the phy it sets the supported
features that the phy can support and advertise. However instead of
masking the supported features such that it limits the available
features it sets the phy to have the exact supported features of the
zynq_gem. This is problematic as it will enable features that a phy does
not have or cannot advertise.

Specifically this appears as an issue when using a phy that is only
capable of 10/100, but the zynq_gem driver will override this and try to
enable and advertise 10/100/1000.

Reported-by: Arno Steffens <star@gmx.li>
Fixes: 80243528ef ("net: gem: Fix gem driver on 1Gbps LAN")
Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Tested-by: Arno Steffens <star@gmx.li>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
7 years agonet: macb: Fix ETH not found when clock not support
Wenyou Yang [Tue, 14 Feb 2017 08:24:40 +0000 (16:24 +0800)]
net: macb: Fix ETH not found when clock not support

For the boards such as smartweb on which the clock driver isn't
supported, the ethernet fail to be found when booting up with
the below log.
---8<---
Net:   No ethernet found.
--->8---

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
7 years agoarmv8: spl: Call spl_relocate_stack_gd for ARMv8
Philipp Tomsich [Wed, 1 Mar 2017 20:04:15 +0000 (21:04 +0100)]
armv8: spl: Call spl_relocate_stack_gd for ARMv8

As part of the startup process for boards using the SPL, we need to
call spl_relocate_stack_gd. This is needed to set up malloc with its
DRAM buffer.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoarmv5te: make 'ret lr' produce iinterworking 'bx lr'
Albert ARIBAUD [Mon, 27 Feb 2017 19:19:07 +0000 (20:19 +0100)]
armv5te: make 'ret lr' produce iinterworking 'bx lr'

Current ARM assembler helper for the 'return to caller' pseudo-instruction
turns 'ret lr' into 'mov pc, lr' for ARMv5TE. This causes the core to remain
in its current ARM state even when the routine doing the 'ret' was called
from Thumb-1 state, triggering an undefined instruction exception.

This causes early run-time failures in all boards compiled using the Thumb-1
instruction set (for instance the Open-RD family).

ARMv5TE supports 'bx lr' which properly implements interworking and thus
correctly returns to Thumb-1 state from ARM state.

This change makes 'ret lr' turn into 'bx lr' for ARMv5TE.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
7 years agoPrepare v2017-rc3 v2017.03-rc3
Tom Rini [Mon, 27 Feb 2017 22:36:21 +0000 (17:36 -0500)]
Prepare v2017-rc3

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoarm: mach-omap2: Flush cache after FIT post-processing image
Andrew F. Davis [Wed, 22 Feb 2017 23:46:39 +0000 (17:46 -0600)]
arm: mach-omap2: Flush cache after FIT post-processing image

After we authenticate/decrypt an image we need to flush the caches
as they may still contain bits of the encrypted image. This will
cause failures if we attempt to jump to this image.

Reported-by: Yogesh Siraswar<yogeshs@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agodrivers/net/Kconfig: Correct use of apostrophe
Tom Rini [Mon, 20 Feb 2017 14:38:03 +0000 (09:38 -0500)]
drivers/net/Kconfig: Correct use of apostrophe

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoMerge branch 'master' of git://www.denx.de/git/u-boot-imx
Tom Rini [Mon, 27 Feb 2017 17:10:05 +0000 (12:10 -0500)]
Merge branch 'master' of git://denx.de/git/u-boot-imx

7 years agorockchip: video: fix 83500000 clock mistake in rockchip HDMI
Nickey Yang Nickey Yang [Mon, 27 Feb 2017 09:04:21 +0000 (17:04 +0800)]
rockchip: video: fix 83500000 clock mistake in rockchip HDMI

There is one "0" too many in 83500000 mpixelclock in rockchip_mpll_cfg[].
fix it.

Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com>
7 years agosplash: Prevent splash_load_fs from writing to 0x0
Jonathan Golder [Fri, 24 Feb 2017 16:46:10 +0000 (17:46 +0100)]
splash: Prevent splash_load_fs from writing to 0x0

Passing NULL to fs_read() for actread value results in hanging U-Boot
at least on our ARM plattform (TI AM335x). Since fs_read() and
following functions do not catch nullpointers, writing to 0x0 occurs.

Passing a local dummy var instead of NULL solves this issue.

Signed-off-by: Jonathan Golder <jonathan.golder@kurz-elektronik.de>
Cc: Anatolij Gustschin <agust@denx.de>
7 years agotravis-ci: Temporarily disable using a newer device tree compiler
Tom Rini [Sun, 26 Feb 2017 20:23:18 +0000 (15:23 -0500)]
travis-ci: Temporarily disable using a newer device tree compiler

For a long while dtc has warned about various constructs.  This is now
leading to log file size being exceeded in travis, and as the majority
of these errors need to be fixed in the kernel, switch to using the
stock device-tree-compiler package.

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoMerge branch 'master' of git://git.denx.de/u-boot-usb
Tom Rini [Sun, 26 Feb 2017 16:56:54 +0000 (11:56 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-usb

7 years agousb: gadget: f_dfu: set serial number if serial# is valid
Felipe Balbi [Wed, 22 Feb 2017 09:22:38 +0000 (11:22 +0200)]
usb: gadget: f_dfu: set serial number if serial# is valid

With this patch, USB Command Verifier is happy with our DFU
implementation on Chapter 9 tests.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
7 years agousb: gadget: g_dnl: fix g_dnl_set_serialnumber()
Felipe Balbi [Wed, 22 Feb 2017 09:22:37 +0000 (11:22 +0200)]
usb: gadget: g_dnl: fix g_dnl_set_serialnumber()

instead of only copying if strlen(s) is less than 32 characters, let's
just copy at most 31 characters regardless of the size of
serial#. This will guarantee that we always have a serial number if
serial# environment variable is set to anything.

Note that without a proper serial number, USB Command Verifier fails
our test of Device Descriptor since we will claim to have a serial
number without really providing one when requested.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
7 years agousb: gadget: f_dfu: write req->actual bytes
Felipe Balbi [Fri, 10 Feb 2017 16:32:31 +0000 (19:32 +0300)]
usb: gadget: f_dfu: write req->actual bytes

If last packet is short, we shouldn't write req->length bytes to
non-volatile media, we should write only what's available to us, which
is held in req->actual.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
7 years agousb: gadget: dfu: add result for handle_getstatus()
Patrick Delaunay [Fri, 16 Dec 2016 17:41:32 +0000 (18:41 +0100)]
usb: gadget: dfu: add result for handle_getstatus()

harmonize result with other handle_XXX() functions: return int for size
remove the define RET_STAT_LEN : no more necessary

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
7 years agousb: gadget: dfu: correct size for USB_REQ_DFU_GETSTATE result
Patrick Delaunay [Fri, 16 Dec 2016 17:41:31 +0000 (18:41 +0100)]
usb: gadget: dfu: correct size for USB_REQ_DFU_GETSTATE result

return the correct size for DFU_GETSTATE result (1 byte in DFU 1.1 spec)
to avoid issue in USB protocol and the variable "value" is propagated
to req->lenght as all the in the other request with answer
- DFU_GETSTATUS
- DFU_DNLOAD
- DFU_UPLOAD
Then the buffer is correctly treated in USB driver

NB: it was the only request witch directly change "req->actual"

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
7 years agousb: gadget: dfu: add functional descriptor in descriptor set
Patrick Delaunay [Thu, 8 Dec 2016 17:10:49 +0000 (18:10 +0100)]
usb: gadget: dfu: add functional descriptor in descriptor set

The "DFU descriptor set" must contain the "DFU functional descriptor"
but it is missing today in U-Boot code
(cf: DFU spec 1.1, chapter 4.2 DFU Mode Descriptor Set)
This patch only allocate buffer and copy DFU functional descriptor
after interfaces.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>