oweals/u-boot.git
5 years agovybrid: ddr: Extend vf610-pinfunc.h with DDR pads definitions
Lukasz Majewski [Wed, 13 Feb 2019 21:46:40 +0000 (22:46 +0100)]
vybrid: ddr: Extend vf610-pinfunc.h with DDR pads definitions

This patch provides definitions necessary for VF610 DDR pad configurations.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefan Agner <stefan.agner@toradex.com>
5 years agonet: Kconfig: FEC: Add dependency on VF610
Lukasz Majewski [Wed, 13 Feb 2019 21:46:39 +0000 (22:46 +0100)]
net: Kconfig: FEC: Add dependency on VF610

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefan Agner <stefan.agner@toradex.com>
5 years agonet: FEC: Add compatible for vybrid (vf610) to reuse fec_mxc.c driver
Lukasz Majewski [Wed, 13 Feb 2019 21:46:38 +0000 (22:46 +0100)]
net: FEC: Add compatible for vybrid (vf610) to reuse fec_mxc.c driver

The NXP's FEC driver can be reused on vf610 device (with DM).

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefan Agner <stefan.agner@toradex.com>
5 years agoMerge tag 'u-boot-stm32-20190412' of https://github.com/patrickdelaunay/u-boot
Tom Rini [Fri, 12 Apr 2019 19:43:19 +0000 (15:43 -0400)]
Merge tag 'u-boot-stm32-20190412' of https://github.com/patrickdelaunay/u-boot

stm32 patches for v2019.07-rc1
- Add trusted boot with TF-A for stm32mp1
- stm32mp1 dts files sync'ed with Linux version
- add STM32MP1 Discovery boards (DK1 and DK2)
- add STMFX gpio expander driver
- misc improvement for stm3mp1 supports
- rename stpmu1 to stpmic1 (official name)
- stm32_qspi: move to exec_op (spi nor driver for stm32 mpu and mcu)
- add STM32 FMC2 NAND flash controller driver

5 years agoMerge branch 'master' of git://git.denx.de/u-boot-sunxi
Tom Rini [Fri, 12 Apr 2019 19:43:08 +0000 (15:43 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-sunxi

5 years agoMerge branch 'master' of git://git.denx.de/u-boot-i2c
Tom Rini [Fri, 12 Apr 2019 19:43:04 +0000 (15:43 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-i2c

5 years agoMerge git://git.denx.de/u-boot-marvell
Tom Rini [Fri, 12 Apr 2019 16:34:44 +0000 (12:34 -0400)]
Merge git://git.denx.de/u-boot-marvell

- Misc dts files sync'ed with Linux version (Chris)
- Orion watchdog fix (Chris)
- kwbimage changed to also support Marvell bin_hdr binary (Chris)
- Add DM support to enable CONFIG_BLK for sata_mv (Stefan)
- Enable BLK on multiple platforms (Stefan)
- Misc minor fixes to AXP theadorable board (Stefan)
- Correct logic for DM_SCSI + unconverted drivers check (stefan)
- Misc changes to kirkwood to enable DM_USB here (Chris)
- Change ahci_mvebu to enable usage on A38x (Baruch)
- Update the kirkwood entry in git-mailrc (Baruch)
- Misc minor improvements (turris, documentation) (Baruch)
- Enhance sata_mv to support Kirkwood as well (Michael)
- Add wdt command (Michael)
- Add Marvell integrated CPUs (MSYS) support with DB-XC3-24G4XG
  board support (Chris)

5 years agoMerge branch '2019-04-11-ti-master-imports'
Tom Rini [Fri, 12 Apr 2019 16:22:43 +0000 (12:22 -0400)]
Merge branch '2019-04-11-ti-master-imports'

- Improve Keystone 3 SoC support (DMA, TI SCI)
- Improve Keystone 2 SoC support (PHY fixes on various platforms)
- Improve am335x families (new platforms, more boot mode options in SPL
  via DM).
- General DaVinci, OMAP5 fixes.

5 years agomtd: rawnand: stm32_fmc2: add STM32 FMC2 NAND flash controller driver
Christophe Kerello [Fri, 5 Apr 2019 09:41:50 +0000 (11:41 +0200)]
mtd: rawnand: stm32_fmc2: add STM32 FMC2 NAND flash controller driver

The driver adds the support for the STMicroelectronics FMC2 NAND
Controller found on STM32MP SOCs.

This patch adds the polling mode, a basic mode that do not need
any DMA channels.

Only NAND_ECC_HW mode is actually supported.
The driver supports a maximum 8k page size.
The following ECC strength and step size are currently supported:
 - nand-ecc-strength = <8>, nand-ecc-step-size = <512> (BCH8)
 - nand-ecc-strength = <4>, nand-ecc-step-size = <512> (BCH4)
 - nand-ecc-strength = <1>, nand-ecc-step-size = <512> (Extended ECC
   based on Hamming)

This patch has been tested on Micron MT29F8G08ABACAH4.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
5 years agodt-bindings: mtd: stm32_fmc2: add STM32 FMC2 NAND controller documentation
Christophe Kerello [Fri, 5 Apr 2019 09:41:49 +0000 (11:41 +0200)]
dt-bindings: mtd: stm32_fmc2: add STM32 FMC2 NAND controller documentation

This patch adds the documentation of the device tree bindings for the STM32
FMC2 NAND controller.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com>
5 years agospi: stm32_qspi: move to exec_op
Christophe Kerello [Fri, 5 Apr 2019 09:46:50 +0000 (11:46 +0200)]
spi: stm32_qspi: move to exec_op

We are facing issues in the driver since SPI NOR framework has moved
on SPI MEM framework, and SPI NAND framework is not running properly
with the current driver.

To be able to solve issues met on SPI NOR Flashes and to be able to
support SPI NAND Flashes, the driver has been reworked. We are now using
exec_op ops instead of using xfer ops.

Thanks to this rework, the driver has been successfully tested with:
 - mx66l51235l SPI NOR Flash on stm32f746 SOC
 - n25q128a SPI NOR Flash on stm32f769 SOC
 - mx66l51235l SPI NOR Flash on stm32mp1 SOC
 - mt29f2g01abagd SPI NAND Flash on stm32mp1 SOC

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Tested-by: Patrick DELAUNAY <patrick.delaunay@st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com>
5 years agoARM: dts: Add STMFX gpio expander support for stm32mp157c-ev1
Patrick Delaunay [Fri, 12 Apr 2019 12:38:28 +0000 (14:38 +0200)]
ARM: dts: Add STMFX gpio expander support for stm32mp157c-ev1

Adds alias to set the pincontrol seq id.
For STMFX gpio expander, force sequence number after
the last bank (GPIOZ) to avoid conflict between STM32MP and STMFX
gpio bank sequence number.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
5 years agoboard: stm32mp1: Force pinctrl driver probe in board_init()
Patrice Chotard [Mon, 11 Mar 2019 10:13:17 +0000 (11:13 +0100)]
board: stm32mp1: Force pinctrl driver probe in board_init()

In order to insure that hog GPIOs are configured early during
the boot process, force all pinctrl driver probing in board_init().

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
5 years agoconfig: stm32mp15: Enable STMFX support
Patrick Delaunay [Mon, 11 Mar 2019 10:13:16 +0000 (11:13 +0100)]
config: stm32mp15: Enable STMFX support

Activate PINCTRL_STMFX and needed part for generic pincontrol
PINCTRL_FULL, PINCONF. Increase pre-reloc memory for MALLOC
(needed for each DM pinconfig node).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
5 years agopinctrl: Add STMFX GPIO expander Pinctrl/GPIO driver
Patrick Delaunay [Mon, 11 Mar 2019 10:13:15 +0000 (11:13 +0100)]
pinctrl: Add STMFX GPIO expander Pinctrl/GPIO driver

This patch adds pinctrl/GPIO driver for STMicroelectronics
Multi-Function eXpander (STMFX) GPIO expander.
STMFX is an I2C slave controller, offering up to 24 GPIOs.
The driver relies on UCLASS_PINCTRL and UCLASS_GPIO.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
5 years agoARM: dts: stm32mp1: Add adc nodes
Patrice Chotard [Tue, 12 Feb 2019 15:50:41 +0000 (16:50 +0100)]
ARM: dts: stm32mp1: Add adc nodes

Add adc related nodes. These nodes are used to detect the
current supplied by USB type-C power in port on DK1 and DK2
boards.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
5 years agoBoard: stm32mp1: Add supply current boot information
Patrice Chotard [Tue, 12 Feb 2019 15:50:40 +0000 (16:50 +0100)]
Board: stm32mp1: Add supply current boot information

For DK1/DK2 boards, check if power supply provides enough current
to allow the board to boot correctly.
ADC@0 channel 18 and 19 are connected to USB type-C CC1 and CC2
signals. The table below shows the behavior for different range of
CC1 or CC2:

  range       | power supply | red led |          console message
  (Volts)     |   (Amps)     | blinks  |
--------------|--------------|---------|-----------------------------------
[2.10 - 1.23[ |     3        |   NO    |    NO
[1.23 - 0.66[ |     1.5      | 3 times | WARNING 1.5A power supply detected
[0.66 - 0]    |     0.5      | 2 times | WARNING 500mA power supply detected

If detected current is < 3A, red led is kept ON after blinking.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
5 years agoboard: stm32mp1: Update README file
Patrice Chotard [Tue, 12 Feb 2019 15:50:39 +0000 (16:50 +0100)]
board: stm32mp1: Update README file

Update README with DK1 and DK2 boards related informations

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
5 years agoARM: dts: stm32: Synchronize DT with kernel one
Patrice Chotard [Tue, 12 Feb 2019 15:50:38 +0000 (16:50 +0100)]
ARM: dts: stm32: Synchronize DT with kernel one

This patch synchronizes U-boot DT with kernel one
This is based on https://patchwork.kernel.org/cover/10797115/

This patch adds initial support of STM32MP157 discovery boards:
  - Add support of stm32mp157a discovery1 board (part number: STM32MP157A-DK1).
    This board embeds a STM32MP157a SOC with AC package (TFBGA361, 148 ios)
    and 512MB of DDR3. Several connections are available on this boards:
    4*USB2.0, 1*USB2.0 typeC, SDcard, RJ45, HDMI, Arduino connector, ...

  - Add support of stm32mp157c discovery2 board (part number: STM32MP157C-DK2).
    This board is a "super-set" of stm32mp157a-dk1. A display panel (otm8009a)
    and Murata wifi/BT combo is added.

Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
5 years agostpmic1: add NVM update support in fuse command
Patrick Delaunay [Mon, 4 Feb 2019 10:26:22 +0000 (11:26 +0100)]
stpmic1: add NVM update support in fuse command

Add functions to read/update the non volatile memory of STPMIC1
(8 bytes-register at 0xF8 address) and allow access
with fuse command (bank=1, word > 0xF8).

For example:

STM32MP> fuse read 1 0xf8 8
Reading bank 1:

Word 0x000000f8: 000000ee 00000092 000000c0 00000002
Word 0x000000fc: 000000f2 00000080 00000002 00000033

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
5 years agostm32mp1: dts: activate psci-1.0
Patrick Delaunay [Mon, 4 Feb 2019 10:26:21 +0000 (11:26 +0100)]
stm32mp1: dts: activate psci-1.0

Updates the stm32mp157c devicetree to bind the U-Boot PSCI driver need for
power off command; TF-A for stm32mp15x supports PSCI 1.0.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
5 years agostm32mp1: add command poweroff
Patrick Delaunay [Fri, 12 Apr 2019 09:55:46 +0000 (11:55 +0200)]
stm32mp1: add command poweroff

Activate the command poweroff by default for STM32MP1:
- with PCSI from TF-A for trusted boot
- with PMIC sysreset request for basic boot (SYSRESET_POWER)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
5 years agopmic: stpmu1: add power switch off support
Patrick Delaunay [Mon, 4 Feb 2019 10:26:19 +0000 (11:26 +0100)]
pmic: stpmu1: add power switch off support

Add sysreset support, and support power switch off request,
needed by poweroff command.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
5 years agostpmic1: update register names
Patrick Delaunay [Mon, 4 Feb 2019 10:26:18 +0000 (11:26 +0100)]
stpmic1: update register names

Alignment with  STPMIC1 datasheet
  s/MAIN_CONTROL_REG/MAIN_CR/g
  s/MASK_RESET_BUCK/BUCKS_MRST_CR/g
  s/MASK_RESET_LDOS/LDOS_MRST_CR/g
  s/BUCKX_CTRL_REG/BUCKX_MAIN_CR/g
  s/VREF_CTRL_REG/REFDDR_MAIN_CR/g
  s/LDOX_CTRL_REG/LDOX_MAIN_CR/g
  s/USB_CTRL_REG/BST_SW_CR/g
  s/STPMIC1_NVM_USER_STATUS_REG/STPMIC1_NVM_SR/g
  s/STPMIC1_NVM_USER_CONTROL_REG/STPMIC1_NVM_CR/g
and update all the associated defines.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
5 years agopower: rename stpmu1 to official name stpmic1
Patrick Delaunay [Mon, 4 Feb 2019 10:26:17 +0000 (11:26 +0100)]
power: rename stpmu1 to official name stpmic1

Alignment with kernel driver name & binding
introduced by https://patchwork.kernel.org/cover/10761943/
to use the final marketing name = STPMIC1.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
5 years agopower: stpmu1: rename files to stpmic1
Patrick Delaunay [Mon, 4 Feb 2019 10:26:16 +0000 (11:26 +0100)]
power: stpmu1: rename files to stpmic1

Prepare file modification for kernel alignment and
rename driver to stpmic1.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
5 years agoregulator: stpmu1: update buck1 range
Patrick Delaunay [Mon, 4 Feb 2019 10:26:15 +0000 (11:26 +0100)]
regulator: stpmu1: update buck1 range

SW impact for Rev 1.2 of STPMIC1 in U-Boot:
Buck converters output voltage change for Buck1
=> Vdd min 0,725 to max 1,5V instead of 0.6V to 1.35V
   (see STPMIC1 datasheet / chapter 5.3 Buck converters)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
5 years agostm32mp1: Replace OTP read by SHADOW read
Patrick Delaunay [Wed, 27 Feb 2019 16:01:29 +0000 (17:01 +0100)]
stm32mp1: Replace OTP read by SHADOW read

Replace STM32_BSEC_OTP() by STM32_BSEC_SHADOW() to
increase read performance.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
5 years agostm32mp1: bsec: shadow all the upper OTP (no secure) during boot
Patrick Delaunay [Wed, 27 Feb 2019 16:01:28 +0000 (17:01 +0100)]
stm32mp1: bsec: shadow all the upper OTP (no secure) during boot

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
5 years agostm32mp1: bsec: use device tree new compatible
Patrick Delaunay [Wed, 27 Feb 2019 16:01:27 +0000 (17:01 +0100)]
stm32mp1: bsec: use device tree new compatible

Update bsec driver to use the device tree provided by Kernel.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
5 years agostm32mp1: basic boot: SPL enable access to GPIOZ bank
Patrick Delaunay [Wed, 27 Feb 2019 16:01:26 +0000 (17:01 +0100)]
stm32mp1: basic boot: SPL enable access to GPIOZ bank

SPL need to set GPIOZ_SECCFGR = 0 to enable access to GPIOZ bank
(open security).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
5 years agostm32mp1: align serial number on bootrom
Patrick Delaunay [Wed, 27 Feb 2019 16:01:25 +0000 (17:01 +0100)]
stm32mp1: align serial number on bootrom

Always use upper case for serial number.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
5 years agostm32mp1: add syscfg initialization
Patrick Delaunay [Wed, 27 Feb 2019 16:01:24 +0000 (17:01 +0100)]
stm32mp1: add syscfg initialization

Initialize the system configuration for basic boot
- update interconnect setting
- disable pull-down for boot pin
- enable High Speed Low Voltage Pad mode for SPI, SDMMC, ETH, QSPI
- activate I/O compensation

Done by SSBL = TF-A for trusted boot

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
5 years agostm32mp1: add some syscon drivers for syscfg and etpzc
Patrick Delaunay [Wed, 27 Feb 2019 16:01:23 +0000 (17:01 +0100)]
stm32mp1: add some syscon drivers for syscfg and etpzc

Add SYSCON driver for syscfg and etpzc and reorder in alphabetics order

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
5 years agostm32mp1: activated some configuration
Patrick Delaunay [Wed, 27 Feb 2019 16:01:22 +0000 (17:01 +0100)]
stm32mp1: activated some configuration

Add configuration useful for test
- FIT support
- MEMTEST
- DFU
- CACHE
- TIME
- TIMER

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
5 years agostm32mp1: update memory layout
Patrick Delaunay [Wed, 27 Feb 2019 16:01:21 +0000 (17:01 +0100)]
stm32mp1: update memory layout

Update the memory layout to be aligned with other platform and avoid
overlap with 32MB Linux kernel (multiv7 image).
+ Kernel => 32MiB offset = 0xC2000000
            and increase the bootm size to 32MiB
+ FDT => 64MiB offset = 0xc4000000
+ SCRIPT => 65Mib offset = 0xc4100000
+ PXESCRIPT => 66Mib offset = 0xc4200000
+ SPLASHIMAGE => 67Mib offset = 0xc4300000
+ RAMDISK => 68Mib offset = 0xc4400000
             (not limited size)

In sources/boot/u-boot/doc/README.distro

+ kernel_addr_r: A size of 16MB for the kernel is likely adequate.
+ pxefile_addr_r: A size of 1MB for extlinux.conf is more than adequate.
+ fdt_addr_r: A size of 1MB for the FDT/DTB seems reasonable.
+ ramdisk_addr_r: It is recommended that this location be highest in RAM
                  out of fdt_addr_, kernel_addr_r, and ramdisk_addr_r,
                  so that the RAM disk can vary in size and use any
                 available RAM.
+ pxefile_addr_r: A size of 1MB for extlinux.conf is more than adequate.
+ scriptaddr: A size of 1MB for extlinux.conf is more than adequate.

For suggestions on memory locations for ARM systems, you must follow
the guidelines specified in Documentation/arm/Booting
in the Linux kernel tree.

And in sources/linux-stm32mp/Documentation/arm/Booting

The zImage may also be placed in system RAM and called there.  The
kernel should be placed in the first 128MiB of RAM.  It is recommended
that it is loaded above 32MiB in order to avoid the need to relocate
prior to decompression, which will make the boot process slightly
faster.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
5 years agostm32mp1: support forced boot mode
Patrick Delaunay [Wed, 27 Feb 2019 16:01:20 +0000 (17:01 +0100)]
stm32mp1: support forced boot mode

The boot mode can be forced by key press
or by TAMP register, requested in kernel by syscon-reboot-mode

tamp: tamp@5c00a000 {
compatible = "simple-bus", "syscon", "simple-mfd";
reg = <0x5c00a000 0x400>;

reboot-mode {
compatible = "syscon-reboot-mode";
offset = <0x150>; /* reg20 */
mask = <0xff>;
mode-normal = <0>;
mode-fastboot = <0x1>;
mode-recovery = <0x2>;
mode-stm32cubeprogrammer = <0x3>;
mode-ums_mmc0 = <0x10>;
mode-ums_mmc1 = <0x11>;
mode-ums_mmc2 = <0x12>;
};
};

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
5 years agostm32mp1: activate FASTBOOT on eMMC
Patrick Delaunay [Wed, 27 Feb 2019 16:01:19 +0000 (17:01 +0100)]
stm32mp1: activate FASTBOOT on eMMC

activate Fastboot for eMMC on EV1 board (mmc1)

$> sudo apt-get install android-tools-adb android-tools-fastboot
$> fastboot -i 0x0483 getvar bootloader-version

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
5 years agostm32mp1: update bootcmd
Patrick Delaunay [Wed, 27 Feb 2019 16:01:18 +0000 (17:01 +0100)]
stm32mp1: update bootcmd

Clearly separate bootcmd for stm32mp1 board
(bootcmd_stm32mp) and preboot management.
That solve issue for fastboot continue command.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
5 years agostm32mp1: spl: hang with trace when DDR init failed
Patrick Delaunay [Wed, 27 Feb 2019 16:01:17 +0000 (17:01 +0100)]
stm32mp1: spl: hang with trace when DDR init failed

When DDR initialization failed, print error message
and stop the SPL execution.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
5 years agostm32mp1: cosmetic: add comment on psci_migrate_info_type return value
Patrick Delaunay [Wed, 27 Feb 2019 16:01:16 +0000 (17:01 +0100)]
stm32mp1: cosmetic: add comment on psci_migrate_info_type return value

Add explaination for the return value of psci_migrate_info_type:
  2 = Trusted OS.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
5 years agostm32mp1: cosmetic cleanup Kconfig
Patrick Delaunay [Wed, 27 Feb 2019 16:01:15 +0000 (17:01 +0100)]
stm32mp1: cosmetic cleanup Kconfig

Cosmetic cleanup in mach-stm32mp Kconfig
- remove duplicated SPL_DRIVERS_MISC_SUPPORT
- update help for TARGET_STM32MP1
- set value for NR_DRAM_BANKS
- remove one comment as DEBUG_UART is deactivated by default
- include board Kconfig at the end of the file

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
5 years agostm32mp1: spl: add spl_display_print
Patrick Delaunay [Wed, 27 Feb 2019 16:01:14 +0000 (17:01 +0100)]
stm32mp1: spl: add spl_display_print

SPL displays the board model from device tree.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
5 years agostm32mp1: update print_cpuinfo()
Patrick Delaunay [Wed, 27 Feb 2019 16:01:13 +0000 (17:01 +0100)]
stm32mp1: update print_cpuinfo()

Display CPU part number and package information.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
5 years agostm32mp1: update boot mode management
Patrick Delaunay [Wed, 27 Feb 2019 16:01:12 +0000 (17:01 +0100)]
stm32mp1: update boot mode management

- export the function get_bootmode() and reused it in spl code
- manage uart instance by alias (prepare v4.19 binding)
- solve issue on nand instance
- restore console for uart boot

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
5 years agostm32mp1: add runtime information in environment
Patrick Delaunay [Wed, 27 Feb 2019 16:01:11 +0000 (17:01 +0100)]
stm32mp1: add runtime information in environment

Set board name with the first dts compatible found in DT
code under CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG

The result with DEVICE_TREE=stm32mp157c-ev1 is:
    STM32MP> env print
     board=stm32mp1
     board_name=stm32mp157c-ev1

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
5 years agostm32mp1: display board information
Patrick Delaunay [Tue, 12 Feb 2019 10:44:41 +0000 (11:44 +0100)]
stm32mp1: display board information

Implement checkboard() function to display
- the boot chain used: basic or trusted
- the board compatible in device tree
- the board identifier and revision, saved in OTP59 for ST boards

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
5 years agostm32mp1: bsec: access with SMC for trusted boot
Patrick Delaunay [Tue, 12 Feb 2019 10:44:40 +0000 (11:44 +0100)]
stm32mp1: bsec: access with SMC for trusted boot

As BSEC is secure aware, all register access need to be done
by TF-A for TRUSTED boot chain, when U-Boot is executed in
normal world.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
5 years agostm32mp1: add trusted boot with TF-A
Patrick Delaunay [Tue, 12 Feb 2019 10:44:39 +0000 (11:44 +0100)]
stm32mp1: add trusted boot with TF-A

Add support of trusted boot, using TF-A as first stage bootloader,
The boot sequence is
  BootRom >=> TF-A.stm32 (clock & DDR) >=> U-Boot.stm32

The TF-A monitor provides secure monitor with support of SMC
- proprietary to manage secure devices (BSEC for example)
- PSCI for power

The same device tree is used for STMicroelectronics boards with
basic boot and with trusted boot.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
5 years agommc: omap_hsmmc: Set 3.3V for IO voltage
Faiz Abbas [Fri, 5 Apr 2019 08:48:46 +0000 (14:18 +0530)]
mmc: omap_hsmmc: Set 3.3V for IO voltage

Pbias voltage should match the IO voltage set for the SD card. With the
latest pbias change to 3.3V, update the capabilities and IO voltages
settings to 3.3V.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
5 years agoARM: dts: dra71-evm: Correct evm_sd regulator max voltage
Faiz Abbas [Fri, 5 Apr 2019 08:48:45 +0000 (14:18 +0530)]
ARM: dts: dra71-evm: Correct evm_sd regulator max voltage

Correct vpo_sd_1v8_3v3 regulator max voltage to 3.3V

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Keerthy <j-keerthy@ti.com>
5 years agoARM: dts: dra7: Change pbias voltage to 3.3V
Faiz Abbas [Fri, 5 Apr 2019 08:48:44 +0000 (14:18 +0530)]
ARM: dts: dra7: Change pbias voltage to 3.3V

As per recent TRM[1], PBIAS cell on dra7 devices supports
3.3v and not 3.0v as documented earlier.

Update PBIAS regulator max voltage and the voltage written
in the driver to reflect this.

[1] http://www.ti.com/lit/pdf/sprui30

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
5 years agoARM: am3517_evm: Add spl_start_uboot for Falcon Mode
Adam Ford [Sun, 31 Mar 2019 14:18:29 +0000 (09:18 -0500)]
ARM: am3517_evm: Add spl_start_uboot for Falcon Mode

When booting the am3517-evm, the following message appears:
SPL: Please implement spl_start_uboot() for your board
SPL: Direct Linux boot not active!

This patch implements spl_start_uboot to clear this message
and allow device to know if it should boot U-Boot or kernel.

Fixes: 1c6b6f383a41 ("ARM: am3517_evm: Enable Falcon Mode")

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agoti: keystone2: Move CONFIG_ISW_ENTRY_ADDR to a common place
Tom Rini [Tue, 19 Mar 2019 11:14:37 +0000 (07:14 -0400)]
ti: keystone2: Move CONFIG_ISW_ENTRY_ADDR to a common place

The ISW_ENTRY_ADDR Kconfig option under mach-omap2 isn't a SoC specific
notion but rather "where is our previous stage loaded in memory?"
option.  Make use of this on ARCH_KEYSTONE rather than SPL_TEXT_BASE for
our HS builds that are not using SPL anyhow.

Cc: Vitaly Andrianov <vitalya@ti.com>
Cc: Andrew F. Davis <afd@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com?
5 years agoboard: ti: am335x: Remove non DM_ETH code
Faiz Abbas [Mon, 18 Mar 2019 08:24:41 +0000 (13:54 +0530)]
board: ti: am335x: Remove non DM_ETH code

With DM_ETH enabled in am335x devices, remove all the unused
non-DM code.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
5 years agoconfigs: am335x_evm: Update VCI String
Faiz Abbas [Mon, 18 Mar 2019 08:24:40 +0000 (13:54 +0530)]
configs: am335x_evm: Update VCI String

Update VCI string to keep it compatible with legacy test setups.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
5 years agoconfigs: am335x_evm: Add Support for SPL_ETH
Faiz Abbas [Mon, 18 Mar 2019 08:24:39 +0000 (13:54 +0530)]
configs: am335x_evm: Add Support for SPL_ETH

Add Support for booting from Ethernet.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
5 years agoconfigs: am335x_evm: Reduce size of SPL
Faiz Abbas [Mon, 18 Mar 2019 08:24:38 +0000 (13:54 +0530)]
configs: am335x_evm: Reduce size of SPL

Make some room in SPL by getting rid of unnecessary configs.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
5 years agoboard: ti: am335x: Add platdata for cpsw in SPL
Faiz Abbas [Mon, 18 Mar 2019 08:24:37 +0000 (13:54 +0530)]
board: ti: am335x: Add platdata for cpsw in SPL

The SPL image overflows when cpsw dt nodes are added and SPL_OF_CONTROL
is enabled. Use static platdata instead to save space.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
5 years agonet: ti: cpsw: Enable DM_FLAG_PRE_RELOC
Faiz Abbas [Mon, 18 Mar 2019 08:24:36 +0000 (13:54 +0530)]
net: ti: cpsw: Enable DM_FLAG_PRE_RELOC

Add DM_FLAG_PRE_RELOC to make the driver probe in SPL.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
5 years agonet: ti: cpsw: Block off ofdata_to_platdata with OF_CONTROL
Faiz Abbas [Mon, 18 Mar 2019 08:24:35 +0000 (13:54 +0530)]
net: ti: cpsw: Block off ofdata_to_platdata with OF_CONTROL

The ofdata_to_platdata function should not be called if OF_CONTROL is
not enabled because fdtdec_* calls will fail. Block the function with
OF_CONTROL

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
5 years agonet: ti: cpsw-common: Isolate getting syscon address from assigning macid
Faiz Abbas [Mon, 18 Mar 2019 08:24:34 +0000 (13:54 +0530)]
net: ti: cpsw-common: Isolate getting syscon address from assigning macid

ti_cm_get_macid() is used to get a syscon node from the dt, read the
efuse address and then assign the macid read from the address. Divide
these two steps into separate functions one of which can be called from
ofdata_to_platdata() while the other can be called from _probe(). This
ensures that platdata can be assigned statically in a board file when
OF_CONTROL is not enabled. Also add a macid_sel_compat in private data
to get information about the macid byte placement.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
5 years agonet: ti: cpsw: Convert cpsw_platform_data to a pointer in cpsw_priv
Faiz Abbas [Mon, 18 Mar 2019 08:24:33 +0000 (13:54 +0530)]
net: ti: cpsw: Convert cpsw_platform_data to a pointer in cpsw_priv

Convert cpsw_platform_data to a pointer in cpsw_priv. Allocate it
dynamically and assign it as a part of eth_pdata. This helps in
isolating platform data handling and implementing platdata for SPL
in a board file.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
5 years agonet: ti: cpsw: Move cpsw_phy_sel() to _probe()
Faiz Abbas [Mon, 18 Mar 2019 08:24:32 +0000 (13:54 +0530)]
net: ti: cpsw: Move cpsw_phy_sel() to _probe()

cpsw_phy_sel() is a configuration step that should not be in
ofdata_to_platdata(). Add phy_sel_compat to the cpsw_platform_data
structure so that it is accessible in _probe. Then move the call of
cpsw_phy_sel() to _probe.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
5 years agonet: Add priv_pdata to eth_pdata
Faiz Abbas [Mon, 18 Mar 2019 08:24:31 +0000 (13:54 +0530)]
net: Add priv_pdata to eth_pdata

Add a priv member for eth_pdata for platform specific platform data.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
5 years agoarmv7R: K3: am654: Trigger panic on DDR init failures
Andreas Dannenberg [Mon, 11 Mar 2019 20:15:43 +0000 (15:15 -0500)]
armv7R: K3: am654: Trigger panic on DDR init failures

When initializing DDR from R5 SPL trigger U-Boot's panic facility
rather than simply returning from the board init function as there
is little point continuing code execution. Further, as panic implies
a board reset, so using it might potentially allow to recover from
this error in certain cases such as when the init failure was caused
by a temporary glitch of some sorts.

Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
5 years agoconfigs: am65x_evm_a53: Enable CONFIG_OF_BOARD_SETUP
Lokesh Vutla [Fri, 8 Mar 2019 06:17:36 +0000 (11:47 +0530)]
configs: am65x_evm_a53: Enable CONFIG_OF_BOARD_SETUP

Enable CONFIG_OF_BOARD_SETUP so that msmc sram dt nodes
are updated correctly.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
5 years agoboard: ti: am65x: Enable fixing up msmc sram node
Lokesh Vutla [Fri, 8 Mar 2019 06:17:35 +0000 (11:47 +0530)]
board: ti: am65x: Enable fixing up msmc sram node

Create a ft_board_setup() api that gets called as part of
DT fixup before jumping to kernel. In this ft_board_setup()
call fdt_fixup_msmc_ram that update msmc sram node.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
5 years agoarm: k3: Add support for updating msmc dt node
Lokesh Vutla [Fri, 8 Mar 2019 06:17:34 +0000 (11:47 +0530)]
arm: k3: Add support for updating msmc dt node

Certain parts of msmc sram can be used by DMSC or can be
marked as L3 cache. Since the available size can vary, changing
DT every time the size varies might be painful. So, query this
information using TISCI cmd and fixup the DT for kernel.
Fixing up DT does the following:
- Create a sram node if not available
- update the reg property with available size
- update ranges property
- loop through available sub nodes and delete it if:
- mentioned size is out if available range
- subnode represents l3 cache or dmsc usage.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
5 years agoarm: k3: Add a wrapper to get tisci handle
Lokesh Vutla [Fri, 8 Mar 2019 06:17:33 +0000 (11:47 +0530)]
arm: k3: Add a wrapper to get tisci handle

Create a wrapper to get the ti sci handle.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
5 years agofirmware: Add support for querying msmc memory
Lokesh Vutla [Fri, 8 Mar 2019 06:17:32 +0000 (11:47 +0530)]
firmware: Add support for querying msmc memory

DMSC can use certain amount of msmc memory available in the
system. Also certain part of msmc memory can be marked as L3
cache using board config. But users might not know what size
is being used and the remaining available msmc memory. In order
to fix this TISCI protocol provides a messages that can query
the available msmc memory in the system. Add support for this
message.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
5 years agoconfigs: ti_omap5_common: Add NAND environment settings
Faiz Abbas [Wed, 27 Feb 2019 07:59:38 +0000 (13:29 +0530)]
configs: ti_omap5_common: Add NAND environment settings

Now that NAND is supported on DRA71x include various NAND environment
settings

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
5 years agoconfigs: dra71x-evm: Add Support for NAND
Faiz Abbas [Wed, 27 Feb 2019 07:59:37 +0000 (13:29 +0530)]
configs: dra71x-evm: Add Support for NAND

Add NAND support to dra71x-evm defconfig

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
5 years agoarm: dra7: Allow NAND to be enabled on DRA71x EVM.
Franklin S Cooper Jr [Wed, 27 Feb 2019 07:59:36 +0000 (13:29 +0530)]
arm: dra7: Allow NAND to be enabled on DRA71x EVM.

If SW 8 pins 0 and 1 indicate that NAND should be enabled then
the pins pinmux must be reconfigured for NAND mode.

Therefore, enable NAND by reconfiguring the pinmux.

Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
5 years agoboard: ti: dra71: Add pinmux settings for NAND on DRA71x EVM
Franklin S Cooper Jr [Wed, 27 Feb 2019 07:59:35 +0000 (13:29 +0530)]
board: ti: dra71: Add pinmux settings for NAND on DRA71x EVM

By default VOUT3 occupies the pins required for NAND. Therefore, create
a seperate entry that can be use to reconfigure these pins to work for
NAND.

On the EVM SWITCH 8 pins 0 and 1 will be used to determine if NAND is
enabled or not. For NAND to be selected pin 0 should be on and pin 1
should be off. Any other combination will assume NAND shouldn't be
enabled.

Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
5 years agoARM: davinci: da850evm: Enable SPL_OF_CONTROL without PLATDATA
Adam Ford [Tue, 26 Feb 2019 03:53:47 +0000 (21:53 -0600)]
ARM: davinci: da850evm: Enable SPL_OF_CONTROL without PLATDATA

With the memory mapping giving us some more avialable RAM, this
updates the da850-evm-u-boot.dtsi to include the serial port, SPI
and Flash nodes along with some dependent nodes in the SPL dtb.
This also removes the platform data initialization code for the
serial port and SPI Flash.

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agodavinci: da850evm/omapl138-lcdk: Move BSS to SDRAM because SRAM is full
Adam Ford [Tue, 26 Feb 2019 03:53:46 +0000 (21:53 -0600)]
davinci: da850evm/omapl138-lcdk: Move BSS to SDRAM because SRAM is full

In order to fully support SPL_OF_CONTROL, we need BSS to be a bit
larger. This patch relocates BSS to SDRAM instead of SRAM which
is similar to how ARMv7 boards (like OMAP2+) do it.

This means two new variables are required:
CONFIG_SPL_BSS_START_ADDR  set to DAVINCI_DDR_EMIF_DATA_BASE
CONFIG_SPL_BSS_MAX_SIZE is set to 0x1080000 which is 1 byte
before the location where U-Boot will load.

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agoam335x, guardian: Add support for the bosch guardian board
Sjoerd Simons [Mon, 25 Feb 2019 15:33:00 +0000 (15:33 +0000)]
am335x, guardian: Add support for the bosch guardian board

Add support for the Bosch Guardian board.

CPU  : AM335X-GP rev 2.1
Model: Bosch AM335x Guardian
I2C:   ready
DRAM:  256 MiB
NAND:  512 MiB
MMC:   OMAP SD/MMC: 0

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Felix Brack <fb@ltec.ch>
5 years agoenv: Don't check CONFIG_ENV_OFFSET_REDUND for SPL build
Martyn Welch [Mon, 25 Feb 2019 15:32:59 +0000 (15:32 +0000)]
env: Don't check CONFIG_ENV_OFFSET_REDUND for SPL build

When booting using an SPL on am335x, if we want to support booting with
the boot ROM loader via USB (which uses RNDIS, making bootp and tftp
calls) we need to enable gadget eth in the SPL to load the main U-Boot
image. To enable CONFIG_SPL_ETH_SUPPORT, we must enable
CONFIG_SPL_ENV_SUPPORT as the environment is used by the eth support, but
we don't actually need to have environment variables saved in the SPL
environment. We do however have environment variables saved in the main
U-Boot image and enable CONFIG_ENV_OFFSET_REDUND (we are storing in raw
NAND). In such instances, even with the build config enabling both
CONFIG_CMD_SAVEENV and CONFIG_CMD_NAND, these options aren't set when
building the SPL, but CONFIG_ENV_OFFSET_REDUND still is.

Don't check this configuration option for SPL builds to enable the above
configuration.

Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
5 years agoAdd support for the MT41K128M16JT125K memory modules
Sjoerd Simons [Mon, 25 Feb 2019 15:32:58 +0000 (15:32 +0000)]
Add support for the MT41K128M16JT125K memory modules

Add configuration for the MT41K128M16JT125K memory modules as used on the
Bosch Guardian device.

Based on a patch by:
    Govindaraji Sivanantham <Govindaraji.Sivanantham@in.bosch.com>

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
[checkpatch.pl cleanup by Martyn Welch]
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
5 years agoam57xx_evm_defconfig: Enable configs to support QSPI boot
Vignesh R [Fri, 22 Feb 2019 05:31:52 +0000 (11:01 +0530)]
am57xx_evm_defconfig: Enable configs to support QSPI boot

AM57xx IDK EVMs can boot out of QSPI. Enable configs to support QSPI
boot. Also enable configs for updating QSPI boot images over DFU.

Tested on AM572x IDK EVM.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
5 years agoARM: dts: k2g-ice: add dt node for netcp
Murali Karicheri [Thu, 21 Feb 2019 17:02:07 +0000 (12:02 -0500)]
ARM: dts: k2g-ice: add dt node for netcp

This patch adds dt node for DP83867 phy used on K2G ICE board and
also enable netcp device nodes for the board.

EVM hardware spec recommends to add 0.25 nsec delay in the tx
direction and 2.25 nsec delay in the rx direction for internal
delay in the clock path to be on the safer side.

The board straps RX_DV/RX_CTRL pin of on board DP83867 phy in mode
1. Unfortunately, the phy data manual disallows this. Add
ti,dp83867-rxctrl-strap-quirk in the phy node to allow software to
enable workaround suggested for this incorrect strap setting. This
ensures proper operation of this PHY.

The dts bindings are kept in sync with that from 4.14.y linux
kernel. This required the pinmux device related bindings to be
commented out to allow for compilation.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agok2g: config enable ti phy dp83867 for k2g
Murali Karicheri [Thu, 21 Feb 2019 17:02:06 +0000 (12:02 -0500)]
k2g: config enable ti phy dp83867 for k2g

Enable ti phy dp83867 for k2g

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agoARM: dts: k2g-evm: remove unused phy-mode property from phy node
Murali Karicheri [Thu, 21 Feb 2019 17:02:05 +0000 (12:02 -0500)]
ARM: dts: k2g-evm: remove unused phy-mode property from phy node

This patch removes the unused phy-mode property from the phy dt node. On
K2G, currently link-interface determines if phy is used or not and is
already set to use rgmii. So this is not needed. Besides phy-mode should
be added to slave interface configuration of the cpsw driver, not in the
phy node.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agoARM: k2g: add a workaround to reset the phy
Murali Karicheri [Thu, 21 Feb 2019 17:02:04 +0000 (12:02 -0500)]
ARM: k2g: add a workaround to reset the phy

This patch adds a workaround to reset the phy one time during boot
using GPIO0 pin 10 to make sure, the Phy latches the configuration
from the input pins correctly.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agonet: netcp: add support for phy with rgmii ids
Murali Karicheri [Thu, 21 Feb 2019 17:02:03 +0000 (12:02 -0500)]
net: netcp: add support for phy with rgmii ids

Enhance the netcp driver to support phys that can be configured
for internal delay (rgmii-id, rgmii-rxid, rgmii-txid)

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agoARM: k2g-gp-evm: update to rgmii pinmux configuration
Murali Karicheri [Thu, 21 Feb 2019 17:02:02 +0000 (12:02 -0500)]
ARM: k2g-gp-evm: update to rgmii pinmux configuration

This patch updates pinmux configuration for K2G GP EVM based on
data generated by the pinmux tool at
https://dev.ti.com/pinmux/app.html#/default

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
5 years agoARM: k2g-ice: Add pinmux support for rgmii interface
Murali Karicheri [Thu, 21 Feb 2019 17:02:01 +0000 (12:02 -0500)]
ARM: k2g-ice: Add pinmux support for rgmii interface

This add pinmux configuration for rgmii interface so that network
driver can be supported on K2G ICE boards. The pinmux configurations
for this are generated using the pinmux tool at
https://dev.ti.com/pinmux/app.html#/default

As this required some BUFFER_CLASS definitions, same is re-used
from the linux defnitions in include/dt-bindings/pinctrl/keystone.h

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agoARM: mvebu: sync db-88f6820-amc.dts with Linux v5.0
Chris Packham [Thu, 11 Apr 2019 20:47:05 +0000 (08:47 +1200)]
ARM: mvebu: sync db-88f6820-amc.dts with Linux v5.0

Sync armada-385-db-88f6820-amc.dts with Linux. Retain the
u-boot,dm-pre-reloc and nand differences.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
5 years agoARM: mvebu: rename armada-385-amc.dts to armada-385-db-88f6820-amc.dts
Chris Packham [Thu, 11 Apr 2019 20:47:04 +0000 (08:47 +1200)]
ARM: mvebu: rename armada-385-amc.dts to armada-385-db-88f6820-amc.dts

This board was added to u-boot first but the Linux maintainers requested
a more descriptive name. Rename the file to match the Linux usage and
update the board defconfig.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
5 years agoARM: kirkwood: remove obsolete call to icache_enable
Leigh Brown [Tue, 19 Mar 2019 14:50:09 +0000 (14:50 +0000)]
ARM: kirkwood: remove obsolete call to icache_enable

Commit 93b283d49f93 ("ARM: CPU: arm926ejs: Consolidate cache routines to
common file") changed cache setup for Kirkwood such that icache_enable()
is now called from enable_caches() which is called from initr_caches()
which is in the list of functions in init_sequence_r[] prior to
arch_misc_init().  This means the call to icache_enable() in
arch_misc_init() is no longer required, so remove it.

Signed-off-by: Leigh Brown <leigh@solinno.co.uk>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
5 years agoarm: mvebu: Add DB-XC3-24G4XG board
Chris Packham [Thu, 11 Apr 2019 10:22:53 +0000 (22:22 +1200)]
arm: mvebu: Add DB-XC3-24G4XG board

The DB-XC3-24G4XG is a switch development board from Marvell. It can
either use and external CPU card such as the db-88f6820-amc or the
internal CPU that is integrated into the switch.

Add support for running U-Boot on the internal CPU and enable the USB,
SPI and NAND peripherals. For now this needs the bin_hdr from the
Marvell U-Boot for this board.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
5 years agoarm: mvebu: NAND clock support for MSYS devices
Chris Packham [Thu, 11 Apr 2019 10:22:51 +0000 (22:22 +1200)]
arm: mvebu: NAND clock support for MSYS devices

One difference with the integrated CPUs is that they use a different
clock control block to the Armada devices. Update mvebu_get_nand_clock()
accordingly.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
5 years agoarm: mvebu: Add Marvell's integrated CPUs
Chris Packham [Thu, 11 Apr 2019 10:22:50 +0000 (22:22 +1200)]
arm: mvebu: Add Marvell's integrated CPUs

Marvell's switch chips with integrated CPUs (collectively referred to as
MSYS) share common ancestry with the Armada SoCs. Some of the IP blocks
(e.g. xor) are located at different addresses and DFX server exists as a
separate target on the MBUS (on Armada-38x it's just part of the core
complex registers).

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
5 years agoarm: mvebu: Fix Kconfig dependency warnings
Stefan Roese [Thu, 11 Apr 2019 06:58:32 +0000 (08:58 +0200)]
arm: mvebu: Fix Kconfig dependency warnings

We now have MEVBU boards without SPL support (e.g. db-xc3-24g4xg).
Because of this, a new compile time warning from Kconfig is show:

WARNING: unmet direct dependencies detected for SPL_OF_CONTROL
  Depends on [n]: SUPPORT_OF_CONTROL [=y] && SPL [=n] && OF_CONTROL [=y]
  Selected by [y]:
  - ARMADA_32BIT [=y] && ARM [=y] && ARCH_MVEBU [=y]

WARNING: unmet direct dependencies detected for SPL_DM
  Depends on [n]: DM [=y] && SPL [=n]
  Selected by [y]:
  - ARMADA_32BIT [=y] && ARM [=y] && ARCH_MVEBU [=y]
...

This patch fixes this issue and removes these warnings.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
5 years agoarm: mvebu: AXP: Enhance PCIe port capability configuration
Stefan Roese [Mon, 8 Apr 2019 12:51:49 +0000 (14:51 +0200)]
arm: mvebu: AXP: Enhance PCIe port capability configuration

This patch enables the PCIe port specific link capabilities configuration
for Armada XP. The weak function board_sat_r_get() was used to return
a common flag for PCIe Gen1 vs Gen2 capability for all PCIe ports. This
is now changed with this patch to return a bit per PCIe port (4 bits
in this case, bit 0 for PCIe port 0, etc).

The theadorable board uses this new feature to configure PCIe port 0
as Gen1 and all other PCIe ports as Gen2 capable. All other AXP boards
using this function are not changed in the configuration and still
configure all ports as PCIe Gen2.

This patch also removes the parameter "pex_mode" from
board_serdes_cfg_get() as this parameter was not used in any of the
implementations.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Phil Sutter <phil@nwl.cc>
5 years agocmd: add wdt command
Michael Walle [Sat, 6 Apr 2019 00:24:02 +0000 (02:24 +0200)]
cmd: add wdt command

Add a command to control the watchdog devices. This is useful if the
watchdog is rather long running (eg. seconds) and it should be
controlled by scripts. It is also handy during debugging.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
5 years agoarm: kirkwood: lsxl: enable DM for SATA
Michael Walle [Wed, 3 Apr 2019 21:28:31 +0000 (23:28 +0200)]
arm: kirkwood: lsxl: enable DM for SATA

Switch from legacy IDE driver to sata_mv driver.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
5 years agosata: sata_mv: add orion-sata compatible string
Michael Walle [Wed, 3 Apr 2019 21:28:30 +0000 (23:28 +0200)]
sata: sata_mv: add orion-sata compatible string

The kirkwood devices are compatible with this driver.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
5 years agosata: sata_mv: support kirkwood architecture
Michael Walle [Wed, 3 Apr 2019 21:28:29 +0000 (23:28 +0200)]
sata: sata_mv: support kirkwood architecture

Fix the worng include and offset macros.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>