Philippe Reynes [Thu, 7 Mar 2019 10:36:44 +0000 (11:36 +0100)]
bcm963158: enable gpio support
Enable the gpio support (driver and command)
in the configuration of the board bcm963158.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Philippe Reynes [Thu, 7 Mar 2019 10:36:43 +0000 (11:36 +0100)]
dt: bcm963158: enable gpio controller
Enable all the gpio controllers in the device tree
of the board bcm963158.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Philippe Reynes [Thu, 7 Mar 2019 10:36:42 +0000 (11:36 +0100)]
dt: bcm63158: add gpio controller
Add 8 gpio controllers in the bcm63158 device tree.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Philippe Reynes [Thu, 7 Mar 2019 10:36:41 +0000 (11:36 +0100)]
gpio: do not include <asm/arch/gpio.h> on ARCH_BCM63158
As no gpio.h is defined for this architecture, to avoid
a compilation failure, do not include <asm/arch/gpio.h>
for arch bcm63158.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Philippe Reynes [Thu, 7 Mar 2019 10:36:40 +0000 (11:36 +0100)]
gpio: bcm6345: allow this driver on ARCH_BCM63158
This IP is also used on some arm SoC, so we allow
to use this driver on arch bcm63158.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Philippe Reynes [Thu, 7 Mar 2019 10:36:39 +0000 (11:36 +0100)]
bcm968580xref: enable gpio support
Enable the gpio support (driver and command)
in the configuration of the board bcm968580xref.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Philippe Reynes [Thu, 7 Mar 2019 10:36:38 +0000 (11:36 +0100)]
dt: bcm968580xref: enable gpio controller
Enable all the gpio controllers in the device tree
of the board bcm968580xref.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Philippe Reynes [Thu, 7 Mar 2019 10:36:37 +0000 (11:36 +0100)]
dt: bcm6858: add gpio controller
Add 8 gpio controllers in the bcm6858 device tree.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Philippe Reynes [Thu, 7 Mar 2019 10:36:36 +0000 (11:36 +0100)]
gpio: do not include <asm/arch/gpio.h> on ARCH_BCM6858
As no gpio.h is defined for this architecture, to avoid
compilation failure, do not include <asm/arch/gpio.h> for
arch bcm6858.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Philippe Reynes [Thu, 7 Mar 2019 10:36:35 +0000 (11:36 +0100)]
gpio: bcm6345: allow this driver on ARCH_BCM6858
This IP is also used on some arm SoC, so we allow
to use this driver on arch bcm6858.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Philippe Reynes [Thu, 7 Mar 2019 10:36:34 +0000 (11:36 +0100)]
bcm968380gerg: enable gpio support
Enable the gpio support (driver and command)
in the configuration of the board bcm968380gerg
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Philippe Reynes [Thu, 7 Mar 2019 10:36:33 +0000 (11:36 +0100)]
dt: bcm968380gerg: enable gpio controller
Enable the gpio controllers in the device tree
of the board bcm968380gerg.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Philippe Reynes [Thu, 7 Mar 2019 10:36:32 +0000 (11:36 +0100)]
dt: bcm6838: add gpio controller
Add gpio controllers in bcm6838 device tree.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Philippe Reynes [Thu, 7 Mar 2019 10:36:31 +0000 (11:36 +0100)]
gpio: bcm6345: switch to raw I/O functions
This driver is used on several big endian mips board.
So we could use raw I/O function instead of forcing
big endian access.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Rosy Song [Sat, 16 Mar 2019 01:24:50 +0000 (09:24 +0800)]
ag7xxx: add initial support for s17
S17 ethernet support is for QCA8337N, which used on
AP152 (QCA9563) board. It is a 7 ports GbE switch.
Signed-off-by: Rosy Song <rosysong@rosinson.com>
Changes for v2-v3:
- add more commit message for s17
Changes for v4-v5:
- coding style cleanup
Rosy Song [Sat, 16 Mar 2019 01:24:44 +0000 (09:24 +0800)]
mips: add initial support for qca956x referenced board
QCA9563 is CPU used on AP152 board :
Clock speed : 750 MHz ,
Arch : Mips 74Kc,
Eth : SGMII interface,
MIMO config : 3 * 3 450M,
2 * USB 2.0,
Signed-off-by: Rosy Song <rosysong@rosinson.com>
Changes for v2:
- coding style cleanup
- remove ununsed flash chip in defconfig
- enable automatic icache / dcache size in defconfig
Changes for v3:
- add detailed information for qca956x in commit message
Changes for v4:
- remove pre-configured network settings in ap152.h
Changes for v5:
- coding style cleanup
Rosy Song [Sat, 16 Mar 2019 01:24:37 +0000 (09:24 +0800)]
mips: fix erros on registers macros of pll-ddr-config1-nfrac for QCA956X
See details in chapter 8.6.2 and 8.6.4 (page 140-141) of qca9563 datasheet,
NFRAC[17:0]
So the mask of [17:5] is 0x1fff not 0x3fff.
Signed-off-by: Rosy Song <rosysong@rosinson.com>
Changes for v2-v3:
- add more information for this commit
Changes for v4-v5:
- coding style cleanup
Álvaro Fernández Rojas [Fri, 22 Mar 2019 17:22:31 +0000 (18:22 +0100)]
dma: bcm6348: check if driver is enabled before send/recv
This patch prevents errors when running tftpput.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Horatiu Vultur [Wed, 27 Mar 2019 09:16:18 +0000 (10:16 +0100)]
net: mscc: ocelot: Fix reset of the phys
The function mscc_miim_reset resets all the phys, but it is called for
each phy separetely. One consequence of this is that the boot time
is increased by 2 seconds.
The fix consists for calling the mscc_miim_reset function only once for
all phys.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Horatiu Vultur [Thu, 7 Mar 2019 15:49:41 +0000 (16:49 +0100)]
bootm: mips: Remove boot_reloc_ramdisk
Remove the function boot_reloc_ramdisk in the file arch/mips/lib/bootm
because it is relocating again the ramdisk. The function do_bootm_states()
already relocates the ramdisk even if it is a legacy uImage or a FIT image.
The relocation in the function do_bootm_states() was introduce in the
commit
c2e7e72bb9f0cb47d024997b381cb64786eb5402 ("bootm: relocate ramdisk
if CONFIG_SYS_BOOT_RAMDISK_HIGH set")
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Stefan Roese [Fri, 15 Mar 2019 08:09:34 +0000 (09:09 +0100)]
mips: mt76xx: gardena-smart-gateway: Correct spelling of GARDENA
This patch changes Gardena to the correct GARDENA spelling. Also the
platform name is "GARDENA smart Gateway". This patch changes the
incorrect occurrances.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Stefan Roese [Mon, 18 Feb 2019 09:46:55 +0000 (10:46 +0100)]
mips: mt76xx: linkit: Add mtd command support
The new mtd is very useful so let's enable it on the LinkIt Smart
7688 as well.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Jiri Kastner <cz172638@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Rosy Song [Tue, 5 Feb 2019 09:50:55 +0000 (17:50 +0800)]
mips: add ethernet support for qca953x referenced boards
Signed-off-by: Rosy Song <rosysong@rosinson.com>
Rosy Song [Tue, 5 Feb 2019 09:50:44 +0000 (17:50 +0800)]
drivers: add ethernet support for qca953x in ag7xxx driver
Signed-off-by: Rosy Song <rosysong@rosinson.com>
Rosy Song [Tue, 5 Feb 2019 09:49:43 +0000 (17:49 +0800)]
drivers: fix typo for pinctrl qca953x
Signed-off-by: Rosy Song <rosysong@rosinson.com>
Tom Rini [Thu, 11 Apr 2019 18:29:37 +0000 (14:29 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-usb
Tom Rini [Thu, 11 Apr 2019 18:29:22 +0000 (14:29 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-sh
- Various rmobile fixes
Tom Rini [Wed, 10 Apr 2019 12:18:18 +0000 (08:18 -0400)]
Merge branch '2019-04-09-master-imports-fs'
- test.py tests for mmc
- ext4 symlink support and other fixes
- ext4 block group descriptor sizing
Tom Rini [Tue, 9 Apr 2019 20:08:52 +0000 (16:08 -0400)]
test.py: Disable fsck for FAT tests for now
Currently enabling fsck on FAT16/FAT32 exposes that we have problems
with:
TestFsBasic.test_fs13[fat16]
TestFsBasic.test_fs11[fat32]
TestFsBasic.test_fs12[fat32]
TestFsBasic.test_fs13[fat32]
TestFsExt.test_fs_ext1[fat32]
TestFsExt.test_fs_ext2[fat32]
TestFsExt.test_fs_ext3[fat32]
TestFsExt.test_fs_ext4[fat32]
TestFsExt.test_fs_ext5[fat32]
TestFsExt.test_fs_ext6[fat32]
TestFsExt.test_fs_ext7[fat32]
TestFsExt.test_fs_ext8[fat32]
TestFsExt.test_fs_ext9[fat32]
TestMkdir.test_mkdir6[fat16]
TestMkdir.test_mkdir1[fat32]
TestMkdir.test_mkdir2[fat32]
TestMkdir.test_mkdir3[fat32]
TestMkdir.test_mkdir4[fat32]
TestMkdir.test_mkdir5[fat32]
TestMkdir.test_mkdir6[fat32]
TestUnlink.test_unlink1[fat16]
TestUnlink.test_unlink2[fat16]
TestUnlink.test_unlink3[fat16]
TestUnlink.test_unlink4[fat16]
TestUnlink.test_unlink5[fat16]
TestUnlink.test_unlink6[fat16]
TestUnlink.test_unlink7[fat16]
TestUnlink.test_unlink1[fat32]
TestUnlink.test_unlink2[fat32]
TestUnlink.test_unlink3[fat32]
TestUnlink.test_unlink4[fat32]
TestUnlink.test_unlink5[fat32]
TestUnlink.test_unlink6[fat32]
TestUnlink.test_unlink7[fat32]
This is because we don't update the "information sector" on FAT32.
While in the future we should resolve this problem and include that
feature, we should enable fsck for ext4 to ensure that things remain in
good shape there.
Signed-off-by: Tom Rini <trini@konsulko.com>
Benjamin Lim [Fri, 29 Mar 2019 11:29:45 +0000 (07:29 -0400)]
Fix ext4 block group descriptor sizing
Ext4 allows for arbitrarily sized block group descriptors when 64-bit
addressing is enabled, which was previously not properly supported. This
patch dynamically allocates a chunk of memory of the correct size.
Signed-off-by: Benjamin Lim <jarsp.ctf@gmail.com>
Marek Vasut [Wed, 13 Mar 2019 16:49:29 +0000 (17:49 +0100)]
test/py: mmc: Add 'mmc read' performance check
Add option to the mmc rd test to check the duration of the
execution of the mmc read command. This allows intercepting
read performance regressions.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Wed, 13 Mar 2019 16:49:28 +0000 (17:49 +0100)]
test/py: mmc: Add 'mmc info' test
Add test for 'mmc info' subcommand. This tests whether the card
information is obtained correctly and verifies the device, bus
speed, bus mode and bus width.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Wed, 13 Mar 2019 16:49:27 +0000 (17:49 +0100)]
test/py: mmc: Add 'mmc rescan' test
Add test for 'mmc rescan' subcommand. This tests whether the
system can switch to a specific card and then rescan the card.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Wed, 13 Mar 2019 16:49:26 +0000 (17:49 +0100)]
test/py: mmc: Add 'mmc dev' test
Add separate test for 'mmc dev' subcommand. This tests whether
the system can switch to a specific card.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Wed, 13 Mar 2019 16:49:25 +0000 (17:49 +0100)]
test/py: mmc: Factor out device selection
Factor out the 'mmc dev' call so it can be recycled by other tests.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Anssi Hannula [Wed, 27 Feb 2019 10:55:57 +0000 (12:55 +0200)]
fs: fat: fix reading non-cluster-aligned root directory
A FAT12/FAT16 root directory location is specified by a sector offset and
it might not start at a cluster boundary. It also resides before the
data area (before cluster 2).
However, the current code assumes that the root directory is located at
a beginning of a cluster, causing no files to be found if that is not
the case.
Since the FAT12/FAT16 root directory is located before the data area
and is not aligned to clusters, using unsigned cluster numbers to refer
to the root directory does not work well (the "cluster number" may be
negative, and even allowing it be signed would not make it properly
aligned).
Modify the code to not use the normal cluster numbering when referring to
the root directory of FAT12/FAT16 and instead use a cluster-sized
offsets counted from the root directory start sector.
This is a relatively common case as at least the filesystem formatter on
Win7 seems to create such filesystems by default on 2GB USB sticks when
"FAT" is selected (cluster size 64 sectors, rootdir size 32 sectors,
rootdir starts at half a cluster before cluster 2).
dosfstools mkfs.vfat does not seem to create affected filesystems.
Signed-off-by: Anssi Hannula <anssi.hannula@bitwise.fi>
Reviewed-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Tested-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Gero Schumacher [Tue, 26 Feb 2019 15:45:22 +0000 (15:45 +0000)]
fs: ext4: Problem with ext4load and sparse files
Hi,
when I try to load a sparse file via ext4load, I am getting the error message
'invalid extent'
After a deeper look in the code, it seems to be an issue in the function ext4fs_get_extent_block in fs/ext4/ext4_common.c:
The file starts with 1k of zeros. The blocksize is 1024. So the first extend block contains the following information:
eh_entries: 1
eh_depth: 1
ei_block 1
When the upper layer (ext4fs_read_file) asks for fileblock 0, we are running in the 'invalid extent' error message.
For me it seems, that the code is not prepared for handling a sparse block at the beginning of the file. The following change, solved my problem:
I am really not an expert in ext4 filesystems. Can somebody please have a look at this issue and give me a feedback, if I am totally wrong or not?
Jean-Jacques Hiblot [Wed, 13 Feb 2019 11:15:27 +0000 (12:15 +0100)]
test: fs: Added tests for symlinks
Test cases are:
1) basic link creation, verify it can be followed
2) chained links, verify it can be followed
3) replace exiting file a with a link, and a link with a link. verify it
can be followed
4) create a broken link, verify it can't be followed
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Jean-Jacques Hiblot [Wed, 13 Feb 2019 11:15:26 +0000 (12:15 +0100)]
fs: Add a new command to create symbolic links
The command line is:
ln <interface> <dev[:part]> target linkname
Currently symbolic links are supported only in ext4 and only if the option
CMD_EXT4_WRITE is enabled.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Jean-Jacques Hiblot [Wed, 13 Feb 2019 11:15:25 +0000 (12:15 +0100)]
fs: ext4: Add support for the creation of symbolic links
Re-use the functions used to write/create a file, to support creation of a
symbolic link.
The difference with a regular file are small:
- The inode mode is flagged with S_IFLNK instead of S_IFREG
- The ext2_dirent's filetype is FILETYPE_SYMLINK instead of FILETYPE_REG
- Instead of storing the content of a file in allocated blocks, the path
to the target is stored. And if the target's path is short enough, no block
is allocated and the target's path is stored in ext2_inode.b.symlink
As with regulars files, if a file/symlink with the same name exits, it is
unlinked first and then re-created.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Fix ext4 env code]
Signed-off-by: Tom Rini <trini@konsulko.com>
Jean-Jacques Hiblot [Wed, 13 Feb 2019 11:15:24 +0000 (12:15 +0100)]
fs: ext4: constify the buffer passed to write functions
There is no need to modify the buffer passed to ext4fs_write_file().
The memset() call is not required here and was likely copied from the
equivalent part of the ext4fs_read_file() function where we do need it.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Jean-Jacques Hiblot [Wed, 13 Feb 2019 11:15:23 +0000 (12:15 +0100)]
test: fs: Add filesystem integrity checks
We need to make sure that file writes,file creation, etc. are properly
performed and do not corrupt the filesystem.
To help with this, introduce the assert_fs_integrity() function that
executes the appropriate fsck tool. It should be called at the end of any
test that modify the content/organization of the filesystem.
Currently only supports FATs and EXT4.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Jean-Jacques Hiblot [Wed, 13 Feb 2019 11:15:22 +0000 (12:15 +0100)]
test: fs: disable the metadata checksums on ext4 filesystems
If the metadata checksums are enabled, all write operations will fail.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Stephen Warren [Wed, 30 Jan 2019 19:58:05 +0000 (12:58 -0700)]
fs: ext4: cache extent data
When a file contains extents, U-Boot currently reads extent-related data
for each block in the file, even if that data is located in the same
block each time. This significantly slows down loading of files that use
extents. Implement a very dumb cache to prevent repeatedly reading the
same block. Files with extents now load as fast as files without.
Note: There are many cases where read_allocated_block() is called. This
patch only addresses one of those places; all others still read redundant
data in any case they did before. This is a minimal patch to fix the
load command; other cases aren't fixed.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Eugeniu Rosca [Tue, 9 Apr 2019 17:11:09 +0000 (19:11 +0200)]
ARM: rmobile: rcar-common: Zap arch_preboot_os()
v2018.01 commit
e23eb942ad103f ("ARM: rmobile: Stop using
rcar-common/common.c on Gen3") removed
board/renesas/rcar-common/common.c from the build chain with the
reasoning that calling arch_preboot_os() is no longer needed.
However, it left the arch_preboot_os() in place. Get rid of it.
This is done in preparation of resurrecting rcar-common/common.c.
NOTE: The three removed header includes (io.h, sys_proto.h, rcar-mstp.h)
are in direct relationship with the dropped arch_preboot_os() hook. The
other headers (common.h, rmobile.h) are going to be needed by pretty
much anything that is going to appear in the rcar common code. So, keep
the two in place.
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Marek Vasut [Sat, 30 Mar 2019 06:58:43 +0000 (07:58 +0100)]
ARM: dts: rmobile: Enable USB on E2 Alt
The E2 Alt board has two USB ports, add missing DT nodes to make the
USB available.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Sat, 30 Mar 2019 07:04:29 +0000 (08:04 +0100)]
ARM: rmobile: alt: Increase USB power-good delay
Increase the USB power good delay on Alt, this is required with
certain USB sticks, otherwise they might not be detected.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Sat, 30 Mar 2019 06:22:09 +0000 (07:22 +0100)]
net: sh_eth: Initialize PHY in probe() once
Reset and initialize the PHY once in the probe() function rather than
doing it over and over again is start() function. This requires us to
keep the clock enabled while the driver is in use. This significantly
reduces the time between transfers as the PHY doesn't have to restart
autonegotiation between transfers, which takes forever.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Marek Vasut [Mon, 4 Mar 2019 21:53:28 +0000 (22:53 +0100)]
ARM: dts: rmobile: Synchronize Gen3 DTs with Linux 5.0
Synchronize R-Car Gen3 device trees with Linux 5.0,
commit
1c163f4c7b3f621efff9b28a47abb36f7378d783 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Mon, 4 Mar 2019 21:50:54 +0000 (22:50 +0100)]
ARM: dts: rmobile: Synchronize Gen2 DTs with Linux 5.0
Synchronize R-Car Gen2 device trees with Linux 5.0,
commit
1c163f4c7b3f621efff9b28a47abb36f7378d783 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Mon, 4 Mar 2019 21:39:51 +0000 (22:39 +0100)]
pinctrl: renesas: Synchronize Gen3 tables with Linux 5.0
Synchronize R-Car Gen3 pin control tables with Linux 5.0,
commit
1c163f4c7b3f621efff9b28a47abb36f7378d783 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Mon, 4 Mar 2019 21:26:28 +0000 (22:26 +0100)]
pinctrl: renesas: Synchronize Gen2 tables with Linux 5.0
Synchronize R-Car Gen2 pin control tables with Linux 5.0,
commit
1c163f4c7b3f621efff9b28a47abb36f7378d783 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Mon, 4 Mar 2019 21:29:30 +0000 (22:29 +0100)]
pinctrl: renesas: Add TDSEL fixup for H2/E2 ES1.0 SoCs
Linux 5.0, commit
1c163f4c7b3f621efff9b28a47abb36f7378d783,
has a TDSEL fix for R8A7790 H2 and R8A7794 E2 SoCs, implement
similar fix for U-Boot. The difference here is that the SoC
ES matching has to be implemented manually.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Mon, 4 Mar 2019 20:38:10 +0000 (21:38 +0100)]
clk: renesas: Synchronize Gen3 tables with Linux 5.0
Synchronize R-Car Gen3 clock tables with Linux 5.0,
commit
1c163f4c7b3f621efff9b28a47abb36f7378d783 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Mon, 4 Mar 2019 20:23:25 +0000 (21:23 +0100)]
clk: renesas: Synchronize Gen2 tables with Linux 5.0
Synchronize R-Car Gen2 clock tables with Linux 5.0,
commit
1c163f4c7b3f621efff9b28a47abb36f7378d783 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Mon, 4 Mar 2019 11:34:50 +0000 (12:34 +0100)]
ARM: rmobile: Add R8A77965 M3NULCB support
Add defconfig and board specific adjustments for the R8A77965 M3N ULCB.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Mon, 4 Mar 2019 11:28:31 +0000 (12:28 +0100)]
ARM: dts: rmobile: Import R8A77965 M3NULCB DTs
Import R8A77965 M3N ULCB device trees from Linux 5.0 ,
commit
1c163f4c7b3f621efff9b28a47abb36f7378d783 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Mon, 4 Mar 2019 00:32:44 +0000 (01:32 +0100)]
pinctrl: renesas: Add R8A77965 pin control tables
Add pin control tables for R8A77965 from Linux 5.0 .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Mon, 4 Mar 2019 12:36:13 +0000 (13:36 +0100)]
clk: renesas: Add R8A77965 clock tables
Add clock tables for R8A77965 from Linux 5.0 , except for the
crit, R and Z clock, which are neither used nor supported by
the U-Boot clock framework yet.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Mon, 4 Mar 2019 00:32:44 +0000 (01:32 +0100)]
ARM: rmobile: Add dedicated R8A77965 SoC support
Add dedicated entry for R8A77965 M3N SoC.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Wed, 13 Mar 2019 20:09:49 +0000 (21:09 +0100)]
ARM: rmobile: Enable multi-DTB fit LZO compression
Enable LZO compression of the multi-DTB fitImages, since the U-Boot
with multiple DTs enabled is becoming quite large and the DTs can
be well compressed. The LZO compression saves almost 200 kiB on the
Salvator-X(S) and ULCB targets.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Fri, 8 Mar 2019 15:06:55 +0000 (16:06 +0100)]
lib: fdt: Allow LZO and GZIP DT compression in U-Boot
Add required Kconfig symbols, Makefile bits and macro fixes in a
few places to support LZO and DT compression in U-Boot. This can
save a lot of space with multi-DTB fitImages.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Marek Vasut [Wed, 13 Mar 2019 20:11:22 +0000 (21:11 +0100)]
lib: fdt: Allow enabling both LZO and GZIP DT compression
Allow enabling both LZO and GZIP DT compression in SPL and fix a
bug where if the GZIP decompression failed, the LZO decompression
would not even be attempted.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Marek Vasut [Thu, 18 Oct 2018 16:38:05 +0000 (18:38 +0200)]
ARM: renesas: Save boot parameters passed in by ATF
The ATF can pass additional information via the first four registers,
x0...x3. The R-Car Gen3 with mainline ATF, register x1 contains pointer
to a device tree with platform information. Save these registers for
future use.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Tue, 5 Mar 2019 03:25:55 +0000 (04:25 +0100)]
lib: fdt: Split fdtdec_setup_memory_banksize()
Split fdtdec_setup_memory_banksize() into fdtdec_setup_memory_banksize_fdt(),
which allows the caller to pass custom blob into the function and the
original fdtdec_setup_memory_banksize(), which uses the gd->fdt_blob. This
is useful when configuring the DRAM properties from a FDT blob fragment
passed in by the firmware.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Tue, 5 Mar 2019 03:25:54 +0000 (04:25 +0100)]
lib: fdt: Split fdtdec_setup_mem_size_base()
Split fdtdec_setup_mem_size_base() into fdtdec_setup_mem_size_base_fdt(),
which allows the caller to pass custom blob into the function and the
original fdtdec_setup_mem_size_base(), which uses the gd->fdt_blob. This
is useful when configuring the DRAM properties from a FDT blob fragment
passed in by the firmware.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Tue, 12 Mar 2019 03:00:09 +0000 (04:00 +0100)]
spl: ymodem: Move GZ handling out of YModem session
In case the gunzip() call fails, it will print an error message.
If that happens within the YModem session, the error message will
not be displayed and would be useless. Move the gunzip() call out
of the YModem session to make those possible error messages visible.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Marek Vasut [Tue, 12 Mar 2019 03:02:39 +0000 (04:02 +0100)]
spl: ymodem: Terminate YModem session on error
In case spl_parse_image_header() errors out, terminate the YModem
session, otherwise we won't get any further output.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 9 Apr 2019 16:10:53 +0000 (12:10 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-ubi
Tom Rini [Tue, 9 Apr 2019 16:10:40 +0000 (12:10 -0400)]
Merge tag 'u-boot-atmel-2019.07-a' of git://git.denx.de/u-boot-atmel
First set of u-boot-atmel features and fixes for 2019.07 cycle
Adam Ford [Wed, 3 Apr 2019 13:41:56 +0000 (08:41 -0500)]
usb: ehci-mx6: Use common code to extract dr_mode
There exists code in drivers/common/common.c to read the dr_mode
from the device tree. This patch converts this driver to use that
function to initialize the driver.
Signed-off-by: Adam Ford <aford173@gmail.com>
Ismael Luceno Cortes [Mon, 1 Apr 2019 16:09:13 +0000 (16:09 +0000)]
usb: Make portspeed return a read-only string
Current code is plain wrong, and there's no need to have a mutable string,
so fix function type and remove the intermediate variable.
Signed-off-by: Ismael Luceno <ismael.luceno@silicon-gears.com>
Ismael Luceno Cortes [Tue, 19 Mar 2019 09:19:44 +0000 (09:19 +0000)]
usb: host: Print device name when scanning
Drop the counter, it has no meaning other than being the order in which
the interface is found; the name assigned to the USB host controller
interface is a better indicator.
Example of the original output:
> USB0: USB EHCI 1.10
> scanning bus 0 for devices... 2 USB Device(s) found
> scanning usb for storage devices... 1 Storage Device(s) found
Patched output:
> Bus usb@
ee080100: USB EHCI 1.10
> scanning bus usb@
ee080100 for devices... 2 USB Device(s) found
> scanning usb for storage devices... 1 Storage Device(s) found
Signed-off-by: Ismael Luceno <ismael.luceno@silicon-gears.com>
Stefan Roese [Wed, 27 Mar 2019 10:20:19 +0000 (11:20 +0100)]
net: macb: Add small delay after link establishment
I've noticed that the first ethernet packet after PHY link establishment
is not tranferred correctly most of the time on my AT91SAM9G25 board.
Here I usually see a timeout of a few seconds, which is quite
annoying.
Adding a small delay (10ms in this case) after the link establishment
helps to solve this problem. With this patch applied, this timeout
on the first packet is not seen any more.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Wenyou Yang <wenyou.yang@atmel.com>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Claudiu Beznea [Mon, 25 Mar 2019 10:34:00 +0000 (10:34 +0000)]
pinctrl: at91: add slewrate support for SAM9X60
Add slew rate support for SAM9X60 pin controller.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Claudiu Beznea [Mon, 25 Mar 2019 10:33:59 +0000 (10:33 +0000)]
pinctrl: at91: add compatibles for SAM9X60 pin controller
Add compatibles for SAM9X60 pin controller.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Claudiu Beznea [Mon, 25 Mar 2019 10:33:57 +0000 (10:33 +0000)]
pinctrl: at91: add drive strength support for SAM9X60
Add drive strength support for SAM9X60 pin controller.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Claudiu Beznea [Mon, 25 Mar 2019 10:33:56 +0000 (10:33 +0000)]
pinctrl: at91: add option to use drive strength bits
SAM9X60 uses high and low drive strengths. To implement this, in
at91_pinctrl_mux_ops::set_drivestrength we need bit numbers of
drive strengths (1 for low, 2 for high), thus change the code to
allow the usage of drive strength bit numbers.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Stefan Roese [Tue, 2 Apr 2019 08:57:27 +0000 (10:57 +0200)]
arm: at91: Add gardena-gateway-at91sam support
The GARDENA smart Gateway boards are equipped with an Atmel / Microchip
AT91SAM9G25 SoC and with 128 MiB of RAM and 256 MiB of NAND storage.
This patch adds support for this board including SPL support. Therefore
the AT91Boostrap is not needed on this platform any more.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas@biessmann.org>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Stefan Roese [Tue, 2 Apr 2019 08:57:26 +0000 (10:57 +0200)]
arm: at91: at91sam9x5.dtsi: Add watchdog handle
This makes it possible to reference the watchdog DT node via "&watchdog"
from board dts files.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas@biessmann.org>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Stefan Roese [Tue, 2 Apr 2019 08:57:25 +0000 (10:57 +0200)]
arm: at91: siemens: Add support to generate combined SPL+U-Boot image
This patch adds the necessary defines to the Siemens AT91SAM based
boards (smartweb, corvus and taurus) to generate the combined binary
image with SPL and main U-Boot image combined (u-boot-with-spl.bin).
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas@biessmann.org>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tested on the taurus board:
Tested-by: Heiko Schocher <hs@denx.de>
Stefan Roese [Wed, 3 Apr 2019 13:24:50 +0000 (15:24 +0200)]
Makefile: Add Kconfig option CONFIG_SPL_IMAGE to select the SPL binary
This patch adds the CONFIG_SPL_IMAGE option to select the SPL image that
shall be used to generate the combined SPL + U-Boot image. The default
value is the current value "spl/u-boot-spl.bin".
This patch also sets CONFIG_SPL_IMAGE to "spl/boot.bin" for AT91 targets
which use SPL NAND support (boot from NAND). For these build targets the
combined image "u-boot-with-spl.bin" is now automatically generated and
can be programmed into NAND as one single image (vs. SPL image and U-Boot
as 2 separate images).
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas@biessmann.org>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Stefan Roese [Tue, 2 Apr 2019 08:57:23 +0000 (10:57 +0200)]
Makefile.spl: Move generated AT91SAM NAND image boot.bin to spl directory
This patch moves the AT91SAM NAND booting SPL image "boot.bin" which
includes the ECC values from the root directory into the spl directory,
where all SPL related images are located.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas@biessmann.org>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tested on the taurus board:
Tested-by: Heiko Schocher <hs@denx.de>
Stefan Roese [Tue, 2 Apr 2019 08:57:22 +0000 (10:57 +0200)]
arm: at91: arm926ejs/u-boot-spl.lds: Add _image_binary_end to SPL lds
This patch adds _image_binary_end to the SPL linker script. This will be
used be the upcoming GARDENA AT91SAM based platform, which uses DT in
SPL and configures CONFIGURE_SPL_SEPARATE_BSS.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas@biessmann.org>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Stefan Roese [Wed, 3 Apr 2019 05:37:40 +0000 (07:37 +0200)]
arm: at91: Enable watchdog support
This patch enables and starts the watchdog on the AT91 platform if
configured. The WD timeout value is read in the AT91 WD device driver
from the DT, using the "timeout-sec" DT property. If not provided in
the DT, the default value of 2 seconds is used.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas@biessmann.org>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Stefan Roese [Wed, 3 Apr 2019 05:37:05 +0000 (07:37 +0200)]
arm: at91: Remove CONFIG_AT91_HW_WDT_TIMEOUT
This patch removes the CONFIG_AT91_HW_WDT_TIMEOUT as its not needed any
more. The WD timeout value can be provided via the "timeout-sec" DT
property. If not provided this way, the default value of 2 seconds will
be used.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas@biessmann.org>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Stefan Roese [Tue, 2 Apr 2019 08:57:19 +0000 (10:57 +0200)]
watchdog: at91sam9_wdt: Fix WDT setup in at91_wdt_start()
This patch fixes the timer register setup in at91_wdt_start() to
correctly configure the register again. The input timeout value is
now in milli-seconds instead of seconds with the new watchdog API.
Make sure to take this into account and only use a max timeout
value of 16 seconds as appropriate for this SoC.
Also the check against a lower timeout value than 0 is removed. This
check makes no sense, as the timeout value is unsigned.
Signed-off-by: Stefan Roese <sr@denx.de>
Reported-by: Heiko Schocher <hs@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas@biessmann.org>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tested on the taurus board:
Tested-by: Heiko Schocher <hs@denx.de>
Stefan Roese [Tue, 2 Apr 2019 08:57:18 +0000 (10:57 +0200)]
watchdog: Handle SPL build with watchdog disabled
This patch adds some checks, so that the watchdog can be enabled in main
U-Boot proper but can be disabled in SPL.
This will be used by some AT91SAM based boards, which might enable the
watchdog in the main U-Boot proper and not in SPL. It will be enabled in
SPL by default there, so no need to configure it there. This approach
saves some space in SPL.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas@biessmann.org>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tested on the taurus board:
Tested-by: Heiko Schocher <hs@denx.de>
Stefan Roese [Wed, 3 Apr 2019 13:24:19 +0000 (15:24 +0200)]
serial: atmel_usart: Use fixed clock value in SPL version with DM_SERIAL
This patch adds an alterative SPL version of atmel_serial_enable_clk().
This enables the usage of this driver without full clock support (in
drivers and DT nodes). This saves some space in the SPL image.
Please note that this fixed clock support is only added to the SPL code
in the DM_SERIAL part of this file. All boards not using SPL & DM_SERIAL
should not be affected.
This patch also introduces CONFIG_SPL_UART_CLOCK for the fixed UART
input clock. It defaults to
132096000 for ARCH_AT91 but can be set to
a different value if needed.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas@biessmann.org>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Stefan Roese [Tue, 2 Apr 2019 08:57:16 +0000 (10:57 +0200)]
arm: at91: spl_at91.c: Call spl_early_init() if OF_CONTROL is enabled
This patch adds a call to spl_early_init() to board_init_f() which is
needed when CONFIG_SPL_OF_CONTROL is configured. This is necessary for
the early SPL setup including the DTB setup for later usage.
Please note that this call might also be needed for non SPL_OF_CONTROL
board, like the smartweb target. But smartweb fails to build with this
call because its binary grows too big. So I disabled it for these kind
of targets for now.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas@biessmann.org>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tested on the taurus board:
Tested-by: Heiko Schocher <hs@denx.de>
Stefan Roese [Tue, 2 Apr 2019 08:57:15 +0000 (10:57 +0200)]
arm: at91: Makefile: Compile lowlevel_init only when really necessary
Make sure that lowlevel_init is not compiled when
CONFIG_SKIP_LOWLEVEL_INIT_ONLY is configured.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Andreas Bießmann <andreas@biessmann.org>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tested on the taurus board:
Tested-by: Heiko Schocher <hs@denx.de>
Ilko Iliev [Wed, 3 Apr 2019 14:50:30 +0000 (16:50 +0200)]
board: pm9g45: Migrate to CONFIG_DM
Migrate the following options to CONFIG_DM:
CONFIG_DM_GPIO
CONFIG_DM_MMC
CONFIG_DM_ETH
CONFIG_DM_SERIAL
CONFIG_DM_USB
Signed-off-by: Ilko Iliev <iliev@ronetix.at>
Alexander Dahl [Fri, 22 Mar 2019 13:25:54 +0000 (14:25 +0100)]
ARM: at91: sama5d2: Wrap cpu detection to fix macb driver
When introducing the SAMA5D27 SoCs, the SAMA5D2 series got an additional
chip id. The check if the cpu is sama5d2 was changed from a preprocessor
definition (inlining a call to 'get_chip_id()') to a C function,
probably to not call get_chip_id twice?
That however broke a check in the macb ethernet driver. That driver is
more generic and also used for other platforms. I suppose this solution
was implemented to use it in 'gem_is_gigabit_capable()', without having
to stricly depend on the at91 platform:
#ifndef cpu_is_sama5d2
#define cpu_is_sama5d2() 0
#endif
That only works as long as cpu_is_sama5d2 is a preprocessor definition.
(The same is still true for sama5d4 by the way.) So this is a straight
forward fix for the workaround.
The not working check on the SAMA5D2 CPU lead to an issue on a custom
board with a LAN8720A ethernet phy connected to the SoC:
=> dhcp
ethernet@
f8008000: PHY present at 1
ethernet@
f8008000: Starting autonegotiation...
ethernet@
f8008000: Autonegotiation complete
ethernet@
f8008000: link up, 1000Mbps full-duplex (lpa: 0xffff)
BOOTP broadcast 1
BOOTP broadcast 2
BOOTP broadcast 3
BOOTP broadcast 4
BOOTP broadcast 5
BOOTP broadcast 6
BOOTP broadcast 7
BOOTP broadcast 8
BOOTP broadcast 9
BOOTP broadcast 10
BOOTP broadcast 11
BOOTP broadcast 12
BOOTP broadcast 13
BOOTP broadcast 14
BOOTP broadcast 15
BOOTP broadcast 16
BOOTP broadcast 17
Retry time exceeded; starting again
Notice the wrong reported link speed, although both SoC and phy only
support 100 MBit/s!
The real issue on reliably detecting the features of that cadence
ethernet mac IP block, is probably more complicated, though.
Fixes:
245cbc583d ("ARM: at91: Get the Chip ID of SAMA5D2 SiP")
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Eran Matityahu [Wed, 13 Feb 2019 18:56:17 +0000 (20:56 +0200)]
mtd: ubi, ubifs debug: Use pr_debug instead of pr_crit
Before printk.h was introduced and MTDDEBUG was removed,
pr_crit() was calling MTDDEBUG(), which was since then
replaced by the current pr_debug().
pr_debug is more appropriate here.
Signed-off-by: Eran Matityahu <eran.m@variscite.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Eran Matityahu [Wed, 13 Feb 2019 18:55:43 +0000 (20:55 +0200)]
mtd: ubi debug: Remove the pid print from ubi_assert
Add a new definition for ubi_assert and keep
the original one in an ifndef __UBOOT__.
Signed-off-by: Eran Matityahu <eran.m@variscite.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tom Rini [Tue, 9 Apr 2019 02:32:45 +0000 (22:32 -0400)]
Merge tag 'efi-2019-07-rc1' of git://git.denx.de/u-boot-efi
Pull request for UEFI sub-system for v2019.07-rc1
The patch series adds support for the BootNext and BootCurrent variables.
The rest is mostly bug fixes. With the bug fixes in place it becomes
possible to use the EFI Shell `edit` command.
A new unit test is supplied to check the image base and size fields of the
loaded image protocol.
An inline check when freeing memory from the pool safeguards against double
frees.
Tom Rini [Tue, 9 Apr 2019 02:32:11 +0000 (22:32 -0400)]
Merge git://git.denx.de/u-boot-riscv
- RISC-V arch support SMP.
- Support Andestech's PLIC and PLMT.
- qemu, fu54e, ae350 boards enable SMP by default.
- Fix CONFIG_DEFAULT_DEVICE_TREE failure.
Tom Rini [Tue, 9 Apr 2019 01:40:40 +0000 (21:40 -0400)]
Prepare v2019.04
Signed-off-by: Tom Rini <trini@konsulko.com>
Jagan Teki [Mon, 8 Apr 2019 20:27:54 +0000 (01:57 +0530)]
arm: sunxi: Enable DM_MMC on required SoCs
Enabling DM_MMC is forcing CONFIG_BLK=y so if any board which uses
SCSI must need to enable DM_SCSI otherwise SCSI reads on that particular
target making invalid reading to the disk drive.
Allwinner platform do support SCSI on A10, A20 and R40 SoC's out of
these only A10 have DM_SCSI enabled. So enabling DM_MMC on A20, R40
would eventually end-up with scsi disk read failures like [1]
So, enable DM_MMC in all places of respective SoC's instead of enabling
them globally to Allwinner platform.
Now, DM_MMC is enabled in Allwinner SoC's except A20 and R40.
[1] https://lists.denx.de/pipermail/u-boot/2019-April/364057.html
Reported-by: Pablo Sebastián Greco <pgreco@centosproject.org>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tom Rini [Mon, 8 Apr 2019 14:11:29 +0000 (10:11 -0400)]
Merge tag 'fixes-for-2019.04-rc4' of git://git.denx.de/u-boot-staging
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