oweals/u-boot.git
7 years agoarm: socfpga: Enable build for Arria 10
Ley Foon Tan [Tue, 25 Apr 2017 18:44:48 +0000 (02:44 +0800)]
arm: socfpga: Enable build for Arria 10

Update Kconfig and Makefile to enable Arria 10.
Clean up Makefile and sorting *.o alphanumerically.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
7 years agoarm: socfpga: Add board files for the Arria10
Ley Foon Tan [Tue, 25 Apr 2017 18:44:47 +0000 (02:44 +0800)]
arm: socfpga: Add board files for the Arria10

Add support for the Arria10 SoCDK.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
7 years agoarm: socfpga: Add config and defconfig for Arria 10
Ley Foon Tan [Tue, 25 Apr 2017 18:44:46 +0000 (02:44 +0800)]
arm: socfpga: Add config and defconfig for Arria 10

Add config and defconfig for the Arria10 and update socfpga_common.h.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
7 years agoarm: socfpga: Add SPL support for Arria 10
Ley Foon Tan [Tue, 25 Apr 2017 18:44:45 +0000 (02:44 +0800)]
arm: socfpga: Add SPL support for Arria 10

Add SPL support for Arria 10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
7 years agoarm: dts: Add dts and dtsi for Arria 10
Ley Foon Tan [Tue, 25 Apr 2017 18:44:44 +0000 (02:44 +0800)]
arm: dts: Add dts and dtsi for Arria 10

Device tree files for Arria 10

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
7 years agoarm: socfpga: Add misc support for Arria 10
Ley Foon Tan [Tue, 25 Apr 2017 18:44:43 +0000 (02:44 +0800)]
arm: socfpga: Add misc support for Arria 10

Add misc support for Arria 10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
7 years agoarm: socfpga: Add pinmux for Arria 10
Ley Foon Tan [Tue, 25 Apr 2017 18:44:42 +0000 (02:44 +0800)]
arm: socfpga: Add pinmux for Arria 10

Add pinmux support for Arria 10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
7 years agoarm: socfpga: Add sdram header file for Arria 10
Ley Foon Tan [Tue, 25 Apr 2017 18:44:41 +0000 (02:44 +0800)]
arm: socfpga: Add sdram header file for Arria 10

Add sdram header file for Arria 10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
7 years agoarm: socfpga: Add system manager for Arria 10
Ley Foon Tan [Tue, 25 Apr 2017 18:44:40 +0000 (02:44 +0800)]
arm: socfpga: Add system manager for Arria 10

Add system manager register struct and macros for Arria 10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
7 years agoarm: socfpga: Add clock driver for Arria 10
Ley Foon Tan [Tue, 25 Apr 2017 18:44:39 +0000 (02:44 +0800)]
arm: socfpga: Add clock driver for Arria 10

Add clock driver support for Arria 10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
7 years agoarm: socfpga: Add reset driver support for Arria 10
Ley Foon Tan [Tue, 25 Apr 2017 18:44:38 +0000 (02:44 +0800)]
arm: socfpga: Add reset driver support for Arria 10

Add reset driver support for Arria 10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
7 years agoarm: socfpga: Add A10 macros
Ley Foon Tan [Tue, 25 Apr 2017 18:44:37 +0000 (02:44 +0800)]
arm: socfpga: Add A10 macros

Add i2c, timer and other A10 macros.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
7 years agoarm: socfpga: Restructure misc driver
Ley Foon Tan [Tue, 25 Apr 2017 18:44:36 +0000 (02:44 +0800)]
arm: socfpga: Restructure misc driver

Restructure misc driver in the preparation to support A10.
Move the Gen5 specific code to gen5 file.

Change all uint32_t_to u32.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
7 years agoarm: socfpga: Restructure system manager
Ley Foon Tan [Tue, 25 Apr 2017 18:44:35 +0000 (02:44 +0800)]
arm: socfpga: Restructure system manager

Restructure system manager in the preparation to support A10.
No functional change.

Change uint32_t to u32.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
7 years agoarm: socfpga: Restructure reset manager driver
Ley Foon Tan [Tue, 25 Apr 2017 18:44:34 +0000 (02:44 +0800)]
arm: socfpga: Restructure reset manager driver

Restructure reset manager driver in the preparation to support A10.
Move the Gen5 specific code to gen5 files.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
7 years agoarm: socfpga: Restructure clock manager driver
Ley Foon Tan [Tue, 25 Apr 2017 18:44:33 +0000 (02:44 +0800)]
arm: socfpga: Restructure clock manager driver

Restructure clock manager driver in the preparation to support A10.
Move the Gen5 specific code to _gen5 files.

- Change all uint32_t to u32 and change to use macro BIT(n) for bit shift.
- Check return value from wait_for_bit(). So change return type to int for
  cm_write_with_phase() and cm_basic_init().

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
7 years agoMerge git://git.denx.de/u-boot-uniphier
Tom Rini [Wed, 17 May 2017 18:13:58 +0000 (14:13 -0400)]
Merge git://git.denx.de/u-boot-uniphier

- Add workaround code to make LD20 SoC boot from ARM Trusted Firmware
- Sync DT with Linux to fix DTC warnings
- Add new SoC support code
- Misc fix, updates

7 years agoMerge git://git.denx.de/u-boot-x86
Tom Rini [Wed, 17 May 2017 18:13:16 +0000 (14:13 -0400)]
Merge git://git.denx.de/u-boot-x86

7 years agoARM: uniphier: add more init code for PXs3
Masahiro Yamada [Mon, 15 May 2017 05:26:33 +0000 (14:26 +0900)]
ARM: uniphier: add more init code for PXs3

Add the boot device table and reset deassertion for eMMC.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agoARM: uniphier: move kernel physical base to 0x82080000
Masahiro Yamada [Tue, 16 May 2017 05:35:15 +0000 (14:35 +0900)]
ARM: uniphier: move kernel physical base to 0x82080000

Reserve enough space below the kernel base.
The assumed address map is:
  80000000 - 80ffffff : for IPP
  81000000 - 81ffffff : for ARM secure
  82000000 -          : for Linux

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agoARM: dts: uniphier: sync DT with Linux
Masahiro Yamada [Mon, 15 May 2017 05:23:46 +0000 (14:23 +0900)]
ARM: dts: uniphier: sync DT with Linux

Fix the following DTC warnings:
Warning (simple_bus_reg): Node /soc/system-bus@58c00000/support_card@1,1f00000/ethernet@00000000 simple-bus unit address format error, expected "0"
Warning (simple_bus_reg): Node /soc/system-bus@58c00000/support_card@1,1f00000/uart@000b0000 simple-bus unit address format error, expected "b0000"
Warning (simple_bus_reg): Node /soc/smpctrl@59800000 simple-bus unit address format error, expected "59801000"

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agoARM: uniphier: add weird workaround code for LD20
Masahiro Yamada [Fri, 12 May 2017 13:49:02 +0000 (22:49 +0900)]
ARM: uniphier: add weird workaround code for LD20

When booting from ARM Trusted Firmware, U-Boot runs in EL1-NS.
The boot flow is as follows:
  BL1 -> BL2 -> BL31 -> BL33 (i.e. U-Boot)

This boot sequence works fine for LD11 SoC (Cortex-A53), but LD20
SoC (Cortex-A72) hangs in U-Boot.  The solution I found is to
read sctlr_el1 and write back the value as-is.  This should be
no effect, but surprisingly fixes the problem for LD20 to boot.
I do not know why.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agoARM: uniphier: add usbupdate command
Masahiro Yamada [Wed, 10 May 2017 11:57:39 +0000 (20:57 +0900)]
ARM: uniphier: add usbupdate command

This script command will be useful to update boot images in the
USB storage.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agoARM: uniphier: fix MODEL field of REVISION register
Masahiro Yamada [Tue, 9 May 2017 08:14:55 +0000 (17:14 +0900)]
ARM: uniphier: fix MODEL field of REVISION register

The MODEL field is 3 bit wide.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agox86: minnowmax: Remove incorrect pad-offset of several pins
Bin Meng [Mon, 8 May 2017 02:52:30 +0000 (19:52 -0700)]
x86: minnowmax: Remove incorrect pad-offset of several pins

Remove 'pad-offset' of soc_gpio_s5_0, soc_gpio_s5_1, soc_gpio_s5_2,
pin_usb_host_en0 and pin_usb_host_en1. These offsets are actually
wrong. Correct value should be added by 0x2000, but since they
are supposed to be 'mode-gpio', 'pad-offset' is not needed at all.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agox86: ich6_gpio: Add use-lvl-write-cache for I/O access mode
Bin Meng [Mon, 8 May 2017 02:52:29 +0000 (19:52 -0700)]
x86: ich6_gpio: Add use-lvl-write-cache for I/O access mode

Add a device-tree property use-lvl-write-cache that will cause
writes to lvl to be cached instead of read from lvl before each
write. This is required on some platforms that have the register
implemented as dual read/write (such as Baytrail).

Prior to this fix the blue USB port on the Minnowboard Max was
unusable since USB_HOST_EN0 was set high then immediately set
low when USB_HOST_EN1 was written.

This also resolves the 'gpio clear | set' command warning like:
  "Warning: value of pin is still 0"

Signed-off-by: George McCollister <george.mccollister@gmail.com>
<rebased on latest origin/master, fixed all baytrail boards>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agospi: ich: Configure SPI BIOS parameters for Linux upon U-Boot exit
Stefan Roese [Mon, 24 Apr 2017 07:48:04 +0000 (09:48 +0200)]
spi: ich: Configure SPI BIOS parameters for Linux upon U-Boot exit

This patch adds a remove function to the Intel ICH SPI driver, that will
be called upon U-Boot exit, directly before the OS (Linux) is started.
This function takes care of configuring the BIOS registers in the SPI
controller (similar to what a "standard" BIOS or coreboot does), so that
the Linux MTD device driver is able to correctly read/write to the SPI
NOR chip. Without this, the chip is not detected at all.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Jagan Teki <jteki@openedev.com>
7 years agox86: bootm: Add dm_remove_devices_flags() call to bootm_announce_and_cleanup()
Stefan Roese [Mon, 24 Apr 2017 07:48:03 +0000 (09:48 +0200)]
x86: bootm: Add dm_remove_devices_flags() call to bootm_announce_and_cleanup()

This patch adds a call to dm_remove_devices_flags() to
bootm_announce_and_cleanup() so that drivers that have one of the removal
flags set (e.g. DM_FLAG_ACTIVE_DMA_REMOVE) in their driver struct, may
do some last-stage cleanup before the OS is started.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agodm: core: Add DM_FLAG_OS_PREPARE flag
Stefan Roese [Mon, 24 Apr 2017 07:48:02 +0000 (09:48 +0200)]
dm: core: Add DM_FLAG_OS_PREPARE flag

This new flag can be added to DM device drivers, which need to do some
final configuration before U-Boot exits and the OS (e.g. Linux) is
started. The remove functions of those drivers will get called at
this stage to do these last-stage configuration steps.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
7 years agoserial: serial-uclass: Use force parameter in stdio_deregister_dev()
Stefan Roese [Mon, 24 Apr 2017 07:48:01 +0000 (09:48 +0200)]
serial: serial-uclass: Use force parameter in stdio_deregister_dev()

On my x86 platform I've noticed, that calling dm_uninit() or the new
function dm_remove_devices_flags() does not remove the desired device at
all. Debugging showed, that the serial uclass returns -EPERM in
serial_pre_remove(). This patch sets the force parameter when calling
stdio_deregister_dev() resulting in a removal of the device.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agox86: Convert MMC to driver model
Simon Glass [Mon, 10 Apr 2017 00:38:21 +0000 (18:38 -0600)]
x86: Convert MMC to driver model

Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: Document ACPI S3 support
Bin Meng [Fri, 21 Apr 2017 14:24:49 +0000 (07:24 -0700)]
x86: Document ACPI S3 support

Now that we have ACPI S3 support on Intel MinnowMax board, document
some generic information of S3 and how to test it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
7 years agox86: minnowmax: Enable ACPI S3 resume
Bin Meng [Fri, 21 Apr 2017 14:24:48 +0000 (07:24 -0700)]
x86: minnowmax: Enable ACPI S3 resume

This turns on ACPI S3 resume for minnowmax board.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
7 years agox86: acpi: Fix Windows S3 resume failure
Bin Meng [Fri, 21 Apr 2017 14:24:47 +0000 (07:24 -0700)]
x86: acpi: Fix Windows S3 resume failure

U-Boot sets up the real mode interrupt handler stubs starting from
address 0x1000. In most cases, the first 640K (0x00000 - 0x9ffff)
system memory is reported as system RAM in E820 table to the OS.
(see install_e820_map() implementation for each platform). So OS
can use these memories whatever it wants.

If U-Boot is in an S3 resume path, care must be taken not to corrupt
these memorie otherwise OS data gets lost. Testing shows that, on
Microsoft Windows 10 on Intel Baytrail its wake up vector happens to
be installed at the same address 0x1000. While on Linux its wake up
vector does not overlap this memory range, but after resume kernel
checks low memory range per config option CONFIG_X86_RESERVE_LOW
which is 64K by default to see whether a memory corruption occurs
during the suspend/resume (it's harmless, but warnings are shown
in the kernel dmesg logs).

We cannot simply mark the these memory as reserved in E820 table
because such configuration makes GRUB complain: unable to allocate
real mode page. Hence we choose to back up these memories to the
place where we reserved on our stack for our S3 resume work.
Before jumping to OS wake up vector, we need restore the original
content there.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
7 years agox86: pci: Allow conditionally run VGA rom in S3
Bin Meng [Fri, 21 Apr 2017 14:24:46 +0000 (07:24 -0700)]
x86: pci: Allow conditionally run VGA rom in S3

Introduce a new CONFIG_S3_VGA_ROM_RUN option so that U-Boot can
bypass executing VGA roms in S3.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
7 years agox86: acpi: Turn on ACPI mode for S3
Bin Meng [Fri, 21 Apr 2017 14:24:45 +0000 (07:24 -0700)]
x86: acpi: Turn on ACPI mode for S3

Before jumping to OS waking up vector, we need turn on ACPI mode
for S3, just like what we do for a normal boot.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
7 years agox86: acpi: Refactor acpi_resume()
Bin Meng [Fri, 21 Apr 2017 14:24:44 +0000 (07:24 -0700)]
x86: acpi: Refactor acpi_resume()

To do something more in acpi_resume() like turning on ACPI mode,
we need locate ACPI FADT table pointer first. But currently this
is done in acpi_find_wakeup_vector().

This changes acpi_resume() signature to accept ACPI FADT pointer
as the parameter. A new API acpi_find_fadt() is introduced, and
acpi_find_wakeup_vector() is updated to use FADT pointer as the
parameter as well.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
7 years agox86: acpi: Make enter_acpi_mode() public
Bin Meng [Fri, 21 Apr 2017 14:24:43 +0000 (07:24 -0700)]
x86: acpi: Make enter_acpi_mode() public

enter_acpi_mode() is useful on other boot path like S3 resume, so
make it public.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
7 years agox86: apci: Change PM1_CNT register access to RMW
Bin Meng [Fri, 21 Apr 2017 14:24:42 +0000 (07:24 -0700)]
x86: apci: Change PM1_CNT register access to RMW

In enter_acpi_mode() PM1_CNT register is changed to PM1_CNT_SCI_EN
directly without preserving its previous value. Update to change
the register access to read-modify-write (RMW).

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
7 years agox86: Adjust board_final_cleanup() order
Bin Meng [Fri, 21 Apr 2017 14:24:41 +0000 (07:24 -0700)]
x86: Adjust board_final_cleanup() order

Call board_final_cleanup() before write_tables(), so that anything
done in board_final_cleanup() on a normal boot path is also done
on an S3 resume path.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
7 years agox86: Do not clear high table area for S3
Bin Meng [Fri, 21 Apr 2017 14:24:40 +0000 (07:24 -0700)]
x86: Do not clear high table area for S3

When SeaBIOS is being used, U-Boot reserves a memory area to be
used for configuration tables like ACPI. But it should not be
cleared otherwise ACPI table will be missing.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
7 years agox86: fsp: Save stack address to CMOS for next S3 boot
Bin Meng [Fri, 21 Apr 2017 14:24:39 +0000 (07:24 -0700)]
x86: fsp: Save stack address to CMOS for next S3 boot

At the end of pre-relocation phase, save the new stack address
to CMOS and use it as the stack on next S3 boot for fsp_init()
continuation function.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
7 years agox86: Add an early CMOS access library
Bin Meng [Fri, 21 Apr 2017 14:24:38 +0000 (07:24 -0700)]
x86: Add an early CMOS access library

This adds a library that provides CMOS (inside RTC SRAM) access
at a very early stage when driver model is not available yet.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
7 years agox86: acpi: Resume OS if resume vector is found
Bin Meng [Fri, 21 Apr 2017 14:24:37 +0000 (07:24 -0700)]
x86: acpi: Resume OS if resume vector is found

In an S3 resume path, U-Boot does everything like a cold boot except
in the last_stage_init() it jumps to the OS resume vector.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
7 years agox86: acpi: Add one API to find OS wakeup vector
Bin Meng [Fri, 21 Apr 2017 14:24:36 +0000 (07:24 -0700)]
x86: acpi: Add one API to find OS wakeup vector

This adds one API acpi_find_wakeup_vector() to locate OS wakeup
vector from the ACPI FACS table, to be used in the S3 boot path.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
7 years agox86: acpi: Add wake up assembly stub
Bin Meng [Fri, 21 Apr 2017 14:24:35 +0000 (07:24 -0700)]
x86: acpi: Add wake up assembly stub

This adds a wake up stub before jumping to OS wake up vector.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
7 years agox86: fsp: Mark memory used by U-Boot as reserved in the E820 table for S3
Bin Meng [Fri, 21 Apr 2017 14:24:34 +0000 (07:24 -0700)]
x86: fsp: Mark memory used by U-Boot as reserved in the E820 table for S3

U-Boot itself as well as everything that is consumed by U-Boot (like
heap, stack, dtb, etc) needs to be reserved and reported in the E820
table when S3 resume is on.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
7 years agox86: baytrail: Conditionally report S3 in the ACPI table
Bin Meng [Fri, 21 Apr 2017 14:24:33 +0000 (07:24 -0700)]
x86: baytrail: Conditionally report S3 in the ACPI table

When U-Boot is built without ACPI S3 support, it should not report
S3 in the ACPI table otherwise when kernel does STR it won't work.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
7 years agox86: Store and display previous sleep state
Bin Meng [Fri, 21 Apr 2017 14:24:32 +0000 (07:24 -0700)]
x86: Store and display previous sleep state

Add one member in the global data to store previous sleep state,
and display the state during boot in print_cpuinfo().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
7 years agox86: fsp: acpi: Pass different boot mode to FSP init
Bin Meng [Fri, 21 Apr 2017 14:24:31 +0000 (07:24 -0700)]
x86: fsp: acpi: Pass different boot mode to FSP init

When ACPI S3 resume is turned on, we should pass different boot mode
to FSP init instead of default BOOT_FULL_CONFIG.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
7 years agox86: Add post codes for OS resume
Bin Meng [Fri, 21 Apr 2017 14:24:30 +0000 (07:24 -0700)]
x86: Add post codes for OS resume

This adds OS_RESUME (0x40) and RESUME_FAILURE (0xed) post codes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
7 years agox86: baytrail: acpi: Add APIs for determining/clearing sleep state
Bin Meng [Fri, 21 Apr 2017 14:24:29 +0000 (07:24 -0700)]
x86: baytrail: acpi: Add APIs for determining/clearing sleep state

This adds APIs for determining previous sleep state from ACPI I/O
registers, as well as clearing sleep state on BayTrail SoC.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
7 years agox86: acpi: Add Kconfig option and header file for ACPI resume
Bin Meng [Fri, 21 Apr 2017 14:24:28 +0000 (07:24 -0700)]
x86: acpi: Add Kconfig option and header file for ACPI resume

This introduces a Kconfig option for ACPI S3 resume, as well as a
header file to include anything related to ACPI S3 resume.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stefan Roese <sr@denx.de>
7 years agoMerge git://git.denx.de/u-boot-mpc85xx
Tom Rini [Tue, 16 May 2017 18:50:36 +0000 (14:50 -0400)]
Merge git://git.denx.de/u-boot-mpc85xx

7 years agoMerge branch 'master' of git://git.denx.de/u-boot-mmc
Tom Rini [Tue, 16 May 2017 00:17:56 +0000 (20:17 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-mmc

- Add #undef CONFIG_DM_MMC_OPS to omap3_logic in the SPL build case, to
  match other TI platforms in the same situation.

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoMerge branch 'master' of git://git.denx.de/u-boot-video
Tom Rini [Tue, 16 May 2017 00:16:02 +0000 (20:16 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-video

7 years agommc: atmel_sdhci: Enable the quirk SDHCI_QUIRK_WAIT_SEND_CMD
Wenyou Yang [Thu, 11 May 2017 00:25:12 +0000 (08:25 +0800)]
mmc: atmel_sdhci: Enable the quirk SDHCI_QUIRK_WAIT_SEND_CMD

To fix the timeout of sending the write command, enable the quirk
SDHCI_QUIRK_WAIT_SEND_CMD.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agosunxi: Add clock support for TV encoder
Jernej Skrabec [Wed, 10 May 2017 16:46:29 +0000 (18:46 +0200)]
sunxi: Add clock support for TV encoder

This patch adds support for TV encoder clocks which will be used later.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
7 years agosunxi: video: Split out TVE code
Jernej Skrabec [Wed, 10 May 2017 16:46:28 +0000 (18:46 +0200)]
sunxi: video: Split out TVE code

Newer SoCs use same TV encoder unit. Split it out so it can be reused
with new DM video driver.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agovideo: bmp: rename CONFIG_BMP_24BMP to CONFIG_BMP_24BPP
Philipp Tomsich [Fri, 5 May 2017 19:48:30 +0000 (21:48 +0200)]
video: bmp: rename CONFIG_BMP_24BMP to CONFIG_BMP_24BPP

Due to a typo, the 24 bit-per-pixel configuration ends in 24BMP
instead of 24BPP. This change renames it throughout the source tree
for consistency and to make moving these options into Kconfig easier
and less error-prone.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
7 years agorockchip: video: introduce VIDEO_DW_HDMI and select for Rockchip HDMI
Philipp Tomsich [Fri, 5 May 2017 19:48:26 +0000 (21:48 +0200)]
rockchip: video: introduce VIDEO_DW_HDMI and select for Rockchip HDMI

Instead of having drivers/video/rockchip/Kconfig point outside of its
hierarchy for dw_hdmi.o, we should use a configuration-option to
include the Designware HDMI support.

This change introduces a new config option (not to be selected via
menuconfig, but to be selected from a dependent video driver's
configuration option) that enables dw_hdmi.o and selects it whenever
the HDMI support for Rockchip SoCs is selected.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agovideo: dw_hdmi: Select HDMI mode only if monitor supports it
Jernej Skrabec [Sat, 29 Apr 2017 12:43:37 +0000 (14:43 +0200)]
video: dw_hdmi: Select HDMI mode only if monitor supports it

Some DVI monitors don't work in HDMI mode. Set it only if edid data
explicitly states that it is supported.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoedid: Add HDMI flag to timing info
Jernej Skrabec [Sat, 29 Apr 2017 12:43:36 +0000 (14:43 +0200)]
edid: Add HDMI flag to timing info

Some DVI monitors don't show anything in HDMI mode since audio stream
confuses them. To solve this situation, this commit adds HDMI flag in
timing data and sets it accordingly during edid parsing.

First existence of extension block is checked. If it exists and it is
CEA861 extension, then data blocks are checked for presence of HDMI
vendor specific data block. If it is present, HDMI flag is set.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoedid: Set timings flags according to edid
Jernej Skrabec [Sat, 29 Apr 2017 12:43:35 +0000 (14:43 +0200)]
edid: Set timings flags according to edid

Timing flags are never set, so they may contain garbage. Since some
drivers check them, video output may be broken on those drivers.

Initialize them to 0 and check for few common flags.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoMerge branch 'master' of git://git.denx.de/u-boot-i2c
Tom Rini [Mon, 15 May 2017 17:01:26 +0000 (13:01 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-i2c

7 years agokbuild: update DTC warning settings for bus and node/property name checks
Masahiro Yamada [Mon, 15 May 2017 07:07:33 +0000 (16:07 +0900)]
kbuild: update DTC warning settings for bus and node/property name checks

Recent commits of DTC introduced new warnings checking PCI and simple
buses, unit address formatting, and stricter node and property name
checking.  Disable the new DTC warnings by default.  As before,
warnings are enabled with W=*.  The strict node and property name
checks are a bit subjective, so they are only enabled for W=2.
(This policy reflects the commit 8654cb8d0371 of Linux.)

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agoomap3: omap3_logic: switch to using TI_COMMON_CMD_OPTION
Adam Ford [Sat, 13 May 2017 13:14:37 +0000 (08:14 -0500)]
omap3: omap3_logic: switch to using TI_COMMON_CMD_OPTION

Enable TI_COMMON_CMD_OPTIONS and remove similar options
from the defconfig. Updated with savedefconfig

CMD_USB isn't enabled yet.  I have some testing to do with
musb.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agopower: twl4030: Add imply CMD_POWEROFF when TWL4030 is enabled
Adam Ford [Sat, 13 May 2017 12:02:24 +0000 (07:02 -0500)]
power: twl4030: Add imply CMD_POWEROFF when TWL4030 is enabled

Now that CMD_POWEROFF can turn off the twl4030, let's imply that
just incase someone wants to disable it.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoKconfig: OMAP: USB: Migrate CONFIG_USB_EHCI_OMAP to Kconfig
Tom Rini [Sat, 13 May 2017 02:33:30 +0000 (22:33 -0400)]
Kconfig: OMAP: USB: Migrate CONFIG_USB_EHCI_OMAP to Kconfig

Follow the exiting logic for the i.MX options when migrating this
option.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>
7 years agoKconfig: USB: Migrate existing USB_EHCI_xxx options
Tom Rini [Sat, 13 May 2017 02:33:29 +0000 (22:33 -0400)]
Kconfig: USB: Migrate existing USB_EHCI_xxx options

The following options are migrated over fully now:
- USB_EHCI_ATMEL
- USB_EHCI_MARVELL
- USB_EHCI_MX6
- USB_EHCI_MX7
- USB_EHCI_MSM
- USB_EHCI_ZYNQ
- USB_EHCI_GENERIC

This also requires fixing the depends on USB_EHCI_MARVELL as it's used
by Orion5X and Kirkwood as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>
7 years agoKconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig
Tom Rini [Sat, 13 May 2017 02:33:28 +0000 (22:33 -0400)]
Kconfig: USB: Migrate CONFIG_USB_EHCI_HCD users to Kconfig

Migrate the rest of the users of CONFIG_USB_EHCI_HCD over to Kconfig.
For a few SoCs, imply or default y this if USB is enabled.  In some
cases we had not already migrated to CONFIG_USB so do that as well.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>
7 years agopowerpc: t1024: Fix SRDS_MAX_LANES value
Paulo Zaneti [Fri, 5 May 2017 14:08:18 +0000 (11:08 -0300)]
powerpc: t1024: Fix SRDS_MAX_LANES value

T1023 and T1024 have 4 SerDes lanes. Fix macro SRDS_MAX_LANES
and use this macro instead of hard-coded value in t1024_serdes.c.

Signed-off-by: Paulo Zaneti <paulo.zaneti@datacom.ind.br>
Signed-off-by: York Sun <york.sun@nxp.com>
7 years agoKconfig: USB: Migrate CONFIG_USB_EHCI to CONFIG_USB_EHCI_HCD
Tom Rini [Sat, 13 May 2017 02:33:27 +0000 (22:33 -0400)]
Kconfig: USB: Migrate CONFIG_USB_EHCI to CONFIG_USB_EHCI_HCD

In order to be able to migrate the various SoC EHCI CONFIG options we
first need to finish the switch from CONFIG_USB_EHCI to
CONFIG_USB_EHCI_HCD.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Vasut <marex@denx.de>
7 years agowhitelist: Drop more unused OMAP symbols
Tom Rini [Sat, 13 May 2017 02:33:26 +0000 (22:33 -0400)]
whitelist: Drop more unused OMAP symbols

The symbol CONFIG_OMAP3_LOGIC_USE_NEW_PRODUCT_ID was recently dropped
from usage and CONFIG_OMAP3_MICRON_DDR is unused in code.

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoomap: Drop CONFIG_OMAP_VC_I2C_HS_MCODE
Tom Rini [Sat, 13 May 2017 02:33:25 +0000 (22:33 -0400)]
omap: Drop CONFIG_OMAP_VC_I2C_HS_MCODE

The symbol CONFIG_OMAP_VC_I2C_HS_MCODE always uses the default value.
Restructure the comment and code such that if a need arises later to use
another value we can address this then.

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agowatchdog: Migrate OMAP_WATCHDOG to Kconfig
Tom Rini [Sat, 13 May 2017 02:33:24 +0000 (22:33 -0400)]
watchdog: Migrate OMAP_WATCHDOG to Kconfig

Move this entry to Kconfig.  As it is a hardware watchdog, select
HW_WATCHDOG.  While we could default to enabling this for all platforms,
it is currently only enabled by default on AM33XX, so keep that logic
today.

Cc: Roger Meier <r.meier@siemens.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoomap: spi: Drop CONFIG_OMAP3_SPI_D0_D1_SWAPPED support
Tom Rini [Sat, 13 May 2017 02:33:23 +0000 (22:33 -0400)]
omap: spi: Drop CONFIG_OMAP3_SPI_D0_D1_SWAPPED support

This particular quirk is not enabled in any config files today.  It does
however exist and is handled correctly in device trees and via
CONFIG_DM_SPI.  So we drop the symbol now and add a comment to indicate
that any (new) boards that require this quirk need to enable DM_SPI
instead.

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoomap3: Migrate CONFIG_OMAP3_GPIO_X to Kconfig
Tom Rini [Sat, 13 May 2017 02:33:22 +0000 (22:33 -0400)]
omap3: Migrate CONFIG_OMAP3_GPIO_X to Kconfig

The symbols CONFIG_OMAP3_GPIO_X control if we enable the clocks for a
given GPIO bank in U-Boot.  select the required banks for each target.
In some cases we need to also migrate from CONFIG_USB_EHCI (deprecated,
in include/configs/) to CONFIG_USB_EHCI_HCD as we only require the GPIO
bank to be enabled if USB is also enabled.

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agogpio: Move OMAP_GPIO to Kconfig
Tom Rini [Sat, 13 May 2017 02:33:21 +0000 (22:33 -0400)]
gpio: Move OMAP_GPIO to Kconfig

This driver is used often enough such that we want to have this enabled
by default on any ARCH_OMAP2PLUS board, and this only compiles on
ARCH_OMAP2PLUS due to required defines, so mark that as the depends.

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoomap3: Drop unused CONFIG_OMAP3_xxx board defines
Tom Rini [Sat, 13 May 2017 02:33:20 +0000 (22:33 -0400)]
omap3: Drop unused CONFIG_OMAP3_xxx board defines

We no longer have a need for a per-board CONFIG_OMAP3_xxx define (we
have CONFIG_TARGET_xxx when this is required), so drop these unused
references.

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoomap4: Drop redundant CONFIG_OMAP4430 symbol
Tom Rini [Sat, 13 May 2017 02:33:19 +0000 (22:33 -0400)]
omap4: Drop redundant CONFIG_OMAP4430 symbol

While there are a few different OMAP4 SoCs, today we always set
CONFIG_OMAP4430 and CONFIG_OMAP44XX.  Convert the few test of
CONFIG_OMAP4430 to CONFIG_OMAP44XX.

Cc: Marek Vasut <marex@denx.de>
Cc: Paul Kocialkowski <contact@paulk.fr>
Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoomap3: Drop CONFIG_OMAP3_EVM, switch to CONFIG_TARGET_OMAP3_EVM when needed
Tom Rini [Sat, 13 May 2017 02:33:18 +0000 (22:33 -0400)]
omap3: Drop CONFIG_OMAP3_EVM, switch to CONFIG_TARGET_OMAP3_EVM when needed

We make use of CONFIG_OMAP3_EVM today to know when to do a specific
tweak in MUSB.  This can be tested on via CONFIG_TARGET_OMAP3_EVM
instead, so switch there so we can drop the now unused symbol
CONFIG_OMAP3_EVM.  In investigating what to do about the symbol usage we
see that the cairo board defines the same function, but never called it
(as it does not define CONFIG_OMAP3_EVM) and was just returning anyhow,
so drop that function from that board.

Cc: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr>
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoomap5: Migrate CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC to Kconfig
Tom Rini [Sat, 13 May 2017 02:33:17 +0000 (22:33 -0400)]
omap5: Migrate CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC to Kconfig

While in theory this value could be used in places outside of "omap5"
(such as OMAP4), we only make use of it today in OMAP5, so place the
Kconfig entry there.  Given that Kconfig lets us provide a default, we
drop CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC entirely.  The contents of
doc/README.omap-reset-time make a good help entry, so adjust them
slightly and delete the file.  Move the comment about range to where we
use the value now, and have Kconfig enforce the upper bound.

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoTI: Drop 'CONFIG_OMAP'
Tom Rini [Sat, 13 May 2017 02:33:16 +0000 (22:33 -0400)]
TI: Drop 'CONFIG_OMAP'

In the two cases in the code where we use CONFIG_OMAP as a useful test
currently we can make use of CONFIG_ARCH_OMAP2PLUS instead.  With that
changed we can drop all defines of CONFIG_OMAP.  While in here,
CONFIG_OMAP3430 is only defined and then never used, so drop.

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoomap24xx_i2c.c: Drop references to CONFIG_OMAP243X
Tom Rini [Sat, 13 May 2017 02:33:15 +0000 (22:33 -0400)]
omap24xx_i2c.c: Drop references to CONFIG_OMAP243X

We have nothing defining CONFIG_OMAP243X since we dropped the omap243x
platforms, drop these tests.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Heiko Schocher <hs@denx.de>
7 years agoarch/arm/cpu/arm926ejs/omap: Remove
Tom Rini [Sat, 13 May 2017 02:33:14 +0000 (22:33 -0400)]
arch/arm/cpu/arm926ejs/omap: Remove

This code has been unused since the removal of the "omap2" platforms,
remove.

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agodavinci: omapl138_lcdk: drop custom prompt string
Sekhar Nori [Fri, 12 May 2017 10:14:40 +0000 (15:44 +0530)]
davinci: omapl138_lcdk: drop custom prompt string

Drop custom command prompt string in favor
of default used by U-Boot. This helps in
easier automation setup across boards.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
7 years agoboard_f: skip timer_init() on Coldfire archs
Angelo Dureghello [Wed, 10 May 2017 21:58:06 +0000 (23:58 +0200)]
board_f: skip timer_init() on Coldfire archs

Coldfire arch is not happy with timer_init since interrupt handlers
are still not set at that stage, and the boot hangs silently.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>
7 years agospl: add support to booting with ATF
Kever Yang [Fri, 5 May 2017 03:47:45 +0000 (11:47 +0800)]
spl: add support to booting with ATF

ATF(ARM Trusted Firmware) is used by ARM arch64 SoCs, find more infomation
about ATF at: https://github.com/ARM-software/arm-trusted-firmware

SPL is considered as BL2 in ATF terminology, it needs to load other parts
of ATF binary like BL31, BL32, SCP-BL30, and BL33(U-Boot). And needs to
prepare the parameter for BL31 which including entry and image information
for all other images. Then the SPL handle PC to BL31 with the parameter,
the BL31 will do the rest of work and at last get into U-Boot(BL33).

This patch needs work with patches from Andre for SPL support multi
binary in FIT.

The entry point of bl31 and bl33 are still using hard code because we
still can not get them from the FIT image information.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
7 years agoarmv8: minor fix to comment for enabling SMPEN bit
Dinh Nguyen [Thu, 27 Apr 2017 04:36:03 +0000 (23:36 -0500)]
armv8: minor fix to comment for enabling SMPEN bit

The SMPEN bit is located in the cpuectlr_el1 register and not the
cpuactlr_el1 register. Adjust the comment accordingly and also fix
a spelling error.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
CC: Mingkai Hu <mingkai.hu@nxp.com>
CC: Gong Qianyu <Qianyu.Gong@nxp.com>
CC: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
CC: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
CC: York Sun <york.sun@nxp.com>
CC: Albert Aribaud <albert.u.boot@aribaud.net>
CC: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agommc: descend into drivers/mmc only when CONFIG_MMC is enabled
Masahiro Yamada [Tue, 9 May 2017 11:31:40 +0000 (20:31 +0900)]
mmc: descend into drivers/mmc only when CONFIG_MMC is enabled

This simplifies makefiles.  Also, arrange the order of objects in
drivers/mmc/Makefile so that the framework objects are listed before
drivers.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agommc: replace CONFIG_GENERIC_MMC with CONFIG_MMC
Masahiro Yamada [Tue, 9 May 2017 11:31:39 +0000 (20:31 +0900)]
mmc: replace CONFIG_GENERIC_MMC with CONFIG_MMC

Now CONFIG_GENERIC_MMC and CONFIG_MMC match for all defconfig.
We do not need two options for the same feature.  Deprecate the
former.

This commit was generated with the sed script 's/GENERIC_MMC/MMC/'
and manual fixup of drivers/mmc/Kconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agoblanche_defconfig: enable CONFIG_MMC
Masahiro Yamada [Tue, 9 May 2017 11:31:38 +0000 (20:31 +0900)]
blanche_defconfig: enable CONFIG_MMC

As commit 54925327fa11 ("mmc: move CONFIG_GENERIC_MMC to Kconfig")
addressed, this is one of the last weird defconfigs that define
CONFIG_GENERIC_MMC without CONFIG_MMC.

Now I took a closer look at this.  Given that both CONFIG_CMD_MMC
and CONFIG_GENERIC_MMC are set for this defconfig, CONFIG_MMC should
be enabled.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agosandbox_noblk_defconfig: disable CONFIG_GENERIC_MMC
Masahiro Yamada [Tue, 9 May 2017 11:31:37 +0000 (20:31 +0900)]
sandbox_noblk_defconfig: disable CONFIG_GENERIC_MMC

As commit 54925327fa11 ("mmc: move CONFIG_GENERIC_MMC to Kconfig")
addressed, this is one of the last weird defconfigs that define
CONFIG_GENERIC_MMC without CONFIG_MMC.

Now I took a closer look at this.  Given that neither CONFIG_CMD_MMC
nor CONFIG_MMC is set for this defconfig, CONFIG_GENERIC_MMC
should be disabled.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agommc: sdhci-cadence: import updates from Linux 4.12
Masahiro Yamada [Tue, 9 May 2017 06:52:04 +0000 (15:52 +0900)]
mmc: sdhci-cadence: import updates from Linux 4.12

This driver is a counterpart of drivers/mmc/host/sdhci-cadence.c
from Linux.  Some updates for v4.12-rc1 can be imported to U-Boot.

 - Fix value of SDHCI_CDNS_HRS04_RDATA_SHIFT
 - Add polling for ACK bit to be sure that data are written to
   the PHY register
 - Retrieve PHY values from DT properties instead of fixed data

The following is the list of upstream commits:

 - Linux commit 4e03f628b464e0580abadf5161eaa38c61d20943
   mmc: sdhci-cadence: fix bit shift of read data from PHY port

 - Linux commit a0f8243229ed071c8da0ea7cedc1b7bf1b1515da
   mmc: sdhci-cadence: Fix writing PHY delay

 - Linux commit a89c472d8b55c5afc4c79e6e3d1338730034eb01
   mmc: sdhci-cadence: Update PHY delay configuration

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agommc: sdhci: Fix maximum clock for programmable clock mode
Wenyou Yang [Wed, 26 Apr 2017 01:32:30 +0000 (09:32 +0800)]
mmc: sdhci: Fix maximum clock for programmable clock mode

In the programmable clock mode, the SDCLK frequency is incorrectly
assigned when the maximum clock has been assigned during probe,
this causes the SDHCI not work well.

In the programmable clock mode, when calculating the SDCLK Frequency
Select, when the maximum clock has been assigned, it is the actual
value, should not be multiplied by host->clk_mul. Otherwise, the
maximum clock is multiplied host->clk_mul by the base clock achieved
from the BASECLKF field of the Capabilities 0 Register.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
7 years agodrivers: omap_hsmmc: move to DM_MMC_OPS
Jean-Jacques Hiblot [Fri, 14 Apr 2017 17:50:02 +0000 (19:50 +0200)]
drivers: omap_hsmmc: move to DM_MMC_OPS

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoinclude: config: am335x: disable DM_MMC_OPS if DM_MMC is disabled
Jean-Jacques Hiblot [Fri, 14 Apr 2017 17:50:01 +0000 (19:50 +0200)]
include: config: am335x: disable DM_MMC_OPS if DM_MMC is disabled

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoDrop use of CONFIG_I2C_SOFT
Simon Glass [Sat, 13 May 2017 03:10:00 +0000 (21:10 -0600)]
Drop use of CONFIG_I2C_SOFT

This option is not used in U-Boot. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agoDrop CONFIG_I2CFAST
Simon Glass [Sat, 13 May 2017 03:09:59 +0000 (21:09 -0600)]
Drop CONFIG_I2CFAST

This option is not used in U-Boot. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>