Shinya Kuribayashi [Thu, 5 Jun 2008 13:29:00 +0000 (22:29 +0900)]
[MIPS] lib_mips/time.c: Fix CP0 count register usage and timer routines
MIPS port has two problems in timer routines. One is now we assume CFG_HZ
equals to CP0 counter frequency, but this is wrong. CFG_HZ has to be 1000
in the U-Boot system.
The other is we don't have a proper time management counter like timestamp
other ARCHs have. We need the 32-bit millisecond clock counter.
This patch introduces timestamp and CYCLES_PER_JIFFY. timestamp is a
32-bit non-overflowing CFG_HZ counter, and CYCLES_PER_JIFFY is the number
of calculated CP0 counter cycles in a CFG_HZ.
STRATEGY:
* Fix improper CFG_HZ value to have 1000
* Use CFG_MIPS_TIMER_FREQ for timer counter frequency, instead.
* timer_init: initialize timestamp and set up the first timer expiration.
Note that we don't need to initialize CP0 count/compare registers here
as they have been already zeroed out on the system reset. Leave them as
they are.
* get_timer: calculate how many timestamps have been passed, then return
base-relative timestamp. Make sure we can easily count missed timestamps
regardless of CP0 count/compare value.
* get_ticks: return the current timestamp, that is get_timer(0).
Most parts are from good old Linux v2.6.16 kernel.
v2:
- Remove FIXME comments as they turned out to be trivial.
- Use CP0 compare register as a global variable for expirelo.
- Kill a global variable 'cycles_per_jiffy'. Use #define CYCLES_PER_JIFFY
instead.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Shinya Kuribayashi [Thu, 5 Jun 2008 13:29:00 +0000 (22:29 +0900)]
[MIPS] lib_mips/time.c: Fix udelay
What we have to do is just to wait for given micro-seconds. No need to
take into account current time, get_timer and CFG_HZ.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Shinya Kuribayashi [Thu, 5 Jun 2008 13:28:59 +0000 (22:28 +0900)]
[MIPS] lib_mips/time.c: Replace CP0 access functions with existing macros
We already have many pre-defined CP0 access macros in <asm/mipsregs.h>.
This patch replaces mips_{compare,count}_set and mips_count_get with
existing macros.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Remy Bohmer [Tue, 3 Jun 2008 13:48:17 +0000 (15:48 +0200)]
Get rid of annoying/superfluous bad-checksum warning message
U-boot can complain a lot about 'checksum bad' when it is attached to the network.
It is annoying for ordinary users who start to doubt the network connection
in general when they see messages like this.
This is caused by the routine NetCksumOk() which cannot handle IP-headers longer
than 20 bytes. Those packages can be ignored anyway by U-boot, so we trash them
now before checking the checksum.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Remy Bohmer [Wed, 4 Jun 2008 08:47:25 +0000 (10:47 +0200)]
Fix order for reading rx-status registers in 32bit mode of DM9000
A last minute cleanup before submitting the DM9000A patch series yesterday introduced
a bug in reading the rx-status registers in 32bit mode only.
This patch repairs this.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Remy Bohmer [Tue, 3 Jun 2008 13:26:26 +0000 (15:26 +0200)]
DM9000: Some minor code cleanups
Some lines of the U-boot DM9000x driver are longer than 80 characters, or
need some other minor cleanup.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Remy Bohmer [Tue, 3 Jun 2008 13:26:25 +0000 (15:26 +0200)]
DM9000: Make driver work properly for DM9000A
The DM9000A network controller does not work with the U-boot DM9000x driver.
Analysis showed that many incoming packets are lost.
The DM9000A Application Notes V1.20 (section 5.6.1) recommend that the poll to
check for a valid rx packet be done on the interrupt status register, not
directly by performing the dummy read and the rx status check as is currently
the case in the u-boot driver.
When the recommended poll is done as suggested the driver starts working
correctly on 10Mbit/HD, but on 100MBit/FD packets come in faster so that there
can be more than 1 package in the fifo at the same time.
The driver must perform the rx-status check in a loop and read and handle all
packages until there is no more left _after_ the interrupt RX flag is set.
This change has been tested with DM9000A, DM9000E, DM9000EP.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Remy Bohmer [Tue, 3 Jun 2008 13:26:24 +0000 (15:26 +0200)]
DM9000: Improve eth_reset() routine
According to the application notes of the DM9000 v1.22 chapter 5.2 bullet 2, the
reset procedure must be done twice to properly reset the DM9000 by means of software.
This errata is not needed anymore for the DM9000A, but it does not bother it.
This change has been tested with DM9000A, DM9000E, DM9000EP.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Remy Bohmer [Tue, 3 Jun 2008 13:26:23 +0000 (15:26 +0200)]
DM9000: improve eth_send() routine
The eth_send routine of the U-boot DM9000x driver does not match the
DM9000 or DM9000A application notes/programming guides.
This change improves the stability of the DM9000A network controller.
This change has been tested with DM9000A, DM9000E, DM9000EP.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Remy Bohmer [Tue, 3 Jun 2008 13:26:22 +0000 (15:26 +0200)]
DM9000: repair debug logging
It seems that the debugging code of the DM9000x driver in U-boot has not been
compiled for a long time, because it cannot compile...
Also rearranged some loglines to get more useful info while debugging.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Remy Bohmer [Tue, 3 Jun 2008 13:26:21 +0000 (15:26 +0200)]
DM9000: Add data bus-width auto detection.
The U-boot DM9000x driver contains a compile time bus-width definition for
the databus connected to the network controller.
This compile check makes the code unclear, inflexible and is unneccessary.
It can be asked to the network controller what its bus-width is by reading bits
6 and 7 of the interrupt status register.
The linux kernel already uses a runtime mechanism to determine this bus-width,
so the implementation below looks somewhat like that implementation.
This change has been tested with DM9000A, DM9000E, DM9000EP.
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Wolfgang Denk [Wed, 4 Jun 2008 23:12:30 +0000 (01:12 +0200)]
Merge branch 'master' of ssh://mercury/home/wd/git/u-boot/master
Stefan Roese [Wed, 4 Jun 2008 17:19:20 +0000 (19:19 +0200)]
ppc4xx: Fix problem with SDRAM init in bamboo NAND booting port
This patch fixes a problem spotted by Eugene O'Brian (thanks Eugene)
introduced by the commit:
ppc4xx/NAND_SPL: Consolidate 405 and 440 NAND booting code in start.S
With this patch SDRAM will get initialized again and booting from NAND
is working again.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Eugene O'Brien <eugene.obrien@advantechamt.com>
Wolfgang Denk [Tue, 27 May 2008 12:19:30 +0000 (14:19 +0200)]
Socrates: Fix PCI bus frequency report
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
Tor Krill [Thu, 29 May 2008 09:10:30 +0000 (11:10 +0200)]
Fix incorrect switch for IF_TYPE in part.c
Use correct field in block_dev_desc_t when writing interface type in
dev_print. Error introduced in
574b3195.
Also added fix from Martin Krause
Signed-off-by: Tor Krill <tor@excito.com>
Andre Schwarz [Tue, 27 May 2008 08:25:39 +0000 (10:25 +0200)]
Add size #defines for Altera Cyclone-II EP2C8 and EP2C20.
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Peter Tyser [Thu, 22 May 2008 23:56:52 +0000 (18:56 -0500)]
Additional fix to readline_into_buffer() with CONFIG_CMDLINE_EDITING before relocating
Removed unneeded command line history initialization. Also, the original
code would access the 'initted' variable before relocation to SDRAM
which resulted in erratic behavior since the bss is not initialized when
executing from flash.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Grant Erickson [Wed, 21 May 2008 20:28:30 +0000 (13:28 -0700)]
PPC4xx: Simplified post_word_{load, store}
This patch simplifies post_word_{load,store} by using the preprocessor
to eliminate redundant, copy-and-pasted code.
Signed-off-by: Grant Erickson <gerickson@nuovations.com>
Vasiliy Leoenenko [Wed, 7 May 2008 17:25:33 +0000 (21:25 +0400)]
cfi_flash: enable M18 flash chips family support.
Added new command set ID. Buffered write command processing is changed
in order to support M18 flash chips family.
Signed-off-by: Alexey Korolev <akorolev@infradead.org>
Signed-off-by: Vasiliy Leonenko <vasiliy.leonenko@mail.ru>
Vasiliy Leoenenko [Wed, 7 May 2008 17:24:44 +0000 (21:24 +0400)]
cfi_flash: support of long cmd in U-boot.
Some NOR flash chips needs support of commands with length grether than max
value size of uchar. For example all M18 family chips use 0x1ff command in
buffered write mode as value of program loops count.
Signed-off-by: Alexey Korolev <akorolev@infradead.org>
Signed-off-by: Vasiliy Leonenko <vasiliy.leonenko@mail.ru>
Stefan Roese [Fri, 16 May 2008 09:06:06 +0000 (11:06 +0200)]
DTT: Issue one-shot command on AD7414 (LM75 code) to read temp
On AD7414 the first value upon bootup is not read correctly.
This is most likely because of the 800ms update time of the
temp register in normal update mode. To get current values
each time we issue the "dtt" command including upon powerup
we switch into one-short mode.
This patch fixes the problem on AD7414 equipped boards (Sequoia,
Canyonlands etc), that temp value printed in the bootup log was
incorrect.
Signed-off-by: Stefan Roese <sr@denx.de>
Matthias Fuchs [Fri, 30 May 2008 14:55:06 +0000 (16:55 +0200)]
ppc4xx: Cleanup CPCI405 variant's config file
This patch removes some dead code from CPCI405 board's
config files. JFFS2 support is also removed. It's not used and
CPCI4052 does not build anymore without some size reduction.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Kenneth Johansson [Thu, 29 May 2008 14:32:33 +0000 (16:32 +0200)]
Remove shell variable UNDEF_SYM.
UNDEF_SYM is a shell variable in the main Makefile used to force the
linker to add all u-boot commands to the final image. It has no use here.
Signed-off-by: Kenneth Johansson <kenneth@southpole.se>
Haavard Skinnemoen [Fri, 16 May 2008 09:10:35 +0000 (11:10 +0200)]
Add support for environment in SPI flash
This is pretty incomplete...it doesn't handle reading the environment
before relocation, it doesn't support redundant environment, and it
doesn't support embedded environment. But apart from that, it does
seem to work.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Haavard Skinnemoen [Fri, 16 May 2008 09:10:34 +0000 (11:10 +0200)]
SPI Flash: Add "sf" command
This adds a new command, "sf" which can be used to manipulate SPI
flash. Currently, initialization, reading, writing and erasing is
supported.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Haavard Skinnemoen [Fri, 16 May 2008 09:10:33 +0000 (11:10 +0200)]
SPI Flash subsystem
This adds a new SPI flash subsystem.
Currently, only AT45 DataFlash in non-power-of-two mode is supported,
but some preliminary support for other flash types is in place as
well.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Hans-Christian Egtvedt [Fri, 16 May 2008 09:10:32 +0000 (11:10 +0200)]
atmel_spi: Driver for the Atmel SPI controller
This adds a driver for the SPI controller found on most AT91 and AVR32
chips, implementing the new SPI API.
Changed in v4:
- Update to new API
- Handle zero-length transfers appropriately. The user may send a
zero-length SPI transfer with SPI_XFER_END set in order to
deactivate the chip select after a series of transfers with chip
select active. This is useful e.g. when polling the status
register of DataFlash.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Haavard Skinnemoen [Fri, 16 May 2008 09:10:31 +0000 (11:10 +0200)]
SPI API improvements
This patch gets rid of the spi_chipsel table and adds a handful of new
functions that makes the SPI layer cleaner and more flexible.
Instead of the spi_chipsel table, each board that wants to use SPI
gets to implement three hooks:
* spi_cs_activate(): Activates the chipselect for a given slave
* spi_cs_deactivate(): Deactivates the chipselect for a given slave
* spi_cs_is_valid(): Determines if the given bus/chipselect
combination can be activated.
Not all drivers may need those extra functions however. If that's the
case, the board code may just leave them out (assuming they know what
the driver needs) or rely on the linker to strip them out (assuming
--gc-sections is being used.)
To set up communication parameters for a given slave, the driver needs
to call spi_setup_slave(). This returns a pointer to an opaque
spi_slave struct which must be passed as a parameter to subsequent SPI
calls. This struct can be freed by calling spi_free_slave(), but most
driver probably don't want to do this.
Before starting one or more SPI transfers, the driver must call
spi_claim_bus() to gain exclusive access to the SPI bus and initialize
the hardware. When all transfers are done, the driver must call
spi_release_bus() to make the bus available to others, and possibly
shut down the SPI controller hardware.
spi_xfer() behaves mostly the same as before, but it now takes a
spi_slave parameter instead of a spi_chipsel function pointer. It also
got a new parameter, flags, which is used to specify chip select
behaviour. This may be extended with other flags in the future.
This patch has been build-tested on all powerpc and arm boards
involved. I have not tested NIOS since I don't have a toolchain for it
installed, so I expect some breakage there even though I've tried
fixing up everything I could find by visual inspection.
I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and
DataFlash drivers posted as a follow-up. I'd like some help testing
other boards that use the existing SPI API.
But most of all, I'd like some comments on the new API. Is this stuff
usable for everyone? If not, why?
Changed in v4:
- Build fixes for various boards, drivers and commands
- Provide common struct spi_slave definition that can be extended by
drivers
- Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate
- Make default bus and mode build-time configurable
- Override default SPI bus ID and mode on mx32ads and imx31_litekit.
Changed in v3:
- Add opaque struct spi_slave for controller-specific data associated
with a slave.
- Add spi_claim_bus() and spi_release_bus()
- Add spi_free_slave()
- spi_setup() is now called spi_setup_slave() and returns a
struct spi_slave
- soft_spi now supports four SPI modes (CPOL|CPHA)
- Add bus parameter to spi_setup_slave()
- Convert the new i.MX32 SPI driver
- Convert the new MC13783 RTC driver
Changed in v2:
- Convert the mpc8xxx_spi driver and the mpc8349emds board to the
new API.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Tested-by: Guennadi Liakhovetski <lg@denx.de>
Haavard Skinnemoen [Fri, 16 May 2008 09:10:30 +0000 (11:10 +0200)]
Move definition of container_of() to common.h
AVR32 and AT91SAM9 both have their own identical definitions of
container_of() taken from the Linux kernel. Move it to common.h so
that all architectures can use it.
container_of() is already used by some drivers, and will be used
extensively by the new and improved SPI API.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Haavard Skinnemoen [Fri, 16 May 2008 09:08:11 +0000 (11:08 +0200)]
soft_i2c: Pull SDA high before reading
Spotted by Dean Capindale.
Systems that support open-drain GPIO properly are allowed provide an
empty I2C_TRISTATE define. However, this means that we need to be
careful not to drive SDA low when the slave is expected to respond.
This patch adds a missing I2C_SDA(1) to read_byte() required to
tristate the SDA line on systems that support open-drain GPIO.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Stefan Roese [Mon, 19 May 2008 09:34:53 +0000 (11:34 +0200)]
ppc4xx: Remove implementations of testdram()
This patch removes the used testdram() implementations of the board
that are maintained by myself.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 2 Jun 2008 15:37:28 +0000 (17:37 +0200)]
ppc4xx: Remove superfluous dram_init() call or replace it by initdram()
Historically the 405 U-Boot port had a dram_init() call in early init
stage. This function was still called from start.S and most of the time
coded in assembler. This is not needed anymore (since a long time) and
boards should implement the common initdram() function in C instead.
This patch now removed the dram_init() call from start.S and removes the
empty implementations that are scattered through most of the 405 board
ports. Some older board ports really implement this dram_init() though.
These are:
csb272
csb472
ERIC
EXBITGEN
W7OLMC
W7OLMG
I changed those boards to call this assembler dram_init() function now
from their board specific initdram() instead. This *should* work, but please
test again on those platforms. And it is perhaps a good idea that those
boards use some common 405 SDRAM initialization code from cpu/ppc4xx at
some time. So further patches welcome here.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 2 Jun 2008 15:22:11 +0000 (17:22 +0200)]
ppc4xx: Use new 4xx SDRAM controller enable defines in common ECC code
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 2 Jun 2008 15:20:03 +0000 (17:20 +0200)]
ppc4xx: Fix common ECC generation code for 440GP style platforms
This patch makes the common 4xx ECC code really usable on 440GP style
platforms.
Since the IBM DDR controller used on 440GP/GX/EP/GR is not register
compatible to the IBM DDR/2 controller used on 405EX/440SP/SPe/460EX/GT
we need to make some processor dependant defines used later on by the
driver.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 2 Jun 2008 15:13:55 +0000 (17:13 +0200)]
ppc4xx: Change Kilauea to use the common DDR2 init function
This patch changes the kilauea and kilauea_nand (for NAND booting)
board port to not use a board specific DDR2 init routine anymore. Now
the common code from cpu/ppc4xx is used.
Thanks to Grant Erickson for all his basic work on this 405EX early
bootup.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 2 Jun 2008 12:59:21 +0000 (14:59 +0200)]
ppc4xx: Consolidate PPC4xx SDRAM/DDR/DDR2 defines, part2
This patch now adds a new header file (asm-ppc/ppc4xx-sdram.h) for all
ppc4xx related SDRAM/DDR/DDR2 controller defines.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 2 Jun 2008 12:57:41 +0000 (14:57 +0200)]
ppc4xx: Consolidate PPC4xx SDRAM/DDR/DDR2 defines, part1
This patch removes all SDRAM related defines from the PPC4xx headers
ppc405.h and ppc440.h. This is needed since now some 405 PPC's use
the same SDRAM controller as 440 systems do (like 405EX and 440SP).
It also introduces new defines for the equipped SDRAM controller based on
which PPC variant is used. There new defines are:
used on 405GR/CR/EP and some Xilinx Virtex boards.
used on 440GP/GX/EP/GR.
used on 440EPx/GRx.
used on 405EX/r/440SP/SPe/460EX/GT.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 2 Jun 2008 12:35:44 +0000 (14:35 +0200)]
ppc4xx/NAND_SPL: Consolidate 405 and 440 NAND booting code in start.S
This patch consolidates the 405 and 440 parts of the NAND booting code
selected via CONFIG_NAND_SPL. Now common code is used to initialize the
SDRAM by calling initdram() and to "copy/relocate" to SDRAM/OCM/etc.
Only *after* running from this location, nand_boot() is called.
Please note that the initsdram() call is now moved from nand_boot.c
to start.S. I experienced problems with some boards like Kilauea
(405EX), which don't have internal SRAM (OCM) and relocation needs to
be done to SDRAM before the NAND controller can get accessed. When
initdram() is called later on in nand_boot(), this can lead to problems
with variables in the bss sections like nand_ecc_pos[].
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Scott Wood <scottwood@freescale.com>
Grant Erickson [Thu, 22 May 2008 21:44:24 +0000 (14:44 -0700)]
ppc4xx: Enable Primordial Stack for 40x and Unify ECC Handling
This patch (Part 2 of 2):
* Rolls up a suite of changes to enable correct primordial stack and
global data handling when the data cache is used for such a purpose
for PPC40x-variants (i.e. CFG_INIT_DCACHE_CS).
* Related to the first, unifies DDR2 SDRAM and ECC initialization by
eliminating redundant ECC initialization implementations and moving
redundant SDRAM initialization out of board code into shared 4xx
code.
* Enables MCSR visibility on the 405EX(r).
* Enables the use of the data cache for initial RAM on
both AMCC's Kilauea and Makalu and removes a redundant
CFG_POST_MEMORY flag from each board's CONFIG_POST value.
- Removed, per Stefan Roese's request, defunct memory.c file for
Makalu and rolled sdram_init from it into makalu.c.
With respect to the 4xx DDR initialization and ECC unification, there
is certainly more work that can and should be done (file renaming,
etc.). However, that can be handled at a later date on a second or
third pass. As it stands, this patch moves things forward in an
incremental yet positive way for those platforms that utilize this
code and the features associated with it.
Signed-off-by: Grant Erickson <gerickson@nuovations.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Grant Erickson [Thu, 22 May 2008 21:44:14 +0000 (14:44 -0700)]
ppc4xx: Enable Primordial Stack for 40x and Unify ECC Handling
This patch (Part 1 of 2):
* Rolls up a suite of changes to enable correct primordial stack and
global data handling when the data cache is used for such a purpose
for PPC40x-variants (i.e. CFG_INIT_DCACHE_CS).
* Related to the first, unifies DDR2 SDRAM and ECC initialization by
eliminating redundant ECC initialization implementations and moving
redundant SDRAM initialization out of board code into shared 4xx
code.
* Enables MCSR visibility on the 405EX(r).
* Enables the use of the data cache for initial RAM on
both AMCC's Kilauea and Makalu and removes a redundant
CFG_POST_MEMORY flag from each board's CONFIG_POST value.
- Removed, per Stefan Roese's request, defunct memory.c file for
Makalu and rolled sdram_init from it into makalu.c.
With respect to the 4xx DDR initialization and ECC unification, there
is certainly more work that can and should be done (file renaming,
etc.). However, that can be handled at a later date on a second or
third pass. As it stands, this patch moves things forward in an
incremental yet positive way for those platforms that utilize this
code and the features associated with it.
Signed-off-by: Grant Erickson <gerickson@nuovations.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Grant Erickson [Wed, 21 May 2008 20:28:30 +0000 (13:28 -0700)]
PPC4xx: Simplified post_word_{load, store}
This patch simplifies post_word_{load,store} by using the preprocessor
to eliminate redundant, copy-and-pasted code.
Signed-off-by: Grant Erickson <gerickson@nuovations.com>
Stefan Roese [Tue, 3 Jun 2008 18:19:08 +0000 (20:19 +0200)]
Merge branch 'master' of /home/stefan/git/u-boot/u-boot
Kumar Gala [Thu, 15 May 2008 20:13:08 +0000 (15:13 -0500)]
Fix warnings from gcc-4.3.0 build on a ppc host
* The cfi_flash.c memset fix actual allows the board to boot so there is
a bit more going on here than just resolving warnings associated with
uninitialized variables.
* include/asm/bitops.h:302: warning: '__swab32p' is static but used in
inline function 'ext2_find_next_zero_bit' which is not static
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Becky Bruce [Wed, 14 May 2008 18:09:51 +0000 (13:09 -0500)]
MPC512x: Change traps.c to not reference non-addressable memory
Currently, END_OF_RAM is used by the trap code to determine if
we should attempt to access the stack pointer or not. However,
on systems with a lot of RAM, only a subset of the RAM is
guaranteed to be mapped in and accessible. Change END_OF_RAM
to use get_effective_memsize() instead of using the raw ram
size out of the bd.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Kumar Gala [Wed, 14 May 2008 00:01:54 +0000 (19:01 -0500)]
Make sure common.h is the first include.
If common.h isn't first we can get CONFIG_ options defined in the
board config file ignored. This can cause an issue if any of those
config options impact the size of types of data structures
(eg CONFIG_PHYS_64BIT).
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Marian Balakowicz [Tue, 13 May 2008 13:53:29 +0000 (15:53 +0200)]
Avoid initrd and logbuffer area overlaps
Add logbuffer to reserved LMB areas to prevent initrd allocation
from overlaping with it.
Make sure to use correct logbuffer base address.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Sascha Laue [Tue, 13 May 2008 11:29:54 +0000 (13:29 +0200)]
lwmon5: add memory-pattern-test to FPGA POST.
Becky Bruce [Fri, 9 May 2008 00:02:51 +0000 (19:02 -0500)]
PPC: 86xx Add bat registers to reginfo command
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Becky Bruce [Fri, 9 May 2008 20:41:35 +0000 (15:41 -0500)]
PPC: Add print_bats() to lib_ppc/bat_rw.c
This function prints the values of all the BAT register
pairs - I needed this for debug earlier this week; adding it to
lib_ppc so others can use it (and add it to reginfo commands
if so desired).
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Becky Bruce [Fri, 16 May 2008 02:29:04 +0000 (21:29 -0500)]
PPC: Change lib_ppc/bat_rw.c to use high bats
Currently, this code only deals with BATs 0-3, which makes
it useless on systems that support BATs 4-7. Add the
support for these registers.
Signed-off-by: Becky Bruce <Becky.bruce@freescale.com>
Becky Bruce [Fri, 9 May 2008 00:02:12 +0000 (19:02 -0500)]
PPC: Create and use CONFIG_HIGH_BATS
Change all code that conditionally operates on high bat
registers (that is, BATs 4-7) to look at CONFIG_HIGH_BATS
instead of the myriad ways this is done now. Define the option
for every config for which high bats are supported (and
enabled by early boot, on parts where they're not always
enabled)
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Ben Warren [Tue, 3 Jun 2008 05:55:42 +0000 (22:55 -0700)]
Merge branch 'master' of git://denx.de/git/u-boot
Wolfgang Grandegger [Wed, 28 May 2008 17:55:19 +0000 (19:55 +0200)]
E1000: Add support for the 82541GI LF Intel Pro 1000 GT Desktop Adapter
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
TsiChung Liew [Wed, 28 May 2008 18:06:25 +0000 (13:06 -0500)]
ColdFire: Add 10 base ethernet support for mcf5445x
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Wolfgang Denk [Mon, 2 Jun 2008 22:24:36 +0000 (00:24 +0200)]
Merge remote branch 'u-boot-at91/for-1.3.4'
Wolfgang Denk [Mon, 2 Jun 2008 22:19:57 +0000 (00:19 +0200)]
Merge remote branch 'u-boot-avr32/master'
Wolfgang Denk [Mon, 2 Jun 2008 22:16:48 +0000 (00:16 +0200)]
Merge remote branch 'u-boot-nand-flash/master'
Wolfgang Denk [Mon, 2 Jun 2008 22:11:40 +0000 (00:11 +0200)]
Merge remote branch 'u-boot-mips/master'
Wolfgang Denk [Mon, 2 Jun 2008 21:28:39 +0000 (23:28 +0200)]
Merge remote branch 'u-boot-ppc4xx/master'
Jason McMullan [Thu, 29 May 2008 15:53:38 +0000 (00:53 +0900)]
mips: Add an 'include/asm/errno.h', like all other architectures
All other u-boot architectures have an include/asm/errno.h, so
this change adds it to the mips include/asm-mips headers also.
Stolen from Linux 2.6.25.
Signed-off-by: Jason McMullan <mcmullan@netapp.com>
Shinya Kuribayashi [Thu, 29 May 2008 15:53:38 +0000 (00:53 +0900)]
[MIPS] <asm/mipsregs.h>: Update coprocessor register access macros
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Shinya Kuribayashi [Thu, 29 May 2008 15:53:38 +0000 (00:53 +0900)]
[MIPS] <asm/mipsregs.h>: Update register / bit field definitions
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Shinya Kuribayashi [Thu, 29 May 2008 15:53:37 +0000 (00:53 +0900)]
[MIPS] <asm/mipsregs.h>: CodinygStyle cleanups
No functional changes.
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Jason McMullan [Thu, 29 May 2008 15:53:37 +0000 (00:53 +0900)]
mips: If CONFIG_CMD_SPI is defined, call spi_init()
The mips architecture currently does not call 'spi_init()' in the generic
board initialization routine is CONFIG_CMD_SPI is defined.
This patch rectifies that problem.
Signed-off-by: Jason McMullan <mcmullan@netapp.com>
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Jason McMullan [Thu, 29 May 2008 15:53:37 +0000 (00:53 +0900)]
[MIPS] lib_mips/board.c: Add nand_init
This patch adds the standard 'nand_init()' call to the mips generic
'board_init_r()' call, bringing MIPS in line with the other architectures.
Signed-off-by: Jason McMullan <mcmullan@netapp.com>
Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
Scott Wood [Thu, 22 May 2008 15:49:46 +0000 (10:49 -0500)]
Remove prototypes of nand_init() in favor of including nand.h.
Likewise with onenand_init().
Signed-off-by: Scott Wood <scottwood@freescale.com>
Scott Wood [Thu, 22 May 2008 15:49:00 +0000 (10:49 -0500)]
Make onenand_uboot.h self-sufficient.
Don't assume types are provided by previously included headers.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Dirk Behme [Wed, 16 Jan 2008 13:26:59 +0000 (14:26 +0100)]
nand: Correct NAND erase percentage output
For NAND erase sizes smaller than one NAND erase block, erase
percentage output becomes grater than 100% e.g.
-- cut --
> nand info
Device 0: NAND 64MiB 1,8V 8-bit, sector size 16 KiB
> nand erase 0x100000 0x2000
NAND erase: device 0 offset 0x100000, size 0x2000
Erasing at 0x100000 -- 200% complete.
OK
>
-- cut --
Correct this and give user a warning that more is erased than specified:
-- cut --
> nand erase 0x100000 0x2000
NAND erase: device 0 offset 0x100000, size 0x2000
Warning: Erase size 0x00002000 smaller than one erase block 0x00004000
Erasing 0x00004000 instead
Erasing at 0x100000 -- 100% complete.
OK
>
-- cut --
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Stelian Pop [Tue, 13 May 2008 15:31:24 +0000 (17:31 +0200)]
Cleanup nand_info[] declaration.
The nand_info array is declared as extern in several .c files.
Those days, nand.h contains a reference to the array, so there is
no need to declare it elsewhere.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Scott Wood [Mon, 19 May 2008 14:30:43 +0000 (09:30 -0500)]
NAND: Provide a sane default for NAND_MAX_CHIPS.
This allows the header to be included regardless of whether a board's
config file provides NAND-related defininitions.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Haavard Skinnemoen [Mon, 26 May 2008 10:19:10 +0000 (12:19 +0200)]
avr32: Fix theoretical race in udelay()
If the specified delay is very short, the cycle counter may go past the
"end" time we are waiting for before we get around to reading it.
Fix it by checking the different between the cycle count "now" and the
cycle count at the beginning. This will work as long as the delay
measured in number of cycles is below 2^31.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Haavard Skinnemoen [Wed, 21 May 2008 11:01:09 +0000 (13:01 +0200)]
avr32: Compile atmel_mci.o conditionally
Remove #ifdef CONFIG_MMC from the source file and use conditional
compilation in the Makefile instead.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Haavard Skinnemoen [Thu, 22 May 2008 10:28:25 +0000 (12:28 +0200)]
avr32: Fix wrong error flags in atmel_mci driver
Make sure we check for CRC errors when sending commands that use CRC
checking.
Reported-by: Gururaja Hebbar K R <gururajakr@sanyo.co.in>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Haavard Skinnemoen [Wed, 21 May 2008 09:10:59 +0000 (11:10 +0200)]
avr32: Fix two warnings in atmel_mci.c
The warnings are harmless but annoying. Let's fix them.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Haavard Skinnemoen [Mon, 19 May 2008 09:36:28 +0000 (11:36 +0200)]
avr32: Rework SDRAM initialization code
This cleans up the SDRAM initialization and related code a bit, and
allows faster booting.
* Add definitions for EBI and internal SRAM to asm/arch/memory-map.h
* Remove memory test from sdram_init() and make caller responsible
for verifying the SDRAM and determining its size.
* Remove base_address member from struct sdram_config (was sdram_info)
* Add data_bits member to struct sdram_config and kill CFG_SDRAM_16BIT
* Add support for a common STK1000 hack: 16MB SDRAM instead of 8.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Haavard Skinnemoen [Mon, 19 May 2008 09:27:37 +0000 (11:27 +0200)]
avr32: Do stricter stack checking in the exception handler
Don't do a stack dump if the stack pointer is outside the memory area
reserved for stack.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Haavard Skinnemoen [Fri, 2 May 2008 13:32:57 +0000 (15:32 +0200)]
avr32: Use the same entry point for reset and exception handling
Since the reset vector is always aligned to a very large boundary, we
can save a couple of KB worth of alignment padding by placing the
exception vectors at the same address.
Deciding which one it is is easy: If we're handling an exception, the
CPU is in Exception mode. If we're starting up after reset, the CPU is
in Supervisor mode. So this adds a very minimal overhead to the reset
path (only executed once) and the exception handling path (normally
never executed at all.)
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Haavard Skinnemoen [Fri, 2 May 2008 13:24:22 +0000 (15:24 +0200)]
avr32: Put memset in its own section
All C code is compiled with -ffunction-sections -fdata-sections.
Assembly functions should get their own sections as well so that
everything looks consistent.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Haavard Skinnemoen [Fri, 2 May 2008 13:21:40 +0000 (15:21 +0200)]
avr32: Rename pm_init() as clk_init() and make SoC-specific
pm_init() was always more about clock initialization than anything
else. Dealing with PLLs, clock gating and such is also inherently
SoC-specific, so move it into a SoC-specific directory.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Haavard Skinnemoen [Wed, 30 Apr 2008 14:15:57 +0000 (16:15 +0200)]
avr32: Use new-style Makefile for the at32ap platform
This makes it easier to avoid compiling certain files later.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Haavard Skinnemoen [Wed, 30 Apr 2008 12:36:47 +0000 (14:36 +0200)]
avr32: Remove unused file cpu/at32ap/pm.c
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Haavard Skinnemoen [Wed, 30 Apr 2008 12:19:28 +0000 (14:19 +0200)]
avr32: Clean up the HMATRIX code
Rework the HMATRIX configuration interface so that it becomes easier
to configure the HMATRIX for boards with special needs, and add new
parts.
The HMATRIX header file has been split into a general,
chip-independent part with register definitions, etc. and a
chip-specific part with SFR bitfield definitions and master/slave
identifiers.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Haavard Skinnemoen [Thu, 22 Nov 2007 11:14:11 +0000 (12:14 +0100)]
avr32: Add support for the ATSTK1006 board
This is a replacement for ATSTK1002 with 64MB SDRAM and NAND flash on
board. It's currently in production and will be available soon.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Haavard Skinnemoen [Tue, 29 Apr 2008 10:53:05 +0000 (12:53 +0200)]
avr32: Get rid of the .flashprog section
The .flashprog section was only needed back when we were running
directly from flash, and it's even more useless on NGW100 since it
uses the CFI flash driver which never used this workaround in the
first place.
Remove it on STK1000 as well, and get rid of all the associated code and
annotations.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Haavard Skinnemoen [Wed, 30 Apr 2008 11:09:56 +0000 (13:09 +0200)]
avr32: Use correct condition around macb clock accessors
get_macb_pclk_rate() and get_macb_hclk_rate() should be available when
the chip has a MACB controller, not when it has a USART.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
David Brownell [Thu, 17 Apr 2008 05:57:58 +0000 (22:57 -0700)]
avr32: Disable the AP7000 internal watchdog on startup
This patch forces the watchdog off in all cases. That will at least
get rid of the constant reboot cycle, though it won't let the watchdog
actually run in the new kernels: its probe() comes up with a polite
warning.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
David Brownell [Fri, 22 Feb 2008 20:54:39 +0000 (12:54 -0800)]
avr32: stk1002 and ngw100 convergence
Make STK1002 and NGW100 boards act more alike:
- STK boards can use as many arguments as NGW
- STK boards don't need to manage FPGAs either
- NGW commands should match STK ones
Also spell U-Boot right in prompts for STK1002 and NGW100.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
[haavard.skinnemoen@atmel.com: update STK100[34] as well]
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Sergei Poselenov [Tue, 27 May 2008 11:47:00 +0000 (13:47 +0200)]
Socrates: Fix PCI bus frequency report
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
Wolfgang Denk [Tue, 27 May 2008 10:56:01 +0000 (12:56 +0200)]
Merge branch 'master' of /home/wd/git/u-boot/custodians
Conflicts:
include/configs/socrates.h
Signed-off-by: Wolfgang Denk <wd@denx.de>
Sergei Poselenov [Tue, 27 May 2008 09:49:13 +0000 (11:49 +0200)]
Socrates: Added USB support.
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
Sergei Poselenov [Tue, 27 May 2008 09:35:02 +0000 (11:35 +0200)]
USB: add new configuration variable CONFIG_PCI_OHCI_DEVNO
In case of several PCI USB controllers on a board this variable
specifys which controller to use.
See doc/README.generic_usb_ohci for details.
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
Sergei Poselenov [Tue, 27 May 2008 08:36:07 +0000 (10:36 +0200)]
Socrates: add support for DS75 Digital Thermo Sensor on I2C bus.
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
Sergei Poselenov [Mon, 26 May 2008 16:16:04 +0000 (18:16 +0200)]
Socrates: Config file cleanup.
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
Jean-Christophe PLAGNIOL-VILLARD [Sat, 24 May 2008 10:47:46 +0000 (12:47 +0200)]
MAKEALL: add at91 list
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Jean-Christophe PLAGNIOL-VILLARD [Sat, 24 May 2008 10:56:53 +0000 (12:56 +0200)]
Merging Stelian Pop AT91 patches
Merge branch 'testing-V2'
Conflicts:
board/atmel/at91cap9adk/Makefile
Fixing copyright
board/atmel/at91sam9260ek/Makefile
Fixing copyright
board/atmel/at91sam9260ek/u-boot.lds
Delete no more needed ld script
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Ron Madrid [Fri, 23 May 2008 22:37:05 +0000 (15:37 -0700)]
Add Marvell
88E1118 support for TSEC
Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Jens Gehrlein [Mon, 5 May 2008 12:06:11 +0000 (14:06 +0200)]
smc911x: add 16 bit support
Signed-off-by: Jens Gehrlein <sew_s@tqs.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Christian Eggers [Wed, 21 May 2008 20:12:00 +0000 (22:12 +0200)]
USB: replace old swap_ with proper endianess conversion macros
Signed-off-by: Christian Eggers <ceggers@gmx.de>
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
Christian Eggers [Wed, 21 May 2008 19:29:10 +0000 (21:29 +0200)]
Fix endianess conversion in usb_ohci.c
Signed-off-by: Christian Eggers <ceggers@gmx.de>
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
Sergei Poselenov [Wed, 21 May 2008 23:15:53 +0000 (01:15 +0200)]
USB: add support for multiple PCI OHCI controllers
Add new configuration variable CONFIG_PCI_OHCI_DEVNO.
In case of several PCI USB controllers on a board this variable
specifys which controller to use.
Also add USB support for sokrates board.
See doc/README.generic_usb_ohci for details.
Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
Signed-off-by: Markus Klotzbuecher <mk@denx.de>