Sagar Shrikant Kadam [Mon, 12 Aug 2019 14:57:40 +0000 (07:57 -0700)]
riscv: sifive: fu540: set serial environment variable from otp
This patch sets the serial# environment variable by reading the
board serial number from the OTP memory region.
Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Bin Meng [Thu, 8 Aug 2019 07:52:08 +0000 (00:52 -0700)]
riscv: cpu: Skip unavailable hart in the get_count() op
We should not count in hart that is marked as not available in the
device tree in riscv_cpu_get_count().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Tom Rini [Sun, 1 Sep 2019 17:33:12 +0000 (13:33 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-sh
- r8a66597 usb changes
Tom Rini [Sat, 31 Aug 2019 21:38:02 +0000 (17:38 -0400)]
Merge branch '2019-08-30-master-imports'
- Assorted bug fixes
Rasmus Villemoes [Wed, 28 Aug 2019 11:00:46 +0000 (11:00 +0000)]
Makefile: fix newline escaping for CONFIG_DEFAULT_ENV_FILE
I wanted this to be compatible with mkenvimage, including the ability
to embed newlines in variables by escaping them. But I failed to check
that it works more than once.
Fixes:
f3d8f7dd73a (Allow providing default environment from file)
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Ryan Harkin [Tue, 27 Aug 2019 10:56:49 +0000 (11:56 +0100)]
Revert "vexpress64: fvp dram: add DRAM configuration"
This reverts commit
fc04b923541d984b1544056fd3bfa8129d4e5aac where the
FVP DRAM configuration was added.
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Heinrich Schuchardt [Thu, 22 Aug 2019 19:58:26 +0000 (21:58 +0200)]
siemens: avoid out of bound access
char num[1];
sprintf(num, "%d", i);
leads to a buffer overrun.
Simplify the overly complex coding.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Heiko Schocher <hs@denx.de>
Suniel Mahesh [Thu, 29 Aug 2019 13:38:59 +0000 (19:08 +0530)]
arm: omap2: am43xx: Enable CONFIG_DM_USB
Enable CONFIG_DM_USB to remove compile warning for
am43xx based targets:
===================== WARNING ======================
This board does not use CONFIG_DM_USB. Please update
the board to use CONFIG_DM_USB before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/MIGRATION.txt for more info.
====================================================
Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
Suniel Mahesh [Tue, 27 Aug 2019 07:57:56 +0000 (13:27 +0530)]
Makefile: clean build generated SPL binary for TI AM65x
TI AM65x platforms (evm and HS) generate an SPL image
'tispl.bin*' and there is no rule for cleanup.
Added entry for cleanup in clean target.
Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
Weijie Gao [Tue, 27 Aug 2019 07:32:20 +0000 (15:32 +0800)]
configs: enable CONFIG_BLOCK_CACHE for mt7623n_bpir2
This patch enables CONFIG_BLOCK_CACHE for mt7623n_bpir2.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Weijie Gao [Tue, 27 Aug 2019 07:32:19 +0000 (15:32 +0800)]
mmc: invalidate block cache after hwpart switched successfully
eMMC device has multiple hw partitions both address from zero. However the
mmc driver lacks block cache invalidation for switch hwpart. This causes a
problem that data of current hw partition is cached before switching to
another hw partition. And the following read operation of the latter hw
partition will get wrong data when reading from the addresses that have
been cached previously.
To solve this problem, invalidate block cache after a successful
mmc_switch_part() operation.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Felix Brack <fb@ltec.ch>
Weijie Gao [Tue, 27 Aug 2019 07:32:18 +0000 (15:32 +0800)]
Revert "blk: Invalidate block cache when switching hwpart"
This reverts commit
0ebe112d09b48230ba4be833cd3504b06997d9a4.
Most block devices have only one hwpart. Multiple hwparts only found used
by eMMC devices in u-boot. The mmc driver do blk_dselect_hwpart() at the
beginning of mmc_bread() which causes block cache being invalidated too
frequently and makes block cache useless.
So it's not a good idea to put blkcache_invalidate() in the common
functions. It should be called inside mmc_select_hwpart().
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Felix Brack <fb@ltec.ch>
Stephen Warren [Tue, 27 Aug 2019 17:54:31 +0000 (11:54 -0600)]
board_f: fix noncached reservation calculation
The current code in reserve_noncached() has two issues:
1) The first update of gd->start_addr_sp always rounds down to a section
start. However, the equivalent calculation in cache.c:noncached_init()
always first rounds up to a section start, then subtracts a section size.
These two calculations differ if the initial value is already rounded to
section alignment.
2) The second update of gd->start_addr_sp subtracts exactly
CONFIG_SYS_NONCACHED_MEMORY, whereas the equivalent calculation in
cache.c:noncached_init() rounds the noncached size up to section
alignment before subtracting it. The two calculations differ if the
noncached region size is not a multiple of the MMU section size.
In practice, one/both of those issues causes a practical problem on
Jetson TX1; U-Boot triggers a synchronous abort during initialization,
likely due to overlapping use of some memory region.
This change fixes both these issues by duplicating the exact calculations
from noncached_init() into reserve_noncached().
However, this fix assumes that gd->start_addr_sp on entry to
reserve_noncached() exactly matches mem_malloc_start on entry to
noncached_init(). I haven't traced the code to see whether it absolutely
guarantees this in all (or indeed any!) cases. Consequently, I added some
comments in the hope that this condition will continue to be true.
Fixes:
5f7adb5b1c02 ("board_f: reserve noncached space below malloc area")
Cc: Vikas Manocha <vikas.manocha@st.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tom Rini [Thu, 29 Aug 2019 11:26:42 +0000 (07:26 -0400)]
Merge tag 'efi-2019-10-rc4' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for v2019.10-rc4
Enable the unit test for UEFI runtime service Exit() on x86_64.
Use as standalone UEFI binary for testing the handling of exceptions.
Tom Rini [Thu, 29 Aug 2019 11:26:13 +0000 (07:26 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx
Enable DM PCI for T2080RDB, T4240RDB, T1024RDB, T1042D4RDB, P1020RDB,
P2020RDB, P2041RDB, P3041DS, P4080DS, and MPC8548CDS
Tom Rini [Thu, 29 Aug 2019 11:25:48 +0000 (07:25 -0400)]
Merge tag 'u-boot-amlogic-
20190828' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic
- add missing g12b clock driver compatible, fixing odroid-n2 usb support
Heinrich Schuchardt [Tue, 27 Aug 2019 06:16:08 +0000 (08:16 +0200)]
efi_selftest: use standalone UEFI program for exception
To fully demonstrate crash outputs for UEFI images provide a standalone
UEFI application that tries to invoke an illegal opcode.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Wed, 21 Aug 2019 20:21:54 +0000 (22:21 +0200)]
efi_selftest: enable Exit() unit test on x86_64
Enable unit tests for StartImage() and Exit() unit tests on x86_64.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Hou Zhiqiang [Tue, 27 Aug 2019 11:05:29 +0000 (11:05 +0000)]
configs: MPC8548CDS: Enable PCIe driver
Enable the DM PCIe driver in MPC8548CDS defconfig.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:05:26 +0000 (11:05 +0000)]
powerpc: MPC8548CDS: Disable legacy PCIe driver when DM_PCI is enabled
Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:05:23 +0000 (11:05 +0000)]
MPC8548: dts: Added PCIe DT node
MPC8548 integrated a PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 1.0a, and this
patch is to add DT node for the PCIe controller.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:05:19 +0000 (11:05 +0000)]
dm: pcie_fsl: Add MPC8548 PCIe support
Add compatible string for MPC8548 PCIe.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:05:16 +0000 (11:05 +0000)]
powerpc: MPC85xxCDS: Disable legacy PCI fixup when DM_PCI is selected
Disable legacy PCI and PCIe fixup when CONFIG_DM_PCI is selected.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:05:12 +0000 (11:05 +0000)]
powerpc: MPC8548CDS: Compile legacy PCIe routines conditionally
Compile the legacy PCIe initialization routines only when
DM_PCI is not enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:05:09 +0000 (11:05 +0000)]
configs: P5040DS: Enable PCIe driver
Enable the DM PCIe driver in P5040DS defconfig.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
eviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:05:06 +0000 (11:05 +0000)]
P5040: dts: Added PCIe DT nodes
P5040 integrated 3 PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 2.0, and this
patch is to add DT node for each PCIe controller.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:05:02 +0000 (11:05 +0000)]
dm: pcie_fsl: Add P5040 PCIe support
Add compatible string for P5040 PCIe.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:04:59 +0000 (11:04 +0000)]
configs: P4080DS: Enable PCIe driver
Enable the DM PCIe driver in P4080DS defconfig.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:04:56 +0000 (11:04 +0000)]
P4080: dts: Added PCIe DT nodes
P4080 integrated 3 PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 2.0, and this
patch is to add DT node for each PCIe controller.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:04:52 +0000 (11:04 +0000)]
dm: pcie_fsl: Add P4080 PCIe support
Add compatible string for P4080 PCIe.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:04:49 +0000 (11:04 +0000)]
configs: P3041DS: Enable PCIe driver
Enable the DM PCIe driver in P3041DS defconfig.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:04:45 +0000 (11:04 +0000)]
powerpc: corenet_ds: Disable legacy PCIe driver when DM_PCI is enabled
Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:04:42 +0000 (11:04 +0000)]
P3041: dts: Added PCIe DT nodes
P3041 integrated 4 PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 2.0, and this
patch is to add DT node for each PCIe controller.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:04:39 +0000 (11:04 +0000)]
dm: pcie_fsl: Add P3041 PCIe support
Add compatible string for P3041 PCIe.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:04:35 +0000 (11:04 +0000)]
configs: P2041RDB: Enable PCIe driver
Enable the DM PCIe driver in P2041RDB defconfig.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:04:32 +0000 (11:04 +0000)]
powerpc: P2041RDB: Disable legacy PCIe driver when DM_PCI is enabled
Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:04:29 +0000 (11:04 +0000)]
P2041: dts: Added PCIe DT nodes
P2041 integrated 3 PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 2.0, and this
patch is to add DT node for each PCIe controller.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:04:25 +0000 (11:04 +0000)]
dm: pcie_fsl: Add P2041 PCIe support
Add compatible string for P2041 PCIe.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:04:22 +0000 (11:04 +0000)]
powerpc: p_corenet: Compile legacy PCIe routines conditionally
Compile the legacy PCIe initialization routines for P2041RDB,
P3041, P4080, P5020 and P5040 DS boards only when DM_PCI is
not enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:04:18 +0000 (11:04 +0000)]
configs: P2020RDB: Enable PCIe driver
Enable the DM PCIe driver in P2020RDB defconfig.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:04:15 +0000 (11:04 +0000)]
P2020: dts: Added PCIe DT nodes
P2020 integrated 3 PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 1.0a, and this
patch is to add DT node for each PCIe controller.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:04:11 +0000 (11:04 +0000)]
configs: P1020RDB: Enable PCIe driver
Enable the DM PCIe driver in P1020RDB defconfig.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:04:08 +0000 (11:04 +0000)]
powerpc: p1_p2_rdb: Disable legacy PCIe driver when DM_PCI is enabled
Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled
for P1020, P1021, P1024, P1025 and P2020 RDB boards.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:04:04 +0000 (11:04 +0000)]
P1020: dts: Added PCIe DT nodes
P1020 integrated 2 PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 1.0a, and this
patch is to add DT node for each PCIe controller.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:04:01 +0000 (11:04 +0000)]
dm: pcie_fsl: Add PCIe support for P1 and P2 series SoCs
Add compatible string for PCIe of P1020, P1021, P1024, P1025
and P2020 SoCs.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:03:58 +0000 (11:03 +0000)]
powerpc: p1_p2_rdb: Compile legacy PCIe routines conditionally
Compile the legacy PCIe initialization routines for P1020,
P1021, P1024, P1025 and P2020 RDB boards only when DM_PCI
is not enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:03:54 +0000 (11:03 +0000)]
configs: T1042D4RDB: Enable PCIe driver
Enable the DM PCIe driver in T1042D4RDB defconfig.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:03:51 +0000 (11:03 +0000)]
powerpc: T104xRDB: Disable legacy PCIe driver when DM_PCI is enabled
Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:03:47 +0000 (11:03 +0000)]
t104x: dts: Added PCIe DT nodes
T104x integrated 4 PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 2.0, and this
patch is to add DT node for each PCIe controller.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:03:44 +0000 (11:03 +0000)]
dm: pcie_fsl: Add T104x PCIe support
Add compatible string for T104x PCIe.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:03:41 +0000 (11:03 +0000)]
powerpc: T104xRDB: Compile legacy PCIe routines conditionally
Compile the legacy PCIe initialization routines only when
DM_PCI is not enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:03:37 +0000 (11:03 +0000)]
configs: T1024RDB: Enable PCIe driver
Enable the DM PCIe driver in T1024RDB defconfig.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:03:34 +0000 (11:03 +0000)]
powerpc: T102xRDB: Disable legacy PCIe driver when DM_PCI is enabled
Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:03:30 +0000 (11:03 +0000)]
powerpc: T102xRDB: Remove the useless macro CONFIG_ARCH_T1040
Remove the macro CONFIG_ARCH_T1040 from the T102xRDB.h and
the PCIE4 related macros, as there are only 3 PCIe controllers
on T102x SoCs.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:03:27 +0000 (11:03 +0000)]
t102x: dts: Added PCIe DT nodes
T102x integrated 3 PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 2.0, and this
patch is to add DT node for each PCIe controller.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:03:24 +0000 (11:03 +0000)]
dm: pcie_fsl: Add T102x PCIe support
Add compatible string for T102x PCIe.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:03:20 +0000 (11:03 +0000)]
powerpc: T102xRDB: Compile legacy PCIe routines conditionally
Compile the legacy PCIe initialization routines only when
DM_PCI is not enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:03:16 +0000 (11:03 +0000)]
configs: T4240RDB: Enable PCIe driver
Enable the DM PCIe driver in T4240RDB defconfig.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:03:13 +0000 (11:03 +0000)]
powerpc: T4240RDB: Disable legacy PCIe driver when DM_PCI is enabled
Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:03:10 +0000 (11:03 +0000)]
t4240: dts: Added PCIe DT nodes
T4240 integrated 4 PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 3.0, and this
patch is to add DT node for each PCIe controller.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:03:06 +0000 (11:03 +0000)]
dm: pcie_fsl: Add T4240 PCIe support
Add compatible string for T4240 PCIe.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:03:03 +0000 (11:03 +0000)]
powerpc: T4RDB: Compile legacy PCIe routines conditionally
Compile the legacy PCIe initialization routines only when
DM_PCI is not enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:02:59 +0000 (11:02 +0000)]
configs: T2080RDB: Enable PCIe driver
Enable the DM PCIe driver in T2080RDB defconfig.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:02:56 +0000 (11:02 +0000)]
powerpc: T208xRDB: Disable legacy PCIe driver when DM_PCI is enabled
Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 11:02:52 +0000 (11:02 +0000)]
powerpc: T208xRDB: Compile legacy PCIe routines conditionally
Compile the legacy PCIe initialization routines only when
DM_PCI is not enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 10:13:54 +0000 (10:13 +0000)]
dm: pcie_fsl: Fix the calculation of controller index
The PCIe controller register address in CCSR is different
on various platforms, the current code erroneously use
the hardcoded address (0xffe240000) and stride (0x10000)
to calculate the controller's index.
Fix it by adding the related info to the driver data
structure.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 10:13:51 +0000 (10:13 +0000)]
dm: pcie_fsl: Fix the Class Code fixup function
The Class Code fixup method was changed from PCIe block
revision 3.0, the current fixup is only valid for the
revision 3.0 and the later ones.
So add the Class Code fixup for the block revision < 3.0.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Hou Zhiqiang [Tue, 27 Aug 2019 10:13:48 +0000 (10:13 +0000)]
dm: pcie_fsl: Convert IS_ENABLED() run-time checking to #ifdef
This can avoid build error:
The macro in brackets of the IS_ENABLED(CONFIG_FOO) is only
defined on the platforms that select the CONFIG_FOO, while
it's not defined on platforms that do not select the
CONFIG_FOO.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Mark Kettenis [Tue, 27 Aug 2019 21:06:28 +0000 (23:06 +0200)]
clk: meson-g12b: add compatible
The G12B clock controller is almost identical to the G12A and
so far the differences don't matter. Adding the G12B compatible
makes USB work on the Odroid-N2.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tom Rini [Tue, 27 Aug 2019 17:19:47 +0000 (13:19 -0400)]
Merge branch 'u-boot-stm32_20190827' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- Fixes and update related to STM32MP1 platforms
Tom Rini [Tue, 27 Aug 2019 11:11:37 +0000 (07:11 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx
Support of device tree model for T2080RDB, T4240RDB, T1024RDB,
T1042D4RDB, P1020RDB, P2020RDB, P2041RDB, P3041DS, P4080DS, P5040DS and
MPC8548CDS. Also support of i2c dm model.
Tom Rini [Tue, 27 Aug 2019 11:09:10 +0000 (07:09 -0400)]
Merge tag 'for-v2019.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-i2c
i2c bugfixes for 2019.10
- misc: i2c_eeprom: verify that the chip is functional at probe()
- i2c: mxc_i2c: Remove i2c_idle_bus from probe
- i2c-mux-gpio: Fix GPIO request flag issue
Patrick Delaunay [Fri, 2 Aug 2019 13:07:22 +0000 (15:07 +0200)]
stm32mp1: update README for remoteproc support
Add information for remoteproc usage to load firmware in M4 coprocessor
on stm32mp157.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Fri, 2 Aug 2019 13:07:21 +0000 (15:07 +0200)]
stm32mp1: add example files for FIT generation
Add example of its files to generate FIT to start kernel
on ev1 or dk2 board with
- only kernel and dtb = fit_copro_kernel_dtb.its
- kernel, M4 copro firmware and dtb = it_copro_kernel_dtb.its
Add extlinux example to manage config in generated FIT.
Signed-off-by: Loic Pallardy <loic.pallardy@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Fri, 2 Aug 2019 13:07:20 +0000 (15:07 +0200)]
stm32mp1: Add copro image support for M4 firmware
Implements copro image loading with FIT.
Once image is loaded with remoteproc,
the M4 coprocessor is automatically started.
Signed-off-by: Loic Pallardy <loic.pallardy@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Fri, 2 Aug 2019 13:07:19 +0000 (15:07 +0200)]
image: add new "copro" image type
Define new image type for coprocessor images.
It is used in FIT to identify the files loaded
with remoteproc command (elf or bin).
Signed-off-by: Loic Pallardy <loic.pallardy@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrick Delaunay [Fri, 2 Aug 2019 13:07:18 +0000 (15:07 +0200)]
stm32mp1: Add remoteproc support for m4 coprocessor
Alignment with kernel patch proposal for binding:
[PATCH v4 0/8] stm32 m4 remoteproc on STM32MP157c
https://lkml.org/lkml/2019/5/14/159
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Fri, 2 Aug 2019 11:08:08 +0000 (13:08 +0200)]
misc: change RCC form MISC to NOP uclass
The RCC driver have no operation so the new NOP uclass
is more appropriate. It only used as parent for clock and reset driver.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Fri, 2 Aug 2019 11:08:07 +0000 (13:08 +0200)]
stm32mp1: board update command stboard on misc_read result
Update management of misc_read, which now return length of data
after the commit
8729b1ae2cbd ("misc: Update read() and write()
methods to return bytes xfered")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Fri, 2 Aug 2019 11:08:06 +0000 (13:08 +0200)]
stm32mp1: update sysconf_init on misc_read result
Update management of misc_read in sysconf_init, which now return
length of data after the commit
8729b1ae2cbd ("misc: Update read()
and write() methods to return bytes xfered")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Fri, 2 Aug 2019 11:08:05 +0000 (13:08 +0200)]
stm32mp1: update test on misc_read result
Update the stm32mp1 baord after the commit
8729b1ae2cbd
("misc: Update read() and write() methods to return bytes xfered")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Fri, 2 Aug 2019 11:08:04 +0000 (13:08 +0200)]
stpmic1: simplify stpmic1_sysreset_request
Retrieve parent device from dev->parent instead of
calling uclass_get_device_by_driver()
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Fri, 2 Aug 2019 11:08:03 +0000 (13:08 +0200)]
pmu: stpmic1: change specific NVM api to MISC
Use MISC u-class to export the NVM register (starting at 0xF8 offset)
and avoid specific API.
- SHADOW have offset < 0.
- NVM have register > 0
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Fri, 2 Aug 2019 11:08:02 +0000 (13:08 +0200)]
bsec: update after MISC u-class update
Since the commit
8729b1ae2cbd ("misc: Update read() and
write() methods to return bytes xfered"); The misc bsec driver
need to be adapted to reflect the number of transferred bytes.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Tue, 30 Jul 2019 17:16:56 +0000 (19:16 +0200)]
MAINTAINERS: update ARM STM STM32MP and STM32MP1 BOARD
Add the missing driver and files for mach-stm32mp / stm32mp1 product.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Tue, 30 Jul 2019 17:16:55 +0000 (19:16 +0200)]
stm32mp1: clk: use gd to store frequency information
Use existing gd structure to store frequency information
which can be used in drivers or arch without new request.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Tue, 30 Jul 2019 17:16:54 +0000 (19:16 +0200)]
stm32mp1: clk: remove debug traces
Remove many debug trace.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Tue, 30 Jul 2019 17:16:53 +0000 (19:16 +0200)]
stm32mp1: Makefile cleanup
Don't compile psci for SPL build.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Tue, 30 Jul 2019 17:16:52 +0000 (19:16 +0200)]
stm32mp1: ram: add pattern parameter in infinite write test
Add pattern for infinite test_read and test_write, that
allow to change the pattern to test without recompilation;
default pattern is 0xA5A5AA55.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Tue, 30 Jul 2019 17:16:51 +0000 (19:16 +0200)]
stm32mp1: ram: reload watchdog during ddr test
Avoid watchdog during infinite DDR test.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Tue, 30 Jul 2019 17:16:50 +0000 (19:16 +0200)]
stm32mp1: ram: update loop management in infinite test
Reduce verbosity of the infinite tests to avoid CubeMX issue.
test and display loop by 1024*1024 accesses: read or write.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Tue, 30 Jul 2019 17:16:49 +0000 (19:16 +0200)]
stm32mp1: ram: fix address issue in 2 tests
If user choose to test memory size is 1GByte (0x40000000),
memory address would overflow in test "Random" and
test "FrequencySelectivePattern".
Thus the system would hangs up when running DDR test.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Bossen WU <bossen.wu@st.com>
Patrick Delaunay [Tue, 30 Jul 2019 17:16:48 +0000 (19:16 +0200)]
stm32mp1: ram: cosmetic: remove unused prototype
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Tue, 30 Jul 2019 17:16:47 +0000 (19:16 +0200)]
serial: stm32: remove unused include
The "serial_stm32.h" is only used by drivers/serial/serial_stm32.c
and it is the file ./drivers/serial/serial_stm32.h
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Tue, 30 Jul 2019 17:16:46 +0000 (19:16 +0200)]
serial: stm32: add Framing error support
Add management of Bit 1 of USART_ISR = FE: Framing error
This bit is set by hardware when a de-synchronization, excessive noise
or a break character is detected. It is cleared by software, writing 1
to the FECF bit in the USART_ICR register (for stm32 after f4).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Christophe Kerello [Tue, 30 Jul 2019 17:16:45 +0000 (19:16 +0200)]
mmc: stm32_sdmmc2: reload watchdog
This patch solves a watchdog reset issue during mmc erase command.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Tue, 30 Jul 2019 17:16:44 +0000 (19:16 +0200)]
stm32mp1: board: cosmetic: cleanup file
- reorder include files
- remove one comment
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Tue, 30 Jul 2019 17:16:43 +0000 (19:16 +0200)]
stm32mp1: board: remove board_check_usb_power when ADC is not activated
Avoid compilation issue when CONFIG_ADC is not activated
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Tue, 30 Jul 2019 17:16:42 +0000 (19:16 +0200)]
stm32mp1: board: Update the way vdd-supply is retrieved from DT
Due to kernel DT alignment, pwr-supply is renamed to vdd-supply
and is a subnode of pwr-regulators.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Tue, 30 Jul 2019 17:16:41 +0000 (19:16 +0200)]
stm32mp1: board: check the boot-source to disable bootdelay
Allows to avoid to wait 2 second in U-Boot before to
start STM32CubeProgrammer command.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>