Dirk Eibach [Wed, 11 Jan 2017 15:00:46 +0000 (16:00 +0100)]
net: phy: Support Marvell
88E1680
Add support for Marvell
88E1680 Integrated Octal
10/100/1000 Mbps Energy Efficient Ethernet Transceiver.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Dirk Eibach [Wed, 11 Jan 2017 15:00:45 +0000 (16:00 +0100)]
pci: mvebu: Fix Armada 38x support
Armada 38x has four PCI ports, not three.
The optimization in pci_init_board() seems to assume that every port has
three lanes. This is obviously wrong, and breaks support for Armada 38x.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Thu, 12 Jan 2017 15:37:49 +0000 (16:37 +0100)]
phy: comphy_a3700: Change SD/MMC compatible DT node to match the updates
Now that the SD/SDIO/MMC DT properties are updated in the Marvell
A3700 and A7/8k DT files, we need to match the checks for compatible
node in the PHY driver as well.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Tom Rini [Tue, 31 Jan 2017 00:05:23 +0000 (19:05 -0500)]
Prepare v2017.03-rc1
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sun, 29 Jan 2017 13:01:06 +0000 (08:01 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-uniphier
- Fix clk driver
- Optimize DRAM init code for LD20 SoC
- Get DRAM information from more reliable source
- Clean up SoC init code
- Allow to use Image.gz for booting ARM64 Linux
- Tidy up environments to use with ATF
- Clean up I2C drivers
Masahiro Yamada [Fri, 27 Jan 2017 21:53:56 +0000 (06:53 +0900)]
i2c: uniphier-f: use readl_poll_timeout() to poll registers
The readl_poll_timeout() is a useful helper to poll registers
and error out if the condition is not met.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:55 +0000 (06:53 +0900)]
i2c: uniphier(-f): remove unneeded #include <dm/root.h>
This include is unnecessary for low-level drivers.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:54 +0000 (06:53 +0900)]
ARM: uniphier: make update commands more flexible for ATF
Currently, SPL (u-boot-spl.bin) and U-Boot (u-boot.bin) are stored
in non-volatile devices, and some environments are defined to update
the images easily.
When ARM Trusted Firmware is fully used, SPL is not used. U-Boot
proper is contained as BL33 into FIP (Firmware Image Package), which
is standard container used by ATF. Allow to use it.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:53 +0000 (06:53 +0900)]
ARM: uniphier: change CONFIG_SPL_PAD_TO to 128KB
The Boot ROM supports authentication feature to prevent malformed
software from being run on products. The signature is added at the
tail of the second stage loader (= SPL in U-boot terminology).
The size of the second stage loader was 64KB, and it was consistent
across SoCs. The situation changed when LD20 SoC appeared; it loads
80KB second stage loader, and it is the only exception.
Currently, CONFIG_SPL_PAD_TO is set to 64KB and U-Boot proper is
loaded from the 64KB offset of non-volatile devices. This means the
signature of LD20 SoC (located at 80KB offset) corrupts the U-Boot
proper image.
Let's move the U-Boot proper image to 128KB offset. It uses 48KB
for nothing but padding, and we could actually locate the U-Boot
proper at 80KB offset. However, the power of 2 generally seems a
better choice for the offset address.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:52 +0000 (06:53 +0900)]
ARM: uniphier: change the offset to environment storage area
When ARM Trusted Firmware is used, bl1.bin + fip.bin exceeds 512KB,
so the boot image and the current environment area will overlap.
Move the environment storage to 1MB offset.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:51 +0000 (06:53 +0900)]
ARM: uniphier: set initrd_high environment to skip initrd relocation
The boot_ramdisk_high() checks the environment "initrd_high" and,
if it is set to (ulong)-1, skip the initrd relocation. This is
useful for faster booting when we know the initrd is already located
within the reach of the kernel.
Change "norboot" to copy images in order to make it work without
depending on the automatic relocation.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:50 +0000 (06:53 +0900)]
ARM: uniphier: use Image.gz instead Image for booting ARM64 Linux
The ARM64 Linux raw image now amounts to 15MB and it is getting
bigger and bigger. Using Image.gz saves about 8MB. The cost of
unzip is smaller than what we get by saving the kernel loading
from non-volatile devices.
The ARM32 Linux still uses zImage, a self-decompressor image,
so it should not be affected.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:49 +0000 (06:53 +0900)]
ARM: uniphier: collect SPL CONFIG symbols to the bottom of header
For clarification, move CONFIG symbols that affect SPL building
into a single place. Drop #ifdef CONFIG_SPL ... #endif since it is
harmless to define CONFIG_SPL_... during U-Boot proper building.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:48 +0000 (06:53 +0900)]
ARM: uniphier: compile board data only for SPL
Now U-Boot proper need not get the uniphier_boards array. Compile
it only for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:47 +0000 (06:53 +0900)]
ARM: uniphier: refactor cmd_ddrmphy
Make it look like cmd_ddrphy.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:46 +0000 (06:53 +0900)]
ARM: uniphier: clean up UMC init for PXs2 SoC
Just cosmetic changes:
- Rename prefix DMPHY_ to MPHY_ for consistency
- Move UMC parameters below for complete decouple of PHY and UMC
- Remove redundant whitespaces
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:45 +0000 (06:53 +0900)]
ARM: uniphier: refactor cmd_ddrphy
It seems more readable to use arrays to get SoC specific parameters
instead of the crappy switch statement.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:44 +0000 (06:53 +0900)]
ARM: uniphier: use gd->bd->bi_dram for memory reserve on LD20 SoC
For LD20 SoC, the last 64 byte of each DRAM bank is used for the
dynamic training of DRAM PHY. The regions must be reserved in DT to
prevent the kernel from using them. Now gd->bd->bi_dram reflects
the actual memory banks. Just use it instead of getting access to
the board parameters.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:43 +0000 (06:53 +0900)]
ARM: uniphier: detect RAM size by decoding HW register instead of DT
U-Boot needs to set up available memory area(s) in dram_init() and
dram_init_banksize(). It is platform-dependent how to detect the
memory banks. Currently, UniPhier adopts the memory banks _alleged_
by DT. This is based on the assumption that users bind a correct DT
in their build process.
Come to think of it, the DRAM controller has already been set up
before U-Boot is entered (because U-Boot runs on DRAM). So, the
DRAM controller setup register seems a more reliable source of any
information about DRAM stuff. The DRAM banks are initialized by
preliminary firmware (SPL, ARM Trusted Firmware BL2, or whatever),
so this means the source of the reliability is shifted from Device
Tree to such early-stage firmware. However, if the DRAM controller
is wrongly configured, the system will crash. If your system is
running, the DRAM setup register is very likely to provide the
correct DRAM mapping.
Decode the SG_MEMCONF register to get the available DRAM banks.
The dram_init() and dram_init_banksize() need similar decoding.
It would be nice if dram_init_banksize() could reuse the outcome
of dram_init(), but global variables are unavailable at this stage
because the .bss section is available only after the relocation.
As a result, SG_MEMCONF must be checked twice, but a new helper
uniphier_memconf_decode() will help to avoid code duplication.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:42 +0000 (06:53 +0900)]
ARM: uniphier: shrink arrays of DDR-PHY parameters for LD20 SoC
The two arrays ddrphy_{op,ip}_dq_shift_val, occupy more than 3.8 KB
memory footprint, which is significant in SPL.
There are PHY parameters for 5 boards, but they are actually not
board specific, but SoC specific. After all, we just need to have
2 patterns, for LD20 and LD21. Also, the shift values are small
enough to become "short" type instead of "int". This change will
save about 3 KB memory footprint.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:41 +0000 (06:53 +0900)]
clk: uniphier: fix compatible strings for Pro5, PXs2, LD20 SD clock
I missed to update them when DT files were resynced with Linux.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Scott Wood [Thu, 26 Jan 2017 22:55:44 +0000 (16:55 -0600)]
booti: Set images.os.arch
Commit
ec6617c39741adc6c549 ("armv8: Support loading 32-bit OS in AArch32
execution state") broke SMP boot by assuming that an image is 32-bit if
the arch field in the spin table != IH_ARCH_DEFAULT (i.e.
IH_ARCH_ARM64), even if the arch field also does not match IH_ARCH_ARM,
even though nothing actually set the arch field in the spin table.
Commit
e2c18e40b111470f ("armv8: fsl-layerscape: SMP support for loading
32-bit OS") fixed this for bootm by setting the arch field of the spin
table based on images.os.arch, but booti remaineed broken because it did
not set images.os.arch.
Fixes:
ec6617c39741adc6c549 ("armv8: Support loading 32-bit OS in AArch32 execution state")
Fixes:
e2c18e40b111 ("armv8: fsl-layerscape: SMP support for loading 32-bit OS")
Cc: Alison Wang <alison.wang@nxp.com>
Cc: Chenhui Zhao <chenhui.zhao@nxp.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Stuart Yoder <stuart.yoder@nxp.com>
Signed-off-by: Scott Wood <oss@buserror.net>
Reviewed-by: Tom Rini <trini@konsulko.com>
Stefan Brüns [Thu, 26 Jan 2017 20:22:36 +0000 (20:22 +0000)]
fs/fat: Fix unaligned __u16 reads for FAT12 access
Doing unaligned reads is not supported on all architectures, use
byte sized reads of the little endian buffer.
Rename off16 to off8, as it reflects the buffer offset in byte
granularity (offset is in entry, i.e. 12 bit, granularity).
Fix a regression introduced in
8d48c92b45aea91e2a2be90f2ed93677e85526f1
Reported-by: Oleksandr Tymoshenko <gonzo@bluezbox.com>
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Tested-by: Oleksandr Tymoshenko <gonzo@bluezbox.com>
Alexey Brodkin [Thu, 26 Jan 2017 14:25:59 +0000 (17:25 +0300)]
buildman: Update link to the most recent prebuilt ARC toolachin
To troubleshoot unexpected bhavior during building and what's more
important during execution it is strongly recommended to use recent
ARC toolchain, and so we're now referring to arc-2016.09 which is the
latest as of today.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Michael Kurz [Sun, 22 Jan 2017 15:04:30 +0000 (16:04 +0100)]
ARM: SPI: stm32: add stm32f746 qspi driver
This patch adds support for the QSPI IP found in stm32f7 devices.
Signed-off-by: Michael Kurz <michi.kurz@gmail.com>
Michael Kurz [Sun, 22 Jan 2017 15:04:29 +0000 (16:04 +0100)]
ARM: stm32: enable support for smsc phy on stm32f746-disco board
This patch enables support for the smsc phy on the
stm32f746-disco board.
Signed-off-by: Michael Kurz <michi.kurz@gmail.com>
Acked-by: Vikas MANOCHA <vikas.manocha@st.com>
Series-changes 3:
- Add Acked-by tag to 'enable support for smsc phy on...'
Michael Kurz [Sun, 22 Jan 2017 15:04:28 +0000 (16:04 +0100)]
net: phy: add SMSC LAN8742 phy
This patch adds support for SMSC LAN8742 in phylib
Signed-off-by: Michael Kurz <michi.kurz@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Michael Kurz [Sun, 22 Jan 2017 15:04:27 +0000 (16:04 +0100)]
net: stm32: add designware mac glue code for stm32
This patch adds glue code required for enabling the designware
mac on stm32f7 devices.
Signed-off-by: Michael Kurz <michi.kurz@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Michael Kurz [Sun, 22 Jan 2017 15:04:26 +0000 (16:04 +0100)]
ARM: stm32: use clock setup function defined in clock.c
Use the clock setup function defined in clock.c instead of setting the
clock bits directly in the drivers.
Remove register definitions of RCC in rcc.h as these are already
defined in the struct in stm32.h
Signed-off-by: Michael Kurz <michi.kurz@gmail.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
Michael Kurz [Sun, 22 Jan 2017 15:04:25 +0000 (16:04 +0100)]
ARM: stm32: fix stm32f7 sdram fmc base address
The fmc base address is defined twice, once in fmc.h and once in stm32.h.
Fix wrong definition in stm32.h.
Remove the definiton in fmc.h.
Signed-off-by: Michael Kurz <michi.kurz@gmail.com>
Acked-by: Vikas Manocha <vikas.manocha@st.com>
Michael Kurz [Sun, 22 Jan 2017 15:04:24 +0000 (16:04 +0100)]
ARM: stm32: cleanup stm32f7 files
Cleanup stm32f7 files:
- use BIT macro
- use GENMASK macro
- use rcc struct instead of macro additions
Add missing stm32f7 register in rcc struct
Signed-off-by: Michael Kurz <michi.kurz@gmail.com>
Acked-by: Vikas MANOCHA<vikas.manocha@st.com>
Michael Kurz [Sun, 22 Jan 2017 15:04:23 +0000 (16:04 +0100)]
ARM: DTS: stm32: add stm32f746-disco device tree files
This patch adds the DTS source files needed for stm32f746-disco board
The files are based on the stm32f429/469 files from current linux
kernel.
Source for "arch/arm/dts/armv7-m.dtsi": Linux: "arch/arm/boot/dts/armv7-m.dtsi"
Signed-off-by: Michael Kurz <michi.kurz@gmail.com>
Acked-by: Vikas MANOCHA <vikas.manocha@st.com>
Michael Kurz [Sun, 22 Jan 2017 15:04:22 +0000 (16:04 +0100)]
ARM: DTS: stm32: add stm32f746 device tree pin control files
This patch adds pin control definitions for use in device tree files
The definitions are based on the stm32f746 files from current
linux kernel "include/dt-bindings/pinctrl/stm32f746-pinfunc.h".
Signed-off-by: Michael Kurz <michi.kurz@gmail.com>
Acked-by: Vikas MANOCHA <vikas.manocha@st.com>
Adam Ford [Fri, 20 Jan 2017 13:03:52 +0000 (14:03 +0100)]
arm: omap3: Update cpuinfo for DM3730, DM3725, AM3715, and AM3703
The check for OMAP3630/3730 only checks for 800MHz 3630/3730, but
anything else is lumped into 36XX/37XX with an assumed 1GHz speed.
Based on the DM3730 TRM bit 9 shows the MPU Frequency (800MHz/1GHZ).
This also adds the ability to distinguish between the DM3730, DM3725,
AM3715, and AM3703 and correctly display their maximum speed.
Signed-off-by: Adam Ford <aford173@gmail.com>
Tested-by: Ladislav Michl <ladis@linux-mips.org>
Ladislav Michl [Fri, 20 Jan 2017 13:03:15 +0000 (14:03 +0100)]
arm: omap3: Fix cpuinfo frequency spelling
Frequency is measured in Hz.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Masahiro Yamada [Fri, 20 Jan 2017 09:30:58 +0000 (18:30 +0900)]
Revert "armv8: release slave cores from CPU_RELEASE_ADDR"
This reverts commit
8c36e99f211104fd7dcbf0669a35a47ce5e154f5.
There is misunderstanding in commit
8c36e99f2111 ("armv8: release
slave cores from CPU_RELEASE_ADDR"). How to bring the slave cores
into U-Boot proper is platform-specific. So, it should be cared
in SoC/board files instead of common/spl/spl.c. As you see SPL
is the acronym of Secondary Program Loader, there is generally
something that runs before SPL (the First one is usually Boot ROM).
How to wake up slave cores from the Boot ROM is really SoC specific.
So, the intention for the spin table support is to bring the slave
cores into U-Boot proper in an SoC specific manner. (this must be
done after relocation. see below.)
If you bring the slaves into SPL, it is SoC own code responsibility
to transfer them to U-Boot proper. The Spin Table defines the
interface between a boot-loader and Linux kernel. It is unrelated
to the interface between SPL and U-Boot proper.
One more thing is missing in the commit; spl_image->entry_point
points to the entry address of U-Boot *before* relocation. U-Boot
relocates itself between board_init_f() and board_init_r(). This
means the master CPU sees the different copy of the spin code than
the slave CPUs enter. The spin_table_update_dt() protects the code
*after* relocation. As a result, the slave CPUs spin in unprotected
code, which leads to unstable behavior.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Fri, 20 Jan 2017 09:04:43 +0000 (18:04 +0900)]
arm64: spin-table: add more information in Kconfig help
This feature seems to be sometimes misunderstood. The intention is:
[1] Bring the slaves into the U-Boot proper image, not SPL (unless
you have a special reason to do otherwise).
[2] The operation must be done in a board (SoC) specific manner
since how to wake the slaves from the Boot ROM is SoC specific.
[3] The slaves must enter U-Boot proper after U-Boot relocates
itself because the "cpu-release-addr" property points to the
relocated memory area.
[2] is already explained in the help. We can make [1] even clearer
by mentioning "U-Boot proper" instead of "U-Boot". [3] is missing,
so I am adding it to the list. Instead, "before the master CPU
jumps to the kernel" is a matter of course, so removed.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Marcin Niestroj [Wed, 25 Jan 2017 08:53:08 +0000 (09:53 +0100)]
board/chiliboard: Add support for chiliBoard
chiliBoard is a development board which uses chiliSOM as its base.
Hardware specification:
* chiliSOM (TI AM335x, DRAM, NAND)
* Ethernet PHY (id 0)
* USB host (usb1)
* MicroSD slot (mmc0)
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Marcin Niestroj [Wed, 25 Jan 2017 08:53:07 +0000 (09:53 +0100)]
ARM: am335x: Add support for chiliSOM
chiliSOM is a System On Module (http://http://grinn-global.com/chilisom/).
It can't exists on its own, but will be used as part of other boards.
Hardware specification:
* TI AM335x processor
* 128M, 256M or 512M DDR3 memory
* up to 256M NAND
We place source inside arch/arm/mach-omap2/ directory and make it
possible to reuse initialization code (i.e. DDR, NAND init) for all
boards that use it.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Andrew F. Davis [Fri, 27 Jan 2017 16:39:20 +0000 (10:39 -0600)]
defconfig: Add a config for AM335x High Security EVM
Add a new defconfig file for the AM335x High Security EVM. This config
is specific for the case of memory device booting. Memory device booting
is handled separatly from peripheral booting on HS devices as the load
address changes.
This defconfig is the same as for the non-secure part, except for:
CONFIG_TI_SECURE_DEVICE option set to 'y'
CONFIG_ISW_ENTRY_ADDR updated for secure images.
CONFIG_FIT_IMAGE_POST_PROCESS option set to 'y'
CONFIG_SPL_FIT_IMAGE_POST_PROCESS option set to 'y'
CONFIG_USE_TINY_PRINTF option set to 'y' to reduce SPL size
CONFIG_SPL_SYS_MALLOC_SIMPLE set to 'y' to reduce SPL size
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Andrew F. Davis [Fri, 27 Jan 2017 16:39:19 +0000 (10:39 -0600)]
spl: Remove overwrite of relocated malloc limit
spl_init on some boards is called after stack and heap relocation, on
some platforms spl_relocate_stack_gd is called to handle setting the
limit to its value CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN when simple
SPL malloc is enabled during relocation. spl_init should then not
re-assign the old pre-relocation limit when this is defined.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Andrew F. Davis [Fri, 27 Jan 2017 16:39:18 +0000 (10:39 -0600)]
malloc_simple: Add debug statements to memalign_simple
Add debug statements to memalign_simple to match malloc_simple.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
maxims@google.com [Wed, 18 Jan 2017 21:44:58 +0000 (13:44 -0800)]
aspeed: Support for ast2500 Eval Board
ast2500 Eval Board device tree and board specific configuration.
Reviewed-by: Simon Glass <sjg@chromium.org>
maxims@google.com [Wed, 18 Jan 2017 21:44:57 +0000 (13:44 -0800)]
aspeed: Board init functions and common configs for ast2500 based boards
Add configuration file with parameters that are very likely to be shared by
all ast2500-based boards.
Add ast2500-board.c file with the init code that is very likely to be
shared by all ast2500-based boards.
Reviewed-by: Simon Glass <sjg@chromium.org>
maxims@google.com [Wed, 18 Jan 2017 21:44:56 +0000 (13:44 -0800)]
aspeed: Add basic ast2500-specific drivers and configuration
Clock Driver
This driver is ast2500-specific and is not compatible with earlier
versions of this chip. The differences are not that big, but they are
in somewhat random places, so making it compatible with ast2400 is not
worth the effort at the moment.
SDRAM MC driver
The driver is very ast2500-specific and is completely incompatible
with previous versions of the chip.
The memory controller is very poorly documented by Aspeed in the
datasheet, with any mention of the whole range of registers missing. The
initialization procedure has been basically taken from Aspeed SDK, where
it is implemented in assembly. Here it is rewritten in C, with very limited
understanding of what exactly it is doing.
Reviewed-by: Simon Glass <sjg@chromium.org>
maxims@google.com [Wed, 18 Jan 2017 21:44:55 +0000 (13:44 -0800)]
aspeed: Add drivers common to all Aspeed SoCs
Add support for Watchdog Timer, which is compatible with AST2400 and
AST2500 watchdogs. There is no uclass for Watchdog yet, so the driver
does not follow the driver model. It also uses fixed clock, so no clock
driver is needed.
Add support for timer for Aspeed ast2400/ast2500 devices.
The driver actually controls several devices, but because all devices
share the same Control Register, it is somewhat difficult to completely
decouple them. Since only one timer is needed at the moment, this should
be OK. The timer uses fixed clock, so does not rely on a clock driver.
Add sysreset driver, which uses watchdog timer to do resets and particular
watchdog device to use is hardcoded (0)
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Thu, 26 Jan 2017 01:42:38 +0000 (20:42 -0500)]
arm: Note vendor-required status of certain MACH_TYPE values
In the cases of some boards, a MACH_TYPE number is used which is either
not registered upstream or worse (for functionality) is re-using the
number of a different (or reference) platform instead. Make sure we
have a comment in these cases.
Cc: Albert ARIBAUD <albert.aribaud@3adev.fr>
Cc: Walter Schweizer <swwa@users.sourceforge.net>
Cc: Stefan Roese <sr@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Stefan Roese <sr@denx.de>
Tom Rini [Thu, 26 Jan 2017 01:42:37 +0000 (20:42 -0500)]
am335x_shc: Drop MACH_TYPE usage
This board is using MACH_TYPE values that were clearly picked during
development and not registered. Remove rather than support.
Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 26 Jan 2017 01:42:36 +0000 (20:42 -0500)]
arm: Clean up MACH_TYPE_xxx usage after re-sync of mach-types
With the latest mach-types values we have many instances where we no
longer need to define a value and a few cases where the name (but not
value) have changed slightly.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 26 Jan 2017 01:42:35 +0000 (20:42 -0500)]
Revert "arm: Remove unregister MACH_TYPE_xxx uses"
This reverts commit
70b26cd057f42c7126088b49d4285955c8a00eae.
This is not a strict revert as it is easier to fix
board/atmark-techno/armadillo-800eva/armadillo-800eva.c to now the
correct name (same value) than to revert that change too.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 26 Jan 2017 01:42:34 +0000 (20:42 -0500)]
arm: Re-sync with full list of MACH_TYPE_xxx values
This re-syncs us with the official and full list of MACH_TYPE_xxx values
from http://www.armlinux.org.uk/developer/machines/
Signed-off-by: Tom Rini <trini@konsulko.com>
Patrick Delaunay [Fri, 27 Jan 2017 10:00:43 +0000 (11:00 +0100)]
disk: convert CONFIG_PARTITION_TYPE_GUID to Kconfig
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
Patrick Delaunay [Fri, 27 Jan 2017 10:00:42 +0000 (11:00 +0100)]
cmd, disk: convert CONFIG_PARTITION_UUIDS, CMD_PART and CMD_GPT
We convert CONFIG_PARTITION_UUIDS to Kconfig first. But in order to cleanly
update all of the config files we must also update CMD_PART and CMD_GPT to also
be in Kconfig in order to avoid complex logic elsewhere to update all of the
config files.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Patrick Delaunay [Fri, 27 Jan 2017 10:00:40 +0000 (11:00 +0100)]
kbuild: add include linux/kconfig.h in config.h
Allow to use define CONFIG_IS_ENABLED
in include/config_fallbacks.h
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
Patrick Delaunay [Fri, 27 Jan 2017 10:00:41 +0000 (11:00 +0100)]
disk: convert CONFIG_EFI_PARTITION to Kconfig
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
Patrick Delaunay [Fri, 27 Jan 2017 10:00:39 +0000 (11:00 +0100)]
disk: convert CONFIG_AMIGA_PARTITION to Kconfig
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
Patrick Delaunay [Fri, 27 Jan 2017 10:00:38 +0000 (11:00 +0100)]
disk: convert CONFIG_ISO_PARTITION to Kconfig
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
Patrick Delaunay [Fri, 27 Jan 2017 10:00:37 +0000 (11:00 +0100)]
disk: convert CONFIG_DOS_PARTITION to Kconfig
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
Patrick Delaunay [Fri, 27 Jan 2017 10:00:36 +0000 (11:00 +0100)]
disk: convert CONFIG_MAC_PARTITION to Kconfig
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
Patrick Delaunay [Fri, 27 Jan 2017 10:00:35 +0000 (11:00 +0100)]
disk: convert CONFIG_PARTITIONS to Kconfig
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>
Tom Rini [Thu, 26 Jan 2017 17:26:24 +0000 (12:26 -0500)]
Merge git://www.denx.de/git/u-boot-marvell
Ladislav Michl [Thu, 19 Jan 2017 10:45:35 +0000 (11:45 +0100)]
cmd: ubi: allow '-' to specify maximum volume size
Currently maximum volume size can be specified only if no other
arguments are used. Use '-' placeholder as volume size to allow
maximum volume size to be specified together with volume id and
type.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Tom Rini [Wed, 25 Jan 2017 22:09:01 +0000 (17:09 -0500)]
Merge git://git.denx.de/u-boot-mpc85xx
Simon Glass [Mon, 23 Jan 2017 20:31:27 +0000 (13:31 -0700)]
Drop CONFIG_CMD_DOC
This is not used in U-Boot, and the only usage calls a non-existent
function. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 23 Jan 2017 20:31:26 +0000 (13:31 -0700)]
Drop prt_mpc5xxx_clks() in favour of print_cpuinfo()
Rather than having an arch-specific function, use the existing generic
one.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 23 Jan 2017 20:31:25 +0000 (13:31 -0700)]
Drop the static inline print_cpuinfo()
This is only called from one place and the function cannot be inlined.
Convert it to a normal function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 23 Jan 2017 20:31:24 +0000 (13:31 -0700)]
Drop CONFIG_WINBOND_83C553
This is not used in U-Boot. Drop this option and associated dead code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 23 Jan 2017 20:31:23 +0000 (13:31 -0700)]
powerpc: Drop CONFIG_SYS_ALLOC_DPRAM
This is not defined anywhere in U-Boot. Drop this dead code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 23 Jan 2017 20:31:22 +0000 (13:31 -0700)]
powerpc: Drop probecpu() in favour of arch_cpu_init()
To avoid an unnecessary arch-specific call in board_init_f(), rename this
function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 23 Jan 2017 20:31:21 +0000 (13:31 -0700)]
Convert CONFIG_ARCH_MISC_INIT to Kconfig
This converts the following to Kconfig:
CONFIG_ARCH_MISC_INIT
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 23 Jan 2017 20:31:20 +0000 (13:31 -0700)]
Convert CONFIG_BOARD_EARLY_INIT_F to Kconfig
This converts the following to Kconfig:
CONFIG_BOARD_EARLY_INIT_F
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 23 Jan 2017 20:31:19 +0000 (13:31 -0700)]
Convert CONFIG_ARCH_EARLY_INIT_R to Kconfig
This converts the following to Kconfig:
CONFIG_ARCH_EARLY_INIT_R
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 23 Jan 2017 20:31:18 +0000 (13:31 -0700)]
config: Drop CONFIG_ARCH_DMA_PIO_WORDS
This is not defined by any board in U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Konstantin Porotchkin [Sun, 8 Jan 2017 14:52:06 +0000 (16:52 +0200)]
arm64: mvebu: Update bubt command MMC block device access
Update the MMC block device access code in bubt command
implementation according to the latest MMC driver changes.
Change-Id: Ie852ceefa0b040ffe1362bdb7815fcea9b2d923b
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
Stefan Roese [Fri, 9 Dec 2016 14:43:26 +0000 (15:43 +0100)]
arm64: mvebu: Enable SDHCI/MMC support for the db-
88f7040/8040
This patch enables the MMC support for the SDHCI controller on the
Armada 7k db-
88f7040 and the Armada 8k db-
88f8040 board.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Wilson Ding <dingwei@marvell.com>
Cc: Victor Gu <xigu@marvell.com>
Cc: Hua Jing <jinghua@marvell.com>
Cc: Terry Zhou <bjzhou@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Stefan Roese [Fri, 9 Dec 2016 14:42:15 +0000 (15:42 +0100)]
arm64: mvebu: Armada 7040-db: Add SDHCI device tree nodes
This patch adds the SDHCI device tree nodes to the Armada 7040-db
dts file.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Wilson Ding <dingwei@marvell.com>
Cc: Victor Gu <xigu@marvell.com>
Cc: Hua Jing <jinghua@marvell.com>
Cc: Terry Zhou <bjzhou@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Stefan Roese [Fri, 9 Dec 2016 14:40:05 +0000 (15:40 +0100)]
arm64: mvebu: Armada 7k/8k: Add SDHCI device tree nodes
This patch adds the SDHCI device tree nodes to the Armada AP806 dtsi
file which is used by the Armada 7k/8K SoCs.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Wilson Ding <dingwei@marvell.com>
Cc: Victor Gu <xigu@marvell.com>
Cc: Hua Jing <jinghua@marvell.com>
Cc: Terry Zhou <bjzhou@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Stefan Roese [Fri, 9 Dec 2016 14:13:35 +0000 (15:13 +0100)]
arm64: mvebu: Enable SDHCI/MMC support for the db-
88f3720
This patch enables the MMC support for the SDHCI controller on the
Armada 3700 db-
88f3720 board.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Wilson Ding <dingwei@marvell.com>
Cc: Victor Gu <xigu@marvell.com>
Cc: Hua Jing <jinghua@marvell.com>
Cc: Terry Zhou <bjzhou@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Stefan Roese [Fri, 9 Dec 2016 14:12:07 +0000 (15:12 +0100)]
arm64: mvebu: Armada 3720-db: Add SDHCI device tree nodes
This patch adds the SDHCI device tree nodes to the Armada 3700-db
dts file.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Wilson Ding <dingwei@marvell.com>
Cc: Victor Gu <xigu@marvell.com>
Cc: Hua Jing <jinghua@marvell.com>
Cc: Terry Zhou <bjzhou@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Stefan Roese [Fri, 9 Dec 2016 14:10:31 +0000 (15:10 +0100)]
arm64: mvebu: Armada 3700: Add SDHCI device tree nodes
This patch adds the SDHCI device tree nodes to the Armada 3700 dtsi
file.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Wilson Ding <dingwei@marvell.com>
Cc: Victor Gu <xigu@marvell.com>
Cc: Hua Jing <jinghua@marvell.com>
Cc: Terry Zhou <bjzhou@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Stefan Roese [Fri, 9 Dec 2016 14:03:28 +0000 (15:03 +0100)]
mmc: Add Marvell Xenon SDHCI controller driver
This driver implementes platform specific code for the Xenon SDHCI
controller which is integrated in the Marvell MVEBU Armada 37xx and
Armada 7k / 8K SoCs.
History:
This driver is ported from the Marvell U-Boot version 2015.01 which is
written by Victor Gu <xigu@marvell.com> with minor changes ported from
the Linux driver which is written by Ziji Hu <huziji@marvell.com>.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Stefan Roese [Mon, 12 Dec 2016 07:24:56 +0000 (08:24 +0100)]
mmc: sdhci: Add support for optional controller specific set_ios_post()
Some SDHCI drivers might need to do some special controller configuration
after the common clock set_ios() function has been called (speed / width
configuration). This patch adds a call to the newly created function
set_ios_port() when its configured in the host driver.
This will be used by the Xenon SDHCI controller driver used on the
Marvell Armada 3700 and 7k/8k ARM64 SoCs.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Stefan Roese [Mon, 12 Dec 2016 07:34:42 +0000 (08:34 +0100)]
mmc: sdhci: Clear SDHCI_CLOCK_CONTROL before configuring the new value
This patch completely clears the SDHCI_CLOCK_CONTROL register before the
new value is configured instead of just clearing the 2 bits
SDHCI_CLOCK_CARD_EN and SDHCI_CLOCK_INT_EN. Without this change, some
clock configurations will lead to the "Internal clock never stabilised."
error message on the Xenon SDHCI controller used on the Marvell Armada
3700 and 7k/8k ARM64 SoCs.
The Linux SDHCI core driver also writes 0 to this register before
the new value is configured. So this patch simplifies the driver a bit
and brings the U-Boot driver more in-line with the Linux one.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Tony O'Brien [Fri, 6 Jan 2017 04:29:45 +0000 (17:29 +1300)]
powerpc: Enable flush and invalidate dcache by range for MPC85xx
Commit
ac337168a unified functions to flush and invalidate dcache by
range. These two functions were no-ops for SoCs other than 4xx and
MPC86xx. Adding these functions seemed to be correct but introduced
issues in some drivers when the dcache was flushed. While the root
cause was under investigation, these functions were disabled in
Commit
cb1629f91a for affected SoCs, including the MPC85xx, to make
the various drivers work.
On the T208x USB stopped working after v2016.07 was pulled. After
re-enabling the dcache functions for the MPC85xx it started working
again. The USB and DPPA Ethernet drivers have been seen as
operational after this change but other drivers cannot be tested.
Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Tony O'Brien <tony.obrien@alliedtelesis.co.nz>
Cc: Marek Vasut <marex@denx.de>
Cc: York Sun <york.sun@nxp.com>
Reviewed-by: York Sun <york.sun>
Tony O'Brien [Thu, 1 Dec 2016 20:22:34 +0000 (09:22 +1300)]
mpc85xx: pcie: Implement workaround for Erratum
A007815
The read-only-write-enable bit is set by default and must be cleared
to prevent overwriting read-only registers. This should be done
immediately after resetting the PCI Express controller.
Reviewed-by: Hamish Martin <hamish.martin@alliedtelesis.co.nz>
Signed-off-by: Tony O'Brien <tony.obrien@alliedtelesis.co.nz>
[York S: Move SYS_FSL_ERRATUM_A007815 to Kconfig]
Reviewed-by: York Sun <york.sun@nxp.com>
Darwin Dingel [Mon, 24 Oct 2016 20:48:01 +0000 (09:48 +1300)]
powerpc: mpc85xx: Implemente workaround for CPU erratum A-007907
Core hang occurs when using L1 stashes. Workaround is to disable L1
stashes so software uses L2 cache for stashes instead.
Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Darwin Dingel <darwin.dingel@alliedtelesis.co.nz>
Cc: York Sun <york.sun@nxp.com>
[York S: Move SYS_FSL_ERRATUM_A007907 to Kconfig]
Reviewed-by: York Sun <york.sun@nxp.com>
Tom Rini [Mon, 23 Jan 2017 22:40:22 +0000 (17:40 -0500)]
travis-ci: Add swig and libpython-dev to the package list
As part of
1905c8fc711a we introduced failures depending on if swig and
libpython-dev are installed or not. To provide coverage for this are of
code in the future ensure we have these packages installed.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Andrew F. Davis [Mon, 23 Jan 2017 17:34:37 +0000 (11:34 -0600)]
mach-omap2: Cleanup secure boot media generation
Currently all secure media types of SPL are generated for all platforms,
all platforms do not need all types, only generate the media types valid
for each platform.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Lokesh Vutla <lokeshvutla@ti.com>
Tom Rini [Mon, 23 Jan 2017 16:44:33 +0000 (11:44 -0500)]
tools: Correct python building host tools
When we have python building tools for the host it will not check HOSTXX
variables but only XX variables, for example LDFLAGS and not
HOSTLDFLAGS.
Cc: Simon Glass <sjg@chromium.org>
Reported-by: Heiko Schocher <hs@denx.de>
Fixes:
1905c8fc711a ("build: Always build the libfdt python module")
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Tested-by: Heiko Schocher <hs@denx.de>
Cédric Schieli [Mon, 23 Jan 2017 15:51:45 +0000 (16:51 +0100)]
bootz/booti: relocate ramdisk if CONFIG_SYS_BOOT_RAMDISK_HIGH set
In commit
c2e7e72, the ramdisk relocation code was moved from
image_setup_linux to do_bootm, leaving the bootz and booti cases broken.
This patch fixes both by adding the BOOTM_STATE_RAMDISK state in their
call to do_bootm_states if CONFIG_SYS_BOOT_RAMDISK_HIGH is set.
Signed-off-by: Cédric Schieli <cschieli@gmail.com>
Reviewed-by: Rick Altherr <raltherr@google.com>
Tested-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Uri Mashiach [Mon, 23 Jan 2017 11:14:18 +0000 (13:14 +0200)]
arm: am57xx: cl-som-am57x: fix Ethernet
The module is continuously rebooting with the following message:
Net: data abort
pc : [<
fff77f42>] lr : [<
fff6e32b>]
reloc pc : [<
80816f42>] lr : [<
8080d32b>]
sp :
fdf5ce48 ip :
fdf5d79c fp :
00000017
r10:
8083cd58 r9 :
fdf5cef0 r8 :
fdf5d5d0
r7 :
48485000 r6 :
400000ff r5 :
fdf5d6e0 r4 :
fdf5d618
r3 :
fdf5d5b4 r2 :
fdf5d5d0 r1 :
643a3631 r0 :
fdf5d6e0
Flags: nzCv IRQs off FIQs off Mode SVC_32
Resetting CPU ...
Modifications:
* Enable Ethernet configuration in the SPL.
* Update PINMUX of PHY enable GPIO.
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 23 Jan 2017 00:43:11 +0000 (19:43 -0500)]
Kconfig: Migrate BOARD_LATE_INIT to a select
This option should not really be user selectable. Note that on PowerPC
we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be
conditional on that.
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)
Tom Rini [Mon, 23 Jan 2017 00:43:10 +0000 (19:43 -0500)]
NXP: Introduce board/freescale/common/Kconfig and migrate CHAIN_OF_TRUST
Introduce board/freescale/common/Kconfig so that we have a single place
for CONFIG options that are shared between ARM and PowerPC NXP platforms.
Cc: York Sun <york.sun@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Tom Rini [Mon, 23 Jan 2017 00:43:09 +0000 (19:43 -0500)]
imx31_phycore: Split the eet variant out into a different TARGET
Rename CONFIG_IMX31_PHYCORE_EET to CONFIG_TARGET_IMX31_PHYCORE_EET and
make this a distinct config target.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tuomas Tynkkynen [Sun, 22 Jan 2017 23:34:39 +0000 (01:34 +0200)]
rpi: Fix device tree path on ARM64
The directory structure of device tree files produced by the kernel's
'make dtbs_install' is different on ARM64, the RPi3 device tree file is
in a 'broadcom' subdirectory there.
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Jagan Teki [Tue, 10 Jan 2017 10:18:43 +0000 (11:18 +0100)]
mmc: Print error code for mmc_complete_init failure
Print the error code for non-zero (failure case) instead
of making debug statement without any condition, this
usually gives proper clue in failure condition.
Log:
Stefan Herbrechtsmeier [Tue, 17 Jan 2017 14:58:48 +0000 (15:58 +0100)]
mmc: sdhci: Distinguish between base clock and maximum peripheral frequency
The sdhci controller assumes that the base clock frequency is fully supported by
the peripheral and doesn't support hardware limitations. The Linux kernel
distinguishes between base clock (max_clk) of the host controller and maximum
frequency (f_max) of the card interface. Use the same differentiation and allow
the platform to constrain the peripheral interface.
Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
Tom Rini [Sun, 22 Jan 2017 22:07:48 +0000 (17:07 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-uniphier
- Allow to disable SPL (mainly for ATF)
- Refactor SoC init code
- Update DRAM settings
- Add PXs3 SoC support (DT, pinctrl driver, SoC code)
Masahiro Yamada [Sat, 21 Jan 2017 09:05:31 +0000 (18:05 +0900)]
ARM: uniphier: add PXs3 SoC support
Initial support for PXs3 SoC.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Sat, 21 Jan 2017 09:05:30 +0000 (18:05 +0900)]
ARM: dts: uniphier: add PXs3 SoC/board support
Initial commit for the PXs3 SoC DT.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>