oweals/u-boot.git
6 years agobinman: Move capture_sys_output() to test_util
Simon Glass [Fri, 6 Jul 2018 16:27:34 +0000 (10:27 -0600)]
binman: Move capture_sys_output() to test_util

This function is useful in various tests. Move it into the common test
utility module.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agodtoc: Add a test for code coverage
Simon Glass [Fri, 6 Jul 2018 16:27:33 +0000 (10:27 -0600)]
dtoc: Add a test for code coverage

Add a -T option to run a code-coverage test on dtoc. At present this is
about 96%. Future work will increase it to 100%.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agodtoc: Fix some minor errors
Simon Glass [Fri, 6 Jul 2018 16:27:32 +0000 (10:27 -0600)]
dtoc: Fix some minor errors

Fix some comments and a printf string which is incorrect.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agodtoc: Fix properties with a single zero-arg phandle
Simon Glass [Fri, 6 Jul 2018 16:27:31 +0000 (10:27 -0600)]
dtoc: Fix properties with a single zero-arg phandle

At present a property with a single phandle looks like an integer value
to dtoc. Correct this by adjusting it in the phandle-processing code.

Add a test for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agodtoc: Fix Fdt.GetNode() to handle a missing node
Simon Glass [Fri, 6 Jul 2018 16:27:30 +0000 (10:27 -0600)]
dtoc: Fix Fdt.GetNode() to handle a missing node

At present the algortihm is not correct since it will return the root node
if the requested node is not found and there are no slashes in the
requested node name. Fix this and add a test.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agodtoc: Keep track of property offsets
Simon Glass [Fri, 6 Jul 2018 16:27:29 +0000 (10:27 -0600)]
dtoc: Keep track of property offsets

At present the Fdt class does not keep track of property offsets if they
change due to removal of properties. Update the code to handle this, and
add a test.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agodtoc: Update fdt tests to increase code coverage
Simon Glass [Fri, 6 Jul 2018 16:27:28 +0000 (10:27 -0600)]
dtoc: Update fdt tests to increase code coverage

At present only some of the fdt functionality is tested. Add more tests to
cover the rest of it. Also turn on test coverage, which is now 100% with
a small exclusion for a Python 3 feature.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agodtoc: Drop use of a local dtb buffer
Simon Glass [Fri, 6 Jul 2018 16:27:27 +0000 (10:27 -0600)]
dtoc: Drop use of a local dtb buffer

At present the Fdt class has its own copy of the device tree. This is
confusing an unnecessary now that pylibfdt has its own. Drop it and
provide access functions to the buffer.

This allows us to move the rest of the implementation to use pylibfdt
methods instead of directly calling libfdt stubs.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agodtoc: Make use of the new pylibfdt methods
Simon Glass [Fri, 6 Jul 2018 16:27:26 +0000 (10:27 -0600)]
dtoc: Make use of the new pylibfdt methods

Now that pylibfdt supports a fuller API we don't need to directly call
the libfdt stubs. Update the code to use the Fdt methods instead.

Some other cases remain which will be tidied up in a later commit, since
they need larger changes.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agodtoc: Update tests to write failures to /tmp
Simon Glass [Fri, 6 Jul 2018 16:27:25 +0000 (10:27 -0600)]
dtoc: Update tests to write failures to /tmp

When a test fails due to an output mismatch (e.g. due to a new property
being adding to a test file) it is currently hard to update the test to
the new output. In particular the tabs in the file are written as \t in
the Python tests.

To make this easier, write both the expected and actual results to /tmp
to allow use of meld, and copying into the test.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agodtoc: Add some tests for the fdt module
Simon Glass [Fri, 6 Jul 2018 16:27:24 +0000 (10:27 -0600)]
dtoc: Add some tests for the fdt module

At present this module is tested via the dtoc tests. This is a bit painful
since the tests are at a higher level and so failures are more difficult
to diagnose.

Add some tests that exercise the fdt module directly.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agobinman: Move coverage logic into a new test_util file
Simon Glass [Fri, 6 Jul 2018 16:27:23 +0000 (10:27 -0600)]
binman: Move coverage logic into a new test_util file

At present only binman has the logic for determining Python test coverage
but this is useful for other tools also. Move it out into a separate file
so it can be used by other tools.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agolibfdt: Add get_property() and del_node()
Simon Glass [Fri, 6 Jul 2018 16:27:22 +0000 (10:27 -0600)]
libfdt: Add get_property() and del_node()

Add support for these functions in the Python binding. This patch stands
in for a pending upstream change.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agolibfdt: Fix the Python pack() function
Simon Glass [Fri, 6 Jul 2018 16:27:21 +0000 (10:27 -0600)]
libfdt: Fix the Python pack() function

This currently fails to reduce the device-tree bytearray size. Fix this.

This stands in for a pending upstream change.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agolibfdt: Bring in proposed pylibfdt changes
Simon Glass [Fri, 6 Jul 2018 16:27:20 +0000 (10:27 -0600)]
libfdt: Bring in proposed pylibfdt changes

This provides various patches sent to the devicetree-compiler mailing list
to enhance the Python bindings. A final version of this patch may be
created once upstreaming is complete, but if it takes too long, this can
act as a placeholder.

New pylibfdt features:
- Support for most remaining, relevant libfdt functions
- Support for sequential-write functions

Changes are applied to existing U-Boot tools as needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agobinman: Tidy up setting of entry contents
Simon Glass [Fri, 6 Jul 2018 16:27:19 +0000 (10:27 -0600)]
binman: Tidy up setting of entry contents

At present the contents of an entry are set in subclasses simply by
assigning to the data and content_size properties. Add some methods to do
this, so that we have more control. In particular, add a method to set the
contents without changing its size, so we can validate that case.

Add a test case for trying to change the size when this is not allowed.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agobinman: Tidy up execution of tests
Simon Glass [Fri, 6 Jul 2018 16:27:18 +0000 (10:27 -0600)]
binman: Tidy up execution of tests

Move all the test execution into the same mechanism so that we can request
a particular test (from any suite) by passing it as an argument to
'binman -t'.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agobinman: Correct operation of ObtainContents()
Simon Glass [Fri, 6 Jul 2018 16:27:17 +0000 (10:27 -0600)]
binman: Correct operation of ObtainContents()

This method is supposed to return the contents of an entry. However at
present there is no check that it actually does. Also some implementations
do not return 'True' to indicate success, as required.

Add a check for things working as expected, and correct the
implementations.

This requires some additional test cases to cover things which were missed
originally. Add these at the same time.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agobinman: Tidy up variables in _RunMicrocodeTest()
Simon Glass [Fri, 6 Jul 2018 16:27:16 +0000 (10:27 -0600)]
binman: Tidy up variables in _RunMicrocodeTest()

At present we call the three entries first, second and third. Rename them
to reflect their contents instead, for clarity.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agobinman: Make the operation of Entry__testing explicit
Simon Glass [Fri, 6 Jul 2018 16:27:15 +0000 (10:27 -0600)]
binman: Make the operation of Entry__testing explicit

This fake entry is used for testing. At present it only has one behaviour
which is to return an invalid set of entry positions, to cause an error.

The fake entry will need to be used for other things too. Allow the test
.dts file to specify the behaviour of the fake entry, so we can control
its behaviour easily.

While we are here, drop the ReadContents() method, since this only applies
to subclasses of Entry_blob, which Entry__testing is not.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agobinman: Switch to 'python-coverage'
Tom Rini [Fri, 6 Jul 2018 16:27:14 +0000 (10:27 -0600)]
binman: Switch to 'python-coverage'

The most portable way to get access to coverage is to invoke it as
'python-coverage'.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agodm: core: Add logging of some common errors
Simon Glass [Mon, 11 Jun 2018 19:07:19 +0000 (13:07 -0600)]
dm: core: Add logging of some common errors

Add additional logging so that common errors when finding a device by
ofnode are easier to debug.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agodm: core: Add a function to decode a memory region
Simon Glass [Mon, 11 Jun 2018 19:07:18 +0000 (13:07 -0600)]
dm: core: Add a function to decode a memory region

Add a way to decode a memory region, including the memory type (sram or
sdram) and its start address and size.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agodm: core: Update of_read_fmap_entry() for livetree
Simon Glass [Mon, 11 Jun 2018 19:07:17 +0000 (13:07 -0600)]
dm: core: Update of_read_fmap_entry() for livetree

Update this function to take an ofnode so that it can work with livetree.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agodm: spi: Update sandbox SPI emulation driver to use ofnode
Simon Glass [Mon, 11 Jun 2018 19:07:16 +0000 (13:07 -0600)]
dm: spi: Update sandbox SPI emulation driver to use ofnode

Update the parameters sandbox_sf_bind_emul to support livetree.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agodm: core: Add a way to bind a device by ofnode
Simon Glass [Mon, 11 Jun 2018 19:07:15 +0000 (13:07 -0600)]
dm: core: Add a way to bind a device by ofnode

Add a new device_bind_ofnode() function which can bind a device given its
ofnode. This allows binding devices more easily with livetree nodes.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agolog: Add a way to log a return value with a message
Simon Glass [Mon, 11 Jun 2018 19:07:14 +0000 (13:07 -0600)]
log: Add a way to log a return value with a message

It is sometimes useful to show a message when logging an error return
value, perhaps to add a few details about the problem. Add a function to
support this.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agodm: core: Add a way to find an ofnode by compatible string
Simon Glass [Mon, 11 Jun 2018 19:07:13 +0000 (13:07 -0600)]
dm: core: Add a way to find an ofnode by compatible string

Add an ofnode_by_compatible() to allow iterating through ofnodes with a
given compatible string.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agodm: core: Add comments to ofnode_read_resource() functoins
Simon Glass [Mon, 11 Jun 2018 19:07:12 +0000 (13:07 -0600)]
dm: core: Add comments to ofnode_read_resource() functoins

These functions are missing comments. Add some.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agodm: core: Fix a few ofnode function comments
Simon Glass [Mon, 11 Jun 2018 19:07:11 +0000 (13:07 -0600)]
dm: core: Fix a few ofnode function comments

Tidy up three return-value errors.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agodm: core: Add ofnode function to read a 64-bit int
Simon Glass [Mon, 11 Jun 2018 19:07:10 +0000 (13:07 -0600)]
dm: core: Add ofnode function to read a 64-bit int

We have a 32-bit version of this function. Add a 64-bit version as well so
we can easily read 64-bit ints from the device tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agofdt: Add device tree memory bindings
Michael Pratt [Mon, 11 Jun 2018 19:07:09 +0000 (13:07 -0600)]
fdt: Add device tree memory bindings

Support a default memory bank, specified in reg, as well as
board-specific memory banks in subtree board-id nodes.

This allows memory information to be provided in the device tree,
rather than hard-coded in, which will make it simpler to handle
similar devices with different memory banks, as the board-id values
or masks can be used to match devices.

Signed-off-by: Michael Pratt <mpratt@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
6 years agoPrepare v2018.07 v2018.07
Tom Rini [Mon, 9 Jul 2018 14:24:14 +0000 (10:24 -0400)]
Prepare v2018.07

Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-video
Tom Rini [Sun, 8 Jul 2018 22:56:07 +0000 (18:56 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-video

6 years agoMerge branch 'master' of git://git.denx.de/u-boot-tegra
Tom Rini [Fri, 6 Jul 2018 21:12:06 +0000 (17:12 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-tegra

6 years agotegra: nyan-big: Update CONFIG_SYS_TEXT to the default in README.chromium
Peter Robinson [Sun, 10 Jun 2018 05:17:46 +0000 (06:17 +0100)]
tegra: nyan-big: Update CONFIG_SYS_TEXT to the default in README.chromium

To build U-Boot on a Nyan Big Chromebook the docs outline adjusting the Tegra124
defined CONFIG_SYS_TEXT_BASE but this has since been moved to individual config
files. We should have the default required for U-Boot chain loading on the
chromebook as the default CONFIG_SYS_TEXT_BASE and update the docs to remove
this now non required step.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-usb
Tom Rini [Fri, 6 Jul 2018 12:55:09 +0000 (08:55 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-usb

6 years agosunxi: A64: OHCI: prevent turning off shared USB clock
Andre Przywara [Wed, 4 Jul 2018 23:57:48 +0000 (00:57 +0100)]
sunxi: A64: OHCI: prevent turning off shared USB clock

On the A64 the clock for the first USB controller is actually the parent
of the clock for the second controller, so turning them off in that order
makes the system hang.
Fix this by only turning off *both* clocks when the *last* OHCI controller
is brought down. This covers the case when only one controller is used.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
6 years agousb: dwc2: Add brcm,bcm2708-usb compatible
Emmanuel Vadot [Mon, 2 Jul 2018 12:34:23 +0000 (14:34 +0200)]
usb: dwc2: Add brcm,bcm2708-usb compatible

When using CONFIG_OF_BOARD on rpi to use the dtb provided by the
RaspberryPi Fundation, the compatible string isn't the same, resulting
in not-functional usb from u-boot.

Signed-off-by: Oleksandr Tymoshenko <gonzo@FreeBSD.org>
Signed-off-by: Emmanuel Vadot <manu@freebsd.org>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-sunxi
Tom Rini [Wed, 4 Jul 2018 03:09:34 +0000 (23:09 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-sunxi

6 years agoarm: timer: sunxi: add Allwinner timer erratum workaround
Andre Przywara [Wed, 27 Jun 2018 00:42:53 +0000 (01:42 +0100)]
arm: timer: sunxi: add Allwinner timer erratum workaround

The Allwinner A64 SoCs suffers from an arch timer implementation erratum,
where sometimes the lower 11 bits of the counter value erroneously
become all 0's or all 1's [1]. This leads to sudden jumps, both forwards and
backwards, with the latter one often showing weird behaviour.
Port the workaround proposed for Linux to U-Boot and activate it for all
A64 boards.
This fixes crashes when accessing MMC devices (SD cards), caused by a
recent change to actually use the counter value for timeout checks.

Fixes: 5ff8e54888e4d26a352453564f7f599d29696dc9 ("sunxi: improve throughput
in the sunxi_mmc driver")

[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2018-May/576886.html

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Andreas Färber <afaerber@suse.de>
Tested-by: Guillaume Gardet <guillaume.gardet@free.fr>
6 years agoarm: timer: factor out FSL arch timer erratum workaround
Andre Przywara [Wed, 27 Jun 2018 00:42:52 +0000 (01:42 +0100)]
arm: timer: factor out FSL arch timer erratum workaround

At the moment we have the workaround for the Freescale arch timer
erratum A-008585 merged into the generic timer_read_counter() routine.
Split those two up, so that we can add other errata workaround more
easily. Also add an explaining comment on the way.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Andreas Färber <afaerber@suse.de>
Tested-by: Guillaume Gardet <guillaume.gardet@free.fr>
6 years agoPrepare v2018.07-rc3 v2018.07-rc3
Tom Rini [Tue, 3 Jul 2018 03:23:15 +0000 (23:23 -0400)]
Prepare v2018.07-rc3

Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-net
Tom Rini [Mon, 2 Jul 2018 20:11:09 +0000 (16:11 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-net

6 years agoboard/aries: Remove
Tom Rini [Mon, 2 Jul 2018 19:52:50 +0000 (15:52 -0400)]
board/aries: Remove

The various Aries Embedded boards have been orphaned for a year and no
one has come forward to take care of them.  Remove.

Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agoax25: Switch to CONFIG_BOOTP_PREFER_SERVERIP
Alexander Graf [Fri, 15 Jun 2018 08:29:29 +0000 (10:29 +0200)]
ax25: Switch to CONFIG_BOOTP_PREFER_SERVERIP

The ax25-ae350 target currently uses CONFIG_BOOTP_SERVERIP which means we
ignore the DHCP provided TFTP ip address. This breaks every case where we
do now provide a serverip environment variable.

Instead, let's use the new CONFIG_BOOT_PREFER_SERVERIP option to fall back
to the DHCP provided TFTP IP if no serverip environment variable is set.

Signed-off-by: Alexander Graf <agraf@suse.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Rick Chen <rick@andestech.com>
6 years agonet: Add option to prefer bootp/dhcp serverip
Alexander Graf [Fri, 15 Jun 2018 08:29:28 +0000 (10:29 +0200)]
net: Add option to prefer bootp/dhcp serverip

Currently we can choose between 2 different types of behavior for the
serverip variable:

  1) Always overwrite it with the DHCP server IP address (default)
  2) Ignore what the DHCP server says (CONFIG_BOOTP_SERVERIP)

This patch adds a 3rd option:

  3) Use serverip from DHCP if no serverip is given
     (CONFIG_BOOTP_PREFER_SERVERIP)

With this new option, we can have the default case that a boot file gets
loaded from the DHCP provided TFTP server work while allowing users to
specify their own serverip variable to explicitly use a different tftp
server.

Signed-off-by: Alexander Graf <agraf@suse.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agonet: Prefer command line arguments
Alexander Graf [Fri, 15 Jun 2018 08:29:27 +0000 (10:29 +0200)]
net: Prefer command line arguments

We can call commands like dhcp and bootp without arguments or with
explicit command line arguments that really should tell the code where
to look for files instead.

Unfortunately, the current code simply overwrites command line arguments
in the dhcp case with dhcp values.

This patch allows the code to preserve the command line values if they
were set on the command line. That way the semantics are slightly more
intuitive.

The reason this patch does that by introducing a new variable is that we
can not rely on net_boot_file_name[0] being unset, as today it's
completely legal to call "dhcp" and afterwards run "tftp" and expect the
latter to repeat the same query as before. I would prefer not to break
that behavior in case anyone relies on it.

Signed-off-by: Alexander Graf <agraf@suse.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agonet: Add new wol command - Wake on LAN
Lothar Felten [Fri, 22 Jun 2018 20:29:54 +0000 (22:29 +0200)]
net: Add new wol command - Wake on LAN

Add a new command 'wol': Wait for an incoming Wake-on-LAN packet or
time out if no WoL packed is received.
If the WoL packet contains a password, it is saved in the environment
variable 'wolpassword' using the etherwake format (dot or colon
separated decimals).

Intended use case: a networked device should boot an alternate image.
It's attached to a network on a client site, modifying the DHCP server
configuration or setup of a tftp server is not allowed.
After power on the device waits a few seconds for a WoL packet. If a
packet is received, the device boots the alternate image. Otherwise
it boots the default image.

This method is a simple way to interact with a system via network even
if only the MAC address is known. Tools to send WoL packets are
available on all common platforms.

Some Ethernet drivers seem to pad the incoming packet. The additional
padding bytes might be recognized as Wake-on-LAN password bytes.

By default enabled in pengwyn_defconfig.

Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agonet: mvneta: zero Tx descriptors on init
Rabeeh Khoury [Tue, 19 Jun 2018 18:36:51 +0000 (21:36 +0300)]
net: mvneta: zero Tx descriptors on init

Make the initialization sequence consistent with the Linux kernel
driver.

Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
6 years agonet: mvneta: dcache flush TX descriptors at init
Rabeeh Khoury [Tue, 19 Jun 2018 18:36:50 +0000 (21:36 +0300)]
net: mvneta: dcache flush TX descriptors at init

This fixes sporadic timeout on initial packet Tx (usually ARP), with an
error message like:

  timeout: packet not sent

Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
6 years agonet: fastboot: Fix build when FASTBOOT_FLASH is disabled
Alex Kiernan [Fri, 15 Jun 2018 05:06:00 +0000 (05:06 +0000)]
net: fastboot: Fix build when FASTBOOT_FLASH is disabled

When building without FASTBOOT_FLASH we don't include the intermediate
update callback to keep the client alive, so ensure we don't try setting
it here.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agonet: zynq_gem: Initialize val variable in zynq_gem_miiphy_read()
Michal Simek [Thu, 14 Jun 2018 07:08:44 +0000 (09:08 +0200)]
net: zynq_gem: Initialize val variable in zynq_gem_miiphy_read()

phyread can timeout and val will contain random value. Initialize it to
zero not to report random value in case of error.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-spi
Tom Rini [Mon, 2 Jul 2018 18:40:03 +0000 (14:40 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-spi

6 years agovideo: arm: rpi: Add brcm,bcm2708-fb compatible
Emmanuel Vadot [Mon, 2 Jul 2018 12:33:14 +0000 (14:33 +0200)]
video: arm: rpi: Add brcm,bcm2708-fb compatible

When using CONFIG_OF_BOARD on rpi to use the dtb provided by the
RaspberryPi Fundation, the compatible string isn't the same, resulting
in not-functional video in u-boot.

Signed-off-by: Oleksandr Tymoshenko <gonzo@FreeBSD.org>
Signed-off-by: Emmanuel Vadot <manu@freebsd.org>
6 years agoMerge git://git.denx.de/u-boot-x86
Tom Rini [Mon, 2 Jul 2018 02:13:34 +0000 (22:13 -0400)]
Merge git://git.denx.de/u-boot-x86

6 years agoRevert "fw_printenv: Don't bail out directly after one env read error"
Tom Rini [Mon, 2 Jul 2018 02:10:33 +0000 (22:10 -0400)]
Revert "fw_printenv: Don't bail out directly after one env read error"

As pointed out by Wolfgang Denk, the problem with this fix is that while
interactive users will see that we have found one part of the
environment failed and are using the other, progmatic use will not see
this and can lead to problems.

Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agodoc: vxworks: Mention chain-loading an x86 kernel via 'bootefi'
Bin Meng [Thu, 28 Jun 2018 03:38:06 +0000 (20:38 -0700)]
doc: vxworks: Mention chain-loading an x86 kernel via 'bootefi'

This updates the doc to mention chain-loading an x86 kernel via
'bootefi' command, along with several typos fix.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexander Graf <agraf@suse.de>
6 years agox86: doc: Update EFI loader support
Bin Meng [Thu, 28 Jun 2018 03:38:05 +0000 (20:38 -0700)]
x86: doc: Update EFI loader support

CONFIG_EFI_LOADER is fully supported on x86 now.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexander Graf <agraf@suse.de>
6 years agoefi_loader: helloworld: Output ACPI configuration table
Bin Meng [Thu, 28 Jun 2018 03:38:04 +0000 (20:38 -0700)]
efi_loader: helloworld: Output ACPI configuration table

Output ACPI configuration table if it exists.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
6 years agoefi_loader: Install ACPI configuration tables
Bin Meng [Thu, 28 Jun 2018 03:38:03 +0000 (20:38 -0700)]
efi_loader: Install ACPI configuration tables

ACPI tables can be passed via EFI configuration table to an EFI
application. This is only supported on x86 so far.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agoefi_loader: Increase number of configuration tables to 16
Bin Meng [Thu, 28 Jun 2018 03:38:02 +0000 (20:38 -0700)]
efi_loader: Increase number of configuration tables to 16

At present the number of configuration tables is set to 2. By
looking at which tables the Linux EFI stub or iPXE can process,
it looks 16 is a reasonable number.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
6 years agox86: efi_loader: Build EFI memory map per E820 table
Bin Meng [Thu, 28 Jun 2018 03:38:01 +0000 (20:38 -0700)]
x86: efi_loader: Build EFI memory map per E820 table

On x86 traditional E820 table is used to pass the memory information
to kernel. With EFI loader we can build the EFI memory map from it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agox86: Use microcode update from device tree for all processors
Ivan Gorinov [Fri, 22 Jun 2018 04:16:16 +0000 (21:16 -0700)]
x86: Use microcode update from device tree for all processors

Built without a ROM image with FSP (u-boot.rom), the U-Boot loader applies
the microcode update data block encoded in Device Tree to the bootstrap
processor but not passed to the other CPUs when multiprocessing is enabled.

If the bootstrap processor successfully performs a microcode update
from Device Tree, use the same data block for the other processors.

Signed-off-by: Ivan Gorinov <ivan.gorinov@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed build errors on edison and qemu-x86]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
6 years agox86: Add scsi command to coreboot and qemu
Bin Meng [Tue, 26 Jun 2018 10:58:55 +0000 (03:58 -0700)]
x86: Add scsi command to coreboot and qemu

This adds the scsi command to coreboot and qemu, to be in consistent
with other x86 targets.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agox86: timer: tsc: Allow specifying clock rate from device tree again
Bin Meng [Sat, 23 Jun 2018 10:03:47 +0000 (03:03 -0700)]
x86: timer: tsc: Allow specifying clock rate from device tree again

With the introduction of early timer support in the TSC driver,
the capability of getting clock rate from device tree was lost
unfortunately. Now we bring such functionality back, but with a
limitation that when TSC is used as early timer, specifying clock
rate from device tree does not work.

This fixes random boot failures seen on QEMU targets: printing "TSC
frequency is ZERO" and reset forever.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-usb
Tom Rini [Sat, 30 Jun 2018 12:52:06 +0000 (08:52 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-usb

6 years agomx5: Select ARM_CORTEX_A8_CVE_2017_5715
Fabio Estevam [Wed, 20 Jun 2018 18:08:21 +0000 (15:08 -0300)]
mx5: Select ARM_CORTEX_A8_CVE_2017_5715

On a 4.18-rc1 kernel the following warning is seen on i.MX51 and
i.MX53:

CPU0: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable

Select the ARM_CORTEX_A8_CVE_2017_5715 workaround for i.MX51/i.MX53
to fix the problem.

With this patch applied the kernel reports:

CPU0: Spectre v2: using BPIALL workaround

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
6 years agolib: div64: fix typeo in include/div64.h
Heinrich Schuchardt [Thu, 28 Jun 2018 17:55:46 +0000 (19:55 +0200)]
lib: div64: fix typeo in include/div64.h

%s/reminder/remainder/

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
6 years agoARM: mach-omap2: omap3/am335x: Enable ACR::IBE on Cortex-A8 SoCs for CVE-2017-5715
Nishanth Menon [Tue, 12 Jun 2018 20:24:11 +0000 (15:24 -0500)]
ARM: mach-omap2: omap3/am335x: Enable ACR::IBE on Cortex-A8 SoCs for CVE-2017-5715

Enable CVE-2017-5715 option to set the IBE bit. This enables kernel
workarounds necessary for the said CVE.

With this enabled, Linux reports:
CPU0: Spectre v2: using BPIALL workaround

This workaround may need to be re-applied in OS environment around low
power transition resume states where context of ACR would be lost (off-mode
etc).

Signed-off-by: Nishanth Menon <nm@ti.com>
6 years agoARM: mach-omap2: omap5/dra7: Enable ACTLR[0] (Enable invalidates of BTB) to facilitat...
Nishanth Menon [Tue, 12 Jun 2018 20:24:10 +0000 (15:24 -0500)]
ARM: mach-omap2: omap5/dra7: Enable ACTLR[0] (Enable invalidates of BTB) to facilitate CVE_2017-5715 WA in OS

Enable CVE_2017_5715 and since we have our own v7_arch_cp15_set_acr
function to setup the bits, we are able to override the settings.

Without this enabled, Linux kernel reports:
CPU0: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable

With this enabled, Linux kernel reports:
CPU0: Spectre v2: using ICIALLU workaround

NOTE: This by itself does not enable the workaround for CPU1 (on
OMAP5 and DRA72/AM572 SoCs) and may require additional kernel patches.

Signed-off-by: Nishanth Menon <nm@ti.com>
6 years agoARM: Introduce ability to enable invalidate of BTB with ICIALLU on Cortex-A15 for...
Nishanth Menon [Tue, 12 Jun 2018 20:24:09 +0000 (15:24 -0500)]
ARM: Introduce ability to enable invalidate of BTB with ICIALLU on Cortex-A15 for CVE-2017-5715

As recommended by Arm in [1], ACTLR[0] (Enable invalidates of BTB)
needs to be set[2] for BTB to be invalidated on ICIALLU. This needs to
be done unconditionally for Cortex-A15 processors. Provide a config
option for platforms to enable this option based on impact analysis
for products.

NOTE: This patch in itself is NOT the final solution, this requires:
a) Implementation of v7_arch_cp15_set_acr on SoCs which may not
   provide direct access to ACR register.
b) Operating Systems such as Linux to provide adequate workaround in the
   right locations.
c) This workaround applies to only the boot processor. It is important
   to apply workaround as necessary (context-save-restore) around low
   power context loss OR additional processors as necessary in either
   firmware support OR elsewhere in OS.

[1] https://developer.arm.com/support/security-update
[2] http://infocenter.arm.com/help/topic/com.arm.doc.ddi0438c/BABGHIBG.html

Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Robin Murphy <robin.murphy@arm.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Christoffer Dall <christoffer.dall@linaro.org>
Cc: Andre Przywara <Andre.Przywara@arm.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Michael Nazzareno Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
6 years agoARM: Introduce ability to enable ACR::IBE on Cortex-A8 for CVE-2017-5715
Nishanth Menon [Tue, 12 Jun 2018 20:24:08 +0000 (15:24 -0500)]
ARM: Introduce ability to enable ACR::IBE on Cortex-A8 for CVE-2017-5715

As recommended by Arm in [1], IBE[2] has to be enabled unconditionally
for BPIALL to be functional on Cortex-A8 processors. Provide a config
option for platforms to enable this option based on impact analysis
for products.

NOTE: This patch in itself is NOT the final solution, this requires:
a) Implementation of v7_arch_cp15_set_acr on SoCs which may not
   provide direct access to ACR register.
b) Operating Systems such as Linux to provide adequate workaround in the right
   locations.
c) This workaround applies to only the boot processor. It is important
   to apply workaround as necessary (context-save-restore) around low
   power context loss OR additional processors as necessary in either
   firmware support OR elsewhere in OS.

[1] https://developer.arm.com/support/security-update
[2] http://infocenter.arm.com/help/topic/com.arm.doc.ddi0344k/Bgbffjhh.html

Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Robin Murphy <robin.murphy@arm.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Christoffer Dall <christoffer.dall@linaro.org>
Cc: Andre Przywara <Andre.Przywara@arm.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Michael Nazzareno Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
6 years agousb: sunxi: Use proper reg_mask for clock gate, reset
Jagan Teki [Thu, 28 Jun 2018 14:10:46 +0000 (19:40 +0530)]
usb: sunxi: Use proper reg_mask for clock gate, reset

Masking clock gate, reset register bits based on the
probed controller is proper only due to the assumption
that masking should start with 0 even thought the controller
has separate PHY or shared between OTG.

unfortunately these are fixed due to lack of separate
clock, reset drivers.

Say for example EHCI1 - EHCI3 in the datasheet (EHCI0 is for the OTG)
so we need to start reg_mask 0 - 2.

This patch calculated the mask, based on the register base
so that we can get the proper bits to set with respect to
probed controller.

We even do this masking by using PHY index specifier from dt,
but dev_read_addr_size is failing for 64-bit boards.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agosunxi: Fix USB PHY index for H3
Jagan Teki [Thu, 28 Jun 2018 14:10:45 +0000 (19:40 +0530)]
sunxi: Fix USB PHY index for H3

This patch update the USB PHY index for Allwinner H3.

Same change[1] initially sent, by 'Chen-Yu Tai' but missed
to apply due to recursive version changes on the same series.

[1] https://lists.denx.de/pipermail/u-boot/2018-January/318817.html

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agousb: ohci: change the NUM_EDs from 8 to 32
Zeng Tao [Thu, 28 Jun 2018 17:54:19 +0000 (01:54 +0800)]
usb: ohci: change the NUM_EDs from 8 to 32

For ohci, the maximam supported endpoint number is 32(in and out), and
now we have used (usb_pipeendpoint(pipe) << 1) to index the specified
endpoint descritor, usb_pipeendpoint(pipe) can reach 0xf, so we need
change the NUM_EDs from 8 to 32.

Signed-off-by: Zeng Tao <prime.zeng@hisilicon.com>
6 years agousb: sunxi: ohci: make ohci_t the first member in private data
Vasily Khoruzhick [Sun, 17 Jun 2018 16:13:42 +0000 (09:13 -0700)]
usb: sunxi: ohci: make ohci_t the first member in private data

ohci-hcd casts priv_data pointer to (ohci_t *), thus it must be
the first member in private data struct.

Fixes 831cc98b1 ("usb: sunxi: Simplify ccm reg base code")

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
6 years agosf: Enable FSR polling on N25Q256(A)
Marek Vasut [Thu, 24 May 2018 19:58:45 +0000 (21:58 +0200)]
sf: Enable FSR polling on N25Q256(A)

The N25Q256(A) datasheet clearly states that this device does have
a Flag Status Register and does update FSR PEC bit 7 during Program
and Erase cycles to indicate the cycle is in progress. Enable the
FSR PEC bit polling on this device to prevent data corruption.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Jagan Teki <jagan@openedev.com>
Cc: Tom Rini <trini@konsulko.com>
6 years agospi: omap3: fix claim/release bus within DM
Hannes Schmelzer [Tue, 26 Jun 2018 14:08:39 +0000 (16:08 +0200)]
spi: omap3: fix claim/release bus within DM

The claim/release bus function must not reset the whole SPI core because
settings regarding wordlen, clock-frequency and so on made by
set_wordlen, set_mode, set_speed get lost with this action. Resulting in
a non-functional SPI.

Without DM the failure didn't came up since after the spi_reset within
claim bus all the setup (wordlen, mode, ...) was called, in DM they are
called by the spi uclass.

We change now the things as following for having a working SPI instance
in DM:

- move the spi_reset(...) to the probe call in DM for having a known
hardware state after probe. Without DM we don't have a probe call, so we
issue the reset as before during the claim_bus call.

- in release bus we just reset the modulctrl to the reset-value (spi-
slave)

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-spi
Tom Rini [Thu, 28 Jun 2018 13:04:41 +0000 (09:04 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-spi

6 years agodwc2 USB controller hangs with lan78xx
Andrew Thomas [Mon, 18 Jun 2018 18:56:06 +0000 (11:56 -0700)]
dwc2 USB controller hangs with lan78xx

This bug is the combination of dwc2 USB controller and lan78xx
USB ethernet controller, which is the combination in use on
the Raspberry Pi Model 3 B+.

When the host attempts to receive a packet, but a packet has not
arrived, the lan78xx controller responds by setting BIR
(Bulk-In Empty Response) to NAK. Unfortunately, this hangs
the USB controller and requires the USB controller to
be reset.

The fix proposed is to have the lan78xx controller respond
by setting BIR to ZLP.

Signed-off-by: Andrew Thomas <andrew.thomas@oracle.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
6 years agoMerge git://git.denx.de/u-boot-imx
Tom Rini [Wed, 27 Jun 2018 17:09:55 +0000 (13:09 -0400)]
Merge git://git.denx.de/u-boot-imx

6 years agofw_printenv: Don't bail out directly after one env read error
Joe Hershberger [Tue, 26 Jun 2018 09:37:59 +0000 (12:37 +0300)]
fw_printenv: Don't bail out directly after one env read error

When using a redundant environment a read error should simply mean to
not use that copy instead of giving up completely. The other copy may
be just fine.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Ioan-Adrian Ratiu <adrian.ratiu@ni.com>
6 years agoimx: bx50v3: fix Maintainers
Stefano Babic [Wed, 27 Jun 2018 11:02:36 +0000 (13:02 +0200)]
imx: bx50v3: fix Maintainers

This fixes the warnings:

WARNING: no status info for 'ge_bx50v3'
WARNING: no maintainers for 'ge_bx50v3

Signed-off-by: Stefano Babic <sbabic@denx.de>
6 years agomtd: nand: mxs_nand_spl: add mxs_flash_full_ident
Jörg Krause [Sun, 14 Jan 2018 18:26:40 +0000 (19:26 +0100)]
mtd: nand: mxs_nand_spl: add mxs_flash_full_ident

For now, the existing SPL MXS NAND driver only supports to identify
ONFi-compliant NAND chips. In order to allow identifying
non-ONFi-compliant chips add `mxs_flash_full_ident()` which uses the
`nand_get_flash_type()` functionality from `nand_base.c` to lookup
for supported NAND chips in the chip ID list.

For compatibility reason the full identification support is only
available if the config option `CONFIG_SPL_NAND_IDENT` is enabled.

The lookup was tested on a custom i.MX6ULL board with a Toshiba
TC58NVG1S3HTAI0 NAND chip.

Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
6 years agomtd: nand: mxs_nand_spl: refactor mxs_flash_ident
Jörg Krause [Sun, 14 Jan 2018 18:26:39 +0000 (19:26 +0100)]
mtd: nand: mxs_nand_spl: refactor mxs_flash_ident

The existing `mxs_flash_ident()` is limited to identify ONFi compliant
NAND chips only. In order to support non-ONFi NAND chips refactor the
function and rename it to `mxs_flash_onfi_ident()`.

A follow-up patch will add `mxs_flash_full_ident()` which allows to use
the chip ID list to lookup for supported NAND flashs.

Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
6 years agospl, nand: add option CONFIG_SPL_NAND_IDENT to lookup for supported NAND chips
Jörg Krause [Sun, 14 Jan 2018 18:26:38 +0000 (19:26 +0100)]
spl, nand: add option CONFIG_SPL_NAND_IDENT to lookup for supported NAND chips

Add the config option `CONFIG_SPL_NAND_IDENT` for using the NAND chip ID list
to identify the NAND flash in SPL.

Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
6 years agomtd: nand: export nand_get_flash_type function
Jörg Krause [Sun, 14 Jan 2018 18:26:37 +0000 (19:26 +0100)]
mtd: nand: export nand_get_flash_type function

`nand_get_flash_type()` allows identification of supported NAND flashs.
The function is useful in SPL (like mxs_nand_spl.c) to lookup for a NAND
flash (which does not support ONFi) instead of using nand_simple.c and
hard-coding all required NAND parameters.

Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
6 years agocl-som-imx7: Remove CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
Fabio Estevam [Mon, 18 Jun 2018 15:57:35 +0000 (12:57 -0300)]
cl-som-imx7: Remove CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y

Since commit 1da1938d57b3 ("spl: Add default values for ARCH_MX7")
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is selected by default on
i.MX7 platforms, so remove it from the board defconfig.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
6 years agoimx6ul: geam: Fix fdt_file mismatch
Jagan Teki [Mon, 18 Jun 2018 05:42:19 +0000 (11:12 +0530)]
imx6ul: geam: Fix fdt_file mismatch

fdt_file is looking for imx6ul-geam-kit.dtb but Linux
has imx6ul-geam.dtb, since Linux skipped -kit on file name
by below commit.
"ARM: dts: imx6ul-geam: Skip suffix -kit from dts name"
(sha1: 182de5ebce71e469cfa686fcdf08c9cbe11ece97)

So, due to this mismatch U-Boot failed to pick the
proper dtb which eventually break the Linux boot.

This patch fixed this mismatch by
- renaming dts files
- update config option to use new dtb file
- update fdt_file to new dtb file name

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
6 years agopower: pmic: Let PFUZE3000 see all 256 registers
Trent Piepho [Wed, 25 Apr 2018 17:06:00 +0000 (10:06 -0700)]
power: pmic: Let PFUZE3000 see all 256 registers

The PFUZE3000 uses registers addresses up to 0xff.

The DM pfuze100 driver supports both pfuze100 and pfuze3000.  Allow it
to use the device type to return the correct number of registers.

Also rename the too generic PMIC_NUM_OF_REGS enumeration value for
pfuze3000 to match the other "PFUZE3000_" prefixed enumerations and the
pfuze100 enumeration value PFUZE100_NUM_OF_REGS.

Cc: Peng Fan <Peng.Fan@freescale.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
6 years agoarm: dts: imx7: colibri: add raw NAND support
Stefan Agner [Fri, 22 Jun 2018 16:06:20 +0000 (18:06 +0200)]
arm: dts: imx7: colibri: add raw NAND support

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
6 years agoarm: dts: imx7: sync with Linux
Stefan Agner [Fri, 22 Jun 2018 16:06:19 +0000 (18:06 +0200)]
arm: dts: imx7: sync with Linux

Sync with Linux commit 60cc43fc8884 ("Linux 4.17-rc1").

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
6 years agomtd: nand: mxs_nand: add support for specific ECC strength
Stefan Agner [Fri, 22 Jun 2018 16:06:18 +0000 (18:06 +0200)]
mtd: nand: mxs_nand: add support for specific ECC strength

Add support for specified ECC strength/size using device tree
properties nand-ecc-strength/nand-ecc-step-size.

This aligns behavior with the mainline driver, such that:
- If fsl,use-minimal-ecc is requested it will use data from
  data sheet/ONFI. If this is not available the driver will fail.
- If nand-ecc-strength/nand-ecc-step-size are specified those
  value will be used.
- By default maximum possible ECC strength is used

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
6 years agomtd: nand: mxs_nand: add device tree support
Stefan Agner [Fri, 22 Jun 2018 16:06:17 +0000 (18:06 +0200)]
mtd: nand: mxs_nand: add device tree support

Support driver data from device tree. Also support fsl,use-minimal-ecc
similar to Linux' GPMI NAND driver.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
6 years agomtd: nand: mxs_nand: move structs into header file
Stefan Agner [Fri, 22 Jun 2018 16:06:16 +0000 (18:06 +0200)]
mtd: nand: mxs_nand: move structs into header file

Move structs into header file so we can use a separate compile
unit for device tree support.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
6 years agomtd: nand: mxs_nand: add use_minimum_ecc to struct
Stefan Agner [Fri, 22 Jun 2018 16:06:15 +0000 (18:06 +0200)]
mtd: nand: mxs_nand: add use_minimum_ecc to struct

Add use_minimum_ecc as struct mxs_nand_info field in preparation
for device tree support.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
6 years agomtd: nand: mxs_nand: separate board/controller init
Stefan Agner [Fri, 22 Jun 2018 16:06:14 +0000 (18:06 +0200)]
mtd: nand: mxs_nand: separate board/controller init

In preparation for device tree support separate board init
from controller init similar to other raw NAND drivers.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
6 years agomtd: nand: mxs_nand: use more precise function name
Stefan Agner [Fri, 22 Jun 2018 16:06:13 +0000 (18:06 +0200)]
mtd: nand: mxs_nand: use more precise function name

This function initializes DMA descriptors so mxs_nand_init_dma is
more precise. It also frees up the rather generic name mxs_nand_init.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
6 years agomtd: nand: mxs_nand: move register structs to driver data
Stefan Agner [Fri, 22 Jun 2018 16:06:12 +0000 (18:06 +0200)]
mtd: nand: mxs_nand: move register structs to driver data

Move GPMI and BCH register structs to the driver struct mxs_nand_info
in prepartion for device tree support.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>