Wolfgang Denk [Mon, 7 Apr 2008 21:55:47 +0000 (23:55 +0200)]
Merge branch 'master' of git://denx.de/git/u-boot-cfi-flash
Wolfgang Denk [Mon, 7 Apr 2008 21:52:32 +0000 (23:52 +0200)]
Merge branch 'master' of git://denx.de/git/u-boot-ppc4xx
Stefan Roese [Thu, 3 Apr 2008 12:50:34 +0000 (14:50 +0200)]
ppc4xx: Fix 4xx enet driver to support 460GT EMAC2+3
This patch fixes a problem with the RGMII setup of the 460GT. The 460GT
has 2 RGMII instances and we need to configure the 2nd RGMII instance
for the EMAC2+3 channels.
Signed-off-by: Stefan Roese <sr@denx.de>
Jean-Christophe PLAGNIOL-VILLARD [Wed, 2 Apr 2008 06:03:56 +0000 (08:03 +0200)]
MPC8xx: Fix libfdt support introduced in commit
77ff7b74
fdt.c: In function 'ft_cpu_setup':
fdt.c:33: warning: implicit declaration of function 'do_fixup_by_prop_u32'
fdt.c:39: warning: implicit declaration of function 'do_fixup_by_compat_u32'
fdt.c:43: warning: implicit declaration of function 'fdt_fixup_ethernet'
fdt.c:45: warning: implicit declaration of function 'fdt_fixup_memory'
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Andy Fleming [Tue, 1 Apr 2008 01:45:56 +0000 (20:45 -0500)]
Fix fdt set command to conform to dts spec
The fdt set command was treating properties specified as <00> and <0011>
as byte streams, rather than as an array of cells. As we already have
syntax for expressing the desire for a stream of bytes ([ xx xx ...]),
we should use the <> syntax to describe arrays of cells, which are always
32-bits per element. If we imagine this likely (IMHO) scenario:
> fdt set /ethernet-phy@1 reg <1>
With the old code, this would create a bad fdt, since the reg cell would be
made to be one byte in length. But the cell must be 4 bytes, so this would
break mysteriously.
Also, the dts spec calls for constants inside the angle brackets (<>)
to conform to C constant standards as they pertain to base.
Take this scenario:
> fdt set /ethernet@f00 reg <0xe250000\ 0x1000>
The old fdt command would complain that it couldn't parse that. Or, if you
wanted to specify that a certain clock ran at 33 MHz, you'd be required to
do this:
> fdt set /mydev clock <
1f78a40>
Whereas the new code will accept decimal numbers.
While I was in there, I extended the fdt command parser to handle property
strings which are split across multiple arguments:
> fdt set /ethernet@f00 interrupts < 33 2 34 2 36 2 >
> fdt p /ethernet@f00
ethernet@f00 {
interrupts = <0x21 0x2 0x22 0x2 0x24 0x2>;
};
Lastly, the fdt print code was rearranged slightly to print arrays of cells
if the length of the property is a multiple of 4 bytes, and to not print
leading zeros.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Stefan Roese [Wed, 2 Apr 2008 06:39:33 +0000 (08:39 +0200)]
ppc4xx: Canyonlands: Init SATA/PCIe port correctly
Canyonlands (460EX) shares the first PCIe interface with the SoC SATA
interface. This usage can be configured with the jumper J6. This patch
correctly configures the SATA/PCIe PHY for SATA usage when this jumper
is installed.
Signed-off-by: Stefan Roese <sr@denx.de>
Kim Phillips [Fri, 28 Mar 2008 22:37:49 +0000 (17:37 -0500)]
remove remaining CONFIG_OF_HAS_{UBOOT_ENV,BD_T} code
finish off what commit
43ddd9c820fec44816188f53346b464e20b3142d,
"Remove deprecated CONFIG_OF_HAS_UBOOT_ENV and CONFIG_OF_HAS_BD_T"
started.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Jean-Christophe PLAGNIOL-VILLARD [Tue, 1 Apr 2008 05:30:51 +0000 (07:30 +0200)]
dataflash: Move CONFIG_HAS_DATAFLASH to Makefile
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Tor Krill [Fri, 28 Mar 2008 14:29:45 +0000 (15:29 +0100)]
Add Vitesse 8601 support to TSEC driver
Add phy_info for Vitesse VSC8601.
Add config option, CFG_VSC8601_SKEWFIX, to enable RGMII skew timing compensation.
Signed-off-by: Tor Krill <tor@excito.com>
Reviewed-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Daniel Hellstrom [Mon, 31 Mar 2008 14:25:00 +0000 (14:25 +0000)]
SPARC: added SMC91111 driver in and out macros for LEON processors.
This patch makes SPARC/LEON processors able to read and write
to the SMC91111 chip using the chip external I/O bus of the memory
controller. This patchs defines the standard in and out macros
expected by the SMC9111 driver.
To access that I/O bus one must set up the memory controller
(MCTRL or FTMCTRL) correctly. It is assumed that the user sets
up this correctly when the other MCTRL parameters are set up. It
can be set up from the board configuration header file.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Stelian Pop [Wed, 26 Mar 2008 17:52:34 +0000 (18:52 +0100)]
Add maintainership information for AT91CAP9ADK and AT91SAM9260EK boards
Signed-off-by: Stelian Pop <stelian@popies.net>
Jean-Christophe PLAGNIOL-VILLARD [Mon, 31 Mar 2008 19:31:04 +0000 (21:31 +0200)]
AT91SAM9260EK: Move CONFIG_CMD_NAND to Makefile
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Stelian Pop [Wed, 26 Mar 2008 17:52:33 +0000 (18:52 +0100)]
Add support for AT91SAM9260EK
Support for booting from internal DataFlash, external DataFlash card
or NAND flash is available.
Signed-off-by: Stelian Pop <stelian@popies.net>
Jean-Christophe PLAGNIOL-VILLARD [Mon, 31 Mar 2008 19:20:49 +0000 (21:20 +0200)]
AT91SAM9: Move CONFIG_HAS_DATAFLASH to Makefile
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Jean-Christophe PLAGNIOL-VILLARD [Mon, 31 Mar 2008 19:12:17 +0000 (21:12 +0200)]
AT91CAP9ADK: Move CONFIG_CMD_NAND to Makefile
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Stelian Pop [Wed, 26 Mar 2008 19:52:32 +0000 (20:52 +0100)]
Port AT91CAP9 to the new headers
Adapt the existing AT91CAP9 code to the new headers and APIs.
Signed-off-by: Stelian Pop <stelian@popies.net>
Stelian Pop [Wed, 26 Mar 2008 18:52:31 +0000 (19:52 +0100)]
Finish header files reworking
Replace AT91CAP9.h file with several splitted header files coming
from the Linux kernel.
This is part 2 of the replacement: more header imports and edits.
Signed-off-by: Stelian Pop <stelian@popies.net>
Stelian Pop [Wed, 26 Mar 2008 18:52:30 +0000 (19:52 +0100)]
Import several header files from Linux
Replace AT91CAP9.h file with several splitted header files coming
from the Linux kernel.
This is part 1 of the replacement: pristine header files import.
Signed-off-by: Stelian Pop <stelian@popies.net>
Stelian Pop [Wed, 26 Mar 2008 19:52:28 +0000 (20:52 +0100)]
Move at91cap9 specific files to at91sam9 directory
AT91CAP9 and AT91SAM9 SoCs are very close hardware wise, so a
common infrastructure can be used. Let this infrastructure be
named after the AT91SAM9 family, and move the existing AT91CAP9
files to the new place.
Signed-off-by: Stelian Pop <stelian@popies.net>
Stelian Pop [Wed, 26 Mar 2008 20:52:27 +0000 (21:52 +0100)]
Use timer_init() instead of board supplied interrupt_init()
The timer on AT91CAP9/AT91SAM9 is supplied by the SoC, and not by
the board, so use timer_init() instead of interrupt_init().
Signed-off-by: Stelian Pop <stelian@popies.net>
Stelian Pop [Wed, 26 Mar 2008 20:52:36 +0000 (21:52 +0100)]
Cleanup DataFlash partition handling
DataFlash partition information has become a mess. This patch
defines a single partition scheme for Atmel DataFlashes. This partition
scheme will be used by all AT91CAP9 and AT91SAM9 boards.
Signed-off-by: Stelian Pop <stelian@popies.net>
TsiChung Liew [Fri, 28 Mar 2008 13:47:45 +0000 (08:47 -0500)]
ColdFire: Fix alignment issue after CONFIG_IDENT_STRING in start.S
When the version_string function in start.S is not 4-byte align,
it will cause the compiler generates "unaligned opcodes detected
in executable segment". This issue affects all ColdFire CPUs.
By adding .align 4 after CONFIG_IDENT_STRING, it will pad 0's if
it is not aligned.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: John Rigby <jrigby@freescale.com>
TsiChung Liew [Tue, 25 Mar 2008 20:41:15 +0000 (15:41 -0500)]
ColdFire: Add dspi and serial flash support for MCF5445x
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: John Rigby <jrigby@freescale.com>
TsiChung Liew [Tue, 18 Mar 2008 22:37:01 +0000 (17:37 -0500)]
ColdFire: Remove R5200 board
This board never went into production
Signed-off-by: Zachary P. Landau <zachary.landau@labxtechnologies.com>
Acked-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: John Rigby <jrigby@freescale.com>
Matthew Fettke [Thu, 24 Jan 2008 20:02:32 +0000 (14:02 -0600)]
ColdFire: Added M5275EVB support.
Signed-off-by: Matthew Fettke <mfettke@videon-central.com>
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: John Rigby <jrigby@freescale.com>
Matthew Fettke [Mon, 4 Feb 2008 21:38:20 +0000 (15:38 -0600)]
ColdFire: Added MCF5275 cpu support.
Signed-off-by: Matthew Fettke <mfettke@videon-central.com>
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: John Rigby <jrigby@freescale.com>
TsiChung Liew [Mon, 17 Mar 2008 17:14:11 +0000 (12:14 -0500)]
ColdFire: Define bootdelay in configuration file for M52277EVB
Signed-off-by: Matt Wadel <Matt.Waddel@freescale.com>
Acked-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: John Rigby <jrigby@freescale.com>
TsiChung Liew [Mon, 17 Mar 2008 17:09:07 +0000 (12:09 -0500)]
ColdFire: Fix second memory Chipselect for M5475EVB
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: John Rigby <jrigby@freescale.com>
TsiChung Liew [Thu, 13 Mar 2008 19:26:32 +0000 (14:26 -0500)]
ColdFire: Update correct FLASHBAR and RAMBAR1 for MCF5282
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: John Rigby <jrigby@freescale.com>
Larry Johnson [Mon, 31 Mar 2008 01:33:04 +0000 (20:33 -0500)]
ppc4xx: Add CFG_MEM_TOP_HIDE to Denali SPD-based SDRAM setup
Signed-off-by: Larry Johnson <lrj@acm.org>
Stefan Roese [Mon, 31 Mar 2008 10:20:48 +0000 (12:20 +0200)]
ppc4xx: Small whitespace fix of esd patches
Signed-off-by: Stefan Roese <sr@denx.de>
Matthias Fuchs [Sun, 30 Mar 2008 16:52:44 +0000 (18:52 +0200)]
ppc4xx: Cleanup PMC440 board support
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Matthias Fuchs [Sun, 30 Mar 2008 16:52:06 +0000 (18:52 +0200)]
ppc4xx: Add ptm configuration variables for PMC440
Add support for the ptm1la, ptm1ms, ptm2la and ptm2ms
environment variables.
Cleanup pci_target_init.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Matthias Fuchs [Sun, 30 Mar 2008 16:01:15 +0000 (18:01 +0200)]
ppc4xx: Minor updates for DU440 boards
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Mike Frysinger [Tue, 19 Feb 2008 05:54:20 +0000 (00:54 -0500)]
Blackfin: cleanup and overhaul common board init functions
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Tue, 19 Feb 2008 05:50:58 +0000 (00:50 -0500)]
Blackfin: cleanup lib_blackfin/cache.c
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Sun, 30 Mar 2008 19:46:13 +0000 (15:46 -0400)]
Blackfin: unify cpu and boot modes
All of the duplicated code for Blackfin processors and boot modes have been
unified. After all, the core is the same for all processors, just the
peripheral set differs (which gets handled in the drivers).
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Stelian Pop [Wed, 26 Mar 2008 21:52:35 +0000 (22:52 +0100)]
Fix CFG_NO_FLASH compilation.
Many Atmel boards have no "real" (NOR) flash on board, and rely only
on DataFlash and NAND memories. This patch enables CFG_NO_FLASH to
be present in a board configuration file, while still enabling flash
commands like 'flinfo', 'protect', etc.
Signed-off-by: Stelian Pop <stelian@popies.net>
Mike Frysinger [Tue, 19 Feb 2008 05:58:13 +0000 (00:58 -0500)]
Blackfin: BF537-stamp: cleanup spi flash driver
This punts the old spi flash driver for a new/generalized one until the
common one can be integrated.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Ben Warren [Sun, 30 Mar 2008 15:34:34 +0000 (11:34 -0400)]
Fix macro typo in common/cmd_mii.c
This typo was introduced in commit
233a8bcd94997f3f345833a3b82e836222f2a206. I
actually applied the wrong patch.
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Jean-Christophe PLAGNIOL-VILLARD [Sun, 30 Mar 2008 14:39:53 +0000 (16:39 +0200)]
use correct at91rm9200 register name in m501sk board
This fixes a naming bug for at91rm9200 lowlevel init code:
NOR boot flash is on chipselect 0, not chipselect 2. This
makes code use the register name from chip datasheets.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
David Brownell [Fri, 18 Jan 2008 20:55:00 +0000 (12:55 -0800)]
use correct at91rm9200 register name
This fixes a naming bug for at91rm9200 lowlevel init code:
NOR boot flash is on chipselect 0, not chipselect 2. This
makes code use the register name from chip datasheets.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
David Brownell [Fri, 18 Jan 2008 20:45:45 +0000 (12:45 -0800)]
add missing ARM boards to MAKEALL
Add some missing ARM boards to MAKEALL. These build correctly,
unlike several of the boards already listed.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Peter Pearse [Sun, 30 Mar 2008 10:34:09 +0000 (11:34 +0100)]
Bracket READ_TIMER macro in cpu/arm1136/omap24xx/interrupts.c
to prevent compilation error.
Signed-off-by: Peter Pearse <peter.pearse@arm.com>
Guennadi Liakhovetski [Sun, 30 Mar 2008 10:32:30 +0000 (11:32 +0100)]
Support for the MX31ADS evaluation board from Freescale
This patch adds support for the MX31ADS evaluation board from Freescale,
initialization code is copied from RedBoot sources, also provided by Freescale.
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Sascha Hauer [Sun, 30 Mar 2008 10:32:27 +0000 (11:32 +0100)]
Phytec Phycore-i.MX31 support
This patch adds support for the Phytec Phycore-i.MX31 board
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Sascha Hauer [Sun, 30 Mar 2008 10:32:24 +0000 (11:32 +0100)]
mx31 litekit support
This patch adds support for the mx31 litekit board
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Sascha Hauer [Sun, 30 Mar 2008 10:32:21 +0000 (11:32 +0100)]
add SMSC LAN9x1x Network driver
This patch adds a driver for the following smsc network controllers:
LAN9115
LAN9116
LAN9117
LAN9215
LAN9216
LAN9217
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Sascha Hauer [Sun, 30 Mar 2008 10:32:16 +0000 (11:32 +0100)]
add an i2c driver for mx31
This patch adds an i2c driver for Freescale i.MX processors
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Sascha Hauer [Sun, 30 Mar 2008 10:30:43 +0000 (11:30 +0100)]
core support for Freescale mx31
This patch adds the core support for Freescale mx31
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Sascha Hauer [Sun, 30 Mar 2008 10:28:46 +0000 (11:28 +0100)]
Separate omap24xx specific code from arm1136
Move omap24xx code to cpu/arm1136/omap24xx, rename include/asm-arm/arch-arm1136 to cpu/arm1136/omap24xx.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Peter Pearse [Sun, 30 Mar 2008 10:23:05 +0000 (11:23 +0100)]
Add pmdra into MAKEALL
Signed-off-by: Peter Pearse <peter.pearse@arm.com>
Pieter Voorthuijsen [Sun, 30 Mar 2008 10:21:58 +0000 (11:21 +0100)]
Adds support for the Prodrive PMDRA board, based on a DM6441
Signed-off-by: Pieter Voorthuijsen <pv@prodrive.nl>
Pieter Voorthuijsen [Sun, 30 Mar 2008 10:11:34 +0000 (11:11 +0100)]
Removes all board specific code from the arch. part for DM644x (DaVinci) boards
Signed-off-by: Pieter Voorthuijsen <pv@prodrive.nl>
Dirk Behme [Sun, 30 Mar 2008 10:09:01 +0000 (11:09 +0100)]
- Remove *_masked() functions as noted by Wolfgang
- Adapt register naming to recent TI spec (sprue26, March 2007)
- Fix reset_timer() handling
- As reported by Pieter [1] the overflow fix introduced a
delay of factor 16 (e.g 2 seconds became 32). While the
overflow fix is basically okay, it missed to divide udelay by
16, too. Fix this.
[1] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/38179
- Remove software division of timer count value (DIV(x)
macro) and do it in hardware (TIM_CLK_DIV).
Many thanks to Troy Kisky <troy.kisky@boundarydevices.com>
and Pieter Voorthuijsen <pieter.voorthuijsen@Prodrive.nl> for
the hints & testing!
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Acked-by: Pieter Voorthuijsen <pieter.voorthuijsen@Prodrive.nl>
Andre Schwarz [Thu, 6 Mar 2008 15:45:44 +0000 (16:45 +0100)]
new PHY @ e1000 - 2nd try
Add 82541ER device with latest integrated IGP2 PHY.
Introduced CONFIG_E1000_FALLBACK_MAC for NIC bring-up with empty eeprom.
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Daniel Hellstrom [Fri, 28 Mar 2008 19:22:53 +0000 (20:22 +0100)]
SPARC/LEON3: Added GRETH Ethernet 10/100/1000 driver.
GRETH is an Ethernet 10/100 or 10/100/1000 MAC with out without
a debug link (EDCL). The GRETH core is documented in GRIP.pdf
available at www.gaisler.com.
If the GRETH has GigaBit support (GBIT, Scatter gather, checksum
offloading etc.) can be determined by a bit in the control register.
The GBIT MAC is supported by operating in GRTEH 10/100 legacy mode.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Tsi-Chung Liew [Mon, 17 Mar 2008 22:08:22 +0000 (17:08 -0500)]
Add CONFIG_MII_INIT in cmd_mii.c
Provide common configuration in do_mii() to execute mii_init()
for all cpu architectures
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Tsi-Chung Liew [Mon, 17 Mar 2008 22:08:16 +0000 (17:08 -0500)]
ColdFire: Fix FEC transmit issue for MCF5275
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Aras Vaichas [Tue, 25 Mar 2008 22:43:57 +0000 (09:43 +1100)]
DHCP request fix for Windows Server 2003
Added option CONFIG_BOOTP_DHCP_REQUEST_DELAY. This provides an optional
delay before sending "DHCP Request" in net/bootp.c. Required to overcome
interoperability problems with Windows Server 200x DHCP server when U-Boot
client responds too fast for server to handle.
Signed-off-by: Aras Vaichas <arasv@magtech.com.au>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Gerald Van Baren [Sat, 29 Mar 2008 22:08:02 +0000 (18:08 -0400)]
Merge git://www.denx.de/git/u-boot into uboot
Daniel Hellstrom [Fri, 28 Mar 2008 19:40:19 +0000 (20:40 +0100)]
MTD/CFI: flash_read64 is defined a weak function (for SPARC)
SPARC has implemented __raw_readq, it reads 64-bit from any 32-bit address.
SPARC CPUs implement flash_read64 which calls __raw_readq.
For current SPARC architectures (LEON2 and LEON3) each read from the
FLASH must lead to a cache miss. This is because FLASH can not be set
non-cacheable since program code resides there, and alternatively disabling
cache is poor from performance view, or doing a cache flush between each
read is even poorer.
Forcing a cache miss on a SPARC is done by a special instruction "lda" -
load alternative space, the alternative space number (ASI) is processor
implementation spcific and can be found by including <asm/processor.h>.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
Joakim Tjernlund [Fri, 28 Mar 2008 14:41:25 +0000 (15:41 +0100)]
Make MPC83xx one step closer to full relocation.
Remove a few absolute references to CFG_MONITOR_BASE for ppc/mpc83xx
and use GOT relative reference.
Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Michael Barkowski [Thu, 27 Mar 2008 18:34:43 +0000 (14:34 -0400)]
mpc8323erdb: fix EEPROM page size and get MAC from EEPROM
This patch fixes eeprom page size so that you can now write more than
64 bytes at a time.
It also makes the board take MAC addresses, if found, from EEPROM.
User should place up to 4 addresses at offset 0x7f00, for
eth{,1,2,3}addr. Any unused addresses should be zero. This group of
four six-byte values should have it's CRC at the end. crc32 and
eeprom commands can be used to accomplish this.
If CRC fails, MAC addresses come from the environment. If CRC
succeeds, the environment is overwritten at startup.
Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Michael Barkowski [Fri, 28 Mar 2008 19:15:38 +0000 (15:15 -0400)]
mpc8323erdb: define CONFIG_PCI_SKIP_HOST_BRIDGE
Commit
55774b512fdf63c0516d441cc5da7c54bbffb7f2 broke the onboard USB
controller on the PCI bus in Linux on the MPC8323ERDB.
This fixes it by defining CONFIG_PCI_SKIP_HOST_BRIDGE in the board's
config file.
Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Kim Phillips [Fri, 28 Mar 2008 15:19:07 +0000 (10:19 -0500)]
mpc83xx: cleanup System Part and Revision ID Register (SPRIDR) code
in the spirit of commit
1ced121600b2060ab2ff9f0fddd9421fd70a0dc6,
85xx's "Update SVR numbers to expand support", simplify SPRIDR processing
and processor ID display. Add REVID_{MAJ,MIN}OR macros to make
REVID dependent code simpler. Also added PARTID_NO_E and IS_E_PROCESSOR
convenience macros.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Kim Phillips [Fri, 28 Mar 2008 15:18:53 +0000 (10:18 -0500)]
mpc83xx: display ddr frequency in board_add_ram_info banner
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Kim Phillips [Fri, 28 Mar 2008 15:18:40 +0000 (10:18 -0500)]
mpc83xx: unreinvent mem_clk
delete ddr_clk and use mem_clk instead. Rename other ddr_*_clk to
mem_*_clk for consistency's sake.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Kim Phillips [Fri, 28 Mar 2008 19:31:23 +0000 (14:31 -0500)]
mpc83xx: enable the SATA interface on mpc8315 rdb and mpc837x rdb boards
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Dave Liu [Wed, 26 Mar 2008 14:57:19 +0000 (22:57 +0800)]
mpc83xx: enable the SATA interface on mpc837xemds board
Enable the first two SATA interfaces on MPC837xEMDS board,
The two SATA ports are on LYNX1. (SATA0/1 on J4/5)
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Dave Liu [Wed, 26 Mar 2008 14:56:36 +0000 (22:56 +0800)]
mpc83xx: initialize serdes for MPC837xEMDS boards
This patch is stolen from Anton Vorontsov's patch
for mpc837xerdb boards.
The reference clk and xcorevdd voltage of serdes1/2
is same between mpc837xemds and mpc837xerdb.
8377E: LYNX1- 2 SATA LYNX2- 2 PCIE
8378E: LYNX1- 2 SGMII LYNX2- 2 PCIE
8379E: LYNX1- 2 SATA LYNX2- 2 SATA
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Stefan Roese [Fri, 28 Mar 2008 13:09:04 +0000 (14:09 +0100)]
ppc4xx: Canyonlands: Print SATA/PCIe configuration and board revision
Canyonlands (460EX) shares the first PCIe interface with the SoC SATA
interface. This usage can be configured with the jumper J6. This patch
displays the current configuration upon bootup and changes the PCIe
init loop, to only initialize the availabel PCIe slots.
Signed-off-by: Stefan Roese <sr@denx.de>
Tor Krill [Fri, 28 Mar 2008 10:29:10 +0000 (11:29 +0100)]
MTD/CFI: Add support for 16bit legacy AMD flash
Add entry for 512Kx16 AMD flash to jedec_table.
Read out 16bit device id if chipwidth is 16bit.
Fixed coding style after Stefans feedback
Signed-off-by: Tor Krill <tor@excito.com>
Stefan Roese [Fri, 28 Mar 2008 10:02:53 +0000 (11:02 +0100)]
ppc: Small change to CFG_MEM_TOP_HIDE description
Signed-off-by: Stefan Roese <sr@denx.de>
Nobuhiro Iwamatsu [Thu, 27 Mar 2008 06:44:12 +0000 (15:44 +0900)]
sh: Add support stat structure and stat.h
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Mark Jonas [Sat, 22 Mar 2008 18:27:52 +0000 (19:27 +0100)]
sh: Removed warning when compiling drivers/serial/serial_sh.c.
Signed-off-by: Mark Jonas <mark.jonas@de.bosch.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Nobuhiro Iwamatsu [Wed, 12 Mar 2008 09:02:57 +0000 (18:02 +0900)]
sh: Remove disable_ctrlc function from R7780MP
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Nobuhiro Iwamatsu [Wed, 12 Mar 2008 08:55:15 +0000 (17:55 +0900)]
sh: Add maintainer of R7780MP to MAINTAINER file
Update MAINTAINER entry for R7780MP. And fix maintainer's name.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Nobuhiro Iwamatsu [Tue, 25 Mar 2008 08:11:24 +0000 (17:11 +0900)]
sh: Add support Renesas Solutions R2D plus board
R2D plus is SH reference board used with SH7751R.
This board has 266Mhz CPU, 64MB SDRAM, Cardbus, CF interface,
one PCI bus, VGA, and two Ethernet controller.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Nobuhiro Iwamatsu [Wed, 12 Mar 2008 03:15:29 +0000 (12:15 +0900)]
sh: Add support SH4 cache control
Add support SH4 cache control and flash_cache function
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Nobuhiro Iwamatsu [Sun, 23 Mar 2008 16:53:01 +0000 (01:53 +0900)]
sh: Add support PCI host driver for SH7751/SH7751R
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Nobuhiro Iwamatsu [Sun, 23 Mar 2008 17:11:26 +0000 (02:11 +0900)]
sh: Move SuperH PCI driver from cpu/sh4 to drivers/pci
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Nobuhiro Iwamatsu [Wed, 12 Mar 2008 03:10:28 +0000 (12:10 +0900)]
sh: Add support SuperH SH7751/SH7751R
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Mark Jonas [Mon, 10 Mar 2008 10:37:10 +0000 (11:37 +0100)]
sh: Added support for SH7720 based board MPR2.
Signed-off-by: Mark Jonas <mark.jonas@de.bosch.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Nobuhiro Iwamatsu [Thu, 6 Mar 2008 05:05:53 +0000 (14:05 +0900)]
sh: Fix receive FIFO level register of SH4A
Receive FIFO level register is different in SH4A.
Because register is different, cannot occasionally receive data.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Yusuke Goda [Tue, 11 Mar 2008 03:55:12 +0000 (12:55 +0900)]
sh: Add support Renesas Solutions R7780MP
Renesas Solutions R7780MP is a reference board on SH7780.
This board has serial, 10/100 base Ethernet deivice, CF slot
and VGA devices. This board can set extension board.
Extension board has 10/100/1000 base Ethernet device, PCI slot,
S-ATA, iDVR slot.
Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Yusuke Goda [Wed, 5 Mar 2008 05:30:02 +0000 (14:30 +0900)]
sh: Add support PCI of SuperH and SH7780
This patch add support PCI of SuperH base code and SH7780 specific code.
Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Yusuke Goda [Wed, 5 Mar 2008 05:23:26 +0000 (14:23 +0900)]
sh: Add support SH7780
SH7780 is CPU of Renesas Technology.
This CPU has
- CPU clock 400MHz
- PCI support
- DDR-SDRAM controller
- etc ...
Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
goda.yusuke [Fri, 25 Jan 2008 11:46:36 +0000 (20:46 +0900)]
sh: Add support Renesas Solutions Migo-R board
Migo-R is a board based on SH7722 and has may devices.
In this patch, supported SCIF, NOR flash and Ethernet.
Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Bartlomiej Sieka [Thu, 27 Mar 2008 14:06:40 +0000 (15:06 +0100)]
Fix host tool build breakage, take two
Revert commit
87c8431f and fix build breakage so that the build continues
to work on FC systems.
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Stefan Roese [Wed, 19 Mar 2008 08:36:47 +0000 (09:36 +0100)]
ppc4xx: Enable ECC on LWMON5
Since all ECC related problems seem to be resolved on LWMON5, this patch
now enables ECC support.
We have to write the ECC bytes by zeroing and flushing in smaller
steps, since the whole 256MByte takes too long for the external
watchdog.
Signed-off-by: Stefan Roese <sr@denx.de>
Larry Johnson [Mon, 17 Mar 2008 16:10:35 +0000 (11:10 -0500)]
ppc4xx: Updates to Korat-specific code
This patch contains updates for changes for the Korat PPC440EPx board.
These changes include:
(1) Support for "permanent" and "upgradable" copies of U-Boot, as
described in the new "doc/README.korat" file;
(2) a new memory map for the registers in the board's CPLD;
(3) a revised format for manufacturer's data in serial EEPROM; and
(4) changes to track updates to U-Boot for the Sequoia board.
Signed-off-by: Larry Johnson <lrj@acm.org>
Markus Brunner [Thu, 27 Mar 2008 09:46:25 +0000 (10:46 +0100)]
ppc4xx: PPC405EP Set EMAC noise filter bits
This bug was introduced with commit
aee747f19b460a0e9da20ff21e90fdaac1cec359
which enabled CFG_4xx_GPIO_TABLE for PPC405 and unintentionally
disabled the setting of the emac noise filter bits for PPC405EP when CFG_4xx_GPIO_TABLE is set.
Signed-off-by: Markus Brunner <super.firetwister@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Mike Nuss [Wed, 20 Feb 2008 16:54:20 +0000 (11:54 -0500)]
ppc4xx: Reconfigure PLL for 667MHz processor for PPC440EPx
On PPC440EPx without a bootstrap I2C EEPROM, the PLL can be reconfigured
after startup to change the speed of the clocks. This patch adds the
option CFG_PLL_RECONFIG. If this option is set to 667, the CPU
initialization code will reconfigure the PLL to run the system with a CPU
frequency of 667MHz and PLB frequency of 166MHz, without the need for an
external EEPROM.
Signed-off-by: Mike Nuss <mike@terascala.com>
Acked-by: Stefan Roese <sr@denx.de>
Haavard Skinnemoen [Thu, 27 Mar 2008 08:12:40 +0000 (09:12 +0100)]
new-image: Fix host tool build breakage
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Stefan Roese [Thu, 27 Mar 2008 09:24:03 +0000 (10:24 +0100)]
ppc: Set CFG_MEM_TOP_HIDE to 0 if not already defined
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Wed, 19 Mar 2008 09:23:43 +0000 (10:23 +0100)]
ppc4xx: Add fdt support to Prodrive alpr
Since this board will probably be ported to arch/powerpc in the
near future, we add device tree support now. This way we are
"ready" for arch/powerpc from now on.
Signed-off-by: Stefan Roese <sr@denx.de>
Pieter Voorthuijsen [Mon, 17 Mar 2008 08:27:56 +0000 (09:27 +0100)]
ppc4xx: Enable cache support on the ALPR board
Signed-off-by: Pieter Voorthuijsen <pv@prodrive.nl>
Stefan Roese [Wed, 26 Mar 2008 09:14:11 +0000 (10:14 +0100)]
ppc: Add CFG_MEM_TOP_HIDE option to hide memory area that doesn't get "touched"
If CFG_MEM_TOP_HIDE is defined in the board config header, this specified
memory area will get subtracted from the top (end) of ram and won't get
"touched" at all by U-Boot. By fixing up gd->ram_size the Linux kernel
should gets passed the now "corrected" memory size and won't touch it
either. This should work for arch/ppc and arch/powerpc. Only Linux board
ports in arch/powerpc with bootwrapper support, which recalculate the
memory size from the SDRAM controller setup, will have to get fixed
in Linux additionally.
This patch enables this config option on some PPC440EPx boards as a workaround
for the CHIP 11 errata. Here the description from the AMCC documentation:
CHIP_11: End of memory range area restricted access.
Category: 3
Overview:
The 440EPx DDR controller does not acknowledge any
transaction which is determined to be crossing over the
end-of-memory-range boundary, even if the starting address is
within valid memory space. Any such transaction from any PLB4
master will result in a PLB time-out on PLB4 bus.
Impact:
In case of such misaligned bursts, PLB4 masters will not
retrieve any data at all, just the available data up to the
end of memory, especially the 440 CPU. For example, if a CPU
instruction required an operand located in memory within the
last 7 words of memory, the DCU master would burst read 8
words to update the data cache and cross over the
end-of-memory-range boundary. Such a DCU read would not be
answered by the DDR controller, resulting in a PLB4 time-out
and ultimately in a Machine Check interrupt. The data would
be inaccessible to the CPU.
Workaround:
Forbid any application to access the last 256 bytes of DDR
memory. For example, make your operating system believe that
the last 256 bytes of DDR memory are absent. AMCC has a patch
that does this, available for Linux.
This patch sets CFG_MEM_TOP_HIDE for the following 440EPx boards:
lwmon5, korat, sequoia
The other remaining 440EPx board were intentionally not included
since it is not clear to me, if they use the end of ram for some
other purpose. This is unclear, since these boards have CONFIG_PRAM
defined and even comments like this:
PMC440.h:
/* esd expects pram at end of physical memory.
* So no logbuffer at the moment.
*/
It is strongly recommended to not use the last 256 bytes on those
boards too. Patches from the board maintainers are welcome.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Thu, 27 Mar 2008 09:09:05 +0000 (10:09 +0100)]
ppc4xx: Fix Canyonlands linker script (remove bogus ASSERT)
Signed-off-by: Stefan Roese <sr@denx.de>