Marek Vasut [Fri, 17 Jul 2015 02:24:18 +0000 (04:24 +0200)]
ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 6
This is kind of microseries-within-series indent cleanup.
It is clear that the read_group and write_group variables
have the same value, to just make them into one variable
called rw_group. While doing this, constify the variables
as they are constant.
It is likely that this patch has checkpatch warnings, but
for the sake of not breaking the code, these are ignored.
No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Fri, 17 Jul 2015 01:54:34 +0000 (03:54 +0200)]
ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 5
This is kind of microseries-within-series indent cleanup.
This patch fixes the broken formatting strings in debug_cond()
invocations.
It is likely that this patch has checkpatch warnings, but
for the sake of not breaking the code, these are ignored.
No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Fri, 17 Jul 2015 01:50:17 +0000 (03:50 +0200)]
ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 4
This is kind of microseries-within-series indent cleanup.
This patch cleans up the handling of grp_calibrated such
that the variable isn't used all over the place, but just
very localy. This allows trimming down the indent issues.
It is likely that this patch has checkpatch warnings, but
for the sake of not breaking the code, these are ignored.
No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Fri, 17 Jul 2015 01:44:26 +0000 (03:44 +0200)]
ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 3
This is kind of microseries-within-series indent cleanup.
This patch just tweaks the indentation so it is visible
what to do with the grp_calibrated variable.
It is likely that this patch has checkpatch warnings, but
for the sake of not breaking the code, these are ignored.
No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Fri, 17 Jul 2015 01:22:31 +0000 (03:22 +0200)]
ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 2
This is kind of microseries-within-series indent cleanup.
This patch just tweaks the indentation so it is visible
what is supposed to go where.
It is likely that this patch has checkpatch warnings, but
for the sake of not breaking the code, these are ignored.
No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Fri, 17 Jul 2015 01:16:45 +0000 (03:16 +0200)]
ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 1
This patch just adds an expanded documentation header to the
aforementioned function. This is needed to make it easier to
match the purpose of this function with the documentation.
No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sun, 26 Jul 2015 08:57:06 +0000 (10:57 +0200)]
ddr: altera: Minor clean up of rw_mgr_mem_initialize()
Add kerneldoc and do a minor comment cleanup. No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Mon, 20 Jul 2015 02:34:51 +0000 (04:34 +0200)]
ddr: altera: Internal mem_calibrate() cleanup part 6
Add kerneldoc to this function.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Fri, 17 Jul 2015 00:50:56 +0000 (02:50 +0200)]
ddr: altera: Internal mem_calibrate() cleanup part 5
This is kind of microseries-within-series indent cleanup.
Rework the code for the the middle-loop of the mega-loop
this time and deal with the group_failed variable. Instead
of checking if the group failed in the previous calibration
part, just jump to the end of the loop if calibration did
fail and increment the counter. This shaves away one more
level of indent while making the code slightly more readable.
It is likely that this patch has checkpatch warnings, but
for the sake of not breaking the code, these are ignored.
No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Fri, 17 Jul 2015 00:40:21 +0000 (02:40 +0200)]
ddr: altera: Internal mem_calibrate() cleanup part 4
This is kind of microseries-within-series indent cleanup.
Rework the code for the last loop within the mega-loop
to make it actually readable and not an insane cryptic pile
of indent failure.
It is likely that this patch has checkpatch warnings, but
for the sake of not breaking the code, these are ignored.
No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Fri, 17 Jul 2015 00:38:51 +0000 (02:38 +0200)]
ddr: altera: Internal mem_calibrate() cleanup part 3
This is kind of microseries-within-series indent cleanup.
Rework the code for the third loop within the middle-loop
of the mega-loop to make it actually readable and not an
insane cryptic pile of indent failure.
It is likely that this patch has checkpatch warnings, but
for the sake of not breaking the code, these are ignored.
No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Fri, 17 Jul 2015 00:31:04 +0000 (02:31 +0200)]
ddr: altera: Internal mem_calibrate() cleanup part 2
This is kind of microseries-within-series indent cleanup.
Rework the code for the second loop within the middle-loop
of the mega-loop to make it actually readable and not an
insane cryptic pile of indent failure.
It is likely that this patch has checkpatch warnings, but
for the sake of not breaking the code, these are ignored.
No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Fri, 17 Jul 2015 00:21:47 +0000 (02:21 +0200)]
ddr: altera: Internal mem_calibrate() cleanup part 1
This is kind of microseries-within-series indent cleanup.
Rework the code for the first loop within the middle-loop
of the mega-loop to make it actually readable and not an
insane cryptic pile of indent failure.
It is likely that this patch has checkpatch warnings, but
for the sake of not breaking the code, these are ignored.
No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Fri, 17 Jul 2015 00:07:12 +0000 (02:07 +0200)]
ddr: altera: Trivial mem_calibrate() indent cleanup
Redo the mega-condition such that if the calibration is to be skipped,
the positive branch of the condition does all the work and returns.
The negative branch, which is in fact the default behavior, is then
converted to a code which is no longer conditional. This trims down
the indent by one level.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sun, 26 Jul 2015 08:54:15 +0000 (10:54 +0200)]
ddr: altera: Minor clean up of mem_skip_calibrate()
Perform minor coding style cleanup of the mem_skip_calibrate() function,
clean up comments and add kerneldoc. No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Mon, 20 Jul 2015 06:15:57 +0000 (08:15 +0200)]
ddr: altera: Clean up set_rank_and_odt_mask() part 3
Clean up comments and add kerneldoc.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Mon, 20 Jul 2015 06:09:05 +0000 (08:09 +0200)]
ddr: altera: Clean up set_rank_and_odt_mask() part 2
Turn the big inner if (RW_MGR_MEM_NUMBER_OF_RANKS == ...) conditional
into a switch {} statement instead. No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Mon, 20 Jul 2015 06:03:11 +0000 (08:03 +0200)]
ddr: altera: Clean up set_rank_and_odt_mask() part 1
First, invert the logic of the if (odt_mode == ...) conditional to make
the OFF mode harder to miss. It is a short piece of code right at the
end, so move it up.
Also, clean up data types and constify where applicable and clean up
the cs_and_odt_mask assignment. No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Mon, 20 Jul 2015 05:33:33 +0000 (07:33 +0200)]
ddr: altera: Clean up mem_precharge_and_activate()
Perform minor cleanup of this function, fix datatype and add kerneldoc.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 16 Jul 2015 23:57:41 +0000 (01:57 +0200)]
ddr: altera: Clean up mem_config()
Clean mem_config() function. First, reorder the math done in the
function such that WLAT and RLAT computation is together. Then,
scrap contradictory comments which do not match the result of the
math at all. Next, extract the mem_precharge_and_activate() call
from the end of the function as it is completely unrelated here.
Finally, rename the function to mem_init_latency().
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 16 Jul 2015 23:36:32 +0000 (01:36 +0200)]
ddr: altera: Clean up phy_mgr_initialize()
Zap the cryptic casts and rework the code into a slightly more
readable form. No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 16 Jul 2015 23:20:21 +0000 (01:20 +0200)]
ddr: altera: Clean up run_mem_calibrate()
Clean the function up slightly by using clrsetbits_le32() to flip
bits in registers instead of cryptic bitmasks. Zap condition checking
for PHY_DEBUG_IN_DEBUG_MODE flag, which is never set. Split the
calibration report into separate debug_mem_calibrate() function.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 16 Jul 2015 23:12:07 +0000 (01:12 +0200)]
ddr: altera: Rename initialize() to phy_mgr_initialize()
Just perform the rename to make the name more descriptive,
no functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 16 Jul 2015 23:05:36 +0000 (01:05 +0200)]
ddr: altera: Init my_param and my_gbl
Init both structures with zeroes and zap all those zeroing shenanigans
further down in the sdram_calibration_full().
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 16 Jul 2015 22:45:11 +0000 (00:45 +0200)]
ddr: altera: Rework initialize_tracking()
Clean the function up by getting rid of all the insane XOR-leftshift
combos when assembling register values. While at it, remove all the
ad-hoc variables necessary for this XOR-leftshift voodoo. Finally,
get rid of the iterative division implementation of two constants
and replace it with a DIV_ROUND_UP() macro :-)
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Fri, 17 Jul 2015 01:11:06 +0000 (03:11 +0200)]
ddr: altera: Fix ad-hoc iterative division implementation
Contemporary CPUs can perform division just fine, use this
functionality and zap another implementation of iterative
division :-)
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sun, 26 Jul 2015 09:07:19 +0000 (11:07 +0200)]
ddr: altera: Minor clean up of set_jump_as_return()
Add kerneldoc and do a minor comment cleanup.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sun, 12 Jul 2015 22:51:05 +0000 (00:51 +0200)]
ddr: altera: Factor out common code
Factor out almost common code from rw_mgr_mem_handoff() and
rw_mgr_mem_initialize() into separate rw_mgr_mem_load_user().
No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sun, 12 Jul 2015 22:44:30 +0000 (00:44 +0200)]
ddr: altera: Factor out instruction loading from rw_mgr_mem_initialize()
Pull the duplicate code out into a separate function.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sun, 19 Jul 2015 00:18:21 +0000 (02:18 +0200)]
ddr: altera: Clean up scc_mgr_apply_group_all_out_delay_add_all_ranks()
Zap unused group_bgn parameter, fix and constify data types.
Document in kerneldoc. No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Fri, 17 Jul 2015 03:33:28 +0000 (05:33 +0200)]
ddr: altera: Internal scc_mgr_apply_group_all_out_delay_add() cleanup part 2
Clean the DQS and OCT parts of the function, clean up the chopped
formatting strings in debug_cond() and slightly improve the code.
Zap group_bgn argument as it is used only in debug messages. Document
the function using kerneldoc. No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Fri, 17 Jul 2015 03:30:14 +0000 (05:30 +0200)]
ddr: altera: Internal scc_mgr_apply_group_all_out_delay_add() cleanup part 1
Apparently, in case of the DQ and DM, the value if the new_delay variable
is calculated, but the value is not used. Zap the entire code which does
calculate the value.
It is not clear to me whether or not the code is doing the right thing
in the first place. Right now, it calls scc_mgr_load_dq() and
scc_mgr_load_dm() respectively, but I suspect it might need to call
scc_mgr_apply_group_dq_out1_delay() and scc_mgr_apply_group_dm_out1_delay()
instead. This is something Altera must investigate.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Mon, 20 Jul 2015 06:41:04 +0000 (08:41 +0200)]
ddr: altera: Clean up scc_mgr_zero_group()
First, zap unused argument of the function. Next, clean up
the data types, constify where applicable, clean up comments
and add kerneldoc.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Mon, 20 Jul 2015 02:41:53 +0000 (04:41 +0200)]
ddr: altera: Clean up scc_mgr_zero_all()
Add kerneldoc, clean up datatypes and fix minor indentation issue.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sat, 18 Jul 2015 23:34:43 +0000 (01:34 +0200)]
ddr: altera: Extract scc_mgr_set_hhp_extras()
Move scc_mgr_set_hhp_extras() out of scc_set_bypass_mode() as it
has nothing to do in there. Instead, invoke it from mem_calibrate()
just before invoking scc_set_bypass_mode().
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sat, 18 Jul 2015 23:32:55 +0000 (01:32 +0200)]
ddr: altera: Clean up scc_mgr_set_hhp_extras()
Minor coding style cleanup for this function. Furthermore, move
ad-hoc debug_cond() calls from the only location from where this
function is invoked into this actual function.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Fri, 17 Jul 2015 04:07:13 +0000 (06:07 +0200)]
ddr: altera: Clean up scc_mgr_*_delay() args
Zap args which are not used by these functions, in particular
the write_group is often passed, but unused.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Fri, 17 Jul 2015 03:42:49 +0000 (05:42 +0200)]
ddr: altera: Clean up scc_mgr_apply_group_dq_out1_delay()
Remove unused write_group and group_bgn argument from this function.
Document the function using kerneldoc.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sun, 12 Jul 2015 21:39:06 +0000 (23:39 +0200)]
ddr: altera: Clean up scc_mgr_set_oct_out1_delay()
Make this function more readable, no functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Fri, 17 Jul 2015 00:06:20 +0000 (02:06 +0200)]
ddr: altera: Clean up scc_set_bypass_mode()
The mode argument of this function is not used at all, zap it.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sun, 12 Jul 2015 22:30:09 +0000 (00:30 +0200)]
ddr: altera: Clean up scc_mgr_load_dqs_for_write_group()
Make this function more readable, no functional change. Also, zap the
forward declaration, which is no longer needed.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sun, 12 Jul 2015 21:25:21 +0000 (23:25 +0200)]
ddr: altera: Implement universal scc_mgr_set_all_ranks()
Implement universal scc_mgr_set_all_ranks() function and convert
various ad-hoc implementations of similar functionality to use
this single function. Document the function in kerneldoc.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sun, 12 Jul 2015 21:14:33 +0000 (23:14 +0200)]
ddr: altera: Shuffle around scc_mgr_set_*all_ranks()
Shuffle the code around a bit, but without any functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Mon, 20 Jul 2015 05:16:42 +0000 (07:16 +0200)]
ddr: altera: Clean up scc_mgr_initialize()
Clean up the comments and add kerneldoc. No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sun, 12 Jul 2015 20:28:33 +0000 (22:28 +0200)]
ddr: altera: Implement universal scc manager config function
Implement unified scc_mgr_set() function and convert all those
9 scc_mgr_set_*() ad-hoc functions to call this one function.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sun, 12 Jul 2015 20:11:55 +0000 (22:11 +0200)]
ddr: altera: Reorder scc manager functions
This patch just puts functions which look similar next to each
other, so they can be sorted out. No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sun, 12 Jul 2015 20:07:33 +0000 (22:07 +0200)]
ddr: altera: Clean up scc manager function args
Clean up the unused args of the functions used to configure the
SCC manager.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sun, 12 Jul 2015 19:10:24 +0000 (21:10 +0200)]
ddr: altera: Clean up reg_file_set*()
Turn the insides of these functions into trivial clrsetbits_le32()
and fix the data type of their argument to reflect it's actual size.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sun, 19 Jul 2015 04:14:04 +0000 (06:14 +0200)]
ddr: altera: Clean up initialize_hps_phy()
Add brief kerneldoc.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sun, 19 Jul 2015 04:13:37 +0000 (06:13 +0200)]
ddr: altera: Clean up initialize_reg_file()
Add brief kerneldoc.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sun, 19 Jul 2015 04:12:42 +0000 (06:12 +0200)]
ddr: altera: Clean up hc_initialize_rom_data()
Clean the function up, fix data types, add kerneldoc.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sun, 12 Jul 2015 19:05:08 +0000 (21:05 +0200)]
ddr: altera: Massage addr into I/O accessors
Get rid of invocations of this sort:
addr = (u32)&base->reg;
writel(val, addr);
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sun, 12 Jul 2015 18:49:39 +0000 (20:49 +0200)]
ddr: altera: Stop using SDR_CTRLGRP_ADDRESS directly
Use the proper structure which describes these registers,
especially since this is already in place.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sun, 12 Jul 2015 18:05:54 +0000 (20:05 +0200)]
ddr: altera: Wrap SOCFPGA_SDR_ADDRESS into SDR_PHYGRP.*ADDRESS
Just trim down the constant SOCFPGA_SDR_ADDRESS + SDR_PHYGRP.*ADDRESS
in the code.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sun, 12 Jul 2015 17:03:33 +0000 (19:03 +0200)]
ddr: altera: Pluck out remaining sdr_get_addr() calls
Remove the remaining invocations of sdr_get_addr() and the function
itself. This makes the code a bit less cryptic.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sun, 12 Jul 2015 16:54:37 +0000 (18:54 +0200)]
ddr: altera: Dissolve invocation of sdr_get_addr(&sdr_mgr_.*->.*)
Instead of this indirection, just adjust the register pointer and
directly use the register base address.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sun, 12 Jul 2015 16:46:52 +0000 (18:46 +0200)]
ddr: altera: Dissolve invocation of sdr_get_addr(&sdr_rw_load.*->.*)
Instead of this indirection, just adjust the register pointer and
directly use the register base address.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sun, 12 Jul 2015 16:42:34 +0000 (18:42 +0200)]
ddr: altera: Dissolve invocation of sdr_get_addr(&sdr_scc_mgr->.*)
Instead of this indirection, just adjust the register pointer and
directly use the register base address.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sun, 12 Jul 2015 16:31:05 +0000 (18:31 +0200)]
ddr: altera: Dissolve invocation of sdr_get_addr(&sdr_reg_file->.*)
Instead of this indirection, just adjust the register pointer and
directly use the register base address.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sun, 12 Jul 2015 15:52:36 +0000 (17:52 +0200)]
ddr: altera: Zap invocation of sdr_get_addr((u32 *)BASE_RW_MGR)"
Instead of this indirection, just adjust the register pointer and
directly use the register base address.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sun, 12 Jul 2015 23:05:27 +0000 (01:05 +0200)]
ddr: altera: Clean up ugly casts in sdram_calibration_full()
Use the correct formating string in those debug_cond() invocations
and zap those unnecessary ugly casts.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sat, 18 Jul 2015 00:23:29 +0000 (02:23 +0200)]
ddr: altera: Minor indent fix in set_rank_and_odt_mask()
Fix the position of the } else { statement to make it correctly
indented.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Wed, 15 Jul 2015 00:53:45 +0000 (02:53 +0200)]
Makefile: Add target for building bootable SPL image for SoCFPGA
Add build target for generating boot partition images recognised by
the SoCFPGA BootROM. The SoCFPGA BootROM expects four copies of the
u-boot-spl-dtb.sfp at the beginning of boot partition. Those are
u-boot-spl-dtb.bin augmented by a header with which the BootROM can
work. The u-boot-dtb.img uImage is appended to this to produce a
full boot partition image, the u-boot-with-spl-dtb.sfp . This is
the name of the final target.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Fri, 24 Jul 2015 04:15:14 +0000 (06:15 +0200)]
arm: socfpga: config: Make CONFIG_SPI_FLASH_MTD useful
Enable the mtdparts command and related options to make support
for SPI NOR MTD useful in any way. With the mtdparts command in
place, it is possible to use partition of the SPI NOR in U-Boot.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Wed, 22 Jul 2015 04:18:19 +0000 (06:18 +0200)]
arm: socfpga: config: Fix LOADADDR
Setting LOADADDR to 0x8000 is a bad idea, it is very likely that
some kind of overlap will happen. Move the LOADADDR 0x01000000
(16MiB from start of RAM) to make sure no overlap happens when
loading kernel for example.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Mon, 20 Jul 2015 03:48:37 +0000 (05:48 +0200)]
arm: socfpga: config: Enable CONFIG_SPI_FLASH_BAR
This is needed to access broken (read: Micron) SPI flashes which
are larger than 16 MiB and don't correctly support 4-byte addressing.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Tue, 21 Jul 2015 14:17:39 +0000 (16:17 +0200)]
arm: socfpga: config: Exclude CONFIG_SPI_FLASH_MTD from SPL build
We do not need full MTD support in the SPL build, it only adds size
and is not usable in any way. Exclude it.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 9 Jul 2015 01:41:53 +0000 (03:41 +0200)]
arm: socfpga: config: Zap incorrect config options
There is no need to disable support for partitions in the SPL,
we can support partitions in SPL perfectly well. This is likely
some remnant from old times, so just remove this configuration
option.
Moreover, the CRC32 chunk size doesn't have to be adjusted anymore,
since both the GD and malloc area are in RAM by the time this CRC
check can be used and there's plenty of space. Zap this abomination
as well.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sun, 12 Jul 2015 13:23:28 +0000 (15:23 +0200)]
arm: socfpga: config: Move SPL GD and malloc to RAM
Now that the SPL structure is organised such that it matches the
U-Boot's SPL design, it is possible to use the option of relocating
GD to RAM. And since we have GD in RAM, move malloc area to RAM as
well. We point the malloc base pointer 1 MiB past U-Boot's load
address. We use simple malloc for SPL because it is 3kiB smaller
in terms of code size than regular malloc which was used thus far.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sat, 25 Jul 2015 17:33:56 +0000 (19:33 +0200)]
arm: socfpga: misc: Reset ethernet from OF
Reset the GMAC ethernets based on the "resets" OF node instead of ad-hoc
hardcoded values in the U-Boot code. Since we don't have a proper reset
framework in place yet, we have to do this slightly ad-hoc parsing of the
OF tree instead.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Marek Vasut [Sat, 25 Jul 2015 16:47:02 +0000 (18:47 +0200)]
arm: socfpga: misc: Probe ethernet GMAC from OF
The GMAC can now be probed from OF, so enable DM ethernet and remove the
old ad-hoc designware_initialize() invocation.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Marek Vasut [Wed, 22 Jul 2015 03:40:12 +0000 (05:40 +0200)]
arm: socfpga: misc: Export bootmode into environment variable
setenv an environment variable called "bootmode" , which contains the
board boot mode. This can be in turn used in scripts to determine from
where to load kernel and such.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Tue, 21 Jul 2015 14:10:13 +0000 (16:10 +0200)]
arm: socfpga: misc: Add support for printing boot mode
Add support for printing from which device the SoCFPGA board booted.
This decodes the BSEL settings and prints it in human readable form.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sun, 12 Jul 2015 13:11:03 +0000 (15:11 +0200)]
arm: socfpga: misc: Fix warm reset
Write necessary magic value into the Warm Boot from ON-Chip RAM
group Enable register to enable Warm reset support. Instead of
doing this in the reset_cpu() function, we do it in arch early
init to avoid breaking old kernel code which expects this magic
value to be already written into this register.
This magic is originally excavated from common/spl/spl.c in the
u-boot port from altera, where this value was written just before
the SPL jumped to actual U-Boot in the RAM.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Tue, 21 Jul 2015 14:11:16 +0000 (16:11 +0200)]
arm: socfpga: spl: Add support for selecting boot device from BSEL
Rework spl_boot_device() such that it reads the BSEL settings from
system manager and decides from where to load U-Boot based on this
information.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Tue, 21 Jul 2015 05:50:03 +0000 (07:50 +0200)]
arm: socfpga: spl: Add support for booting from QSPI
Add code and configuration options to support booting from QSPI NOR.
Enable support for booting from QSPI NOR.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 9 Jul 2015 22:04:23 +0000 (00:04 +0200)]
arm: socfpga: spl: Add support for booting from SD/MMC
Add code and configuration options to support booting from RAW
SD/MMC card as well as for ext4/vfat filesystems. Enable support
for booting from SD/MMC card, but don't enable the filesystem
support just yet to retain compatibility with old SoCFPGA card
format.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 9 Jul 2015 21:26:34 +0000 (23:26 +0200)]
arm: socfpga: spl: Remove custom linker script
Remove the custom SPL linker script, use the generic one instead.
The custom script doesn't bring in anything new and is only burden
to maintain.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 9 Jul 2015 03:36:23 +0000 (05:36 +0200)]
arm: socfpga: spl: Merge spl_board_init() into board_init_f()
The code in spl_board_init() should have been in board_init_f()
from the beginning, since it is code which configures system and
then starts DRAM. Thus, it cannot be in spl_board_init(), which
is called from board_init_r() , which already expects a working
DRAM.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 9 Jul 2015 03:21:02 +0000 (05:21 +0200)]
arm: socfpga: spl: Add missing reset logic
Make sure that all the peripherals are correctly reset and then
brought out of reset in the SPL. Not going through proper reset
cycle might leave the IP blocks in inconsistent state.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 9 Jul 2015 03:15:40 +0000 (05:15 +0200)]
arm: socfpga: spl: Configure SCU and NIC-301 early
Configure the ARM SCU and NIC301 very early. The ARM SCU SNSAC register
must be configured, so we can access all peripherals. The NIC-301 must
be configured so that the BootROM is not mapped into the SDRAM address
space.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 9 Jul 2015 02:48:56 +0000 (04:48 +0200)]
arm: socfpga: spl: Toggle warm reset config I/O bit
Synchronise the SPL behavior with the original Altera code and
toggle the Warm Reset Config I/O bit accordingly.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sat, 25 Jul 2015 09:09:11 +0000 (11:09 +0200)]
arm: socfpga: system: Clean up pinmux_config.c
Implement new accessor, sysmgr_get_pinmux_table(), used to obtain pinmux
table and it's size from the QTS-generated pinmux_config.c. The target
here is again to get rid of poluting global namespace by including the
pinmux_config.h into it.
Furthermore, the pinmux_config.h declares some CONFIG_HPS_* macros,
which are explicitly useless to us in U-Boot. Instead, U-Boot does
use DT to detect exactly these configuration options. This patch
makes sure that while this QTS-generated file can stay in the tree,
these obscure macros do not ooze into the namespace anymore.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 9 Jul 2015 02:40:11 +0000 (04:40 +0200)]
arm: socfpga: system: Rework sysmgr_enable_warmrstcfgio()
Rework sysmgr_enable_warmrstcfgio() into sysmgr_config_warmrstcfgio(),
which allows both enabling and disabling the warm reset config I/O
functionality.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sat, 25 Jul 2015 07:53:23 +0000 (09:53 +0200)]
arm: socfpga: scan: Zap iocsr_scan_chain*_table()
Introduce accessor iocsr_get_config_table() for retrieving IOCSR config
tables. This patch is again trimming down the namespace polution.
The IOCSR config tables are used only by scan manager, they are generated
by qts and are board specific. Before this patch, the approach to use
these tables in scan manager was to define an extern variable to silence
the compiler and compile board-specific iocsr_config.c into U-Boot which
defined those extern variables. Furthermore, since these are tables and
the scan manager needs to know the size of those tables, iocsr_config.h
is included build-wide.
This patch wraps all this into a single accessor which takes the scan
chain ID and returns pointer to the table and it's size. All this is
wrapped in wrap_iocsr_config.c board-specific file. The file includes
the iocsr_config.c (!) to access the original tables and transitively
iocsr_config.h . It is thus no longer necessary to include iocsr_config.h
build-wide and the namespace polution is trimmed some more.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sat, 25 Jul 2015 07:36:54 +0000 (09:36 +0200)]
arm: socfpga: scan: Zap redundant params in scan_mgr_io_scan_chain_prg()
It is sufficient to pass in the scan chain ID into the function to determine
the remaining two parameters, so drop those params and determine them locally
in the function. The big-ish switch in the function is temporary and will be
replaced by a proper function call in subsequent patch.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sat, 25 Jul 2015 07:33:28 +0000 (09:33 +0200)]
arm: socfpga: scan: Staticize scan_mgr_io_scan_chain_prg()
This function is never used outside of scan_manager.c , so make it static.
Zap the prototype in scan_manager.h and move the documentation above the
function. Make the documentation kerneldoc compliant.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sat, 25 Jul 2015 06:44:27 +0000 (08:44 +0200)]
arm: socfpga: clock: Clean up pll_config.h
Extract the clock configuration horribleness caused by pll_config.h in
the following manner.
First of all, introduce a few new accessors which return values of
various clocks used in clock_manager.c and use them in clock_manager.c .
These accessors replace those few macros which came from pll_config.h
originally. Also introduce an accessor which returns the struct cm_config
default configuration for the clock manager used in SPL.
The accessors are implemented in a board-specific wrap_pll_config.c
file, whose sole purpose is to include the qts-generated pll_config.h
and provide only the necessary values to the clock manager.
The purpose of this design is to limit the scope of inclusion for the
pll_config.h , which thus far was included build-wide and poluted the
namespace. With this change, the inclusion is limited to just the new
wrap_pll_config.c file, which in turn provides three simple functions
for the clock_manager.c to use.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sat, 25 Jul 2015 06:37:16 +0000 (08:37 +0200)]
arm: socfpga: clock: Get rid of cm_config_t typedef
Get rid of this cryptic typedef and replace it with explicit struct cm_config.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 9 Jul 2015 02:28:13 +0000 (04:28 +0200)]
arm: socfpga: reset: Add SDMMC, QSPI and DMA defines
Add SDMMC, QSPI and DMA reset defines. These are needed by SPL
so that we can boot from SD card and QSPI.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 9 Jul 2015 02:27:28 +0000 (04:27 +0200)]
arm: socfpga: reset: Add function to reset add peripherals
Add socfpga_per_reset_all() function to reset all peripherals
but the L4 watchdog. This is needed in the SPL.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 9 Jul 2015 01:52:12 +0000 (03:52 +0200)]
arm: socfpga: reset: Repair bridge reset handling
The current bridge reset code, which de-asserted the bridge reset,
was activelly polling whether the FPGA is programmed and ready and
in case it was (!), the code called hang(). This makes no sense at
all. Repair it such that the code instead checks whether the FPGA
is programmed, but without any polling involved, and only if it is
programmed, it de-asserts the reset.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 9 Jul 2015 00:51:56 +0000 (02:51 +0200)]
arm: socfpga: reset: Replace ad-hoc reset functions
Replace all those ad-hoc reset functions, which were all copies
of the same invocation of clrbits_le32() anyway, with one single
unified function, socfpga_per_reset(), with necessary parameters.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 9 Jul 2015 00:45:15 +0000 (02:45 +0200)]
arm: socfpga: reset: Implement unified function to toggle reset
Implement function socfpga_per_reset(), which allows asserting or
de-asserting reset of each reset manager peripheral in a unified
manner. Use this function throughout reset manager.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 9 Jul 2015 00:30:35 +0000 (02:30 +0200)]
arm: socfpga: reset: Start reworking the SoCFPGA reset manager
Implement macro SOCFPGA_RESET(name), which produces an abstract
reset number. Implement macros which allow extracting the reset
offset in permodrstN register and which permodrstN register the
reset is located in from this abstract reset number. Use these
macros throughout the reset manager.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Thu, 9 Jul 2015 01:39:06 +0000 (03:39 +0200)]
arm: socfpga: reset: Add missing reset manager regs
Define two missing reset manager registers, which are in the
SoCFPGA CV datasheet.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Fri, 26 Jun 2015 16:56:54 +0000 (18:56 +0200)]
ddr: altera: Fix debug message format in sequencer
The debug messages missed proper newlines and/or spaces in them.
Fix the formatting.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Tom Rini <trini@konsulko.com>
Marek Vasut [Wed, 8 Jul 2015 23:47:56 +0000 (01:47 +0200)]
ddr: altera: Fix typo in mp_threshold1 programming
It is the configuration data that should go into the register,
not the register mask, just like the surrounding code does it.
Fix this typo.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Tom Rini <trini@konsulko.com>
Marek Vasut [Sun, 26 Jul 2015 08:37:54 +0000 (10:37 +0200)]
ddr: altera: Move struct sdram_prot_rule prototype
Move the structure prototype from sdram.h header file into sdram.c
source file, since it is used only there and for local purpose only.
There is no point in having it global.
While at this move, fix the data types in the structure from uintNN_t
to uNN and fix the coding style a bit.
Signed-off-by: Marek Vasut <marex@denx.de>
Marek Vasut [Sun, 12 Jul 2015 13:59:10 +0000 (15:59 +0200)]
arm: socfpga: Move sdram_config.h to board dir
This file is absolutelly positively board specific, so move it
into the correct place.
Signed-off-by: Marek Vasut <marex@denx.de>