oweals/u-boot.git
7 years agoMerge branch 'master' of git://git.denx.de/u-boot-socfpga
Tom Rini [Fri, 14 Apr 2017 13:05:57 +0000 (09:05 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-socfpga

7 years agoMerge branch 'master' of git://git.denx.de/u-boot-mmc
Tom Rini [Fri, 14 Apr 2017 13:05:46 +0000 (09:05 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-mmc

7 years agoarm: socfpga: sr1500 use environment in common header
Dalon Westergreen [Thu, 13 Apr 2017 14:30:36 +0000 (07:30 -0700)]
arm: socfpga: sr1500 use environment in common header

This removes the default environment from the sr1500 header
and instead uses the common environment provided in
socfpga_common.h which now uses distro boot.

This board has no upstream devicetree in the kernel source,
so set to socfpga_cyclone5_sr1500.dtb.

Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
--
Changes in v2:
 - Remove unneeded CONFIG_BOOTFILE
 - set devicetree name to match socfpga_{fpga model}_{board model}.dts
   pattern

7 years agoarm: socfpga: Socrates use environment in common header
Dalon Westergreen [Thu, 13 Apr 2017 14:30:35 +0000 (07:30 -0700)]
arm: socfpga: Socrates use environment in common header

This removes the default environment from the socrates headers
and instead uses the common environment provided in
socfpga_common.h which now uses distro boot.

Change default devicetree name to match devicetree name in
upstream kernel source.

Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
--
Changes in v2:
 - Remove unneeded CONFIG_BOOTFILE

7 years agoarm: socfpga: SoCKit use environment in common header
Dalon Westergreen [Thu, 13 Apr 2017 14:30:34 +0000 (07:30 -0700)]
arm: socfpga: SoCKit use environment in common header

This removes the default environment from the SoCKit headers
and instead uses the common environment provided in
socfpga_common.h which now uses distro boot.

Change default devicetree name to match devicetree name in
upstream kernel source.

Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
--
Changes in v2:
 - Remove unneeded CONFIG_BOOTFILE

7 years agoarm: socfpga: DE1 use environment in common header
Dalon Westergreen [Thu, 13 Apr 2017 14:30:33 +0000 (07:30 -0700)]
arm: socfpga: DE1 use environment in common header

This removes the default environment from the de1 headers
and instead uses the common environment provided in
socfpga_common.h which now uses distro boot.

This board does not have a devicetree in the upstream kernel
source so set devicetree to socfpga_cyclone5_de1_soc.dtb.

Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
--
Changes in V2:
 - Remove unneeded CONFIG_BOOTFILE
 - set devicetree name to match socfpga_{fpga model}_{board model}.dts
   pattern

7 years agoarm: socfpga: C5 SoCDK use environment in common header
Dalon Westergreen [Thu, 13 Apr 2017 14:30:32 +0000 (07:30 -0700)]
arm: socfpga: C5 SoCDK use environment in common header

This removes the default environment from the C5 SoCDK headers
and instead uses the common environment provided in
socfpga_common.h which now uses distro boot.

In addition to the above, add support to boot from the custom
a2 type partition.

Change default devicetree name to match devicetree name in
upstream kernel source.

Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
--
Changes in v2:
 - Remove unneeded CONFIG_BOOTFILE

7 years agoarm: socfpga: A5 SoCDK use environment in common header
Dalon Westergreen [Thu, 13 Apr 2017 14:30:31 +0000 (07:30 -0700)]
arm: socfpga: A5 SoCDK use environment in common header

This removes the default environment from the A5 socdk headers
and instead uses the common environment provided in
socfpga_common.h which now uses distro boot.

Add support to boot from the custom a2 type partition.

Change default devicetree name to match devicetree name in
upstream kernel source.

Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
--
Changes in v3:
 - Fix small typo in defconfig, missing "C"
Changes in v2:
 - Remove unneeded CONFIG_BOOTFILE
 - Fix dtb name

a5config test

Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
7 years agoarm: socfpga: DE0 use environment in common header
Dalon Westergreen [Thu, 13 Apr 2017 14:30:30 +0000 (07:30 -0700)]
arm: socfpga: DE0 use environment in common header

This removes the default environment from the de0 headers
and instead uses the common environment provided in
socfpga_common.h which now uses distro boot.

In addition to the above, add support to boot from the custom
a2 type partition

Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
--
Changes in v2:
 - Remove unneeded CONFIG_BOOTFILE

7 years agoarm: socfpga: Add distro boot to socfpga common header
Dalon Westergreen [Thu, 13 Apr 2017 14:30:29 +0000 (07:30 -0700)]
arm: socfpga: Add distro boot to socfpga common header

This adds a common environment and support for distro boot
in the common socfpga header.

Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
--
Changes in v5:
 - Per Frank, to support OpenSuse the ENV must be after the GPT
Changes in v4:
 - Move env back to being right after the MBR
Changes in v3:
 - fix spacing between asterix
 - remove verify=n as a default setting

Changes in v2:
 - Remove unneeded CONFIG_BOOTFILE and fdt_addr
 - cleanup spacing in MMC env size

common

Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
7 years agoarm: socfpga: Convert Altera DDR SDRAM driver to use Kconfig
Ley Foon Tan [Wed, 5 Apr 2017 09:32:51 +0000 (17:32 +0800)]
arm: socfpga: Convert Altera DDR SDRAM driver to use Kconfig

Convert Altera DDR SDRAM driver to use Kconfig method.
Enable ALTERA_SDRAM by default if it is on Gen5 target.
Arria 10 will have different driver.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
7 years agofdt: Add compatible strings for Arria 10
Ley Foon Tan [Wed, 5 Apr 2017 09:32:47 +0000 (17:32 +0800)]
fdt: Add compatible strings for Arria 10

Add compatible strings for Intel Arria 10 SoCFPGA device.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
7 years agoARM: socfpga: Disable OC on MCVEVK
Marek Vasut [Mon, 5 Dec 2016 17:17:52 +0000 (18:17 +0100)]
ARM: socfpga: Disable OC on MCVEVK

Disable the OC test on MCVEVK as the old PHY version does not provide
this information. This fixes the USB OTG operation.

Signed-off-by: Marek Vasut <marex@denx.de>
7 years agoARM: socfpga: mcvevk: Add default dfu_alt_info
Marek Vasut [Sat, 29 Oct 2016 20:08:39 +0000 (22:08 +0200)]
ARM: socfpga: mcvevk: Add default dfu_alt_info

Add default DFU altinfo for eMMC.

Signed-off-by: Marek Vasut <marex@denx.de>
7 years agoARM: socfpga: Reduce the DFU buffer size
Marek Vasut [Sat, 29 Oct 2016 19:15:56 +0000 (21:15 +0200)]
ARM: socfpga: Reduce the DFU buffer size

There is no point in having such gargantuan buffer, it only requires
huge malloc area. Reduce the DFU buffer size.

Signed-off-by: Marek Vasut <marex@denx.de>
7 years agoARM: socfpga: Rename MCVEVK
Marek Vasut [Wed, 5 Apr 2017 11:17:03 +0000 (13:17 +0200)]
ARM: socfpga: Rename MCVEVK

The board is now manufactured by Aries Embedded GmbH , rename it.

Signed-off-by: Marek Vasut <marex@denx.de>
7 years agoARM: socfpga: boot0 hook: remove macro from boot0 header file
Chee, Tien Fong [Wed, 29 Mar 2017 03:49:16 +0000 (11:49 +0800)]
ARM: socfpga: boot0 hook: remove macro from boot0 header file

Commit ce62e57fc571 ("ARM: boot0 hook: remove macro, include whole
header file") miss out cleaning macro in this header file, and this
has broken implementation of a boot header capability in socfpga
SPL. Remove the macro in this file, and recovering it back
to proper functioning.

Fixes: ce62e57fc571 ("ARM: boot0 hook: remove macro, include whole
header file")

Signed-off-by: Chee, Tien Fong <tien.fong.chee@intel.com>
7 years agoARM: socfpga: cyclone5-socdk: Enable ports A & C
Georges Savoundararadj [Tue, 28 Mar 2017 05:56:04 +0000 (22:56 -0700)]
ARM: socfpga: cyclone5-socdk: Enable ports A & C

With the port C enabled, we can read the GPI input state of:
* the DIP switches (USER_DIPSW_HPS[3:0]/HPS_GPI[7:4])
* the push buttons (USER_PB_HPS[3:0]/HPS_GPI[11:8])

Signed-off-by: Georges Savoundararadj <savoundg@gmail.com>
Signed-off by: Sid-Ali Teir <git.syedelec@gmail.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Marek Vasut <marex@denx.de>
7 years agoARM: socfpga: add fpga build and bsp handoff instructions to readme
Stephen Arnold [Fri, 24 Mar 2017 01:58:08 +0000 (18:58 -0700)]
ARM: socfpga: add fpga build and bsp handoff instructions to readme

This patch adds the steps to manually (re)build a Quartus FPGA project,
generate the required BSP glue, and update u-boot handoff files for
mainline SPL support. Requires Quartus toolchain and current U-Boot.

Signed-off-by: Steve Arnold <stephen.arnold42@gmail.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Stefan Roese <sr@denx.de>
Cc: Marek Vasut <marex@denx.de>
7 years agommc: sdhci: Wait for SDHCI_INT_DATA_END when transferring.
Alex Deymo [Sun, 2 Apr 2017 08:24:34 +0000 (01:24 -0700)]
mmc: sdhci: Wait for SDHCI_INT_DATA_END when transferring.

sdhci_transfer_data() function transfers the blocks passed up to the
number of blocks defined in mmc_data, but returns immediately once all
the blocks are transferred, even if the loop exit condition is not met
(bit SDHCI_INT_DATA_END set in the STATUS word).

When doing multiple writes to mmc, returning right after the last block
is transferred can cause the write to fail when sending the
MMC_CMD_STOP_TRANSMISSION command right after the
MMC_CMD_WRITE_MULTIPLE_BLOCK command, leaving the mmc driver in an
unconsistent state until reboot. This error was observed in the rpi3
board.

This patch waits for the SDHCI_INT_DATA_END bit to be set even after
sending all the blocks.

Test: Reliably wrote 2GiB of data to mmc in a rpi3.

Signed-off-by: Alex Deymo <deymo@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agommc: bcm2835_sdhci: Speed up mmc writes.
Jocelyn Bohr [Sun, 2 Apr 2017 08:24:33 +0000 (01:24 -0700)]
mmc: bcm2835_sdhci: Speed up mmc writes.

The linux kernel driver for this module does not use a delay when
writing to the SDHCI_BUFFER register. This patch mimics that behavior
in order to speed up the mmc writes on the Raspberry Pi.

Signed-off-by: Alex Deymo <deymo@google.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agommc: gen_atmel_mci: add driver model support for mci
Wenyou Yang [Thu, 13 Apr 2017 02:29:22 +0000 (10:29 +0800)]
mmc: gen_atmel_mci: add driver model support for mci

Add the driver model support for Atmel mci while retaining the
existing legacy code. This allows the driver to support boards
that have converted to driver model as well as those that have not.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoodroid-c2: enable new Meson GX MMC driver in board defconfig
Heiner Kallweit [Wed, 12 Apr 2017 18:32:06 +0000 (20:32 +0200)]
odroid-c2: enable new Meson GX MMC driver in board defconfig

Enable new Meson GX MMC driver in Odroid C2 defconfig.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
7 years agommc: meson: add MMC driver for Meson GX (S905)
Carlo Caione [Wed, 12 Apr 2017 18:30:42 +0000 (20:30 +0200)]
mmc: meson: add MMC driver for Meson GX (S905)

This driver implements MMC support on Meson GX (S905) based systems.
It's based on Carlo Caione's work, changes:
- BLK support added
- general refactoring

Signed-off-by: Carlo Caione <carlo@caione.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
7 years agoarm: dts: update Meson GXBB / Odroid-C2 DT with recent Linux version
Heiner Kallweit [Wed, 12 Apr 2017 18:28:36 +0000 (20:28 +0200)]
arm: dts: update Meson GXBB / Odroid-C2 DT with recent Linux version

As a prerequisite for adding a Meson GX MMC driver update the
Meson GXBB / Odroid-C2 device tree in Uboot with the latest
version from Linux.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Carlo Caione <carlo@endlessm.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
7 years agoMerge git://git.denx.de/u-boot-dm
Tom Rini [Thu, 13 Apr 2017 21:31:06 +0000 (17:31 -0400)]
Merge git://git.denx.de/u-boot-dm

Here with some DM changes as well as the long-standing AT91 DM/DT
conversion patches which I have picked up via dm.

7 years agoboard: sama5d4ek: enable early debug UART
Wenyou Yang [Thu, 13 Apr 2017 02:31:21 +0000 (10:31 +0800)]
board: sama5d4ek: enable early debug UART

Enable the early debug UART to debug problems when an ICE or other
debug mechanism is not available.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
7 years agoboard: sama5d4ek: clean up code
Wenyou Yang [Thu, 13 Apr 2017 02:31:20 +0000 (10:31 +0800)]
board: sama5d4ek: clean up code

Due to the introduction of the pinctrl and clk driver, and using
device tree files, remove the unneeded hardcoded pin configuration
and clock enabling code from the board file.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
7 years agoboard: sama5d4ek: update to support DM/DT
Wenyou Yang [Thu, 13 Apr 2017 02:31:19 +0000 (10:31 +0800)]
board: sama5d4ek: update to support DM/DT

Update the configuration files to support the device tree and driver
model, so do SPL. The device clock and pins configuration are handled
by the clock and the pinctrl drivers respectively.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
7 years agoboard: sama5d4_xplained: enable early debug UART
Wenyou Yang [Thu, 13 Apr 2017 02:31:18 +0000 (10:31 +0800)]
board: sama5d4_xplained: enable early debug UART

Enable the early debug UART to debug problems when an ICE or other
debug mechanism is not available.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
7 years agoboard: sama5d4_xplained: clean up code
Wenyou Yang [Thu, 13 Apr 2017 02:31:17 +0000 (10:31 +0800)]
board: sama5d4_xplained: clean up code

Due to the introduction of the pinctrl and clk driver, and using
device tree files, remove the unneeded hardcoded pin configuration
and clock enabling code from the board file.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
7 years agoboard: sama5d4_xplained: update to support DM/DT
Wenyou Yang [Thu, 13 Apr 2017 02:31:16 +0000 (10:31 +0800)]
board: sama5d4_xplained: update to support DM/DT

Update the configuration files to support the device tree and
driver model, so do SPL. The device clock and pins configuration
are handled by the clock and the pinctrl drivers respectively.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
7 years agoconfigs: at91-sama5_common: fix for CONFIG_AT91_GPIO
Wenyou Yang [Thu, 13 Apr 2017 02:31:15 +0000 (10:31 +0800)]
configs: at91-sama5_common: fix for CONFIG_AT91_GPIO

Add #ifndef CONFIG_DM_GPIO for CONFIG_AT91_GPIO define to avoid
the redefine compilation error.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
7 years agoARM: at91: lds: use "_image_binary_end" for DT location
Wenyou Yang [Fri, 24 Mar 2017 03:34:06 +0000 (11:34 +0800)]
ARM: at91: lds: use "_image_binary_end" for DT location

The MMC SPL locates the BSS section to a different memory region
from text, then use "_image_binary_end" variable to point to the
correct device tree location.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
7 years agoARM: spl: atmel: move mem_init() advance in SPL init.
Wenyou Yang [Fri, 24 Mar 2017 03:34:05 +0000 (11:34 +0800)]
ARM: spl: atmel: move mem_init() advance in SPL init.

Because the MMC SPL puts the bbs section in the ddr memory, move
calling mem_init() before calling spl_init().

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
7 years agoARM: spl: atmel: bring in serial device before init
Wenyou Yang [Fri, 24 Mar 2017 03:34:04 +0000 (11:34 +0800)]
ARM: spl: atmel: bring in serial device before init

Before setting up the serial communications, bring in the serial
device from the device tree file.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
7 years agoARM: at91: spl: specify MMC and NAND boot device
Wenyou Yang [Fri, 24 Mar 2017 03:34:03 +0000 (11:34 +0800)]
ARM: at91: spl: specify MMC and NAND boot device

When OF_CONTROL is enabled, MMC boot device should not be detected
automatically, it should be MMC1 fixedly only the status "enabled"
is available.

Add NAND Flash boot device as well.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
7 years agoARM: dts: at91: add dts file for sama5d4ek
Wenyou Yang [Fri, 24 Mar 2017 01:18:44 +0000 (09:18 +0800)]
ARM: dts: at91: add dts file for sama5d4ek

Add the device tree file for sama5d4ek board.

The dts file is copied from Linux-4.4, do the following changes.
 - add the "u-boot,dm-pre-reloc" property to determine which nodes
   which are needed by SPL and by the board_init_f stage.
 - fix the compilation warning.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
7 years agoARM: dts: at91: add dts files for sama5d4 Xplained
Wenyou Yang [Fri, 24 Mar 2017 01:18:43 +0000 (09:18 +0800)]
ARM: dts: at91: add dts files for sama5d4 Xplained

Add the device tree files for sama5d4 Xplained board.

The dts files are copied from Linux-4.4, do the following changes.
 - add reg property for pinctrl node.
 - move the gpio nodes(pioA, pioB, pioC ...) from the pinctrl child's
   nodes to its slibling nodes.
 - add the "u-boot,dm-pre-reloc" property to determine which nodes
   which are needed by SPL and by the board_init_f stage.
 - fix the compilation warnings.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
7 years agoARM: at91: dt: add dts file for sama5d3 Xplained
Wenyou Yang [Fri, 24 Mar 2017 01:18:42 +0000 (09:18 +0800)]
ARM: at91: dt: add dts file for sama5d3 Xplained

Add the device tree file for sama5d3 Xplained board.

The dts files are copied from the Linux-4.9, do changes as below.
 - add the "u-boot,dm-pre-reloc" property to determine which nodes
   which are needed by SPL and by the board_init_f stage.
 - fix the compile warning.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
7 years agoARM: at91: dt: add dts files for sama5d3xek board
Wenyou Yang [Fri, 24 Mar 2017 01:18:41 +0000 (09:18 +0800)]
ARM: at91: dt: add dts files for sama5d3xek board

Add the device tree files for sama5d3xek board.

The dts files are copied from Linux-4.9, do the changes as below.
 - add reg property for the pinctrl node.
 - move the gpio nodes (pioA, pioB, pioC ...) as the pinctrl's
   slibling nodes.
 - add the "u-boot,dm-pre-reloc" property to determine which nodes
   which are needed by SPL and by the board_init_f stage.
 - fix the compile warning.
 - add spi0 node aliases.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
7 years agogpio: at91_gpio: add the clock support
Wenyou Yang [Thu, 23 Mar 2017 04:46:21 +0000 (12:46 +0800)]
gpio: at91_gpio: add the clock support

Add the clock support.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
7 years agogpio: at91_gpio: add the device tree support
Wenyou Yang [Thu, 23 Mar 2017 04:46:20 +0000 (12:46 +0800)]
gpio: at91_gpio: add the device tree support

Add the device tree support.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
7 years agogpio: Kconfig: add CONFIG_AT91_GPIO option
Wenyou Yang [Thu, 23 Mar 2017 04:46:19 +0000 (12:46 +0800)]
gpio: Kconfig: add CONFIG_AT91_GPIO option

The CONFIG_AT91_GPIO option is used to select AT91 PIO GPIO driver.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
7 years agopinctrl: at91: add pinctrl driver
Wenyou Yang [Thu, 23 Mar 2017 04:44:37 +0000 (12:44 +0800)]
pinctrl: at91: add pinctrl driver

AT91 PIO controller is a combined gpio-controller, pin-mux and
pin-config module. The peripheral's pins are assigned through
per-pin based muxing logic.

Each SoC will have to describe the its limitation and pin
configuration via device tree. This will allow to do not need
to touch the C code when adding new SoC if the IP version is
supported.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agogpio: at91_gpio: remove CPU_HAS_PIO3 macro
Wenyou Yang [Thu, 23 Mar 2017 04:44:36 +0000 (12:44 +0800)]
gpio: at91_gpio: remove CPU_HAS_PIO3 macro

The intention of the removal is the preparation to introduce the
new AT91 PIO pinctrl driver.

Use the union to make the PIO3 and PIO2's registers be together
and make their offset aligned.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agomtd: nand: atmel: use another functions to set gpio value
Wenyou Yang [Thu, 23 Mar 2017 04:55:21 +0000 (12:55 +0800)]
mtd: nand: atmel: use another functions to set gpio value

Because there isn't the implementation of gpio_set/get_value()
and gpio_set/get_value() after the at91 gpio driver is converted
to support the driver model, use at91_set_gpio_value() and
at91_get_gpio_value()

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoARM: at91: gpio: fix at91_set_gpio_value() define
Wenyou Yang [Thu, 23 Mar 2017 04:55:20 +0000 (12:55 +0800)]
ARM: at91: gpio: fix at91_set_gpio_value() define

When the CONFIG_ATMEL_LEGACY is undefined, according to the following
defines, at91_set_gpio_value() references to at91_set_pio_value(x, y)
with two parameters.
 #define at91_set_gpio_value(x, y)      at91_set_pio_value(x, y)
 #define at91_get_gpio_value(x)         at91_get_pio_value(x)

But there isn't the implementation of at91_set_pio_value(x, y) with
two parameters in U-Boot. This is an error.

Same as at91_get_gpio_value(x) define.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agobuildman: Handle commit subjects containing unicode
Simon Glass [Thu, 13 Apr 2017 00:23:26 +0000 (18:23 -0600)]
buildman: Handle commit subjects containing unicode

One of these has crept in in this commit:

40a808f1 ARCv2: SLC: Make sure busy bit is set properly on SLC flushing

Adjust buildman to handle it.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agotools: allow to override python
Stefano Babic [Wed, 5 Apr 2017 15:46:41 +0000 (17:46 +0200)]
tools: allow to override python

Not force to use python from PATH. Issue was noted when building with
Yocto, because python from the distro is always taken instead of
python-native built during Yocto process.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agodm: core: Ensure DMA regions start up with the cache clean
Simon Glass [Tue, 4 Apr 2017 19:00:19 +0000 (13:00 -0600)]
dm: core: Ensure DMA regions start up with the cache clean

There is a strange interaction with drivers which use DMA if the cache
starts off in a dirty state. Buffer space which the driver reads (but has
not previously written) can contain zero bytes from alloc_priv(). This can
cause corruption of the memory used by DMA for incoming data.

Fix this and add a comment to explain the problem.

This allows the dwc2 driver to work correctly with driver model, for
example.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agocore/uclass: Print name of device in uclass_find_device_by_seq()
Alexandru Gagniuc [Tue, 4 Apr 2017 17:46:56 +0000 (10:46 -0700)]
core/uclass: Print name of device in uclass_find_device_by_seq()

uclass_find_device_by_seq() prints seq and req_seq when debugging is
enabled, but this information is not very useful by itself. Add the
name of he driver to this information. This improves debugging as it
shows which devices are being considered.

Signed-off-by: Alexandru Gagniuc <alex.g@adaptrum.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agofdtgrep: Cope with the /aliases node being last
Simon Glass [Sun, 2 Apr 2017 18:26:44 +0000 (12:26 -0600)]
fdtgrep: Cope with the /aliases node being last

With skeleton.dtsi being dropped it is more likely that the /aliases node
will be last in the device tree. Update fdtgrep to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Masahiro Yamada <yamada.masahiro@socionext.com>
7 years agodtoc: Decode val if it's a byte string
George McCollister [Thu, 30 Mar 2017 14:44:25 +0000 (09:44 -0500)]
dtoc: Decode val if it's a byte string

With Python 3.5.2 encode will throw an exception if val is a byte array.
Decode it to a string first. This assumes it's utf-8, if it's not valid
utf-8 it will throw an exception.

Signed-off-by: George McCollister <george.mccollister@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agopatman: Convert byte arrays to strings
George McCollister [Thu, 30 Mar 2017 14:44:24 +0000 (09:44 -0500)]
patman: Convert byte arrays to strings

os.read() returns a byte array in Python 3.5.2 and needs to be converted
into a string. Check if the returned value is an instance of bytes and
if it is decode it as a utf-8 string. If it is not a utf-8 encoded string
the decoding may fail with an exception.

Prior to this fix the comparisions check data == "" would fail when data
was b'' and would cause an infinite memory leaking loop. joins would
also fail with an exception below but due to the infinite loop it never
made it that far.

Signed-off-by: George McCollister <george.mccollister@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agoserial: ns16550: Link in the DM driver when when using platdata
Alexandru Gagniuc [Mon, 27 Mar 2017 19:54:19 +0000 (12:54 -0700)]
serial: ns16550: Link in the DM driver when when using platdata

Do not condition the compilation of the U_BOOT_DRIVER by !OF_PLATDATA.
This is inconsistent with the majority of other drivers. This also
blocks OF_PLATDATA boards with an 16550-compatible serial from using
serial in SPL.

Signed-off-by: Alexandru Gagniuc <alex.g@adaptrum.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added tweak for rock to avoid a TPL build failure:
Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agoMerge branch 'master' of git://www.denx.de/git/u-boot-imx
Tom Rini [Thu, 13 Apr 2017 14:17:06 +0000 (10:17 -0400)]
Merge branch 'master' of git://denx.de/git/u-boot-imx

Drop CONFIG_STACKSIZE from include/configs/imx6_logic.h

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agolib: div64: sync with Linux
Peng Fan [Mon, 10 Apr 2017 05:39:48 +0000 (13:39 +0800)]
lib: div64: sync with Linux

Sync with Linux commit ad0376eb1483b ("Merge tag 'edac_for_4.11_2'").

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Tom Rini <trini@konsulko.com>
7 years agosandbox: Change CONFIG_SANDBOX_BITS_PER_LONG to hard-coded
Tom Rini [Wed, 12 Apr 2017 20:41:00 +0000 (16:41 -0400)]
sandbox: Change CONFIG_SANDBOX_BITS_PER_LONG to hard-coded

Instead of having CONFIG_SANDBOX_BITS_PER_LONG in sandbox.h set to 64
with a comment to change to 32 on a 32bit host, simply set this to 64 in
asm/types.h and have the comment be there.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agotiny-printf: Add support for %p format
Vignesh R [Mon, 10 Apr 2017 06:53:22 +0000 (12:23 +0530)]
tiny-printf: Add support for %p format

Add support for %p, %pa[p], %pM, %pm and %pI4 formats to tiny-printf.
%pM and %pI4 are widely used by SPL networking stack and is required if
networking support is desired in SPL.
%p, %pa and %pap are mostly used by debug prints and hence supported
only when DEBUG is enabled.

Before this patch:
$ size spl/u-boot-spl
   text    data     bss     dec     hex filename
  99325    4899  218584  322808   4ecf8 spl/u-boot-spl

After this patch (with CONFIG_SPL_NET_SUPPORT):
$ size spl/u-boot-spl
   text    data     bss     dec     hex filename
  99666    4899  218584  323149   4ee4d spl/u-boot-spl

So, this patch adds ~350 bytes to code size.

If CONFIG_SPL_NET_SUPPORT is not enabled, this adds ~25 bytes.

If CONFIG_USE_TINY_PRINTF is disabled then:
$ size spl/u-boot-spl
  text    data     bss     dec     hex filename
 101116    4899  218584  324599   4f3f7 spl/u-boot-spl

So, there is still ~1.4K space saved even with support for %pM/%pI4.

Compiler used is to build is:
arm-linux-gnueabihf-gcc (Linaro GCC 6.2-2016.11) 6.2.1 20161016

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agopci: Add a command to show PCI regions
Simon Glass [Sat, 8 Apr 2017 19:10:06 +0000 (13:10 -0600)]
pci: Add a command to show PCI regions

Add 'pci regions' which lists the I/O and memory regions accessible from
the PCI controller.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agoFix a bug with PL010s running at 19200 baud
Alyssa Rosenzweig [Fri, 7 Apr 2017 16:48:22 +0000 (09:48 -0700)]
Fix a bug with PL010s running at 19200 baud

I don't have the hardware test this, but it is almost certainly a typo
in the code dating back to at least 2004.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
7 years agoboard_f: Rename initdram() to dram_init()
Simon Glass [Thu, 6 Apr 2017 18:47:05 +0000 (12:47 -0600)]
board_f: Rename initdram() to dram_init()

This allows us to use the same DRAM init function on all archs. Add a
dummy function for arc, which does not use DRAM init here.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Dummy function on nios2]
Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoarm: freescale: Rename initdram() to fsl_initdram()
Simon Glass [Thu, 6 Apr 2017 18:47:04 +0000 (12:47 -0600)]
arm: freescale: Rename initdram() to fsl_initdram()

This function name shadows a global name but is in fact different. This
is very confusing. Rename it to help with the following refactoring.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agodebug_uart: Try not to use stack in printch
tim.chick [Thu, 6 Apr 2017 15:32:41 +0000 (16:32 +0100)]
debug_uart: Try not to use stack in printch

Spam detection software, running on the system "lists.denx.de",
has identified this incoming email as possible spam.  The original
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similar future email.  If you have any questions, see
@@CONTACT_ADDRESS@@ for details.

Content preview:  Previous change to create _printch causes the stack to be
  used, breaking printch before stack is available. Inline _printch to prevent
   this happening. Signed-off-by: Tim Chick <tim.chick@mediatek.com> --- [...]

Content analysis details:   (6.3 points, 5.0 required)

 pts rule name              description
---- ---------------------- --------------------------------------------------
 0.7 RCVD_IN_XBL            RBL: Received via a relay in Spamhaus XBL
                            [188.29.165.105 listed in zen.spamhaus.org]
 3.6 RCVD_IN_PBL            RBL: Received via a relay in Spamhaus PBL
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                            [188.29.165.105 listed in bb.barracudacentral.org]
 0.4 RDNS_DYNAMIC           Delivered to internal network by host with
                            dynamic-looking rDNS
Previous change to create _printch causes the stack to be used,
breaking printch before stack is available. Inline _printch to
prevent this happening.

Signed-off-by: Tim Chick <tim.chick@mediatek.com>
7 years agoenv: fix memory leak in fw_env routines
Stefano Babic [Wed, 5 Apr 2017 16:08:03 +0000 (18:08 +0200)]
env: fix memory leak in fw_env routines

fw_env_open allocates buffers to store the environment, but these
buffers are never freed. This becomes quite nasty using the fw_ tools as
library, because each access to the environment (even just reading a
variable) generates a memory leak equal to the size of the environment.

Fix this renaming fw_env_close() as fw_env_flush(), because the function
really flushes the environment from RAM to storage, and add a
fw_env_close function to free the allocated resources.

Signed-off-by: Stefano Babic <sbabic@denx.de>
7 years agoenv: add a version number to check API
Stefano Babic [Wed, 5 Apr 2017 16:08:02 +0000 (18:08 +0200)]
env: add a version number to check API

Changes in the environment library are difficult to tracked by programs
using the library. Add simply an API version number that must be
increased each time when the API is changed.

This can be detected and a program can work with different versions of
the library.

Signed-off-by: Stefano Babic <sbabic@denx.de>
7 years agoenv: split fw_env.h in public and private parts
Stefano Babic [Wed, 5 Apr 2017 16:08:01 +0000 (18:08 +0200)]
env: split fw_env.h in public and private parts

Move U-Boot private data into a separate file. This
lets export fw_env.h to be used by external programs
that want to change the environment using the library
built in tools/env.

Signed-off-by: Stefano Babic <sbabic@denx.de>
7 years agoRename aes.h to uboot_aes.h
Stefano Babic [Wed, 5 Apr 2017 16:08:00 +0000 (18:08 +0200)]
Rename aes.h to uboot_aes.h

aes.h is a too generic name if this file can
be exported and used by a program.
Rename it to avoid any conflicts with
other files (for example, from openSSL).

Signed-off-by: Stefano Babic <sbabic@denx.de>
7 years agoimx: i.mx6q: add the initial support for LogicPD i.MX6Q SOM
Adam Ford [Fri, 7 Apr 2017 15:25:34 +0000 (10:25 -0500)]
imx: i.mx6q: add the initial support for LogicPD i.MX6Q SOM

Logic PD has an i.MX6Q system on module (SOM) with a development kit. The
SOM has a built-in microSD socket, DDR and NAND flash.  The development kit
has an SMSC Ethernet PHY, serial debug port and a variety of peripherals.
This have been verified to boot the i.MX6Q version over either SD
on the development kit or NAND built into the SOM.  Items in the dtsi file
are specific to the SOM itself.  Items in the dts file are in the baseboard.
Future versions of the SOM will come out supporting the same basebord and
potentially future base boards will come out supporting the same SOM.

Signed-off-by: Adam Ford <aford173@gmail.com>
7 years agocmd_mmc: fix arg parsing for setdsr subcmd
Markus Niebel [Fri, 3 Feb 2017 14:26:36 +0000 (15:26 +0100)]
cmd_mmc: fix arg parsing for setdsr subcmd

The handler do_setdsr receives only the dsr parameter,
the action is parsed before.

Error was introduced when restructuring the mmc command
implementation in commit 1fd93c6e7d8a1e4d6261058cefab11b875ded252.

Reported-by: Michael Krummsdorf <Michael.Krummsdorf@tq-group.com>
Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
7 years agoimx: mx7ulp: Fix SPLL/APLL clock rate calculation issue
Ye Li [Wed, 5 Apr 2017 02:36:58 +0000 (10:36 +0800)]
imx: mx7ulp: Fix SPLL/APLL clock rate calculation issue

The num/denom is a float value, but in the calculation it is convert
to integer 0, and wrong result.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
7 years agoimx: ventana: config: set MMC env Partition to 1
Tim Harvey [Tue, 11 Apr 2017 16:58:09 +0000 (09:58 -0700)]
imx: ventana: config: set MMC env Partition to 1

Partition 1 equates to EMMC boot0

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
7 years agomx6sabresd: README: Add eMMC boot configuration
Breno Lima [Mon, 10 Apr 2017 12:45:29 +0000 (09:45 -0300)]
mx6sabresd: README: Add eMMC boot configuration

Explain how to flash the eMMC and how to boot from it.

Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
7 years agoSet console speed to 115200 on mx6cuboxi.
Vagrant Cascadian [Fri, 31 Mar 2017 20:48:44 +0000 (13:48 -0700)]
Set console speed to 115200 on mx6cuboxi.

By default, u-boot itself outputs on the serial console at 115200, so
it may as well pass the same value to the booted operating system as
well.

Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
7 years agoboard: advantech: dms-ba16: apply the proper register setting to fix the voltage...
Yung-Ching LIN [Tue, 28 Mar 2017 17:51:25 +0000 (01:51 +0800)]
board: advantech: dms-ba16: apply the proper register setting to fix the voltage peak issue

Apply the proper setting for the reserved bits in SetDes Test and System Mode Control register
to avoid the voltage peak issue while we do the IEEE PHY comformance test

Signed-off-by: Ken Lin <yungching0725@gmail.com>
Acked-by: Akshay Bhat <akshay.bhat@timesys.com>
7 years agoboard: advantech: dms-ba16: fix AR8033 reset timing issue
Yung-Ching LIN [Tue, 28 Mar 2017 17:51:24 +0000 (01:51 +0800)]
board: advantech: dms-ba16: fix AR8033 reset timing issue

Add the delay (10ms) to ensure the clock is stable and to meet the clock-to-reset(1ms) requirement recommended in the AR8033 datasheet

Signed-off-by: Ken Lin <yungching0725@gmail.com>
Acked-by: Akshay Bhat <akshay.bhat@timesys.com>
7 years agoboard: advantech: dms-ba16: add the PMIC configuration support
Yung-Ching LIN [Tue, 28 Mar 2017 17:51:23 +0000 (01:51 +0800)]
board: advantech: dms-ba16: add the PMIC configuration support

Change the PMIC bulk configuration from auto mode to sync mode to avoid the voltage shutdown issue

Signed-off-by: Ken Lin <yungching0725@gmail.com>
Acked-by: Akshay Bhat <akshay.bhat@timesys.com>
7 years agoboard: advantech: dms-ba16: Add the configuration options for display initialization
Yung-Ching LIN [Tue, 28 Mar 2017 17:51:22 +0000 (01:51 +0800)]
board: advantech: dms-ba16: Add the configuration options for display initialization

Add the configuration options for display initialization in case we need to
do the display initialization in kernel to support different timing settings

Signed-off-by: Ken Lin <yungching0725@gmail.com>
Acked-by: Akshay Bhat <akshay.bhat@timesys.com>
7 years agoMAINTAINERS: Fix ARM FREESCALE IMX files
Jagan Teki [Mon, 27 Mar 2017 18:02:23 +0000 (23:32 +0530)]
MAINTAINERS: Fix ARM FREESCALE IMX files

- Remove arch/arm/cpu/arm926ejs/imx/ which is not available
- arch/arm/cpu/imx-common/ => arch/arm/imx-common/

Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
7 years agoMCCMON6: defconfig: Add tftp_nor_dtb command for NOR DTB update
Lukasz Majewski [Mon, 27 Mar 2017 13:38:46 +0000 (15:38 +0200)]
MCCMON6: defconfig: Add tftp_nor_dtb command for NOR DTB update

Signed-off-by: Lukasz Majewski <lukma@denx.de>
7 years agoARCv2: SLC: Make sure busy bit is set properly on SLC flushing
Alexey Brodkin [Wed, 5 Apr 2017 14:50:09 +0000 (17:50 +0300)]
ARCv2: SLC: Make sure busy bit is set properly on SLC flushing

As reported in STAR 9001165532, an SLC control reg read (for checking
busy state) right after SLC invalidate command may incorrectly return
NOT busy causing software to NOT spin-wait while operation is underway.
(and for some reason this only happens if L1 cache is also disabled - as
required by IOC programming model)

Suggested workaround is to do an additional Control Reg read, which
ensures the 2nd read gets the right status.

Same fix made in Linux kernel:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=c70c473396cbdec1168a6eff60e13029c0916854

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
7 years agolibfdt: fix build with Python 3
Stefan Agner [Wed, 29 Mar 2017 19:41:23 +0000 (12:41 -0700)]
libfdt: fix build with Python 3

For some reason Python 3 seems to think it does not need to build
the library. Using the --force parameter makes sure that the library
gets built always. This is especially important since we move the
library in the next step of the Makefile, hence forcing a rebuild
every time the higher level Makefile triggers a rebuild is required
to make sure the library is always there.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agofdt: Bring in changes from v1.4.4
Simon Glass [Tue, 28 Mar 2017 16:23:31 +0000 (10:23 -0600)]
fdt: Bring in changes from v1.4.4

This a few minor changes down from upstream since the last sync.

Signed-off-by: Simon Glass <sjg@chromium.org>
7 years agoMerge git://git.denx.de/u-boot-x86
Tom Rini [Mon, 10 Apr 2017 12:07:29 +0000 (08:07 -0400)]
Merge git://git.denx.de/u-boot-x86

7 years agoMakefile: Fix linking with modern binutils
Joel Stanley [Sun, 9 Apr 2017 18:33:58 +0000 (20:33 +0200)]
Makefile: Fix linking with modern binutils

Since Binutils 1a9ccd70f9a7[1] u-boot will not link targets that set
CONFIG_SYS_TEXT_BASE=0 with the following error:

  LD      u-boot
arm-linux-gnueabi-ld.bfd: u-boot: Not enough room for program headers, try
 linking with -N
arm-linux-gnueabi-ld.bfd: final link failed: Bad value

The issue can be reproduced with the bad binutils and the rock2_defconfig
target.

This issue was also encountered by the powerpc kernel[2], with the fix
being to pass --no-dynamic-linker for linkers newer than 2.26 when this
flag was introduced. The option tells ld that the PIE or shared lib does
not need loaded program headers.

Ubuntu Zesty's Binutils 2.27.51.20161202 hits this error.

[1] https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=commit;h=1a9ccd70f9a7
[2] https://git.kernel.org/cgit/linux/kernel/git/powerpc/linux.git/commit/?h=next&id=ff45000fcb56b5b0f1a14a865d3541746d838a0a

Signed-off-by: Joel Stanley <joel@jms.id.au>
[AF: Apply to LDFLAGS_$(SPL_BIN) as well, suggested by Tom Rini]
Signed-off-by: Andreas Färber <afaerber@suse.de>
7 years agotravis-ci: OrangePi PC2 only links with gcc-5.x or later
Tom Rini [Sun, 9 Apr 2017 22:18:03 +0000 (18:18 -0400)]
travis-ci: OrangePi PC2 only links with gcc-5.x or later

We disable this specific board as it does not link with the gcc-4.9.x
that we use today in travis-ci.

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agox86: Introduce minimal PMU driver for Intel MID platforms
Andy Shevchenko [Sat, 1 Apr 2017 13:21:34 +0000 (16:21 +0300)]
x86: Introduce minimal PMU driver for Intel MID platforms

This simple PMU driver allows to tyrn power on and off for selected
devices. In particularly Intel Tangier needs to power on SDHCI
controllers in order to access to them during board initialization.

In the future it might be expanded to cover other Intel MID platforms,
that's why it's located under arch/x86/lib and called pmu.c.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agox86: Add SCU IPC driver for Intel MID platforms
Felipe Balbi [Sat, 1 Apr 2017 13:21:33 +0000 (16:21 +0300)]
x86: Add SCU IPC driver for Intel MID platforms

Intel MID platforms have few microcontrollers inside SoC, one of them
is so called System Controller Unit (SCU).

Here is the driver to communicate with microcontroller.

Signed-off-by: Vincent Tinelli <vincent.tinelli@intel.com>
Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Simon Glass <sjg@chromium.org>
7 years agoserial: Add serial driver for Intel MID
Andy Shevchenko [Tue, 28 Feb 2017 12:04:10 +0000 (14:04 +0200)]
serial: Add serial driver for Intel MID

Add a specific serial driver for Intel MID platforms.

It has special fractional divider which can be programmed via UART_PS,
UART_MUL, and UART_DIV registers.

The UART clock is calculated as

UART clock = XTAL * UART_MUL / UART_DIV

The baudrate is calculated as

baud rate = UART clock / UART_PS / DLAB

Initialize fractional divider correctly for Intel Edison platform.

For backward compatibility we have to set initial DLAB value to 16
and speed to 115200 baud, where initial frequency is 29491200Hz, and
XTAL frequency is 38.4MHz.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
7 years agotools: binman: Add missing filenames for various x86 rom tests
Bin Meng [Wed, 5 Apr 2017 04:17:14 +0000 (21:17 -0700)]
tools: binman: Add missing filenames for various x86 rom tests

With recent changes, some x86-specific rom tests of binman fail to
run. Fix it by adding missing filenames in corresponding entries.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agox86: bootm: Fix FIT image booting on x86
Stefan Roese [Fri, 31 Mar 2017 06:09:39 +0000 (08:09 +0200)]
x86: bootm: Fix FIT image booting on x86

Checking 'is_zimage' at this time will always fail and therefore booting
a FIT style image will always lead to this error message:

"## Kernel loading failed (missing x86 kernel setup) ..."

This change now removes this check and booting of FIT images works just
fine.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agobinman: Remove hard-coded file name for x86 flash-descriptor & intel-me
Stefan Roese [Thu, 30 Mar 2017 10:58:12 +0000 (12:58 +0200)]
binman: Remove hard-coded file name for x86 flash-descriptor & intel-me

Now that we have added file names from Kconfig in x86 u-boot.dtsi,
update binman to avoid using hard-coded names.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: Add file names from Kconfig in descriptor/intel-me nodes in u-boot.dtsi
Stefan Roese [Thu, 30 Mar 2017 10:58:11 +0000 (12:58 +0200)]
x86: Add file names from Kconfig in descriptor/intel-me nodes in u-boot.dtsi

Since we now have the file names configurable via Kconfig for the flash
descriptor and intel-me files, add these from Kconfig in the corresponding
dts nodes.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agox86: Kconfig: Add options to configure the descriptor.bin / me.bin filenames
Stefan Roese [Thu, 30 Mar 2017 10:58:10 +0000 (12:58 +0200)]
x86: Kconfig: Add options to configure the descriptor.bin / me.bin filenames

This introduces two Kconfig options to enable board specific filenames
for the Intel binary blobs to be used to generate the SPI flash image.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agodm: rtc: Add 16-bit read/write support
Bin Meng [Thu, 16 Mar 2017 14:26:27 +0000 (07:26 -0700)]
dm: rtc: Add 16-bit read/write support

At present there are only 8-bit and 32-bit read/write routines in
the rtc uclass driver. This adds the 16-bit support.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agox86: Remove unused option
Andy Shevchenko [Mon, 6 Mar 2017 11:51:53 +0000 (13:51 +0200)]
x86: Remove unused option

There is option which is not used:
CONFIG_ZBOOT_32

Remove it from default x86 config and from whitelist.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
7 years agodefconfigs: am57xx_hs_evm: Move OPTEE load address to avoid overlaps
Andrew F. Davis [Fri, 7 Apr 2017 15:19:35 +0000 (10:19 -0500)]
defconfigs: am57xx_hs_evm: Move OPTEE load address to avoid overlaps

Move the OPTEE load address to 0xbdb00000 in order to avoid
overlap with the memory regions used in radio and RVC usecases.

Signed-off-by: Andrew F. Davis <afd@ti.com>
7 years agodefconfigs: dra7xx_hs_evm: Move OPTEE load address to avoid overlaps
Misael Lopez Cruz [Fri, 7 Apr 2017 15:19:34 +0000 (10:19 -0500)]
defconfigs: dra7xx_hs_evm: Move OPTEE load address to avoid overlaps

Move the OPTEE load address to 0xbdb00000 in order to avoid
overlap with the memory regions used in radio and RVC usecases.

Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
7 years agodefconfigs: am43xx_hs_evm: Add USB Host boot mode support
Andrew F. Davis [Fri, 7 Apr 2017 15:11:25 +0000 (10:11 -0500)]
defconfigs: am43xx_hs_evm: Add USB Host boot mode support

Enable SPL_USB_HOST_SUPPORT in the default defconfig to allow
booting from USB peripherals. Unlike the non-HS boards, we
already load SPL to a 0x4030_0000+ address, so no other changes
are needed.

Signed-off-by: Andrew F. Davis <afd@ti.com>