oweals/u-boot.git
5 years agoscsi: ceva: add ls1088a soc support
Peng Ma [Mon, 22 Oct 2018 02:39:49 +0000 (10:39 +0800)]
scsi: ceva: add ls1088a soc support

Add ahci compatible support for ls1088a soc.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
5 years agoarm64: ls1046aqds: enable DM support for sata
Peng Ma [Thu, 11 Oct 2018 10:34:22 +0000 (10:34 +0000)]
arm64: ls1046aqds: enable DM support for sata

Enable related configs to support sata DM feature.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
[YS: moveconfig.py -s -d]
Reviewed-by: York Sun <york.sun@nxp.com>
5 years agoarm64: ls1046ardb: enable DM support for sata
Peng Ma [Thu, 11 Oct 2018 10:34:21 +0000 (10:34 +0000)]
arm64: ls1046ardb: enable DM support for sata

Enable related configs to support sata DM feature.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
[YS: moveconfig.py -s -d]
Reviewed-by: York Sun <york.sun@nxp.com>
5 years agoarmv8: dts: fsl-ls1046a: add sata node support
Peng Ma [Thu, 11 Oct 2018 10:34:20 +0000 (10:34 +0000)]
armv8: dts: fsl-ls1046a: add sata node support

One ls1046a, there is one SATA 3.0 advanced host controller interface
which is a high-performance SATA solution that delivers comprehensive
and fully-compliant generation 3 (1.5 Gb/s - 6.0 Gb/s) serial ATA
capabilities, in accordance with the serial ATA revision 3.0 of Serial
ATA International Organization.
Add sata node to support this feature.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
5 years agoscsi: ceva: add ls1046a soc support
Peng Ma [Thu, 11 Oct 2018 10:34:19 +0000 (10:34 +0000)]
scsi: ceva: add ls1046a soc support

Add ahci compatible support for ls1046a soc.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
5 years agoarmv8: ls1012afrx: Add TFABOOT support
Rajesh Bhagat [Mon, 5 Nov 2018 18:03:08 +0000 (18:03 +0000)]
armv8: ls1012afrx: Add TFABOOT support

TFABOOT support includes:
  - ls1012a2g5rdb/ls1012afrdm/ls1012afrwy_tfa_defconfig to be
    loaded by trusted firmware
  - define BOOTCOMMAND for TFABOOT

Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
[YS: remove unnecessary braces]
Reviewed-by: York Sun <york.sun@nxp.com>
5 years agoarmv8: ls1012aqds: Add TFABOOT support
Rajesh Bhagat [Mon, 5 Nov 2018 18:03:04 +0000 (18:03 +0000)]
armv8: ls1012aqds: Add TFABOOT support

TFABOOT support includes:
 - ls1012aqds_tfa_defconfig to be loaded by trusted firmware
 - environment address and size changes for TFABOOT
 - define BOOTCOMMAND for TFABOOT

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
5 years agoarmv8: ls1012aqds: fix secure boot compilation
Rajesh Bhagat [Mon, 5 Nov 2018 18:02:59 +0000 (18:02 +0000)]
armv8: ls1012aqds: fix secure boot compilation

Includes environment.h file in ls1012aqds.c Also, enables
pfe validation

Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
5 years agoarmv8: ls1012ardb: Add TFABOOT support
Rajesh Bhagat [Mon, 5 Nov 2018 18:02:53 +0000 (18:02 +0000)]
armv8: ls1012ardb: Add TFABOOT support

TFABOOT support includes:
 - ls1012ardb_tfa_defconfig to be loaded by trusted firmware
 - environment address and size changes for TFABOOT
 - define BOOTCOMMAND for TFABOOT
 - enable PFE validation for secure boot

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
5 years agoarmv8: ls1043aqds: Add TFABOOT support
Rajesh Bhagat [Mon, 5 Nov 2018 18:02:48 +0000 (18:02 +0000)]
armv8: ls1043aqds: Add TFABOOT support

TFABOOT support includes:
 - ls1043aqds_tfa_defconfig to be loaded by trusted firmware
 - environment address and size changes for TFABOOT
 - define BOOTCOMMAND for TFABOOT

Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
5 years agoarmv8: ls1043ardb: Add TFABOOT support
Rajesh Bhagat [Mon, 5 Nov 2018 18:02:44 +0000 (18:02 +0000)]
armv8: ls1043ardb: Add TFABOOT support

TFABOOT support includes:
 - ls1043ardb_tfa_defconfig to be loaded by trusted firmware
 - environment address and size changes for TFABOOT
 - FMAN and QE address changes for TFABOOT
 - define BOOTCOMMAND for TFABOOT

Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
5 years agoarmv8: ls1046aqds: Add TFABOOT support
Rajesh Bhagat [Mon, 5 Nov 2018 18:02:40 +0000 (18:02 +0000)]
armv8: ls1046aqds: Add TFABOOT support

TFABOOT support includes:
 - ls1046aqds_tfa_defconfig to be loaded by trusted firmware
 - environment address and size changes for TFABOOT
 - FMAN address changes for TFABOOT
 - define BOOTCOMMAND for TFABOOT

Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
5 years agoarmv8: ls1046ardb: Add TFABOOT support
Rajesh Bhagat [Mon, 5 Nov 2018 18:02:36 +0000 (18:02 +0000)]
armv8: ls1046ardb: Add TFABOOT support

TFABOOT support includes:
 - ls1046ardb_tfa_defconfig to be loaded by trusted firmware
 - environment address and size changes for TFABOOT
 - FMAN address changes for TFABOOT
 - define BOOTCOMMAND for TFABOOT

Signed-off-by: York Sun <york.sun@nxp.com>
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
5 years agoarmv8: fsl-layerscape: add support of MC framework for TFA
Pankit Garg [Mon, 5 Nov 2018 18:02:31 +0000 (18:02 +0000)]
armv8: fsl-layerscape: add support of MC framework for TFA

Add support of MC framework for TFA
Make MC framework independent of boot source.

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
5 years agodrivers: qe: add TFABOOT support
Rajesh Bhagat [Mon, 5 Nov 2018 18:02:28 +0000 (18:02 +0000)]
drivers: qe: add TFABOOT support

Adds TFABOOT support and allows to pick QE firmware
on basis of boot source.

Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
[YS: remove line continuation in quoted string]
Reviewed-by: York Sun <york.sun@nxp.com>
5 years agonet: fm: add TFABOOT support
Rajesh Bhagat [Mon, 5 Nov 2018 18:02:23 +0000 (18:02 +0000)]
net: fm: add TFABOOT support

Adds TFABOOT support and allows to pick FMAN firmware
on basis of boot source.

Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
[YS: fix checkpatch issues]
Reviewed-by: York Sun <york.sun@nxp.com>
5 years agoarmv8: sec_firmware: return job ring status as true in TFABOOT
Pankit Garg [Mon, 5 Nov 2018 18:02:19 +0000 (18:02 +0000)]
armv8: sec_firmware: return job ring status as true in TFABOOT

Returns job ring status as true in TFABOOT, as one job ring is always
reserved.

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
5 years agoarmv8: sec_firmware: change el2_to_aarch32 SMC ID
Rajesh Bhagat [Mon, 5 Nov 2018 18:02:13 +0000 (18:02 +0000)]
armv8: sec_firmware: change el2_to_aarch32 SMC ID

Changes the el2_to_aarch32 SMC ID from 0xc000ff04 to 0xc200ff17,
it is applicable to both TFA and non-TFA boot.

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
5 years agoarmv8: fsl-layerscape: Update parsing boot source
York Sun [Mon, 5 Nov 2018 18:02:09 +0000 (18:02 +0000)]
armv8: fsl-layerscape: Update parsing boot source

Workaround of erratum A010539 clears the RCW source field in PORSR1
register, causing failure of detecting boot source using this method.
Use SMC call if U-Boot runs at EL2. If SMC is not implemented or
running at EL3, continue to read PORSR1 and presume QSPI as boot
source if erratum workaround A010539 is enabled and RCW source is
cleared.

Signed-off-by: York Sun <york.sun@nxp.com>
5 years agoarmv8: layerscape: skip OCRAM init for TFABOOT
Rajesh Bhagat [Mon, 5 Nov 2018 18:02:05 +0000 (18:02 +0000)]
armv8: layerscape: skip OCRAM init for TFABOOT

OCRAM initialization is performed by TFA, Hence
skipped from u-boot.

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
5 years agoarmv8: layerscape: add SMC calls for DDR size and bank info
Rajesh Bhagat [Mon, 5 Nov 2018 18:01:58 +0000 (18:01 +0000)]
armv8: layerscape: add SMC calls for DDR size and bank info

Adds SMC calls for getting DDR size and bank info for TFABOOT.

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
5 years agoarmv8: fsl-layerscape: bootcmd identification for TFABOOT
Pankit Garg [Mon, 5 Nov 2018 18:01:52 +0000 (18:01 +0000)]
armv8: fsl-layerscape: bootcmd identification for TFABOOT

Adds bootcmd identificaton on basis on boot source, valid
in TFABOOT configuration.

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
[YS: remove unnecessary braces]
Reviewed-by: York Sun <york.sun@nxp.com>
5 years agoarmv8: layerscape: remove EL3 specific erratas for TFABOOT
Rajesh Bhagat [Mon, 5 Nov 2018 18:01:48 +0000 (18:01 +0000)]
armv8: layerscape: remove EL3 specific erratas for TFABOOT

Removes EL3 specific erratas for TFABOOT, And now taken care in TFA.

ARM_ERRATA_855873, SYS_FSL_ERRATUM_A008850, SYS_FSL_ERRATUM_A008511,
SYS_FSL_ERRATUM_A008336, SYS_FSL_ERRATUM_A009663,
SYS_FSL_ERRATUM_A009803, SYS_FSL_ERRATUM_A009942,
SYS_FSL_ERRATUM_A010165

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
5 years agoarmv8: fsl-layerscape: identify boot source from PORSR register
Rajesh Bhagat [Mon, 5 Nov 2018 18:01:42 +0000 (18:01 +0000)]
armv8: fsl-layerscape: identify boot source from PORSR register

PORSR register holds the cfg_rcw_src field which can be used
to identify boot source.

Further, it can be used to select the environment location.

Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
[YS: fix multiple checkpatch issues]
Reviewed-by: York Sun <york.sun@nxp.com>
5 years agoarmv8: layerscape: Add TFABOOT support
Rajesh Bhagat [Mon, 5 Nov 2018 18:01:37 +0000 (18:01 +0000)]
armv8: layerscape: Add TFABOOT support

Adds TFABOOT support config option and add generic code to enable
execution from DDR.

Signed-off-by: York Sun <york.sun@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
5 years agodrivers: ifc: dynamic chipselect mapping support
Pankit Garg [Mon, 5 Nov 2018 18:01:33 +0000 (18:01 +0000)]
drivers: ifc: dynamic chipselect mapping support

IFC driver changes to implement the chipselect mappings at run time.

Defines init_early_memctl_regs and init_final_memctl_regs with
chipselect dynamic mapping for nor and nand boot.

Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
[YS: fix checkpatch issues]
Reviewed-by: York Sun <york.sun@nxp.com>
5 years agoarmv8: fsl-layerscape: change tlb base from OCRAM to DDR in EL < 3
Pankit Garg [Mon, 5 Nov 2018 18:01:28 +0000 (18:01 +0000)]
armv8: fsl-layerscape: change tlb base from OCRAM to DDR in EL < 3

Change tlb base address from OCRAM to DDR when exception level is
less than 3.

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
5 years agoarmv8: layerscape: Enable routing SError exception
York Sun [Mon, 5 Nov 2018 18:01:23 +0000 (18:01 +0000)]
armv8: layerscape: Enable routing SError exception

In case SError happens at EL2, if SCR_EL3[EA] is not routing it to
EL3, and SCR_EL3[RW] is set to aarch64, setting HCR_EL2[AMO] routes
the exception to EL2. Otherwise this exception is not taken.

Signed-off-by: York Sun <york.sun@nxp.com>
5 years agodriver/ifc: replace __ilog2 with LOG2 macro
Rajesh Bhagat [Mon, 5 Nov 2018 18:01:19 +0000 (18:01 +0000)]
driver/ifc: replace __ilog2 with LOG2 macro

Replaces __ilog2 function call with LOG2 macro, required to
use macros in global variables.

Also, corrects the value passed in LOG2 for some PowerPC
platforms. Minimum value that can be configured is is 64K
for IFC IP.

Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
[YS: fix white space around operator]
Reviewed-by: York Sun <york.sun@nxp.com>
5 years agoenv: sf: define API to override sf environment address
Rajesh Bhagat [Mon, 5 Nov 2018 18:01:15 +0000 (18:01 +0000)]
env: sf: define API to override sf environment address

Defines env_sf_get_env_addr API to override sf environment address,
required to support multiple environment.

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
5 years agoenv: allow flash and nand env driver to compile together
Rajesh Bhagat [Mon, 5 Nov 2018 18:01:10 +0000 (18:01 +0000)]
env: allow flash and nand env driver to compile together

Define env_ptr as static in flash and nand env driver to
allow these to compile together.

Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
5 years agomove data structure out of cpu.h
York Sun [Mon, 5 Nov 2018 18:01:06 +0000 (18:01 +0000)]
move data structure out of cpu.h

Move static definitions to cpu.c file, as it doesn't allow
the cpu.h file to be included in multiple c files.

Signed-off-by: York Sun <york.sun@nxp.com>
5 years agoPrepare v2019.01-rc1 v2019.01-rc1
Tom Rini [Tue, 4 Dec 2018 04:50:13 +0000 (23:50 -0500)]
Prepare v2019.01-rc1

Signed-off-by: Tom Rini <trini@konsulko.com>
5 years agoMAINTAINERS: board: qcom: db820c: update email.
Jorge Ramirez-Ortiz [Sat, 1 Dec 2018 20:20:28 +0000 (21:20 +0100)]
MAINTAINERS: board: qcom: db820c: update email.

Update email address

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
5 years agoRevert "serial: ns16550: fix debug uart putc called before init"
Simon Goldschmidt [Mon, 3 Dec 2018 20:55:33 +0000 (21:55 +0100)]
Revert "serial: ns16550: fix debug uart putc called before init"

This reverts commit 6f57c34473d37b8da5e6a3764d0d377d748aeef1 since it
does not seem to work at least on rk3399.

The Rockchip Technical Reference Manual (TRM) for the rk3399 says the baud
rate prescaler register is readable only when USR[0] is zero. Since this
bit is defined as "reserved" in the socfpga cylcone5 TRM, let's rather
drop this than making the ns16550 debug uart more platform specific.

Reported-by: Roosen Henri <Henri.Roosen@ginzinger.com>
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com
5 years agodm: MIGRATION: Update migration plan for BLK
Tom Rini [Thu, 29 Nov 2018 23:21:14 +0000 (18:21 -0500)]
dm: MIGRATION: Update migration plan for BLK

The biggest part of migration to using CONFIG_BLK is that we need to
have the various subsystems migrated first, so reword the plan here to
reference the new deadlines.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
5 years agodm: MIGRATION: Add migration plan for CONFIG_SATA
Tom Rini [Thu, 29 Nov 2018 23:21:13 +0000 (18:21 -0500)]
dm: MIGRATION: Add migration plan for CONFIG_SATA

As the core of the subsystem has been converted along with some of the
drivers, formalize a deadline for migration.

Cc: Akshay Bhat <akshaybhat@timesys.com>
Cc: Andreas Geisreiter <ageisreiter@dh-electronics.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Christian Gmeiner <christian.gmeiner@gmail.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Jason Liu <jason.hui.liu@nxp.com>
Cc: Ken Lin <Ken.Lin@advantech.com.tw>
Cc: Ludwig Zenz <lzenz@dh-electronics.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Max Krummenacher <max.krummenacher@toradex.com>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Soeren Moch <smoch@web.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Troy Kisky <troy.kisky@boundarydevices.com>
Cc: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Cc: York Sun <york.sun@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
5 years agodm: MIGRATION: Add migration plan for DM_USB
Tom Rini [Thu, 29 Nov 2018 23:21:12 +0000 (18:21 -0500)]
dm: MIGRATION: Add migration plan for DM_USB

As much of the USB system has been migrated to DM now, formalize a
deadline for migration.

Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
5 years agodm: MIGRATION: Add migration plan for DM_MMC
Tom Rini [Thu, 29 Nov 2018 23:21:11 +0000 (18:21 -0500)]
dm: MIGRATION: Add migration plan for DM_MMC

Given that at this point the MMC subsystem itself has been migrated
along with a number of subsystem drivers, formalize a deadline for
migration.

Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agoMerge tag 'xilinx-for-v2019.01' of git://git.denx.de/u-boot-microblaze
Tom Rini [Tue, 4 Dec 2018 00:30:54 +0000 (19:30 -0500)]
Merge tag 'xilinx-for-v2019.01' of git://git.denx.de/u-boot-microblaze

Xilinx changes for v2019.01

microblaze:
- Use default functions for memory decoding
- Showing model from DT

zynq:
- Fix spi flash DTs
- Fix zynq_help_text with CONFIG_SYS_LONGHELP
- Tune cse/mini configurations
- Enabling cse/mini testing with current targets

zynqmp:
- Enable gzip SPL support
- Fix chip detection logic
- Tune mini configurations
- DT fixes(spi-flash, models, clocks, etc)
- Add support for OF_SEPARATE configurations
- Enabling mini testing with current targets
- Add mini mtest configuration
- Some minor config setting

nand:
- arasan: Add subpage configuration

net:
- gem: Add 64bit DMA support

5 years agoMerge tag 'signed-rpi-next' of git://github.com/agraf/u-boot
Tom Rini [Mon, 3 Dec 2018 22:52:53 +0000 (17:52 -0500)]
Merge tag 'signed-rpi-next' of git://github.com/agraf/u-boot

Patch queue for rpi - 2018-12-03

A few Raspberry Pi specific changes this time:

  - Allow 2nd MMC device
  - Support RPi 3 Model A+
  - Allow UUID to find filesystem

5 years agoMerge tag 'signed-efi-next' of git://github.com/agraf/u-boot
Tom Rini [Mon, 3 Dec 2018 22:52:40 +0000 (17:52 -0500)]
Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot

Patch queue for efi - 2018-12-03

This release is fully packed with lots of glorious improvements in UEFI
land again!

  - Make PE images more standards compliant
  - Improve sandbox support
  - Improve correctness
  - Fix RISC-V execution on virt model
  - Honor board defined top of ram (fixes a few boards)
  - Imply DM USB access when distro boot is available
  - Code cleanups

5 years agoMerge branch 'master' of git://git.denx.de/u-boot-sh
Tom Rini [Mon, 3 Dec 2018 22:51:45 +0000 (17:51 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-sh

- MMC fixes for R-Car Gen3

5 years agoMerge branch '2018-12-03-master-imports'
Tom Rini [Mon, 3 Dec 2018 21:23:03 +0000 (16:23 -0500)]
Merge branch '2018-12-03-master-imports'

- Baltos platform updates
- rtc m41t62 converted to DM.
- PowerPC MPC8xx DM conversion
- Verified boot updates

5 years agorpi: add 3 Model A+
Jonathan Gray [Fri, 16 Nov 2018 12:07:39 +0000 (23:07 +1100)]
rpi: add 3 Model A+

Add Raspberry Pi 3 Model A+ to list of models, the revision code is 0xE
according to the list on raspberrypi.org.

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
5 years agorpi: add URL of official revision code list
Jonathan Gray [Fri, 16 Nov 2018 12:06:05 +0000 (23:06 +1100)]
rpi: add URL of official revision code list

Replace various third party lists of Raspberry Pi revision codes in a
comment with the list on raspberrypi.org.

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
5 years agospi, mpc8xx: migrate to DM_SPI
Christophe Leroy [Wed, 21 Nov 2018 08:51:57 +0000 (08:51 +0000)]
spi, mpc8xx: migrate to DM_SPI

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
5 years agoboard_r: fix build with DM_SPI
Christophe Leroy [Wed, 21 Nov 2018 08:51:55 +0000 (08:51 +0000)]
board_r: fix build with DM_SPI

CC      common/board_r.o
common/board_r.c:747:2: error: â€˜initr_spi’ undeclared here (not in a function)
  initr_spi,
  ^
make[1]: *** [common/board_r.o] Error 1

Fixes: ebe76a2df9f6 ("dm: Remove spi_init() from board_r.c when using driver model")
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
5 years agodrivers: serial: get rid of non DM mpc8xx driver
Christophe Leroy [Wed, 21 Nov 2018 08:51:53 +0000 (08:51 +0000)]
drivers: serial: get rid of non DM mpc8xx driver

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
5 years agoboard: MCR3000: migrate to DM_SERIAL
Christophe Leroy [Wed, 21 Nov 2018 08:51:51 +0000 (08:51 +0000)]
board: MCR3000: migrate to DM_SERIAL

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
5 years agodrivers: serial: migrate mpc8xx to DM
Christophe Leroy [Wed, 21 Nov 2018 08:51:49 +0000 (08:51 +0000)]
drivers: serial: migrate mpc8xx to DM

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
5 years agoboard: MCR3000: use new DM watchdog
Christophe Leroy [Wed, 21 Nov 2018 08:51:47 +0000 (08:51 +0000)]
board: MCR3000: use new DM watchdog

This patch switches MCR3000 board to the new DM watchdog.

The change in u-boot.lds is because MCR3000.o grows a bit
with this patch and doesn't fit anymore below env_offset on
some versions of GCC.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
5 years agodrivers: watchdog: add a DM driver for the MPC8xx watchdog
Christophe Leroy [Wed, 21 Nov 2018 08:51:45 +0000 (08:51 +0000)]
drivers: watchdog: add a DM driver for the MPC8xx watchdog

This patch adds a DM driver for the MPC8xx watchdog.
Basically, the watchdog is enabled by default from the start and
SYPCR register has to be writen once to set the timeout and/or
deactivate the watchdog. Once written, it cannot be written again.

It means that wdt_stop() can be called before wdt_start() to stop the
watchdog, but cannot be called if wdt_start() has been called.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
5 years agoboard: MCR3000: Activate CONFIG_DM and CONFIG_OF_CONTROL
Christophe Leroy [Wed, 21 Nov 2018 08:51:43 +0000 (08:51 +0000)]
board: MCR3000: Activate CONFIG_DM and CONFIG_OF_CONTROL

Add mcr3000 device tree and activate CONFIG_DM and CONFIG_OF_CONTROL

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
5 years agopowerpc, mpc8xx: clear top of stack
Christophe Leroy [Wed, 21 Nov 2018 08:51:41 +0000 (08:51 +0000)]
powerpc, mpc8xx: clear top of stack

Reported-by: Joakim Tjernlund <Joakim.Tjernlund@infinera.com>
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Reviewed-by: Joakim Tjernlund <Joakim.Tjernlund@infinera.com>
5 years agotest: vboot: clean its file
Philippe Reynes [Wed, 14 Nov 2018 12:51:05 +0000 (13:51 +0100)]
test: vboot: clean its file

This update the its file used in vboot test to respect the new
node style name defined in doc/uImage.FIT (for example: replace
kernel@1 by kernel and fdt@1 by fdt-1)

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agotest: vboot: add padding pss for rsa signature
Philippe Reynes [Wed, 14 Nov 2018 12:51:04 +0000 (13:51 +0100)]
test: vboot: add padding pss for rsa signature

The padding pss is now supported for rsa signature.
This add test with padding pss on vboot test.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agoconfigs: sandbox: enable padding pss for rsa signature
Philippe Reynes [Wed, 14 Nov 2018 12:51:03 +0000 (13:51 +0100)]
configs: sandbox: enable padding pss for rsa signature

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agodoc: uImage.FIT: signature.txt: add option padding
Philippe Reynes [Wed, 14 Nov 2018 12:51:02 +0000 (13:51 +0100)]
doc: uImage.FIT: signature.txt: add option padding

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agorsa: add support of padding pss
Philippe Reynes [Wed, 14 Nov 2018 12:51:01 +0000 (13:51 +0100)]
rsa: add support of padding pss

We add the support of the padding pss for rsa signature.
This new padding is often recommended instead of pkcs-1.5.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agorsa: add a structure for the padding
Philippe Reynes [Wed, 14 Nov 2018 12:51:00 +0000 (13:51 +0100)]
rsa: add a structure for the padding

The rsa signature use a padding algorithm. By default, we use the
padding pkcs-1.5. In order to add some new padding algorithm, we
add a padding framework to manage several padding algorithm.
The choice of the padding is done in the file .its.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agorsa: use new openssl API to create signature
Philippe Reynes [Wed, 14 Nov 2018 12:50:59 +0000 (13:50 +0100)]
rsa: use new openssl API to create signature

Previous implementation of the rsa signature was using
the openssl API EVP_Sign*, but the new openssl API
EVP_DigestSign* is more flexible. So we move to this
new API.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agortc: m41t62: Convert the RTC driver to support the driver model (DM)
Lukasz Majewski [Thu, 22 Nov 2018 13:54:34 +0000 (14:54 +0100)]
rtc: m41t62: Convert the RTC driver to support the driver model (DM)

After this change the m41t62.c can be used with RTC subsystem (i.e. date
command) which uses device model (DM).

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
5 years agortc: m41t62: Extract common RTC handling code to facilitate DM conversion
Lukasz Majewski [Thu, 22 Nov 2018 13:54:33 +0000 (14:54 +0100)]
rtc: m41t62: Extract common RTC handling code to facilitate DM conversion

This change facilitates the conversion of m41t62 RTC driver to device
model (DM).

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
5 years agortc: m41t62: Break i2c_write() arguments to fix checkpatch warning
Lukasz Majewski [Thu, 22 Nov 2018 13:54:32 +0000 (14:54 +0100)]
rtc: m41t62: Break i2c_write() arguments to fix checkpatch warning

No functional change for this commit.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
5 years agoKconfig: Migrate CONFIG_RTC_M41T62 define to Kconfig
Lukasz Majewski [Thu, 22 Nov 2018 13:54:31 +0000 (14:54 +0100)]
Kconfig: Migrate CONFIG_RTC_M41T62 define to Kconfig

This patch moves the RTC M41T62 config define to Kconfig.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agoeeprom: Add device model based I2C support to eeprom command
Lukasz Majewski [Wed, 21 Nov 2018 22:40:43 +0000 (23:40 +0100)]
eeprom: Add device model based I2C support to eeprom command

After this change the 'eeprom' command can be used with DM aware boards.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
5 years agoarm: baltos: migrate Ethernet PHYs configuration to Kconfig
Yegor Yefremov [Thu, 22 Nov 2018 08:19:33 +0000 (09:19 +0100)]
arm: baltos: migrate Ethernet PHYs configuration to Kconfig

Remove CONFIG_PHY_ATHEROS and CONFIG_PHY_SMSC from defconfig
and select them in Kconfig.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agoarm: baltos: move CONFIG_SYS_NAND_U_BOOT_OFFS to defconfig
Yegor Yefremov [Thu, 22 Nov 2018 08:19:32 +0000 (09:19 +0100)]
arm: baltos: move CONFIG_SYS_NAND_U_BOOT_OFFS to defconfig

Also get rid of CONFIG_SYS_NAND_SPL_KERNEL_OFFS as SPL_OS_BOOT
feature won't be used.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agoarm: baltos: remove unused header
Yegor Yefremov [Thu, 22 Nov 2018 08:19:31 +0000 (09:19 +0100)]
arm: baltos: remove unused header

OnRISC Baltos series uses SoM with tps65910 PMIC, so remove
"power/tps65217.h" header inclusion.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agoarm: baltos: move the board to CONFIG_BLK
Yegor Yefremov [Thu, 22 Nov 2018 08:19:30 +0000 (09:19 +0100)]
arm: baltos: move the board to CONFIG_BLK

Use DM for both MMC and USB subsystems and use dedicated DTS
for U-Boot configuration.

Disable SPL support for GPIO and remove EVMSK leftover for
DDR power control via GPIO.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agonet: zynq_gem: Add check for 64-bit dma support by hardware
Siva Durga Prasad Paladugu [Mon, 26 Nov 2018 10:57:39 +0000 (16:27 +0530)]
net: zynq_gem: Add check for 64-bit dma support by hardware

This patch throws an error if 64-bit support is expected
but DMA hardware is not capable of 64-bit support. It also
prints a debug message if DMA is capable of 64-bit but not
using it.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
5 years agonet: zynq_gem: Added 64-bit addressing support
Vipul Kumar [Mon, 26 Nov 2018 10:57:38 +0000 (16:27 +0530)]
net: zynq_gem: Added 64-bit addressing support

This patch adds 64-bit addressing support for zynq gem.
This means it can perform send and receive operations on
64-bit address buffers.

Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
5 years agoarm64: zynqmp: Add new header file for zcu104 RevC
T Karthik Reddy [Mon, 3 Dec 2018 14:05:09 +0000 (19:35 +0530)]
arm64: zynqmp: Add new header file for zcu104 RevC

Created a new header file for zcu104 RevC board and added below
configurations to use MAC address from EEPROM.
CONFIG_ZYNQ_GEM_EEPROM_ADDR
CONFIG_ZYNQ_EEPROM_BUS
Added CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20 to
xilinx_zynqmp_zcu104_revC_defconfig

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
5 years agoMerge tag 'u-boot-amlogic-20181203' of git://git.denx.de/u-boot-amlogic
Tom Rini [Mon, 3 Dec 2018 14:21:06 +0000 (09:21 -0500)]
Merge tag 'u-boot-amlogic-20181203' of git://git.denx.de/u-boot-amlogic

ARM: meson: Add regmap support for clock driver and sync DT with 4.19

5 years agoARM: meson: Add regmap support for clock driver
Loic Devulder [Tue, 27 Nov 2018 16:41:18 +0000 (17:41 +0100)]
ARM: meson: Add regmap support for clock driver

This patch modifies the meson clock driver to use syscon/regmap like
the Linux kernel does, as it is needed if we want to share the same
DTS files.

DTS files are synchronized from Linux 4.19.

Signed-off-by: Loic Devulder <ldevulder@suse.de>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
5 years agoMerge tag 'arc-updates-for-2019.01-rc1' of git://git.denx.de/u-boot-arc
Tom Rini [Mon, 3 Dec 2018 12:26:16 +0000 (07:26 -0500)]
Merge tag 'arc-updates-for-2019.01-rc1' of git://git.denx.de/u-boot-arc

We introduce much better automatic identification of ARC cores.

 1. Try to match found HW features to known ARC core templates
 2. Print CPU frequency for all ARC boards
 3. Add more board-specific info

5 years agoARM: rmobile: Enable MMC HS400 on Salvator-X, ULCB, Ebisu
Marek Vasut [Wed, 13 Jun 2018 04:50:31 +0000 (06:50 +0200)]
ARM: rmobile: Enable MMC HS400 on Salvator-X, ULCB, Ebisu

Enable the HS400 support code on H3, M3W, M3N Salvator-X(S)
and ULCB boards as well as E3 Ebisu board.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
5 years agoARM: dts: rmobile: Enable HS400 on Salvator-X, ULCB, Ebisu
Marek Vasut [Wed, 13 Jun 2018 05:11:47 +0000 (07:11 +0200)]
ARM: dts: rmobile: Enable HS400 on Salvator-X, ULCB, Ebisu

Enable the HS400 support in DT on H3, M3W, M3N Salvator-X(S)
and ULCB boards as well as E3 Ebisu board.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
5 years agoARM: dts: rmobile: Enable SDR modes on E3 Ebisu
Marek Vasut [Wed, 31 Oct 2018 19:34:41 +0000 (20:34 +0100)]
ARM: dts: rmobile: Enable SDR modes on E3 Ebisu

Add regulators and pinmuxes for SDHI0 and SDHI1 SD and microSD
slots on E3 Ebisu and mark them as capable of up to SDR104 mode
of operation. With the SDHI fixes in place, it is now possible
to use SDR104.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
5 years agoARM: dts: rmobile: Enable SDR104 on Salvator-X and ULCB
Marek Vasut [Tue, 9 Oct 2018 11:13:57 +0000 (13:13 +0200)]
ARM: dts: rmobile: Enable SDR104 on Salvator-X and ULCB

Enable SDR104 modes on M3W and H3 boards. With the SDHI fixes
in place, it is now possible to use SDR104.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
5 years agoARM: dts: rmobile: Add eMMC DS pinmux
Marek Vasut [Sun, 28 Oct 2018 12:56:56 +0000 (13:56 +0100)]
ARM: dts: rmobile: Add eMMC DS pinmux

Add pinmux entry for the eMMC DS line, as it is connected on these boards.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
5 years agommc: tmio: sdhi: Add HS400 support
Marek Vasut [Wed, 13 Jun 2018 06:02:55 +0000 (08:02 +0200)]
mmc: tmio: sdhi: Add HS400 support

Add support for the HS400 mode to SDHI driver. This uses the up-tune
mechanism from already supported HS200 tuning.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
5 years agommc: tmio: sdhi: Move tap_pos to private data
Marek Vasut [Wed, 13 Jun 2018 06:02:55 +0000 (08:02 +0200)]
mmc: tmio: sdhi: Move tap_pos to private data

Move the tap_pos variable, which is the HS200/HS400/SDR104 calibration
offset, into private data, so it can be passed around. This is done in
preparation for the HS400 mode, which needs to adjust this value.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
5 years agommc: tmio: sdhi: Filter out HS400 on certain SoCs
Marek Vasut [Wed, 13 Jun 2018 06:02:55 +0000 (08:02 +0200)]
mmc: tmio: sdhi: Filter out HS400 on certain SoCs

Filter out HS400 support on SoCs where HS400 is not supported yet.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
5 years agommc: tmio: Reorder TMIO clock handling
Marek Vasut [Thu, 15 Nov 2018 21:01:33 +0000 (22:01 +0100)]
mmc: tmio: Reorder TMIO clock handling

Reorder the tmio_sd_set_clk_rate() function such that it handles all
of the clock requiests correctly. Specifically, before this patch,
clock request with (mmc->clock == 0 && mmc->clk_disable) could leave
the clock enabled, as the function would exit on if (!mmc->clock)
condition on top and will not handle the mmc->clk_disable at all.

Rather than band-aid fixing just that particular problem, reorder
the entire function to make it easier to understand and verify that
all the cases are covered. The function has three sections now:

First, if mmc->clock != 0, we calculate divider for the SD block.
Second, if mmc->clock != 0 and SD block clock are enabled and
           current divider is not equal to the new divider, then
           stop the clock and update the divider.
Third, if mmc->clk_disable is set, disable the clock, otherwise
       enable the clock. This happens independently of divider
       update now.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
5 years agommc: tmio: Keep generating clock when clock are enabled
Marek Vasut [Wed, 13 Jun 2018 06:02:55 +0000 (08:02 +0200)]
mmc: tmio: Keep generating clock when clock are enabled

The TMIO core has a feature where it can automatically disable clock output
when the bus is not in use. While this is useful, it also interferes with
switching the bus to 1.8V and other background tasks of the SD/MMC cards,
which require clock to be enabled.

This patch respects the mmc->clk_disable and only disables the clock when
the MMC core requests it. Otherwise the clock are continuously generated
on the bus.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
5 years agommc: tmio: Do not set divider to 1 in DDR mode
Marek Vasut [Wed, 13 Jun 2018 06:02:55 +0000 (08:02 +0200)]
mmc: tmio: Do not set divider to 1 in DDR mode

The TMIO core has a quirk where divider == 1 must not be set in DDR modes.
Handle this by setting divider to 2, as suggested in the documentation.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
5 years agommc: tmio: Switch to clock framework
Marek Vasut [Wed, 13 Jun 2018 06:02:55 +0000 (08:02 +0200)]
mmc: tmio: Switch to clock framework

Switch the driver to using clk_get_rate()/clk_set_rate() instead of
caching the mclk frequency in it's private data. This is required on
the SDHI variant of the controller, where the upstream mclk need to
be adjusted when using UHS modes.

Platforms which do not support clock framework or do not support it
in eg. SPL default to 100 MHz clock.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
---
V2: - Fix build on certain platforms using SPL without clock framework
V3: - Turn clk_get_rate into a callback and fill it as needed on both
      renesas and socionext platforms

5 years agommc: Parse HS400 DT properties
Marek Vasut [Wed, 13 Jun 2018 04:50:16 +0000 (06:50 +0200)]
mmc: Parse HS400 DT properties

Add HS400 properties parsing support to mmc_of_parse().

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
5 years agoclk: renesas: Allow reconfiguring SDHI clock on Gen3
Marek Vasut [Tue, 30 Oct 2018 16:54:20 +0000 (17:54 +0100)]
clk: renesas: Allow reconfiguring SDHI clock on Gen3

The SDHI clock must be configured differently for HS200/HS400/SDR104
modes. Add support for reconfiguring the SDHI clock settings into the
clock driver.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
5 years agoarc: devboards: Implement checkboard()
Alexey Brodkin [Tue, 27 Nov 2018 06:47:01 +0000 (09:47 +0300)]
arc: devboards: Implement checkboard()

This allows us to print nice board name on boot.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
5 years agoarc: emsdp: Refactor register and bit accesses
Alexey Brodkin [Tue, 27 Nov 2018 06:47:00 +0000 (09:47 +0300)]
arc: emsdp: Refactor register and bit accesses

Instead of "base + offset" define all registers right away
and access them later via direct defines.

Generate bit masks with "BIT" macro.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
5 years agoarc: emsdp: Read real CPU clock value from hardware
Alexey Brodkin [Tue, 27 Nov 2018 06:46:59 +0000 (09:46 +0300)]
arc: emsdp: Read real CPU clock value from hardware

We do real CPU clock measurement with help of built-in
counters. Thus we may accommodate different real clock values
that appear in different FPA images instead of relying on
something hard-coded in the .dtb.

And while at it make make SDIO base address define
look similar to others with casting to "(void *)".

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
5 years agoarc: Get rid of board-specific print_cpuinfo()
Alexey Brodkin [Tue, 27 Nov 2018 06:46:58 +0000 (09:46 +0300)]
arc: Get rid of board-specific print_cpuinfo()

Since we now do advanced CPU identification in
generic ARC code there's no need to have per-board
hardcoded data.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
5 years agoARC: Improve identification of ARC cores
Alexey Brodkin [Tue, 27 Nov 2018 06:46:57 +0000 (09:46 +0300)]
ARC: Improve identification of ARC cores

1. Try to guess a ARC core template that was used
   i.e. not just name a core family but something more
   menaingful like "ARC HS38", "ARC EM11D" etc.

   We do it checking availability of the key differentiation
   features like:
    - Caches (we actually only check for L1 I$ fpr simplicity)
    - XY-memory
    - DSP extensions etc.

2. Identify ARC subsystems

3. Print core clock frequency

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
5 years agoarc: emsdp: Bump RAM size to 16 Mb
Alexey Brodkin [Tue, 27 Nov 2018 06:20:44 +0000 (09:20 +0300)]
arc: emsdp: Bump RAM size to 16 Mb

On v2 boards that will hit real stock we'll have 16 Mb of RAM.

Note on v1 boards (if anybody ever get one out of trash bin)
this leads to U-Boot execution freeze in the middle ofthe relocation
so don't be surprised.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
5 years agoefi_loader: bootmgr: add load option helper functions
AKASHI Takahiro [Mon, 5 Nov 2018 09:06:41 +0000 (18:06 +0900)]
efi_loader: bootmgr: add load option helper functions

In this patch, helper functions for an load option variable (BootXXXX)
are added:
* efi_deserialize_load_option(): parse a string into load_option data
(renamed from parse_load_option and exported)
* efi_serialize_load_option(): convert load_option data into a string

Those functions will be used to implement efishell command.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
5 years agoefi_loader: allow device == NULL in efi_dp_from_name()
AKASHI Takahiro [Mon, 5 Nov 2018 09:06:40 +0000 (18:06 +0900)]
efi_loader: allow device == NULL in efi_dp_from_name()

This is a preparatory patch for use in efi_serialize_load_option()
as a load option's file_path should have both a device path and
a file path.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
5 years agoARM: rpi_*_defconfig: Add support to find UUID for filesystem
Otavio Salvador [Tue, 23 Oct 2018 13:35:52 +0000 (10:35 -0300)]
ARM: rpi_*_defconfig: Add support to find UUID for filesystem

The most generic way of having a stable boot behavior is to rely on
UUID instead of device names for root partition, so the order of
probing does not cause issues with booting.

This enables the `CMD_FS_UUID` for following defconfig files:

 - rpi_0_w_defconfig
 - rpi_2_defconfig
 - rpi_3_32b_defconfig
 - rpi_3_defconfig
 - rpi_defconfig

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br>
Signed-off-by: Alexander Graf <agraf@suse.de>