Max Filippov [Fri, 5 Aug 2016 15:26:16 +0000 (18:26 +0300)]
net/ethoc: use priv instead of dev internally
Don't use physical base address of registers directly, ioremap it first.
Save pointer in private struct ethoc and use that struct in all internal
functions.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Max Filippov [Fri, 5 Aug 2016 15:26:15 +0000 (18:26 +0300)]
net/ethoc: add Kconfig entry for the driver
Add Kconfig entry for the driver, remove #define CONFIG_ETHOC from the
only board configuration that uses it and put it into that board's
defconfig.
Cc: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Alban Bedel [Wed, 3 Aug 2016 09:31:03 +0000 (11:31 +0200)]
net: e1000: Fix the build with driver model and SPI EEPROM
When adding support for the driver model the SPI EEPROM feature had
been ignored. Fix the build with both CONFIG_DM_ETH and
CONFIG_E1000_SPI enabled.
Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Chris Packham [Tue, 12 Jul 2016 21:52:36 +0000 (09:52 +1200)]
net: smsc95xx: Use correct get_unaligned functions
The __get_unaligned_le* functions may not be declared on all platforms.
Instead, get_unaligned_le* should be used. On many platforms both of
these are the same function.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Wenyou Yang [Tue, 17 May 2016 05:11:35 +0000 (13:11 +0800)]
net: macb: Fix build error for CONFIG_DM_ETH enabled
Use the right phy_connect() prototype for CONFIGF_DM_ETH.
Support to get the phy interface from dt and set GMAC_UR.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Tom Rini [Fri, 12 Aug 2016 20:00:50 +0000 (16:00 -0400)]
Merge git://git.denx.de/u-boot-dm
Stephen Warren [Mon, 8 Aug 2016 15:41:33 +0000 (09:41 -0600)]
misc: add "call" uclass op
The call op requests that the callee pass a message to the underlying HW
or device, wait for a response, and then pass back the response error code
and message to the callee. It is useful for drivers that represent some
kind of messaging or IPC channel to a remote device.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
John Keeping [Sun, 7 Aug 2016 11:55:40 +0000 (12:55 +0100)]
power: pmic: act8846: add missing newline to debug statements
Signed-off-by: John Keeping <john@metanate.com>
Acked-by: Simon Glass <sjg@chromium.org>
John Keeping [Sun, 7 Aug 2016 11:55:39 +0000 (12:55 +0100)]
power: regulator: act8846: fix reading values
The voltage and control registers need to be looked up from the value in
driver_data. Adjust the get_value and get_enable functions to match the
corresponding set_* functions.
Signed-off-by: John Keeping <john@metanate.com>
Acked-by: Simon Glass <sjg@chromium.org>
Stephen Warren [Fri, 5 Aug 2016 15:47:51 +0000 (09:47 -0600)]
fdt: allow fdtdec_get_addr_size_*() to translate addresses
Some code may want to read reg values from DT, but from nodes that aren't
associated with DM devices, so using dev_get_addr_index() isn't
appropriate. In this case, fdtdec_get_addr_size_*() are the functions to
use. However, "translation" (via the chain of ranges properties in parent
nodes) may still be desirable. Add a function parameter to request that,
and implement it. Update all call sites to default to the original
behaviour.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Squashed in build fix from Stephen:
Signed-off-by: Simon Glass <sjg@chromium.org>
Stephen Warren [Fri, 5 Aug 2016 15:47:50 +0000 (09:47 -0600)]
fdt_support: fdt_translate_address() blob const correctness
The next patch will call fdt_translate_address() from somewhere with a
"const void *blob" rather than a "void *blob", so fdt_translate_address()
must accept a const pointer too. Constify the minimum number of function
parameters to achieve this.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Squashed in build fix from Stephen:
Signed-off-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Fri, 12 Aug 2016 01:26:50 +0000 (10:26 +0900)]
kconfig: use bool instead of boolean for type definition attributes
Linux stopped the use of keyword 'boolean' in Kconfig.
Refer to commit
6341e62b212a2541efb0160c470e90bd226d5496 ("kconfig:
use bool instead of boolean for type definition attributes")
in Linux Kernel.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Mugunthan V N [Thu, 11 Aug 2016 08:57:04 +0000 (14:27 +0530)]
defconfig: am43xx_evm: enable eth driver model
Enable eth driver model for am43xx_evm as cpsw supports
driver model.
This was already added with the commit
bc705ea1cf12 but with
commit
4c4e3b37750f to add fit support CONFIG_DM_ETH was missed.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Lokesh Vutla [Thu, 11 Aug 2016 07:30:59 +0000 (13:00 +0530)]
drivers: net: cpsw: always flush cache of size aligned to PKTALIGN
cpsw tries to flush dcache which is not in the range of PKTALIGN.
Because of this the following warning comes while flushing:
CACHE: Misaligned operation at range [
dffecec0,
dffed016]
Fix it by flushing cache of size aligned to PKTALIGN.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Mugunthan V N [Wed, 10 Aug 2016 16:35:03 +0000 (22:05 +0530)]
configs: dra7xx_evm: enable eth driver model
Enable eth driver model for dra7xx_evm as cpsw supports
driver model.
This was already added with the commit
641b936fa5ba but with
commit
bd7245849f7c to add fit support CONFIG_DM_ETH was missed.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
Vignesh R [Wed, 10 Aug 2016 09:47:21 +0000 (15:17 +0530)]
ARM: dra7xx_evm: Enable regulator DM support
Enable DM based regulator framework and also fixed regulator support as
some IPs like mmc use regulators for there functioning.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Vignesh R [Wed, 10 Aug 2016 09:47:20 +0000 (15:17 +0530)]
ARM: dts: dra7xx-evm: add evm_3v3_sd regulator
Add a node for evm_3v3_sd using onboard PCF GPIO expander which feeds
on to mmc vdd.
Update mapping for vmmc-supply and vmmc_aux-supply.
evm_3v3_sd supplies to SD card vdd, and ldo1 to sdcard i/o lines.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Andreas Dannenberg [Wed, 27 Jul 2016 17:12:39 +0000 (12:12 -0500)]
common: image: Add support for post-processing of images
This commit allows injecting a board/platform/device-specific post-
processing function into the FIT image data loading process, which can
include modifying the size and altering the starting source address of
an image data artifact. This might be desired to do things like strip
headers or footers attached to the images before they were packaged into
the FIT, or to perform operations such as decryption or authentication.
Introduce new configuration option CONFIG_FIT_IMAGE_POST_PROCESS to
allow controlling this feature. If enabled, a platform-specific post-
process function must be provided.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Max Filippov [Sun, 7 Aug 2016 05:53:00 +0000 (08:53 +0300)]
drivers/sysreset: group sysreset drivers
Create drivers/sysreset and move sysreset-uclass and all sysreset
drivers there.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Stefan Agner [Wed, 3 Aug 2016 20:08:55 +0000 (13:08 -0700)]
ARM: non-sec: flush code cacheline aligned
Flush operations need to be cacheline aligned to take effect, make
sure to flush always complete cachelines. This avoids messages such
as:
CACHE: Misaligned operation at range [
00900000,
009004d9]
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
Simon Glass [Sat, 6 Aug 2016 03:35:27 +0000 (21:35 -0600)]
i2c: Drop redundant platform data setting in drivers
The i2c uclass has a default setting for per_child_platdata_auto_alloc_size
so drivers do not need to set it. Remove this from drivers to avoid
confusion.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tom Rini [Thu, 11 Aug 2016 14:45:53 +0000 (10:45 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-uniphier
Tom Rini [Thu, 11 Aug 2016 11:22:55 +0000 (07:22 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-usb
Masahiro Yamada [Wed, 10 Aug 2016 07:08:49 +0000 (16:08 +0900)]
ARM: uniphier: add PSCI support for UniPhier ARMv7 SoCs
Currently, only the CPU_ON function is supported.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 10 Aug 2016 07:08:48 +0000 (16:08 +0900)]
ARM: uniphier: add uniphier_cache_set_active_ways()
This outer cache allows to control active ways independently for
each CPU, so this function will be useful to set up active ways
for a specific CPU.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 10 Aug 2016 07:08:47 +0000 (16:08 +0900)]
ARM: uniphier: add uniphier_cache_inv_way() to support way invalidation
This invalidates entries in specified ways of the outer cache.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 10 Aug 2016 07:08:46 +0000 (16:08 +0900)]
ARM: uniphier: fix CONFIG_SYS_CACHELINE_SIZE when outer cache is on
The UniPhier outer cache (L2 cache on ARMv7 SoCs) has 128 byte line
length and its tags are also managed per 128 byte line.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 10 Aug 2016 07:08:45 +0000 (16:08 +0900)]
ARM: uniphier: move (and rename) CONFIG_UNIPHIER_L2CACHE_ON to Kconfig
Move this option to Kconfig, renaming it into CONFIG_CACHE_UNIPHIER.
The new option name makes sense enough, and the same as Linux has.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 10 Aug 2016 07:08:44 +0000 (16:08 +0900)]
ARM: uniphier: move outer cache register macros to .c file
Now, all of these macros are only used in cache-uniphier.c, so
there is no need to export them in a header file.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 10 Aug 2016 07:08:43 +0000 (16:08 +0900)]
ARM: uniphier: reuse uniphier_cache_disable() for lowlevel_init
The DRAM is available at this point, so setup the temporary stack
and call the C function to reduce the code duplication a bit.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 10 Aug 2016 07:08:42 +0000 (16:08 +0900)]
ARM: uniphier: export uniphier_cache_enable/disable functions
The System Cache (outer cache) is used not only as L2 cache,
but also as locked SRAM. The functions for turning on/off it
is necessary whether the L2 cache is enabled or not.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 10 Aug 2016 07:08:41 +0000 (16:08 +0900)]
ARM: uniphier: move lowlevel debug init code after page table switch
As the sLD3 Boot ROM has a complex page table, it is difficult to
set up the debug UART with enabling it. It will be much easier to
initialize the UART port after switching over to the straight-mapped
page table.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 10 Aug 2016 07:08:40 +0000 (16:08 +0900)]
ARM: uniphier: fix ROM boot mode for PH1-sLD3
Commit
4b50369fb535 ("ARM: uniphier: create early page table at
run-time") broke the ROM boot mode for PH1-sLD3 SoC, because the
run-time page table creation requires the outer cache register
access but the page table in the sLD3 Boot ROM does not straight-map
virtual/physical addresses.
The idea here is to check the current page table to determine if
it is a straight map table. If not, adjust the outer cache register
base.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 10 Aug 2016 07:08:39 +0000 (16:08 +0900)]
ARM: uniphier: refactor L2 zero-touching code in lowlevel_init
Here, the ldr pseudo-instruction falls into the ldr + data set.
The register access by [r1, #offset] produces shorter code.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 10 Aug 2016 07:08:38 +0000 (16:08 +0900)]
ARM: uniphier: do not compile v7_outer_cache_disable if L2 is disabled
If CONFIG_UNIPHIER_L2CACHE_ON is undefined, the L2 cache is never
enabled, so there is no need for v7_outer_cache_disable(). The weak
stub avoids the compile error anyway.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 10 Aug 2016 07:08:37 +0000 (16:08 +0900)]
ARM: uniphier: support prefetch and touch operations for outer cache
The UniPhier outer cache (L2 cache on ARMv7 SoCs) can be used as
SRAM by locking ways.
These functions will be used to transfer the trampoline code for SMP
into the locked SRAM.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 10 Aug 2016 07:08:36 +0000 (16:08 +0900)]
ARM: uniphier: refactor outer cache code
Unify the range/all operation routines into the common function,
uniphier_cache_maint_common(), and sync code with Linux a bit more.
This reduces the code duplication.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tom Rini [Tue, 9 Aug 2016 11:16:01 +0000 (07:16 -0400)]
Merge git://www.denx.de/git/u-boot-ppc4xx
Alban Bedel [Tue, 9 Aug 2016 09:10:03 +0000 (11:10 +0200)]
eth: asix88179: Add support for the driver model
Adjust this driver to support driver model for Ethernet.
Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
Alban Bedel [Tue, 9 Aug 2016 09:10:02 +0000 (11:10 +0200)]
eth: asix88179: Prepare supporting the driver model
Change the prototype of a few functions to allow resuing the code for
the driver model.
Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
Dirk Eibach [Mon, 1 Aug 2016 14:34:49 +0000 (16:34 +0200)]
ppc4xx: Fix platform support
Commit "
ecc3066 Fix board init code to respect the C runtime environment"
broke platform support for ppc4xx.
start.S prepares a stackframe that is later rendered unusable by appending
the reserved space for global data.
Instead the reserved space has to be put first. Then the stackframe can
be pushed.
I can only test the 405EP OCM case. At least all other ppc4xx boards still
build.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
Vignesh R [Mon, 25 Jul 2016 10:56:45 +0000 (16:26 +0530)]
i2c: i2c-uclass-compat: avoid any BSS usage
As I2C can be used before DRAM initialization for reading EEPROM,
avoid using static variables stored in BSS, since BSS is in DRAM, which
may not have been initialised yet. Explicitly mark "static global"
variables as belonging to the .data section.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Heiko Schocher<hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Alexander Graf [Fri, 5 Aug 2016 12:51:47 +0000 (14:51 +0200)]
efi_loader: disk: Sanitize exposed devices
When a target device is 0 bytes long, there's no point in exposing it to
the user. Let's just skip them.
Also, when an offset is passed into the efi disk creation, we should
remove this offset from the total number of sectors we can handle.
This patch fixes both things.
Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Fri, 5 Aug 2016 12:49:53 +0000 (14:49 +0200)]
efi_loader: disk: Fix CONFIG_BLK breakage
When using CONFIG_BLK, there were 2 issues:
1) The name we generate the device with has to match the
name we set in efi_set_bootdev()
2) The device we pass into our block functions was wrong,
we should not rediscover it but just use the already known
pointer.
This patch fixes both issues.
Signed-off-by: Alexander Graf <agraf@suse.de>
Simon Glass [Fri, 5 Aug 2016 03:58:14 +0000 (21:58 -0600)]
tiny-printf: Adjust to avoid using data section
We can pass all the variables down to the functions that need them, and
then everything is on the stack. This is safer than using the data section.
At least on firefly-rk3288, the code size is the same and the data size is
12 bytes smaller:
before:
18865 2636 40 21541 5425 b/firefly-rk3288/spl/u-boot-spl
after:
18865 2624 40 21529 5419 b/firefly-rk3288/spl/u-boot-spl
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Mugunthan V N [Tue, 2 Aug 2016 06:31:15 +0000 (12:01 +0530)]
configs: k2l_evm: add random eth address support
There is only one ethernet mac address in e-fuse, but there are
multiple slaves in keystone net, so enable random mac address
support.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Mugunthan V N [Tue, 2 Aug 2016 06:31:14 +0000 (12:01 +0530)]
configs: k2e_evm: add random eth address support
There is only one ethernet mac address in e-fuse, but there are
multiple slaves in keystone net, so enable random mac address
support.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Mugunthan V N [Tue, 2 Aug 2016 06:31:13 +0000 (12:01 +0530)]
configs: k2hk_evm: add random eth address support
There is only one ethernet mac address in e-fuse, but there are
multiple slaves in keystone net, so enable random mac address
support.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Mugunthan V N [Tue, 2 Aug 2016 06:31:12 +0000 (12:01 +0530)]
drivers: net: keystone_net: add support for multi slave ethernet
Keystone net can have multiple ethernet slaves, currently only
slave 1 is supported by the driver. Register multiple slaves as
individual ethernets to network framework.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Mugunthan V N [Tue, 2 Aug 2016 06:31:11 +0000 (12:01 +0530)]
drivers: net: keystone_net: fix line termination with semi-colon
Each line should be terminated by semi-colon. It was not caught
earlier as there is a proper statement. Fix it by changing the
comma with semi-colon.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Vignesh R [Tue, 2 Aug 2016 04:44:28 +0000 (10:14 +0530)]
ARM: dts: dra72-evm: Add mode-gpios entry for mac node
On DRA72 EVM, cpsw slave1 is muxed with VIN2A, hence switch to cpsw
slave0 for ethernet. This is controlled by pcf gpio line. Add
appropriate mode-gpios DT entry so that driver can select the required
slave.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Vignesh R [Tue, 2 Aug 2016 04:44:27 +0000 (10:14 +0530)]
net: cpsw: Add support to drive gpios for ethernet to be functional
On DRA72 EVM, cpsw slaves may be muxed with other modules. This
selection is controlled by a pcf gpio line. Add support for cpsw driver
to acquire mode-gpios and select the appropriate slave using gpio APIs.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Vignesh R [Tue, 2 Aug 2016 04:44:26 +0000 (10:14 +0530)]
ARM: dts: dra7xx: Add u-boot specific property for PCF8575 nodes
PCF8575 does not have any registers hence, offset field needs to be
ignored for i2c read/write. Therefore populate u-boot,i2c-offset-len
with 0 in PCF8575 DT nodes.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Vignesh R [Tue, 2 Aug 2016 04:44:25 +0000 (10:14 +0530)]
ARM: dra7xx_evm: Enable support for TI PCF8575
On DRA7, pcf chip present at address 0x21 on i2c1, is used to
switch between cpsw slave0 and slave1. Hence, enable PCF
driver for the same.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Vignesh R [Tue, 2 Aug 2016 04:44:24 +0000 (10:14 +0530)]
gpio: Add driver for TI PCF8575 I2C GPIO expander
TI's PCF8575 is a 16-bit I2C GPIO expander.The device features a
16-bit quasi-bidirectional I/O ports. Each quasi-bidirectional I/O can
be used as an input or output without the use of a data-direction
control signal. The I/Os should be high before being used as inputs.
Read the device documentation for more details[1].
This driver is based on pcf857x driver available in Linux v4.7 kernel.
It supports basic reading and writing of gpio pins.
[1] http://www.ti.com/lit/ds/symlink/pcf8575.pdf
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Mike Looijmans [Tue, 26 Jul 2016 05:34:07 +0000 (07:34 +0200)]
spl_nor.c: Support devicetree sizes different from 16k
The devicetrees for various platforms already exceed 16k. Add a define
CONFIG_SYS_FDT_SIZE to specify the FDT size, and set to 16k for the
two boards that define this CONFIG_SYS_FDT_BASE parameter. This
allows platforms with larger devicetree blobs to boot from NOR.
Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Alban Bedel [Wed, 3 Aug 2016 06:14:41 +0000 (08:14 +0200)]
eth: asix88179: Fix receiving on big endian system
In asix_recv() the call to convert the endianess of the receive header
was applied on the wrong variable. Instead of converting rx_hdr it
converted pkt_hdr which is a pointer, and not yet initialiazed at this
point.
Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
Alban Bedel [Wed, 3 Aug 2016 06:14:40 +0000 (08:14 +0200)]
eth: asix88179: Add VID:DID for Cypress GX3 USB Ethernet Adapter
Added support for the Cypress GX3 SuperSpeed to Gigabit Ethernet
Bridge Controller (VID_04b4/PID_3610).
Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
Rajesh Bhagat [Fri, 1 Jul 2016 13:21:49 +0000 (18:51 +0530)]
arm: ls1021a: Enable CONFIG_DM_USB in defconfigs
Enables driver model flag CONFIG_DM_USB for LS1021A
platform defconfigs.
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Rajesh Bhagat [Fri, 1 Jul 2016 13:21:48 +0000 (18:51 +0530)]
dm: ls1021a: dts: Update USB 3.0 node to support DM USB
Update USB 3.0 controller dts node in ls1021a.dtsi.
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Rajesh Bhagat [Fri, 1 Jul 2016 13:21:47 +0000 (18:51 +0530)]
usb: xhci: fsl: Add code to use CONFIG_DM_USB
Adds code to use driver model for USB XHCI FSL driver
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Rajesh Bhagat [Fri, 1 Jul 2016 13:21:46 +0000 (18:51 +0530)]
usb: ehci: fsl: Add code to use CONFIG_DM_USB
Adds code to use driver model for USB EHCI FSL driver
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Rajesh Bhagat [Fri, 1 Jul 2016 13:21:45 +0000 (18:51 +0530)]
drivers: usb: fsl: Make function for initialization to use in CONFIG_DM_USB
Moves code from ehci_hcd_init to new function ehci_fsl_init
which can be re-used in CONFIG_DM_USB.
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Masahiro Yamada [Sun, 31 Jul 2016 15:16:34 +0000 (00:16 +0900)]
usb: add (move) CONFIG_USB_HOST to Kconfig
The meaning of CONFIG_USB in U-Boot is different from that in Linux.
As you see in drivers/usb/Kconfig of Linux, CONFIG_USB enables the
USB host controller support, while CONFIG_USB_SUPPORT is used to
enable the whole of the USB sub-system.
When I added CONFIG_USB into Kconfig by commit
6e7e9294d321 ("usb:
add basic USB configs in Kconfig"), I planned to follow the Linux's
convention, i.e. CONFIG_USB to enable/disable the USB host support.
Then, commit
68f7c5db2d1e ("usb: Generic USB Kconfig option, that
fits both host and gadget and comments") changed the logic of the
CONFIG_USB to point to the whole of the USB sub-system. As a result,
currently we do not have an option for USB host.
This commit adds CONFIG_USB_HOST, which will be useful to compile
in the USB host support code.
CONFIG_USB_HOST is not referenced at all, but strangely some boards
define it in board headers. I removed them because USB_HOST will be
selected in Kconfig going forward.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Sun, 31 Jul 2016 15:16:33 +0000 (00:16 +0900)]
usb: add CONFIG_USB_UHCI_HCD in Kconfig
There is no UHCI driver entry in Kconfig for now, but we have some
UHCI drivers, for example, LEON. This is a placeholder in case we
want to move them to Kconfig in the future.
The help message was copied from Linux.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Sun, 31 Jul 2016 15:16:32 +0000 (00:16 +0900)]
usb: add CONFIG_USB_OHCI_HCD in Kconfig
Add this option as a common config for all OHCI controllers. Its
help message was copied from Linux. Also, I moved it below EHCI
to respect the order in Linux's Kconfig.
Add CONFIG_USB_OHCI_HCD=y to axs103_defconfig, which is the only
user of OHCI_GENERIC.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Stefan Roese [Wed, 29 Jun 2016 05:58:05 +0000 (07:58 +0200)]
net: usb: r8152: Add DM support
Add support for driver model, so that CONFIG_DM_ETH can be defined and
used with this driver.
This patch also adds the read_rom_hwaddr() callback so that the ROM MAC
address will be used to the DM part of this driver.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Ted Chen <tedchen@realtek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Peng Fan [Fri, 17 Jun 2016 06:19:27 +0000 (14:19 +0800)]
dm: ehci-mx6: support driver model
Support driver model for ehci mx6 driver.
Consolidate code to be shared between DM and non-DM, such as
introducing ehci_mx6_common_init.
For simplicity, some old fasion code are keeped for DM usage,
such as board_ehci_power and board_usb_phy_mode. And 'dr-mode',
usbphy and vbus handling code for DM is not added now.
These will be added in future patches.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Cc: Stefan Agner <stefan@agner.ch>
Cc: Simon Glass <sjg@chromium.org>
Chin Liang See [Sun, 7 Aug 2016 14:50:40 +0000 (22:50 +0800)]
spi: cadence_qspi_apb: Ensure baudrate doesn't exceed max value
Ensuring the baudrate divisor value doesn't exceed the max value
in the calculation.It will be capped at max value to ensure the
correct value being written into the register.
Example of the existing bug is when calculated div = 16. After and
with the mask, the value written to register is actually 0 (register
field for baudrate divisor). With this fix, the value written is now
15 which is max value for baudrate divisor.
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Jagan Teki <jteki@openedev.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Masahiro Yamada [Sun, 24 Jul 2016 16:38:53 +0000 (01:38 +0900)]
ARM: socfpga: use the default CONFIG_BOOTDELAY=2
This option controls how long it should be paused before entering
the auto-boot mode. The default value from Kconfig should be fine
except socfpga_vining_fpga_defconfig.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tom Rini [Sat, 6 Aug 2016 15:38:14 +0000 (11:38 -0400)]
Merge git://git.denx.de/u-boot-rockchip
Tom Rini [Fri, 5 Aug 2016 21:34:55 +0000 (17:34 -0400)]
zynq_sdhci.c: Fix warning in arasan_sdhci_probe
We no longer need to set 'caps' as it's not passed to sdhci_setup_cfg
anymore.
Fixes:
14bed52d276a ("mmc: sdhci: remove the unnecessary arguments for
sdhci_setup_cfg")
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 5 Aug 2016 18:09:15 +0000 (14:09 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-tegra
Tom Rini [Fri, 5 Aug 2016 13:15:55 +0000 (09:15 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-mmc
Karl Beldan [Tue, 2 Aug 2016 10:36:17 +0000 (10:36 +0000)]
configs: Fix mmc rescan misuses
This follows
9fd383724cf4 ("mmc: don't allow extra cmdline arguments"),
and affects omapl138_lcdk and omap3_evm_quick_mmc.
Signed-off-by: Karl Beldan <kbeldan@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Karl Beldan [Tue, 2 Aug 2016 18:57:14 +0000 (18:57 +0000)]
mkimage: Fix argument parsing with signature comment
Inform getopt that '-c' requires a parameter.
Fixes:
a02221f29deb ("mkimage: Convert to use getopt()")
Signed-off-by: Karl Beldan <kbeldan@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Sun, 31 Jul 2016 23:35:09 +0000 (17:35 -0600)]
test: Adjust run_command_list() to return a list of strings
Return one string for each command that was executed. This seems cleaner.
Suggested-by: Teddy Reed <teddy.reed@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Simon Glass [Sun, 31 Jul 2016 23:35:08 +0000 (17:35 -0600)]
test: Add a function to restart U-Boot
Add a proper function for this rather than using internal functions. Use it
in the single call site.
Also, do a restart at the end of the vboot test to reset to the normal
device tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Stephen Warren <swarren@nvidia.com>
Simon Glass [Sun, 31 Jul 2016 23:35:07 +0000 (17:35 -0600)]
test: vboot: Put each test variant in its own section
Use 'cons.log.section' feature to split up the test output. This makes it
easier to read.
Suggested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 31 Jul 2016 23:35:06 +0000 (17:35 -0600)]
test: Rename sha to sha_algo and pass it around
Rename this argument and pass it to each function that needs it, instead of
making it global.
Suggested-by: Stephen Warren <swarren@nvidia.com>
Suggested-by: Teddy Reed <teddy.reed@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 31 Jul 2016 23:35:05 +0000 (17:35 -0600)]
test: Drop the cmd() function
Instead of this, use the existing run_and_log() function, enhanced to
support a command string as well as a list of arguments.
Suggested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 31 Jul 2016 23:35:04 +0000 (17:35 -0600)]
test: Fix typos in comments
Fix some typos in various files introduced with the vboot test conversion.
Reported-by: Teddy Reed <teddy.reed@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 31 Jul 2016 23:35:03 +0000 (17:35 -0600)]
test: Check exit status in run_and_log_expect_exception()
This check was missed. Add it and make the message more verbose.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Tom Rini <trini@konsulko.com>
Fixes:
9e17b034 (test/py: Provide a way to check that a command fails)
Simon Glass [Sun, 31 Jul 2016 23:35:02 +0000 (17:35 -0600)]
test: Fix typos and tidy up
Fix review comments that were missed at the time. Also explain why we need
to regenerate the device tree for each test.
Reported-by: Teddy Reed <teddy.reed@gmail.com>
Suggested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes:
f6349c3c (test: Add a README)
Simon Glass [Sun, 31 Jul 2016 23:35:01 +0000 (17:35 -0600)]
Makefile: Allow 'make tests' to run tests
Add this shortcut for running tests. Unfortunately 'make test' cannot be
used as it is an existing directory.
Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Teddy Reed <teddy.reed@gmail.com>
Alexander Graf [Sat, 30 Jul 2016 21:13:03 +0000 (23:13 +0200)]
armv8: mmu: Detect page table overflow in emergency pt creation
We create 2 sets of page tables: One for normal operation, one for
emergency (used while modifying the former).
Because the page tables grow dynamically, we have code that checks
for overflow. Unfortunately we didn't adjust the available space
variable while creating the emergency tables, so potentially someone
might run into an overflow there (not seen in real world yet though!).
Fix it by properly adjusting the size as well as the base offset in
emergency page table creation.
Reported-by: York Sun <york.sun@nxp.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: York Sun <york.sun@nxp.com>
Kever Yang [Fri, 29 Jul 2016 03:12:18 +0000 (11:12 +0800)]
cmd: gpt: fix the wrong size parse for the last partition
The calculation of "dev_desc->lba - 34 - 1 - offset" is not correct for
size '-', because both fist_usable_lba and last_usable_lba will remain
34 sectors.
We can simply use 0 for size '-' because the part_efi module will decode
the size and auto extend the size to maximum available size.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Tom Rini [Thu, 28 Jul 2016 02:29:42 +0000 (22:29 -0400)]
omap3: Drop omap3_evm_quick_* targets
These config targets were added well before the Kconfig migration began
as a way to demonstrate how to make these platforms work with cut down
features. At this point in time they no longer serve a good purpose so
remove them.
Signed-off-by: Tom Rini <trini@konsulko.com>
Heiko Stübner [Fri, 22 Jul 2016 21:51:06 +0000 (23:51 +0200)]
rockchip: remove log2 reimplementation from clock drivers
The already available ilog2 function does exactly the same in the common
case than the log2 function the current clock-driver reimplement.
So, simply move to that one.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Glass <sjg@chromium.org>
Kever Yang [Thu, 4 Aug 2016 03:45:00 +0000 (11:45 +0800)]
config: rk3399: enable dwmmc controller
Enable the rockchip dwmmc driver for rk3399 and its evb.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Kever Yang [Thu, 4 Aug 2016 03:44:59 +0000 (11:44 +0800)]
dts: rk3399: enable dwmmc for sdcard
rk3399 sdcard is using dwmmc controller, enable it for sdcard.
SCLK_SDMMC is the clock for controller operation clock, move it
to the first place.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Kever Yang [Thu, 4 Aug 2016 03:44:58 +0000 (11:44 +0800)]
clock: rk3399: add support for dwmmc 400K
MMC core will use 400KHz for card initialize first and then switch to
higher frequency like 50MHz, we need to support both 400KHz and about
50MHz for dwmmc controller.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Kever Yang [Thu, 4 Aug 2016 03:40:29 +0000 (11:40 +0800)]
configs: rk3399: add gpt and fs support
To compatible with distro boot, we need to add gpt and fs support,
including gpt table and vfat, ext2, ext4 support.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Xu Ziyuan [Wed, 3 Aug 2016 03:55:06 +0000 (11:55 +0800)]
rockchip: add usb mass storage feature support for rk3288
Enable ums feature for rk3288 boards, so that we can mount the mmc
device to PC.
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Xu Ziyuan [Wed, 3 Aug 2016 03:55:05 +0000 (11:55 +0800)]
rockchip: add basic partitions support for rk3288
For compatibility with distro boot, fastboot, and mount the mmc deivce
to PC via usb mass storage feature, GPT partitions are essential.
You should write the partitions to mmc device prior to use above
feature.
=> gpt write mmc 1 $partitions
GPT successfully written to block device!
success!
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Xu Ziyuan [Mon, 1 Aug 2016 00:46:19 +0000 (08:46 +0800)]
rockchip: add support for rk3288 miniarm board
Miniarm is a rockchip rk3288 based development board, which has lots of
interface such as HDMI, USB, micro-SD card, Audio etc.
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Heiko Stübner [Fri, 29 Jul 2016 12:47:21 +0000 (14:47 +0200)]
move: rockchip: move clock drivers into a subdirectory
With the number of Rockchip clock drivers increasing, don't clutter up
the core drivers/clk directory with them and instead move them out of
the way into a separate subdirectory.
Suggested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Glass <sjg@chromium.org>
Updated for rk3399:
Signed-off-by: Simon Glass <sjg@chromium.org>
Kever Yang [Fri, 29 Jul 2016 02:35:25 +0000 (10:35 +0800)]
rk3399: add basic soc driver
This patch add driver for:
- clock driver including set_rate for cpu, mmc, vop, I2C.
- sysreset driver
- grf syscon driver
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Sandy Patterson [Thu, 28 Jul 2016 13:49:01 +0000 (09:49 -0400)]
rockchip: rockchip, sdram-channel 0xff fix remaining dts
Add an extra byte so that this data is not byteswapped.
Signed-off-by: Sandy Patterson <apatterson@sightlogix.com>
Acked-by: Simon Glass <sjg@chromium.org>
Xu Ziyuan [Thu, 28 Jul 2016 03:42:34 +0000 (11:42 +0800)]
rockchip: add fastboot support for rk3036 board
Enable fastboot feature on rk3036, please refer to doc/README.rockchip
for more detailed usage.
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>