Angelo Durgehello [Fri, 15 Nov 2019 22:54:18 +0000 (23:54 +0100)]
drivers: mcffec: conversion to dm
Full conversion to dm for all boards, legacy code removed.
Signed-off-by: Angelo Durgehello <angelo.dureghello@timesys.com>
Angelo Durgehello [Fri, 15 Nov 2019 22:54:17 +0000 (23:54 +0100)]
drivers: net: add mcf fec dm Kconfig support
Add ColdFire fec to Kconfig.
Signed-off-by: Angelo Durgehello <angelo.dureghello@timesys.com>
Angelo Durgehello [Fri, 15 Nov 2019 22:54:16 +0000 (23:54 +0100)]
m68k: add dm fec support
Add architecture-related code for dm fec support.
Signed-off-by: Angelo Durgehello <angelo.dureghello@timesys.com>
Angelo Durgehello [Fri, 15 Nov 2019 22:54:15 +0000 (23:54 +0100)]
configs: purge unneeded fec defines
Remove unneeded fec-related defines after fec moved as dm.
Signed-off-by: Angelo Durgehello <angelo.dureghello@timesys.com>
Angelo Durgehello [Fri, 15 Nov 2019 22:54:14 +0000 (23:54 +0100)]
configs: add eth dm support for all ColdFire boards
Add dm eth config options for all involved ColdFire-based boards.
Signed-off-by: Angelo Durgehello <angelo.dureghello@timesys.com>
Angelo Durgehello [Fri, 15 Nov 2019 22:54:13 +0000 (23:54 +0100)]
m68k: add fec fdt overrides to all boards
Add ethernet controller overrides for all involved boards.
Signed-off-by: Angelo Durgehello <angelo.dureghello@timesys.com>
Angelo Durgehello [Fri, 15 Nov 2019 22:54:12 +0000 (23:54 +0100)]
m68k: add fec base node to devicetrees
Add basic ethernet controller devicetree nodes for all ColdFire
families.
Signed-off-by: Angelo Durgehello <angelo.dureghello@timesys.com>
Tom Rini [Thu, 9 Jan 2020 18:42:43 +0000 (13:42 -0500)]
Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-mpc83xx
- A small PR with MC8309 fixes from Rasmus.
Tom Rini [Thu, 9 Jan 2020 13:52:21 +0000 (08:52 -0500)]
Merge tag 'dm-pull-8jan20' of git://git.denx.de/u-boot-dm
dm: Increased separation of ofdata_to_platdata() and probe methods
Tom Rini [Thu, 9 Jan 2020 13:51:57 +0000 (08:51 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-usb
- DFU updates
Tom Rini [Wed, 8 Jan 2020 23:57:11 +0000 (18:57 -0500)]
Merge tag 'efi-2020-04-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2020-04-rc1
This pull request provides:
* support for FIT images for UEFI binaries
* drivers for hardware random number generators
* an implementation of the EFI_RNG_PROTOCOL
* a sub-command for efidebug to display configuration tables
Tom Rini [Wed, 8 Jan 2020 20:25:13 +0000 (15:25 -0500)]
Merge tag 'uniphier-v2020.04' of https://gitlab.denx.de/u-boot/custodians/u-boot-uniphier
UniPhier SoC updates for v2020.04
- add pinmux nodes for I2C ch5, ch6
- enable SPI driver and command
Tom Rini [Wed, 8 Jan 2020 20:24:50 +0000 (15:24 -0500)]
Merge tag 'u-boot-imx-
20200108' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
---------------------------------------------------------------------
Add i.MX8MP SoC and EVK board
Update README for i.MX8MN EVK and fix mmc env
Add pca9450 driver
--------------------------------------------------------------------
Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/
634211885
Tom Rini [Wed, 8 Jan 2020 20:23:49 +0000 (15:23 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
Tom Rini [Wed, 8 Jan 2020 20:23:37 +0000 (15:23 -0500)]
Merge tag 'u-boot-amlogic-
20200108' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic
- Khadas VIM3L based on Amlogic S905D3 support
- Various fixups for amlogic boards
- Unnecessary header includes drop into video/meson
Tom Rini [Wed, 8 Jan 2020 20:08:34 +0000 (15:08 -0500)]
Merge branch '2020-01-07-master-imports'
- DT overlay support in FIT images in SPL
- remoteproc update
- Assorted SATA fixes
- Other assorted fixes
Masahiro Yamada [Tue, 7 Jan 2020 09:47:26 +0000 (18:47 +0900)]
uniphier_{v7, v8}_defconfig: enable SPI driver and sspi command
Compile drivers/spi/uniphier_spi.c and cmd/spi.c
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Tue, 7 Jan 2020 09:19:23 +0000 (18:19 +0900)]
ARM: dts: uniphier: add pinmux nodes for I2C ch5, ch6
The next generation SoC can connect on-board slave devices via
I2C ch5 and ch6.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Peng Ma [Wed, 4 Dec 2019 10:36:45 +0000 (10:36 +0000)]
ata: fsl_sata: Continue probing other sata port when failed current port.
In the initialization of sata driver, we want to initialize all port
probes, Therefore, any detection failure between of them should continue
initialization by skipping the current port instead of exit.
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Peng Ma [Wed, 4 Dec 2019 10:36:42 +0000 (10:36 +0000)]
ata: sata_sil: Continue probing other sata port when failed current port.
In the initialization of sata driver, we want to initialize all port
probes, Therefore, any detection failure between of them should continue
initialization by skipping the current port instead of exit.
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Patrice Chotard [Fri, 6 Dec 2019 14:01:49 +0000 (15:01 +0100)]
treewide: Remove CONFIG_SYS_UBOOT_START from configs board files
As previous CONFIG_SYS_UBOOT_START is now set by default to
CONFIG_SYS_TEXT_BASE when not defined, CONFIG_SYS_UBOOT_START
can be removed from include/configs board files.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
Patrice Chotard [Fri, 6 Dec 2019 14:01:48 +0000 (15:01 +0100)]
Makefile: Fix CONFIG_SYS_UBOOT_START default value
This patches restores boot on boards which rely on
CONFIG_SYS_UBOOT_START equal to CONFIG_SYS_TEXT_BASE when using SPL
Fixes:
d3e97b53c1f2 ("spl: fix entry_point equal to load_addr")
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Thu, 5 Dec 2019 23:46:11 +0000 (18:46 -0500)]
cmd/Kconfig: Add more dependencies to OSE bootm support
Per Enea OSE documentation, it supports some classes of ARM, PowerPC and
X86. Limit the option to those platforms.
Signed-off-by: Tom Rini <trini@konsulko.com>
Peng Fan [Mon, 6 Jan 2020 08:19:34 +0000 (16:19 +0800)]
imx: imx8mn: enable CONFIG_CMD_ERASEENV
enable CONFIG_CMD_ERASEENV to make it easy to erase env.
Use savedefconfig to generate new defconfig.
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 6 Jan 2020 08:16:32 +0000 (16:16 +0800)]
imx: imx8mn_evk: add board_mmc_get_env_dev
Add board_mmc_get_env_dev, otherwise,
Loading Environment from MMC...
MMC Device 0 not found
*** Warning - No MMC card found, using default environment
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 6 Jan 2020 07:38:17 +0000 (15:38 +0800)]
imx8mn: evk: add README
Add a README for users to build a workable image.
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 30 Dec 2019 09:46:21 +0000 (17:46 +0800)]
imx: add i.MX8MP EVK board
Add basic i.MX8MP EVK board support
U-Boot SPL
2020.01-rc4-00388-gb1bf40c0ae-dirty (Dec 30 2019 - 17:55:33 +0800)
power_pca9450b_init
DDRINFO: start DRAM init
DDRINFO:ddrphy calibration done
DDRINFO: ddrmix config done
Normal Boot
Failed to find clock node. Check device tree
WDT: Not found!
Trying to boot from BOOTROM
image offset 0x8000, pagesize 0x200, ivt offset 0x0
U-Boot
2020.01-rc4-00388-gb1bf40c0ae-dirty (Dec 30 2019 - 17:55:33 +0800)
CPU: Freescale i.MX8MP rev1.0 at 1000 MHz
Reset cause: POR
Model: NXP i.MX8MPlus EVK board
DRAM: 6 GiB
MMC: FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... OK
In: serial
Out: serial
Err: serial
Net: No ethernet found.
Hit any key to stop autoboot: 0
u-boot=> mmc list
FSL_SDHC: 1 (SD)
FSL_SDHC: 2
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 30 Dec 2019 09:40:38 +0000 (17:40 +0800)]
imx: imx8m: add imximage-8mp-lpddr4.cfg
Add imximage-8mp-lpddr4.cfg for imximage usage, almost same
as i.MX8MN ddr4 cfg, but with different ddr firmware
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 30 Dec 2019 09:39:18 +0000 (17:39 +0800)]
clk: imx: add i.MX8MP clk driver
Add i.MX8MP clk driver for i.MX8MP CLK driver model usage
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 30 Dec 2019 08:56:25 +0000 (16:56 +0800)]
clk: imx: add imx_clk_mux2_flags
Add imx_clk_mux2_flags which will be used by i.MX8MP
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 30 Dec 2019 08:52:30 +0000 (16:52 +0800)]
imx: imx8m: only support non-dm code in clock_imx8mm.c
The drivers/clk/imx/*.c are used for CLK dm case, the
clock_imx8mm.c is used for non CLK dm case, let's split
it. Sometimes it is hard to enable CLK dm in SPL stage,
considering code size, malloc size requirement, the splittion
will make it easy to use non CLK dm in SPL stage.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 30 Dec 2019 08:44:48 +0000 (16:44 +0800)]
imx: Kconfig: make SPL_IMX_ROMAPI_LOADADDR visible to i.MX8MP
i.MX8MP ROM support ROMAPI as i.MX8MN, so make
SPL_IMX_ROMAPI_LOADADDR visible to i.MX8MP
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 30 Dec 2019 08:43:48 +0000 (16:43 +0800)]
imx: add i.MX8MP PE property
i.MX8MP does not have LVTTL, it has a PE property
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 30 Dec 2019 08:40:57 +0000 (16:40 +0800)]
imx: imx8mp: add pin header file
Add pin header file for i.MX8MP
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Tue, 15 Oct 2019 09:15:18 +0000 (02:15 -0700)]
power: Add new PMIC PCA9450 driver
PCA9450 PMIC series is used to support iMX8MM (PCA9450A) and
iMX8MN (PCA9450B). Add the PMIC driver for both PCA9450A and PCA9450B.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 30 Dec 2019 02:03:44 +0000 (10:03 +0800)]
arm: dts: freescale: Add i.MX8MP dtsi support
The i.MX8M Plus Media Applications Processor is part of the growing
mScale family targeting the consumer and industrial market. It brings
an effective Machine Learning and AI accelerator that enables a new
class of applications. It is built in Samsung 14LPP to achieve both
high performance and low power consumption and relies on a powerful
fully coherent core complex based on a quad core ARM Cortex-A53 cluster
and Cortex-M7 low-power coprocessor, audio digital signal processor,
machine learning and graphics accelerators.
Add the basic dtsi support for i.MX8MP.
Patch from Anson Huang for Kernel
https://patchwork.kernel.org/patch/
11310915/
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 30 Dec 2019 01:58:52 +0000 (09:58 +0800)]
ddr: imx8m: Add DRAM PLL to generate 1000Mhz output
We will generate DRAM 4000MT/s as default for i.MX8MP.
So need DRAM PLL to generate 1000Mhz clock to DDR PHY and controller.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Tue, 24 Dec 2019 03:26:41 +0000 (11:26 +0800)]
mxc_ocotp: support i.MX8MP
i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks
and ctrl register bit definitions, so update to reflect that.
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 30 Dec 2019 01:52:15 +0000 (09:52 +0800)]
pinctrl: imx8m: support i.MX8MP
Add i.MX8MP compatible to let the pinctrl driver could support
i.MX8MP.
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Fri, 27 Dec 2019 03:40:55 +0000 (11:40 +0800)]
imx: imx8m: add 1GHz fracpll entry
4000MTS DDR needs 1GHz fracpll, so add the entry
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Fri, 27 Dec 2019 03:39:15 +0000 (11:39 +0800)]
imx: imx8mp: add basic clock
i.MX8MP has similar architecture as i.MX8MN, but it has different
clk root and index, so add that to make i.MX8MP could use
the non-dm clock driver.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Fri, 27 Dec 2019 02:38:05 +0000 (10:38 +0800)]
arm: dts: add i.MX8MP pinfunc header
Add i.MX8MP pinfunc header for dts usage
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Fri, 27 Dec 2019 02:37:39 +0000 (10:37 +0800)]
dt-bindings: clock: add i.MX8MP clock header
Add i.MX8MP clock header
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Fri, 27 Dec 2019 02:27:49 +0000 (10:27 +0800)]
imx: spl: support i.MX8MP spl_boot_device
i.MX8MP follows i.MX8MN, so just let it use spl_board_boot_device
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Fri, 27 Dec 2019 02:24:54 +0000 (10:24 +0800)]
imx: imx8m: add Kconfig entry for i.MX8MP
Add Kconfig entry for i.MX8MP
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 30 Dec 2019 09:57:10 +0000 (17:57 +0800)]
imx: cpu: enlarge bit mask to 0x1FF for cpu type
i.MX8MP use 0x182 as dummy id, 0xFF is not able the get the highest
bit, so enlarge bit mask to 0x1FF to make it could detect
cpu type correctly
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Fri, 27 Dec 2019 02:19:42 +0000 (10:19 +0800)]
imx8mp: set BYPASS ID SWAP to avoid AXI bus errors
Set the BYPASS ID SWAP bit (GPR10 bit 1) in order for GPU not to
generated AXI bus errors with TZC380 enabled.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Fri, 27 Dec 2019 02:14:02 +0000 (10:14 +0800)]
imx: get cpu id/type of i.MX8MP
Support get i.MX8MP cpu id and cpu type
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Wed, 11 Dec 2019 06:17:12 +0000 (06:17 +0000)]
imx: imx8mq: handle ESDHC in mxc_get_clock
fsl_esdhc_imx driver will call "mxc_get_clock(MXC_ESDHC_CLK +
dev->seq)", however mxc_get_clock wrongly handle MXC_ESDHC_CLK
as root clk and cause sd card could not be detected in U-Boot proper,
as below:
"Loading Environment from MMC... unable to select a mode"
Handle MXC_ESDHC_CLK in mxc_get_clock to fix the issue.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Baruch Siach <baruch@tkos.co.il>
Tested-by: Fabio Estevam <festevam@gmail.com>
Fabio Estevam [Tue, 10 Dec 2019 09:33:00 +0000 (06:33 -0300)]
wandboard: Remove repeated PMIC string
After the conversion to DM_PMIC the following output is seen:
PMIC: PMIC: PFUZE100 ID=0x10
Remove the unnecessary PMIC string from the board file to
avoid the repetead string.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Fabio Estevam [Tue, 10 Dec 2019 09:32:59 +0000 (06:32 -0300)]
wandboard: Fix the DM_PMIC conversion
Commit
ec837c82d709 ("imx6: wandboard: convert to DM_PMIC")
caused the following pmic_get() error:
CPU: Freescale i.MX6QP rev1.0 at 792 MHz
Reset cause: POR
DRAM: 2 GiB
PMIC: pmic_get() ret -19
...
and since the PMIC presence is used to determine the board D1 revision,
the following error is seen when booting a board rev D1:
WARNING: Could not determine dtb to use
and the kernel does not boot at all.
Fix the regression by passing "pfuze100@8" as the correct parameter
to the pmic_get() function in the DM case.
Fixes:
ec837c82d709 ("imx6: wandboard: convert to DM_PMIC")
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Rasmus Villemoes [Thu, 19 Dec 2019 09:46:08 +0000 (09:46 +0000)]
mpc83xx_clk: always treat MPC83XX_CLK_PCI as invalid
The current mpc83xx_clk driver is broken for any board for which
mpc83xx_has_pci() is true, i.e. anything not MPC8308:
When is_clk_valid() reports that MPC83XX_CLK_PCI is valid,
init_all_clks() proceeds to call init_single_clk(), but that doesn't
know about either MPC83XX_CLK_PCI or has any handling of the
TYPE_SCCR_ONOFF mode correctly returned by retrieve_mode(). Hence
init_single_clk() ends up returning -EINVAL, and the whole board hangs
in serial_init().
The quickest fix is to simply pretend that clock is invalid for
all, since nobody can have been relying on it. Adding proper support
seems to be a bit more involved than just handling TYPE_SCCR_ONOFF:
- The power-on-reset value of SCCR[PCICM] is 0, so
mpc83xx_clk_enable() would probably need to be tought to enable the
clock.
- The frequency of PCI_SYNC_OUT is either SYS_CLK_IN or SYS_CLK_IN/2
depending on the CFG_CLKIN_DIV configuration input, but that can't
be read from software, so to properly fill out
->speed[MPC83XX_CLK_PCI] I think one would need guidance from
Kconfig or dtb.
Partially fixes:
07d538d281 clk: Add MPC83xx clock driver
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Mario Six <mario.six@gdsys.cc>
Rasmus Villemoes [Thu, 12 Dec 2019 09:18:52 +0000 (09:18 +0000)]
mpc83xx: set MPC83XX_GPIO_CTRLRS to 2 for MPC8309
The MPC8309 has two gpio controllers (which is already correctly
reflected in its struct immap definition).
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Mario Six <mario.six@gdsys.cc>
Rasmus Villemoes [Thu, 12 Dec 2019 08:35:49 +0000 (08:35 +0000)]
mpc83xx: immap_83xx: add spi8xxx_t in immap for mpc8309
Allow drivers/spi/mpc8xxx_spi.c to be built for an mpc8309 target.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Mario Six <mario.six@gdsys.cc>
Rasmus Villemoes [Thu, 12 Dec 2019 08:11:46 +0000 (08:11 +0000)]
powerpc: mpc83xx: convert CONFIG_FSL_ELBC to Kconfig
This complements commit
068789773d0 which did the conversion for
mpc85xx.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Mario Six <mario.six@gdsys.cc>
Rasmus Villemoes [Wed, 11 Dec 2019 09:39:36 +0000 (09:39 +0000)]
mpc83xx: make ARCH_MPC8309 select SYS_FSL_ERRATUM_ESDHC111
The mpc8309 is also affected by the "Manual Asynchronous CMD12 abort
operation causes protocol violations" erratum, though it is enumerated
as eSDHC16 in the errata sheet for mpc8309.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Mario Six <mario.six@gdsys.cc>
Sean Anderson [Wed, 25 Dec 2019 04:54:54 +0000 (23:54 -0500)]
log: Include missing header for log.h
log.h references cmd_tbl_t but command.h was not included
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Sean Anderson [Wed, 25 Dec 2019 04:52:01 +0000 (23:52 -0500)]
dm: Add a debug message when devices are skipped pre-reloc
This adds a message to lists_bind_fdt when it skips initializing a device
pre-relocation. I've had a couple errors where a device didn't initialize
properly because one of its dependencies was missing.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Sean Anderson [Wed, 18 Dec 2019 02:21:54 +0000 (21:21 -0500)]
Include missing headers for fdt_support.h
fdt_support.h is missing declarations for bd_t. Including asm/u-boot.h
pulls in the definition.
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Masahiro Yamada [Sat, 14 Dec 2019 04:47:26 +0000 (13:47 +0900)]
binman: fix default filename of u-boot-with-ucode-ptr in documentation
The suffix should be ".bin" instead of ".dtb" .
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 30 Dec 2019 04:19:28 +0000 (21:19 -0700)]
dm: devres: Add a new OFDATA phase
Since the ofdata_to_platdata() method can allocate resources, add it as a
new devres phase.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 30 Dec 2019 04:19:27 +0000 (21:19 -0700)]
dm: devres: Use an enum for the allocation phase
At present we only support two phases where devres can be used:
bind and probe. This is handled with a boolean. We want to add a new
phase (platdata), so change this to an enum.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 30 Dec 2019 04:19:26 +0000 (21:19 -0700)]
dm: devres: Add tests
The devres functionality has very few users in U-Boot, but it still should
have tests. Add a few basic tests of the main functions.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 30 Dec 2019 04:19:25 +0000 (21:19 -0700)]
dm: test: Add a test driver for devres
Add a driver which does devres allocations so that we can write tests for
devres.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 30 Dec 2019 04:19:24 +0000 (21:19 -0700)]
dm: devres: Convert to use logging
At present when CONFIG_DEBUG_DEVRES is enabled, U-Boot prints log messages
to the console with every devres allocation/free event. This causes most
tests to fail since the console output is not as expected.
In particular this prevents us from adding a device to sandbox which uses
devres in its bind method.
Move devres over to use U-Boot's logging feature instead, and add a new
category for devres.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 30 Dec 2019 04:19:23 +0000 (21:19 -0700)]
test: Add functions to find the amount of allocated memory
The malloc() implementations provides a way of finding out the approximate
amount of memory that is allocated. Add helper functions to make it easier
to access this and see changes over time. This is useful for tests that
want to check if memory has been allocated or freed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 30 Dec 2019 04:19:22 +0000 (21:19 -0700)]
dm: devres: Create a new devres header file
At present these functions are lumped in with the core device functions.
They have their own #ifdef to control their availability, so it seems
better to split them out.
Move them into their own header file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 30 Dec 2019 04:19:21 +0000 (21:19 -0700)]
dm: core: Add a new flag to track platform data
We want to avoid allocating platform data twice. This could happen if
device_probe() is called after device_ofdata_to_platdata() for the same
device.
Add a flag to track whether device_ofdata_to_platdata() has been called on
a device. Check the flag to make sure it doesn't happen twice, and clear
the flag when the data is freed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 30 Dec 2019 04:19:20 +0000 (21:19 -0700)]
dm: core: Export a new function to read platdata
Add a new internal function, device_ofdata_to_platdata() to handle
allocating private space associated with each device and reading the
platform data from the device tree.
Call this new function from device_probe().
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 30 Dec 2019 04:19:19 +0000 (21:19 -0700)]
dm: core: Add a comment for DM_FLAG_OF_PLATDATA
This flag is missing a comment. Add one.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 30 Dec 2019 04:19:18 +0000 (21:19 -0700)]
dm: core: Allocate parent data separate from probing parent
At present the parent is probed before the child's ofdata_to_platdata()
method is called. Adjust the logic slightly so that probing parents is
not done until afterwards.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 30 Dec 2019 04:19:17 +0000 (21:19 -0700)]
dm: core: Move ofdata_to_platdata() call earlier
This method is supposed to extract platform data from the device tree. It
should be done before the device itself is probed. Move it earlier in the
device_probe() function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 30 Dec 2019 04:19:16 +0000 (21:19 -0700)]
dm: core: Don't clear active flag twice when probe() fails
Remove this duplicated code, since the 'fail' label does this immediately.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 30 Dec 2019 04:19:15 +0000 (21:19 -0700)]
aspeed: ast2500: Read clock ofdata in the correct method
At present the clock driver reads its ofdata in the probe() method. This
is not correct although it is often harmless.
However in this case it causes a problem, something like this:
- ast_get_scu() is called (from somewhere) to get the SCI address
- this probes the clock
- first sets up ofdata (which does nothing at present)
- DM marks clock device as active
- DM calls pinctrl
- pinctrl probes and calls ast_get_scu() in ast2500_pinctrl_probe()
- ast_get_scu() probes the clock, but sees it already marked as
probed
- ast_get_scu() accesses the clock's private data, with scu as NULL
- DM calls clock probe function ast2500_clk_probe() which reads scu
By putting the read of scu into the correct method, scu is read as part of
ofdata setup, and everything is OK.
Note: This problem did not matter until now since DM always probed all
parents before reading a child's ofdata. The fact that pinctrl is a child
of clock seems to trigger this strange bug.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Simon Glass [Mon, 30 Dec 2019 04:19:14 +0000 (21:19 -0700)]
pci: Print a warning if the bus is accessed before probing
It is not possible to access a device on a PCI bus that has not yet been
probed, since the bus number is not known. Add a warning to catch this
error.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 30 Dec 2019 04:19:13 +0000 (21:19 -0700)]
x86: apl: Avoid accessing the PCI bus before it is probed
The PCI bus is not actually probed by the time the ofdata_to_platdata()
method is called since that happens in the uclass's post_probe() method.
Update the PMC and P2SB drivers to access the bus in its probe() method.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 30 Dec 2019 04:19:12 +0000 (21:19 -0700)]
usb: Drop use of BUG_ON() and WARN_ON()
These macros use __FILE__ which inserts the full path of the object file
into U-Boot, thus increasing file size. Drop these usages.
An older version of this patch was submitted here:
http://patchwork.ozlabs.org/patch/
1205784/
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 30 Dec 2019 04:19:11 +0000 (21:19 -0700)]
dm: core: Use assert_noisy() in devres
Use this macros instead of the linux ones, as the output is smaller.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 30 Dec 2019 04:19:10 +0000 (21:19 -0700)]
common: Add a noisy assert()
Some U-Boot code uses BUG_ON() and WARN_ON() macros. These use __FILE__
which can include quite a large path, depending on how U-Boot is built.
The existing assert() is only checked if DEBUG is enabled. Add a new one
which is always checked, and prints a (smaller) error in that case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Heinrich Schuchardt [Sat, 28 Dec 2019 14:40:40 +0000 (15:40 +0100)]
efi_selftest: unit test for EFI_RNG_PROTOCOL
Provide a unit test for the EFI_RNG_PROTOCOL.
The list of algorithms is read. Two random numbers are generated. The test
checks that the two numbers differ.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Sughosh Ganu [Sat, 28 Dec 2019 18:31:06 +0000 (00:01 +0530)]
efi_rng_protocol: Install the efi_rng_protocol on the root node
Install the EFI_RNG_PROTOCOL implementation for it's subsequent use by
the kernel for features like kaslr.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Sughosh Ganu [Sat, 28 Dec 2019 18:31:05 +0000 (00:01 +0530)]
efi: qemu: arm64: Add efi_rng_protocol implementation for the platform
Add support for the EFI_RNG_PROTOCOL routines for the qemu arm64
platform. EFI_RNG_PROTOCOL is an uefi boottime service which is
invoked by the efi stub in the kernel for getting random seed for
kaslr.
The routines are platform specific, and use the virtio-rng device on
the platform to get random data.
The feature can be enabled through the following config
CONFIG_EFI_RNG_PROTOCOL
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Changed SPDX header to use /* instead of //.
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Tue, 24 Dec 2019 21:17:37 +0000 (22:17 +0100)]
cmd: add rng command
For the RNG uclass we currently only have a test working on the sandbox.
Provide a command to test the hardware random number generator on
non-sandbox systems.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Sughosh Ganu [Sun, 29 Dec 2019 10:00:14 +0000 (15:30 +0530)]
virtio: rng: Add a random number generator(rng) driver
Add a driver for the virtio-rng device on the qemu platform. The
device uses pci as a transport medium. The driver can be enabled with
the following configs
CONFIG_VIRTIO
CONFIG_DM_RNG
CONFIG_VIRTIO_PCI
CONFIG_VIRTIO_RNG
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Sughosh Ganu [Sat, 28 Dec 2019 18:28:33 +0000 (23:58 +0530)]
test: rng: Add basic test for random number generator(rng) uclass
Add a unit test for testing the rng uclass functionality using the
sandbox rng driver.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Sughosh Ganu [Sat, 28 Dec 2019 18:28:32 +0000 (23:58 +0530)]
configs: sandbox: Enable random number generator(rng) device
Enable support for random number generator on sandbox configs. This is
aimed primarily at adding unit test support for rng uclass.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Sughosh Ganu [Sat, 28 Dec 2019 18:28:31 +0000 (23:58 +0530)]
sandbox: rng: Add a random number generator(rng) driver
Add a sandbox driver for random number generation. Mostly aimed at
providing a unit test for rng uclass.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Sughosh Ganu [Sat, 28 Dec 2019 18:28:30 +0000 (23:58 +0530)]
configs: stm32mp15: Enable random number generator(rng) device
Enable support for the rng device on the stm32mp15 configs.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Patrick Delaunay <patrick.delaunay@st.com>
Sughosh Ganu [Sat, 28 Dec 2019 18:28:29 +0000 (23:58 +0530)]
stm32mp1: rng: Add a driver for random number generator(rng) device
Add a driver for the rng device found on stm32mp1 platforms. The
driver provides a routine for reading the random number seed from the
hardware device.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Patrick Delaunay <patrick.delaunay@st.com>
Remove a superfluous blank line
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Sughosh Ganu [Sat, 28 Dec 2019 18:28:28 +0000 (23:58 +0530)]
clk: stm32mp1: Add a clock entry for RNG1 device
Add an entry for allowing clock enablement for the random number
generator peripheral, RNG1.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Patrick Delaunay <patrick.delaunay@st.com>
Sughosh Ganu [Sat, 28 Dec 2019 18:28:27 +0000 (23:58 +0530)]
dm: rng: Add random number generator(rng) uclass
Add a uclass for reading a random number seed from a random number
generator device.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cristian Ciocaltea [Mon, 30 Dec 2019 01:34:27 +0000 (03:34 +0200)]
test/py: Create a test for launching UEFI binaries from FIT images
This test verifies the implementation of the 'bootm' extension that
handles UEFI binaries inside FIT images (enabled via CONFIG_BOOTM_EFI).
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cristian Ciocaltea [Tue, 24 Dec 2019 16:05:41 +0000 (18:05 +0200)]
doc: uefi.rst: Document launching UEFI binaries from FIT images
This patch adds a new section "Launching a UEFI binary from a FIT image"
documenting the usage of the CONFIG_BOOTM_EFI extension to bootm command
that offers a verified boot alternative for UEFI binaries such as GRUB2.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cristian Ciocaltea [Tue, 24 Dec 2019 16:05:40 +0000 (18:05 +0200)]
doc: Add sample uefi.its image description file
This patch adds an example FIT image description file demonstrating
the usage of bootm command to securely launch UEFI binaries.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cristian Ciocaltea [Tue, 24 Dec 2019 16:05:39 +0000 (18:05 +0200)]
bootm: Add a bootm command for type IH_OS_EFI
Add support for booting EFI binaries contained in FIT images.
A typical usage scenario is chain-loading GRUB2 in a verified
boot environment.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cristian Ciocaltea [Tue, 24 Dec 2019 16:05:38 +0000 (18:05 +0200)]
image: Add IH_OS_EFI for EFI chain-load boot
Add a new OS type to be used for chain-loading an EFI compatible
firmware or boot loader like GRUB2, possibly in a verified boot
scenario.
Bellow is sample ITS file that generates a FIT image supporting
secure boot. Please note the presence of 'os = "efi";' line, which
identifies the currently introduced OS type:
/ {
#address-cells = <1>;
images {
efi-grub {
description = "GRUB EFI";
data = /incbin/("bootarm.efi");
type = "kernel_noload";
arch = "arm";
os = "efi";
compression = "none";
load = <0x0>;
entry = <0x0>;
hash-1 {
algo = "sha256";
};
};
};
configurations {
default = "config-grub";
config-grub {
kernel = "efi-grub";
signature-1 {
algo = "sha256,rsa2048";
sign-images = "kernel";
};
};
};
};
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Tue, 7 Jan 2020 06:48:15 +0000 (07:48 +0100)]
cmd: efidebug: capitalize UEFI
%s/uefi/UEFI/g
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Tue, 7 Jan 2020 04:57:47 +0000 (05:57 +0100)]
cmd: efidebug: new sub-command tables
Provide sub-command for efidebug to list configuration tables.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Tue, 7 Jan 2020 05:02:33 +0000 (06:02 +0100)]
cmd: efidebug: simplify get_guid_text()
When we hit a matching GUID we can directly return the text. There is no
need for a check after the loop.
efi_guid_t is defined as 8 byte aligned but GUIDs in packed structures do
not follow this alignment. Do not require the argument of get_guid_text()
to be correctly aligned.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Fri, 3 Jan 2020 21:47:19 +0000 (22:47 +0100)]
efi_loader: define all known warning status codes
Of all warning status codes up to now only EFI_WARN_DELETE_FAILURE is
defined.
The patch adds the missing definitions for later usage.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>