oweals/u-boot.git
11 years agopowerpc/mpc85xx:Avoid hardcoded init for serdes block 1 & 2
Prabhakar Kushwaha [Wed, 31 Jul 2013 11:26:41 +0000 (16:56 +0530)]
powerpc/mpc85xx:Avoid hardcoded init for serdes block 1 & 2

It is not necessary for all processor to have serdes block 1 & 2.
They may have only one serdes block.

So, put serdes block 1 & 2 related code under defines

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
11 years agoMerge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Tom Rini [Tue, 13 Aug 2013 13:14:02 +0000 (09:14 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

11 years agoMerge branch 'master' of git://www.denx.de/git/u-boot-mips
Tom Rini [Tue, 13 Aug 2013 12:58:47 +0000 (08:58 -0400)]
Merge branch 'master' of git://denx.de/git/u-boot-mips

11 years agoMIPS: bootm: drop obsolete Qemu specific bootm implementation
Daniel Schwierzeck [Sat, 12 Jan 2013 17:18:20 +0000 (18:18 +0100)]
MIPS: bootm: drop obsolete Qemu specific bootm implementation

The Qemu specific bootm implementation was intended for a special
Qemu target in Linux kernel. But this target has been dropped in
v2.6.25-rc1 by commit 302922e5f6901eb6f29c58539631f71b3d9746b8

    Author: Ralf Baechle <ralf@linux-mips.org>
    Date:   Tue Jan 29 10:15:02 2008 +0000

    [MIPS] Qemu: Remove platform.

    The Qemu platform was originally implemented to have an easily supportable
    platform until Qemu reaches a state where it emulates a real world system.
    Since the latest release Qemu is capable of emulating the MIPSsim and
    Malta platforms, so this goal has been reached.  The Qemu plaform is also
    rather underfeatured so less useful than a Malta emulation.

Thus the special bootm implementation is obsolete by now and can be
dropped. The Qemu support in U-Boot is going to be replaced by MIPS Malta
board support.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
11 years agoMIPS: bootm: add YAMON style Linux preparation/jump code for Qemu Malta
Daniel Schwierzeck [Thu, 30 May 2013 17:04:20 +0000 (19:04 +0200)]
MIPS: bootm: add YAMON style Linux preparation/jump code for Qemu Malta

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
11 years agoMIPS: bootm: add support for generic relocation of init ramdisks
Daniel Schwierzeck [Thu, 9 May 2013 15:10:06 +0000 (17:10 +0200)]
MIPS: bootm: add support for generic relocation of init ramdisks

All linux kernels after v2.6 require a page-aligned location of
an external init ramdisk. Enable CONFIG_SYS_BOOT_RAMDISK_HIGH to
support this with the generic U-Boot relocation code.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
11 years agoMIPS: bootm: refactor initialisation of kernel environment
Daniel Schwierzeck [Thu, 9 May 2013 15:10:06 +0000 (17:10 +0200)]
MIPS: bootm: refactor initialisation of kernel environment

Move initialisation of Linux environment to separate functions.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
11 years agoMIPS: bootm: refactor initialisation of kernel cmdline
Daniel Schwierzeck [Thu, 9 May 2013 15:10:06 +0000 (17:10 +0200)]
MIPS: bootm: refactor initialisation of kernel cmdline

Move initialisation of Linux command line to separate functions.
Also add support for bootm subcommand 'cmdline'.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
11 years agoMIPS: bootm: add support for LMB
Daniel Schwierzeck [Thu, 9 May 2013 15:10:06 +0000 (17:10 +0200)]
MIPS: bootm: add support for LMB

This is required for init ramdisk relocation and device tree
support.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
11 years agoMIPS: bootm: optimize kernel entry call
Daniel Schwierzeck [Thu, 9 May 2013 15:10:06 +0000 (17:10 +0200)]
MIPS: bootm: optimize kernel entry call

Fix signature of kernel entry function. Mark the kernel entry
with __noreturn for better code optimisation.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
11 years agoMIPS: bootm: fix checkpatch.pl warnings
Daniel Schwierzeck [Thu, 9 May 2013 15:10:06 +0000 (17:10 +0200)]
MIPS: bootm: fix checkpatch.pl warnings

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
11 years agoMerge branch 'master' of git://www.denx.de/git/u-boot-video
Tom Rini [Mon, 12 Aug 2013 22:06:30 +0000 (18:06 -0400)]
Merge branch 'master' of git://denx.de/git/u-boot-video

11 years agopowerpc/mpc85xx: Cleanup license header in source files
York Sun [Mon, 12 Aug 2013 21:57:12 +0000 (14:57 -0700)]
powerpc/mpc85xx: Cleanup license header in source files

Fix the license header introduced by the following patches

Add TWR-P10xx board support
Add T4240EMU target
IDT8T49N222A configuration code
Add C29x SoC support
Add support for C29XPCIE board

Signed-off-by: York Sun <yorksun@freescale.com>
11 years agoedid: rename struct member to fix two EDID_* macros
Christian Gmeiner [Wed, 7 Aug 2013 07:22:33 +0000 (09:22 +0200)]
edid: rename struct member to fix two EDID_* macros

Without this change EDID_DETAILED_TIMING_VSYNC_OFFSET
and EDID_DETAILED_TIMING_VSYNC_PULSE_WIDTH macros can
not be used (compile error).
The fix is quite trivial: rename struct member to the
expected name.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
11 years agoexynos: video: change mipi dsi write function parameters correctly
Donghwa Lee [Mon, 5 Aug 2013 04:34:32 +0000 (13:34 +0900)]
exynos: video: change mipi dsi write function parameters correctly

This patch have changed mipi dsi write functions' parameters correctly
so that type cast operations were removed. And mipi dsi payload is
composed with array of panel commands to improve readability.

Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
11 years agovideo: Add small 4x6 font from Linux
Marek Vasut [Tue, 30 Jul 2013 21:37:58 +0000 (23:37 +0200)]
video: Add small 4x6 font from Linux

This font is based on Linux drivers/video/console/font_mini_4x6.c as of commit:

commit bcfbeecea11c15e243f076d37d637c2598aff4fe
Author: Bjarni Ingi Gislason <bjarniig@rhi.hi.is>
Date:   Sun Aug 12 15:05:10 2012 +0000

    drivers: console: font_: Change a glyph from "broken bar" to "vertical line"

I removed these lines as they are useless in U-Boot:
  #include <linux/font.h>
  #define FONTDATAMAX 1536
  Whole "const struct font_desc font_mini_4x6" block

This patch also adds a new configuration option to select this smaller font,
CONFIG_VIDEO_FONT_4X6 , but this is disabled by default. The default setting
is the regular "large" font.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
11 years agovideo: Encapsulate font in video_font_data.h
Marek Vasut [Tue, 30 Jul 2013 21:37:57 +0000 (23:37 +0200)]
video: Encapsulate font in video_font_data.h

This patch moves all the font configuration values into video_font_data.h
so they are all in the right place with the font. The video_font.h now only
includes video_font_data.h and will allow us to select and include different
font once more fonts are added.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
[agust: fixed build warning for mcc200]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
11 years agompc5200: Misc updates to a3m071 config header
Stefan Roese [Sat, 22 Jun 2013 14:16:25 +0000 (16:16 +0200)]
mpc5200: Misc updates to a3m071 config header

This patch changes some features of the a3m071/a4m2k board support:

- Add bootcounter support
- Update MTD env default to correct values
- Add mtdparts to bootargs for mtd partitioning via kernel cmdline
- Added some default env variables for easy updating (kernel, dtb)
- Change README to the updated flash locations

Signed-off-by: Stefan Roese <sr@denx.de>
11 years agoMerge branch 'fpga' of git://www.denx.de/git/u-boot-microblaze
Tom Rini [Mon, 12 Aug 2013 12:54:32 +0000 (08:54 -0400)]
Merge branch 'fpga' of git://denx.de/git/u-boot-microblaze

11 years agoMerge branch 'master' of git://git.denx.de/u-boot-fdt
Tom Rini [Mon, 12 Aug 2013 12:49:44 +0000 (08:49 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-fdt

11 years agoMerge branch 'master' of git://git.denx.de/u-boot-spi
Tom Rini [Mon, 12 Aug 2013 12:48:49 +0000 (08:48 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-spi

11 years agofpga: zynqpl: Clear loopback mode during device init
Soren Brinkmann [Sat, 15 Jun 2013 00:43:24 +0000 (17:43 -0700)]
fpga: zynqpl: Clear loopback mode during device init

Some versions of the Zynq first stage boot loader enable PCAP loopback
during boot regardless of whether or not the boot image includes PL
configuration. This behavior only appears in certain boot modes (notably
QSPI boot). Attempting to configure the PL with the loopback bit set
will result in timeouts and will prevent successful configuration.

In order to avoid this problem, and to avoid dependency on the version
of the FSBL used to boot the system, ensure that the loopback enable bit
is cleared when loading the driver.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
11 years agofpga: zynqpl: Add support for zc7100 device.
Michal Simek [Mon, 17 Jun 2013 11:54:07 +0000 (13:54 +0200)]
fpga: zynqpl: Add support for zc7100 device.

- Add support for zc7100 device.
- FPGA programming on few of the SOC(zc7100) takes more
  than 1sec, hence increased the program time by 4sec to
  sync' all soc's.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
11 years agolibfdt: SPDX-License-Identifier: GPL-2.0+ BSD-2-Clause
Roger Meier [Fri, 26 Jul 2013 23:12:38 +0000 (01:12 +0200)]
libfdt: SPDX-License-Identifier: GPL-2.0+ BSD-2-Clause

Signed-off-by: Roger Meier <roger@bufferoverflow.ch>
Acked-by: Wolfgang Denk <wd@denx.de>
11 years agovideo: add an option to skip cfb console init
Heiko Schocher [Sat, 3 Aug 2013 05:22:53 +0000 (07:22 +0200)]
video: add an option to skip cfb console init

This patch add an option to skip cfb console init for boards
who want to show a logo, but not use the cfb console. This is
needed for the siemens boards, which have a bmp bootlogo, but
do not need the cfb console.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
[agust: use '__weak int board_cfb_skip(void)']
Signed-off-by: Anatolij Gustschin <agust@denx.de>
11 years agotools, bmp_logo: fix index from uint16_t to int to allow bigger logos
Heiko Schocher [Sat, 3 Aug 2013 05:22:52 +0000 (07:22 +0200)]
tools, bmp_logo: fix index from uint16_t to int to allow bigger logos

when generating the bmp_logo_bitmap, the index is casted
as an uint16_t. So bigger logos as 65535 bytes are converted wrong
Fix this.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
11 years agovideo, da8xx-fb: show fb addr in bdinfo
Heiko Schocher [Sat, 3 Aug 2013 05:22:51 +0000 (07:22 +0200)]
video, da8xx-fb: show fb addr in bdinfo

without this patch the bdinfo command shows:
U-Boot# bd
arch_number = 0x000010DC
[...]
sp start    = 0x8EF32F20
FB base     = 0x00000000

with this patch it shows the address where the framebuffer
for this video driver start:

arch_number = 0x000010DC
[...]
sp start    = 0x8EF32F20
FB base     = 0x8EF3C788

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Tom Rini <trini@ti.com>
Acked-by: Tom Rini <trini@ti.com>
11 years agovideo, da8xx-fb: changes for am335x usage
Heiko Schocher [Sat, 3 Aug 2013 05:22:50 +0000 (07:22 +0200)]
video, da8xx-fb: changes for am335x usage

to use this driver also on am335x based boards, the following
changes are made:

- struct lcd_ctrl_config lcd_cfg is now configurable
  through board code

- controller base is configurable through define
  DA8XX_LCD_CNTL_BASE. To be compatible with older
  da8xx based boards: If this define is missing, the
  DAVINCI_LCD_CNTL_BASE is used

- Determine LCD IP Version, and make the driver
  working on lcd revision register values:
  Version 1:
  0x4C100102
  Version 2:
  0x4F200800
  0x4F201000

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Tom Rini <trini@ti.com>
Acked-by: Tom Rini <trini@ti.com>
11 years agoarm, am33xx: add clk_get prototype
Heiko Schocher [Sat, 3 Aug 2013 05:22:49 +0000 (07:22 +0200)]
arm, am33xx: add clk_get prototype

the clk_get() function is needed for the da8xx-fb video driver,
which is used on the am3xx based siemens boards.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
Acked-by: Tom Rini <trini@ti.com>
11 years agovideo, da8xx: move da8xx-fb.h to drivers/video
Heiko Schocher [Sat, 3 Aug 2013 05:22:48 +0000 (07:22 +0200)]
video, da8xx: move da8xx-fb.h to drivers/video

the da8xx-fb driver works also on am335x boards. So move
the da8xx-fb.h file from arch/arm/include/asm/arch-davinci
to drivers/video, so this driver can used from am335x
based boards. Also add WVGA panel_type.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Tom Rini <trini@ti.com>
Acked-by: Tom Rini <trini@ti.com>
11 years agovideo: add L5F31188 TFT-LCD panel driver
Hyungwon Hwang [Wed, 31 Jul 2013 08:25:34 +0000 (17:25 +0900)]
video: add L5F31188 TFT-LCD panel driver

This is u-boot driver for L5F31188 panel.
I tested it in the board based on MIPI DSI with EXYNOS4 series, and it worked well.

Changes in V2:
- Replaced license header by SPDX-License-Identifier.

Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Signed-off-by: Donghwa Lee <dw09.lee@samsung.com>
[agust: sort Makefile entry alphabetically]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
11 years agovideo: Fix cfb_console for 4-bit wide font
Marek Vasut [Tue, 30 Jul 2013 21:37:59 +0000 (23:37 +0200)]
video: Fix cfb_console for 4-bit wide font

The cfb_console can't handle 4-bit wide font properly, since with
4-bit wide font, all 8 bits are drawn. Unbreak the video_drawchars()
function to correctly render 4-bits only on such fonts.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
11 years ago83xx/pcie: fix build error for 83xx pcie
Roy Zang [Mon, 10 Dec 2012 11:02:59 +0000 (19:02 +0800)]
83xx/pcie: fix build error for 83xx pcie

Fix the following build error caused by patch "powerpc/pcie: add PCIe
version 3.x support":

pcie.c:302:34: error: 'PCI_LTSSM' undeclared (first use in this function)
pcie.c:303:15: error: 'PCI_LTSSM_L0' undeclared (first use in this function)

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
11 years agovideo: Implement continuous screen refresh for SmartLCD into mxsfb
Marek Vasut [Tue, 30 Jul 2013 21:37:54 +0000 (23:37 +0200)]
video: Implement continuous screen refresh for SmartLCD into mxsfb

The LCDIF interface doesn't give us any means to do continuous refresh
when driving a SmartLCD. To work this around, we produce a special
circular DMA descriptor, which only writes the HW_LCDIF_CTRL0 register
and sets the RUN bit.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
11 years agovideo: Add System-Mode configuration hook into mxsfb
Marek Vasut [Tue, 30 Jul 2013 21:37:53 +0000 (23:37 +0200)]
video: Add System-Mode configuration hook into mxsfb

Add hook that allow configuring SmartLCD attached the MXS LCDIF
controller operating in System-Mode. This hook can be overriden
by a platform-specific SmartLCD programming routine, which writes
the SmartLCD specific values into it's registers.

Also, this patch makes sure the SYNC signals are off for the
SmartLCD case.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
11 years agovideo: Allocate the MXSFB framebuffer aligned
Marek Vasut [Tue, 30 Jul 2013 21:37:52 +0000 (23:37 +0200)]
video: Allocate the MXSFB framebuffer aligned

Allocate the framebuffer aligned so it can be flushed
and the flush_dcache_range() function won't complain.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
11 years agodma: apbh: Add special circular mode for LCD
Marek Vasut [Tue, 30 Jul 2013 21:37:51 +0000 (23:37 +0200)]
dma: apbh: Add special circular mode for LCD

Add special function that executes a specially crafted circular
DMA descriptor. The function doesn't wait for the descriptor to
finish the transfer, since the descritor never finishes. This is
useful when operating a SmartLCD through the LCDIF interface, as
the LCDIF does not give us any means to have continuous refresh
of the SmartLCD. Instead, the RUN bit in the LCDIF CTRL register
must be triggered manually. This can be worked around by starting
an DMA transfer which continuously sets the RUN bit. This function
allows starting exactly such transfer.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
11 years agopowerpc/mpc8xxx: Fix TIMING_CFG_3[EXT_ACTTOPRE]
James Yang [Mon, 22 Jul 2013 16:35:26 +0000 (09:35 -0700)]
powerpc/mpc8xxx: Fix TIMING_CFG_3[EXT_ACTTOPRE]

The TIMING_CFG_3[EXT_ACTTOPRE] register field is 2 bits wide, but
the mask omitted the LSB.  This patch provides a 2-bit wide mask.

Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
11 years agopowerpc/c29xpcie: add support for C29XPCIE board
Mingkai Hu [Thu, 4 Jul 2013 09:33:43 +0000 (17:33 +0800)]
powerpc/c29xpcie: add support for C29XPCIE board

C29XPCIE board is a series of Freescale PCIe add-in cards to perform
as public key crypto accelerator or secure key management module. It
includes C293PCIE board, C293PCIE board and C291PCIE board.

 - 512KB platform SRAM in addition to 512K L2 Cache/SRAM
 - 512MB soldered DDR3 32bit memory
 - CPLD System Logic
 - 64MB x16 NOR flash and 4GB x8 NAND flash
 - 16MB SPI flash

Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Singed-off-by: Po Liu <Po.Liu@freescale.com>
[yorksun: Fixup include/configs/C29XPCIE.h]
Signed-off-by: York Sun <yorksun@freescale.com>
11 years agopowerpc/85xx: Add C29x SoC support
Mingkai Hu [Thu, 4 Jul 2013 09:30:36 +0000 (17:30 +0800)]
powerpc/85xx: Add C29x SoC support

The Freescale C29x family is a high performance crypto co-processor.
It combines a single e500v2 core with necessary SEC engine. There're
three SoC types(C291, C292, C293) with the following features:

 - 512K L2 Cache/SRAM and 512 KB platform SRAM
 - DDR3/DDR3L 32bit DDR controller
 - One PCI express (x1, x2, x4) Gen 2.0 Controller
 - Trust Architecture 2.0
 - SEC6.0 engine

Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Po Liu <Po.Liu@freescale.com>
11 years agopowerpc/pcie: remove PCIe version 3.x define for B4860 and B4420
Zang Roy-R61911 [Wed, 3 Jul 2013 23:43:33 +0000 (07:43 +0800)]
powerpc/pcie: remove PCIe version 3.x define for B4860 and B4420

B4860 and B4420 has PCIe version 2.4 IP instead of 3.x

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
11 years agopowerpc/pcie: add PCIe version 3.x support
Zang Roy-R61911 [Wed, 3 Jul 2013 23:25:03 +0000 (07:25 +0800)]
powerpc/pcie: add PCIe version 3.x support

T4240 PCIe IP is version 3.0 and has some update comparing previous
QorIQ products.

1.  Move Freescale specific register define
to
arch/powerpc/include/asm/fsl_pci.h
and update the register offset define for T4240.

2. add the status/control register define
use status/control register to judge the link status

3. The original code uses 'Programming Interface' field to judge if PCIE is
EP or RC mode, however, T4240 does not support this functionality.
According to PCIE specification, 'Header Type' offset 0x0e is used to
indicate header type, so for PCIE controller, the patch changes code to
use 'Header Type' field to identify if the PCIE is RC or EP mode.

This patch fixes  the PCIe card link up issue on T4240QDS.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
11 years agopowerpc/rman: fix RMan support for t4240 and b4860
Minghuan Lian [Wed, 3 Jul 2013 10:32:41 +0000 (18:32 +0800)]
powerpc/rman: fix RMan support for t4240 and b4860

1. Add CONFIG_SYS_DPAA_RMAN macro to t4240 and b4860.
2. Decrease RMan liodn offset number.
SET_RMAN_LIODN() is used to set liodn offset of RMan blocks 0-3.
For t4240 and b4860, RMan liodn base is assigned to 922, the original
offset number is too large that the liodn (base+offset 922+678 = 1600)
is greater than 0x500 the maximum liodn number.

Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
11 years agoboard/b4860qds: Add support for configuring SerDes1 Refclks
Shaveta Leekha [Tue, 2 Jul 2013 09:13:53 +0000 (14:43 +0530)]
board/b4860qds: Add support for configuring SerDes1 Refclks

1) Add support in B4860 board files for using IDT driver where
   IDT8T49N222A is a low phase noise Frequency Translator / Synthesizer
   that generate different refclks for SerDes modules, used this driver
   for reconfiguring SerDes1 Refclks(based on SerDes1 protocols)
   for CPRI to work. CPRI works on 122.88MHz and default refclks coming
   on board are not suitable for it
2) Move SerDes1 refclk1 source selection from eth_b4860qds.c file
   to b4860qds board file, as SerDes1 Refclk1 would come from
   PHY MUX in case of certain protocols, that have been checked here.
   This change would make on board SGMIIs to work
3) Add I2C addresses for IDT8T49N222A devices in board/include file
4) Add define for PCA-I2C bus multiplexer, on which IDT devices exist

Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
11 years agopowerpc/asm: Move function declaration of 'serdes_get_prtcl' to fsl_serdes.h
Shaveta Leekha [Tue, 2 Jul 2013 09:12:07 +0000 (14:42 +0530)]
powerpc/asm: Move function declaration of 'serdes_get_prtcl' to fsl_serdes.h

It allows files not in the same path to use this function
as required by B4 board file

Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
11 years agopowerpc/mpc85xx: Add defines for serdes RSTCTL register
Shaveta Leekha [Tue, 2 Jul 2013 09:09:21 +0000 (14:39 +0530)]
powerpc/mpc85xx: Add defines for serdes RSTCTL register

Also change the define name SRDS_RSTCTL_SDPD to
SRDS_RSTCTL_SDEN, which stands for SerDes enable
as mentioned in SerDes module guide

Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
11 years agoboard/freescale/common: IDT8T49N222A configuration code
Shaveta Leekha [Tue, 2 Jul 2013 09:05:47 +0000 (14:35 +0530)]
board/freescale/common: IDT8T49N222A configuration code

Add code for configuring IDT8T49N222A device for various output refclks
    - The IDT8T49N222A is a low phase noise Frequency Translator / Synthesizer with
      alarm and monitoring functions suitable for networking and
      communications applications. It is able to generate wide range of output
      frequencies.
    - In B4860QDS, it has been used to generate different refclks to SerDes modules
    - Programming of these devices are performed by I2C interface.

Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
11 years agoboard/bsc9132qds: Configure DSP DDR controller
Priyanka Jain [Tue, 2 Jul 2013 03:52:23 +0000 (09:22 +0530)]
board/bsc9132qds: Configure DSP DDR controller

BSC9132 SoC has two separate DDR controllers for PowerPC side and DSP side
DDR. They are mapped to PowerPC and DSP CCSR space respectively.
BSC9132QDS has two on-board MC34716EP DDR3 memory one connected to PowerPC
and other to DSP side controller.

Configure DSP DDR controller similar to PowerPC side DDR controller as
memories are exactly similar.

Signed-off-by: Manish Jaggi <manish.jaggi@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
11 years agoboard/bsc9132qds: Add DSP side tlb and laws
Priyanka Jain [Tue, 2 Jul 2013 03:51:04 +0000 (09:21 +0530)]
board/bsc9132qds: Add DSP side tlb and laws

BSC9132QDS is a Freescale Reference Design Board for BSC9132 SoC which is a
integrated device that contains two powerpc e500v2 cores and two DSP
starcores.

To support DSP starcore
-Creating LAW and TLB for DSP-CCSR space.
-Creating LAW for DSP-core subsystem M2 and M3 memory
-Creating LAW for 1GB DDR which is connected exclusively to DSP-cores

Signed-off-by: Manish Jaggi <manish.jaggi@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
11 years agopowerpc/srio-pcie-boot: Avoid the NOR_BOOT macro when boot from SRIO/PCIE
Liu Gang [Fri, 28 Jun 2013 09:58:37 +0000 (17:58 +0800)]
powerpc/srio-pcie-boot: Avoid the NOR_BOOT macro when boot from SRIO/PCIE

When a board (slave) boots from SRIO/PCIE, it would get the instructions
from a remote board (master) by SRIO/PCIE interface, and the slave's
u-boot image should be built with the

SYS_TEXT_BASE=0xFFF80000;

So the u-boot of the slave should avoid the NOR_BOOT branch at the
booting stage.

For example, when a P2041RDB boots from SRIO/PCIE, it will set TLB
entry 15 from base address "CONFIG_SYS_MONITOR_BASE & 0xffc00000",
and with the 4M size as the boot window in NOR_BOOT branch. Because
the CONFIG_SYS_MONITOR_BASE = CONFIG_SYS_TEXT_BASE = 0xFFF80000, so
the TLB entry will be from base address 0xffc00000 and with 4M size.

Then the u-boot will set TLB entry 14 from base address
"CONFIG_SYS_INIT_RAM_ADDR", and with the 16K size as the initial
stack window. For the P2041RDB platform, the CONFIG_SYS_INIT_RAM_ADDR
= 0xffd00000. So the TLB entry 14 and 15 will be in confliction.

There will be right TLB entries configurations when avoid the
NOR_BOOT branch and set the boot window from 0xfff00000 with 1M
size space.

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
11 years agop1020rdb-pd: platform support
Haijun.Zhang [Fri, 28 Jun 2013 02:47:09 +0000 (10:47 +0800)]
p1020rdb-pd: platform support

Add new board p1020RDB-PD. P1020RDB-PD board was update from P1020RDB.
DDR changed from DDR2 1G to DDR3 2G.
NAND: 128 MiB
Flash: 64 MiB

Also change P1020RDB to P1020RDB-PC to distinguish from P1020RDB board.

Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
CC: Scott Wood <scottwood@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
11 years agopowerpc/mpc85xx: Workaround for A-005812
York Sun [Tue, 25 Jun 2013 18:37:49 +0000 (11:37 -0700)]
powerpc/mpc85xx: Workaround for A-005812

Erratum A-005812 Incorrect reservation clearing in Write Shadow mode can
result in invalid atomic operations. For u-boot, this erratum only impacts
SoCs running in write shadow mode.

Signed-off-by: York Sun <yorksun@freescale.com>
11 years agopowerpc/mpc8xxx: Add memory reset control
York Sun [Tue, 25 Jun 2013 18:37:48 +0000 (11:37 -0700)]
powerpc/mpc8xxx: Add memory reset control

JEDEC spec requires the clocks to be stable before deasserting reset
signal for RDIMMs. Clocks start when any chip select is enabled and
clock control register is set. This patch also adds the interface to
toggle memory reset signal if needed by the boards.

Signed-off-by: York Sun <yorksun@freescale.com>
11 years agopowerpc/mpc8xxx: Add x4 DDR device support
York Sun [Tue, 25 Jun 2013 18:37:47 +0000 (11:37 -0700)]
powerpc/mpc8xxx: Add x4 DDR device support

On selected platforms, x4 DDR devices can be supported. Using x4 devices may
lower the performance, but generally they are available for higher density.

Tested on MT36JSF2G72PZ-1G9E1 RDIMM.

Signed-off-by: York Sun <yorksun@freescale.com>
11 years agopowerpc/t4240qds: Adjust DDR timing for RDIMM
York Sun [Tue, 25 Jun 2013 18:37:46 +0000 (11:37 -0700)]
powerpc/t4240qds: Adjust DDR timing for RDIMM

RDIMM has different timing. Tested RDIMM is MT18JSF1G72PDZ-1G9E1 for
dual rank. Single- and quad-rank are not tested due to availability.

Signed-off-by: York Sun <yorksun@freescale.com>
11 years agopowerpc/mpc8xxx: Set inactive csn_bnds to 0xffffffff
York Sun [Tue, 25 Jun 2013 18:37:45 +0000 (11:37 -0700)]
powerpc/mpc8xxx: Set inactive csn_bnds to 0xffffffff

When chip select interleaving is enabled, cs0_bnds is used for address
binding. Other csn_bnds are not used. When two controllers interleaving is
enabled, cs0_bnds of both controllers are used, other csn_bnds are not.
However, the unused csn_bnds may be used internally for calculating
addresses for calibration. Setting those registers to 0 may confuse
controllers in some cases. Instead, setting them to 0xffffffff together
with normal LAWs will guarantee the address is not mapped to DDR.

Signed-off-by: York Sun <yorksun@freescale.com>
11 years agopowerpc/T4240EMU: Add T4240EMU target
York Sun [Thu, 27 Jun 2013 17:48:29 +0000 (10:48 -0700)]
powerpc/T4240EMU: Add T4240EMU target

Add emulator support for T4240. Emulator has limited peripherals and
interfaces. Difference between emulator and T4240QDS includes:
ECC for DDR is disabled due the procedure to load images
No board FPGA (QIXIS)
NOR flash has 32-bit port for higher loading speed
IFC and I2C timing don't really matter, so set them fast
No ethernet

Signed-off-by: York Sun <yorksun@freescale.com>
11 years agopowerpc/corenet: Move RCW print to cpu.c
York Sun [Tue, 25 Jun 2013 18:37:43 +0000 (11:37 -0700)]
powerpc/corenet: Move RCW print to cpu.c

The RCW print is common for all corenet platforms. Not necessary to ducplicate
in each board file.

Signed-off-by: York Sun <yorksun@freescale.com>
11 years agopowerpc/t4qds: cleanup board header file
York Sun [Tue, 25 Jun 2013 18:37:42 +0000 (11:37 -0700)]
powerpc/t4qds: cleanup board header file

CONFIG_PHYS_64BIT is always defined for t4qds. Removed unused #ifdef.

Signed-off-by: York Sun <yorksun@freescale.com>
11 years agompc85xx: Base emulator support
York Sun [Tue, 25 Jun 2013 18:37:41 +0000 (11:37 -0700)]
mpc85xx: Base emulator support

Prepare for emulator support for mpc85xx parts.
Disable DDR training and skip wrlvl_cntl_2 and wrlvl_cntl_3 registers.
These two registers improve stability but not supported by emulator.
Add CONFIG_FSL_TBCLK_EXTRA_DIV for possible adjustment to time base.

Signed-off-by: York Sun <yorksun@freescale.com>
11 years agodrivers/fm: Fix compiling error if FW location is not defined
York Sun [Tue, 25 Jun 2013 18:37:40 +0000 (11:37 -0700)]
drivers/fm: Fix compiling error if FW location is not defined

FMAN firmware can be in NOR flash, NAND flash, SPI flash, MMC or even
remote. In case none of them is defined, set it to null.

Signed-off-by: York Sun <yorksun@freescale.com>
11 years agopowerpc/corenet: Move CONFIG_FSL_CORENET out of board header file
York Sun [Tue, 25 Jun 2013 18:37:39 +0000 (11:37 -0700)]
powerpc/corenet: Move CONFIG_FSL_CORENET out of board header file

Move CONFIG_FSL_CORENET define to config_mpc85xx.h. It is not board
specific feature and belongs to SoC header.

Signed-off-by: York Sun <yorksun@freescale.com>
11 years agopowerpc/t4: Correct LIODN assignment for SRIO
Liu Gang [Tue, 25 Jun 2013 10:12:14 +0000 (18:12 +0800)]
powerpc/t4: Correct LIODN assignment for SRIO

For T4 platform, the SRIO LIODN registers are in SRIO address space
and not in GUTs.

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
11 years agopowerpc/b4860: Correct LIODN assignment for SRIO
Liu Gang [Tue, 25 Jun 2013 10:12:13 +0000 (18:12 +0800)]
powerpc/b4860: Correct LIODN assignment for SRIO

For B4, the SRIO LIODN registers are in SRIO address space and not
in GUTs.

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
11 years agopowerpc/srio: Update the SRIO LIODN registers and ID table macro
Liu Gang [Tue, 25 Jun 2013 10:12:12 +0000 (18:12 +0800)]
powerpc/srio: Update the SRIO LIODN registers and ID table macro

For some PowerPC platforms, LIODN registers for SRIO ports are
in SRIO register address space. So the ccsr_rio structure should
be updated for those LIODN registers.

In addition, add a new macro "SET_SRIO_LIODN_BASE" to create
the SRIO LIODN ID table based on the SRIO LIODN register address.

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
11 years agopowerpc/85xx: Add TWR-P10xx board support
Xie Xiaobo [Mon, 24 Jun 2013 07:01:30 +0000 (15:01 +0800)]
powerpc/85xx: Add TWR-P10xx board support

TWR-P1025 Specification:
-----------------------
Memory subsystem:
   512MB DDR3 (on board DDR)
   64Mbyte 16bit NOR flash
   One microSD Card slot

Ethernet:
   eTSEC1: Connected to Atheros AR8035 GETH PHY
   eTSEC3: Connected to Atheros AR8035 GETH PHY

UART:
   Two UARTs are routed to the FDTI dual USB to RS232 convertor

USB: Two USB2.0 Type A ports

I2C:
   AT24C01B 1K Board EEPROM (8 bit address)

QUICC Engine:
   Connected to DP83849i PHY supply two 10/100M ethernet ports
   QE UART for RS485 or RS232

PCIE:
   One mini-PCIE slot

Signed-off-by: Michael Johnston <michael.johnston@freescale.com>
Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
[yorksun: Fixup include/configs/p1_twr.h]
Signed-off-by: York Sun <yorksun@freescale.com>
11 years agonds32: fix the missing COBJS-y change
ken kuo [Mon, 5 Aug 2013 17:00:54 +0000 (01:00 +0800)]
nds32: fix the missing COBJS-y change

There is a missing in previous
commit 951344b778d6ac67b94011d942a5a55da7202027
(nds32: Convert Makefiles to use COBJS-y style)
will cause compile error.

Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com>
Cc: Macpaul Lin <macpaul@gmail.com>
Cc: Andes <uboot@andestech.com>
Signed-off-by: Andes <uboot@andestech.com>
11 years agonds32: introduce DMA allocation API
ken kuo [Mon, 5 Aug 2013 17:00:53 +0000 (01:00 +0800)]
nds32: introduce DMA allocation API

U-Boot does not compile for the adp-ag101 boards since
commit a8f9cd1893bef05b92f63242228607b45821c4a7
(net: update FTGMAC100 for MMU/D-cache support)

The driver assumes that the DMA allocation API are provided by all
architectures. This is not the case for nds32 and it causes a
build error. This patch adds DMA allocation API to avoid the errors.

Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com>
Cc: Macpaul Lin <macpaul@gmail.com>
Cc: Andes <uboot@andestech.com>
Signed-off-by: Andes <uboot@andestech.com>
11 years agonds32: Change of NDS32 Custodian
Andes [Sat, 3 Aug 2013 13:59:22 +0000 (21:59 +0800)]
nds32: Change of NDS32 Custodian

Signed-off-by: Andes <uboot@andestech.com>
Cc: Macpaul Lin <macpaul@gmail.com>
Cc: Kuan-Yu Kuo <ken.kuoky@gmail.com>
11 years agomicroblaze: Call spi_init function
Michal Simek [Thu, 8 Aug 2013 13:28:11 +0000 (18:58 +0530)]
microblaze: Call spi_init function

Initialization spi.

Signed-off-by: Michal Simek <monstr@monstr.eu>
Acked-by: Stephan Linz <linz@li-pro.net>
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
11 years agozynq: Enable CONFIG_ZYNQ_SPI
Jagannadha Sutradharudu Teki [Tue, 6 Aug 2013 19:42:06 +0000 (01:12 +0530)]
zynq: Enable CONFIG_ZYNQ_SPI

Tested spi on zynq board with sst flash by enabling
CONFIG_ZYNQ_SPI.

sf probe 1:1 0 0
SF: Detected SST25WF080 with page size 4 KiB, total 1 MiB

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Acked-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
11 years agosf: sst: Add support for SST25WF080
Jagannadha Sutradharudu Teki [Mon, 29 Jul 2013 18:18:00 +0000 (23:48 +0530)]
sf: sst: Add support for SST25WF080

Add support for SST25WF080 SPI flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
11 years agospi: Add zynq spi controller driver
Jagannadha Sutradharudu Teki [Mon, 29 Jul 2013 18:15:16 +0000 (23:45 +0530)]
spi: Add zynq spi controller driver

Zynq spi controller driver supports 2 buses and
3 chipselects on each bus.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Acked-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
11 years agocmd_sf: let "sf update" erase last sector as a whole
Gerlando Falauto [Wed, 3 Jul 2013 18:33:57 +0000 (20:33 +0200)]
cmd_sf: let "sf update" erase last sector as a whole

make "sf update" work with unaligned `len' parameter, by deleting the
whole last sector before writing, so to allow for:

 sf update ${load_addr_r} 0 ${filesize}

Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Cc: Valentin Longchamp <valentin.longchamp@keymile.com>
Cc: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
11 years agosf: Fix code cleanups
Jagannadha Sutradharudu Teki [Mon, 29 Jul 2013 17:13:57 +0000 (22:43 +0530)]
sf: Fix code cleanups

- CHECK: Alignment should match open parenthesis
- trailing whitespace

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
11 years agocmd_sf|env_sf: Fix code cleanup
Jagannadha Sutradharudu Teki [Mon, 29 Jul 2013 16:42:52 +0000 (22:12 +0530)]
cmd_sf|env_sf: Fix code cleanup

- line over 80 characters
- add tabs
- CHECK: Alignment should match open parenthesis

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
11 years agosf: Fix code cleanup
Jagannadha Sutradharudu Teki [Mon, 29 Jul 2013 16:46:41 +0000 (22:16 +0530)]
sf: Fix code cleanup

- line over 80 characters.
- CHECK: Alignment should match open parenthesis

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
11 years agosf: stmicro: Fix code cleanup
Jagannadha Sutradharudu Teki [Fri, 24 May 2013 19:43:47 +0000 (01:13 +0530)]
sf: stmicro: Fix code cleanup

- line over 80 characters
- foo * bar -> foo *bar
- removed unnecessary for single statement blocks.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
11 years agosf: sst: Fix code cleanup
Jagannadha Sutradharudu Teki [Mon, 27 May 2013 19:40:04 +0000 (01:10 +0530)]
sf: sst: Fix code cleanup

- line over 80 characters
- add spaces
- add tabs

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
11 years agosf: eon|spansion|ramtron: Fix code cleanup
Jagannadha Sutradharudu Teki [Sat, 25 May 2013 16:33:39 +0000 (22:03 +0530)]
sf: eon|spansion|ramtron: Fix code cleanup

- line over 80 characters
- insert the expression in same line

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
11 years agospi: mpc8xxx_spi: Use DIV_ROUND_UP instead of open-coded
Axel Lin [Fri, 12 Jul 2013 09:42:15 +0000 (17:42 +0800)]
spi: mpc8xxx_spi: Use DIV_ROUND_UP instead of open-coded

Use DIV_ROUND_UP to simplify the code.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
11 years agospi: fsl_espi: Use DIV_ROUND_UP instead of open-coded
Axel Lin [Fri, 12 Jul 2013 09:41:08 +0000 (17:41 +0800)]
spi: fsl_espi: Use DIV_ROUND_UP instead of open-coded

Use DIV_ROUND_UP to simplify the code.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
11 years agoMerge branch 'master' of git://git.denx.de/u-boot-i2c
Tom Rini [Tue, 6 Aug 2013 13:49:06 +0000 (09:49 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-i2c

11 years agoi2c: soft: Fix typo in CONFIG_SYS_I2C_SOFT_SPEED
Marek Vasut [Thu, 1 Aug 2013 10:32:20 +0000 (12:32 +0200)]
i2c: soft: Fix typo in CONFIG_SYS_I2C_SOFT_SPEED

In case only the CONFIG_SYS_I2C_SPEED is set in configuration file,
the CONFIG_SYS_I2C_SOFT_SPEED is defined as CONFIG_SYS_I2C_SPEED.
The CONFIG_SYS_I2C_SOFT_SPEED is then used throughout the driver.

Unfortunatelly, due to a typo in the driver, instead of defining
CONFIG_SYS_I2C_SOFT_SPEED, an CONFIG_SYS_SOFT_I2C_SPEED was defined
and therefore the driver failed to compile. The same applies for
CONFIG_SYS_I2C_SOFT_SLAVE , where the swap happens as well.

This patch fixes the issue.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Heiko Schocher <hs@denx.de>
11 years agodts/Makefile: pass -undef -D__DTS__ to cpp
Stephen Warren [Wed, 24 Jul 2013 17:09:24 +0000 (10:09 -0700)]
dts/Makefile: pass -undef -D__DTS__ to cpp

This brings U-Boot's cpp invocation into line with the way the Linux
kernel invokes cpp on device trees. Consistency will be useful to ensure
*.dts is portable between the two.

-undef also has the added advantage of not defining "linux", so DT
property names such as "linux,keymap" don't get mangled.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
11 years agodts/Makefile: don't use cpp -P
Stephen Warren [Wed, 24 Jul 2013 17:09:23 +0000 (10:09 -0700)]
dts/Makefile: don't use cpp -P

Recent dtc supports #line directives in the input source code, and even
uses them to generate useful line numbers in any messages it emits. Stop
passing -P to cpp, since there's no need any more.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
11 years agoconfig: don't define CONFIG_ARCH_DEVICE_TREE
Stephen Warren [Wed, 24 Jul 2013 17:09:22 +0000 (10:09 -0700)]
config: don't define CONFIG_ARCH_DEVICE_TREE

Now that nothing uses CONFIG_ARCH_DEVICE_TREE, stop defining it.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
11 years agodts/Makefile: don't define ARCH_CPU_DTS, BOARD_DTS
Stephen Warren [Wed, 24 Jul 2013 17:09:21 +0000 (10:09 -0700)]
dts/Makefile: don't define ARCH_CPU_DTS, BOARD_DTS

Now that nothing uses the defines ARCH_CPU_DTS, BOARD_DTS, stop defining
them.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
11 years agodt: don't use ARCH_CPU_DTS
Stephen Warren [Wed, 24 Jul 2013 17:09:20 +0000 (10:09 -0700)]
dt: don't use ARCH_CPU_DTS

Now that we assume dtc supports the -i option, we don't need to use
ARCH_CPU_DTS in *.dts{,i}; we simply specify the include filename
directly, and dtc will find it.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
11 years agodts/Makefile: unify cpp/dtc include paths
Stephen Warren [Wed, 24 Jul 2013 17:09:19 +0000 (10:09 -0700)]
dts/Makefile: unify cpp/dtc include paths

*.dts may use #include (via cpp) or /include/ (via dtc; assuming a newer
dtc). The choice is up to the creator of the DT. Create a common variable
DTC_INCDIRS that lists the paths searched by include statements, and
update cpp and dtc invocation to use them.

For cpp, also specify -nostdinc to ensure the same set of paths is
available to both type of include statement.

For dtc, create a new DTC_FLAGS variable to hold all the flags passed to
dtc.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
11 years agodts/Makefile: simplify dtc invocation
Stephen Warren [Wed, 24 Jul 2013 17:09:18 +0000 (10:09 -0700)]
dts/Makefile: simplify dtc invocation

The invocation of dtc is significantly more complex that it could be,
in order to work around an issue on old versions of dtc, which print
a message to stdout every time they run.

Remove this workaround, on the assumption that people have or will
upgrade to a newer version of dtc. This simplifies the build rule
significantly.

Related, split the invocation of cpp and dtc into separate commands
rather than a pipeline, so that if either fail, it is detected. This has
the nice benefit of saving off the result of the pre-processing step,
allowing it to be easily inspected.

Assuming a new enough dtc (which an earlier patch enforces), dtc will
parse #line directives in its input file, and generate correct file and
line numbers in error messages, even though cpp is unconditionally
applied to its input file.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
11 years agoxilinx: move microblaze-generic .dts to standard location
Stephen Warren [Wed, 24 Jul 2013 17:09:17 +0000 (10:09 -0700)]
xilinx: move microblaze-generic .dts to standard location

Aside from microblaze, all other SoCs/boards/vendors store their DT files
in board/$vendor/dts/$soc-$board.dts. Move microblaze-generic.dts to this
location for consistency.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Michal Simek <monstr@monstr.eu>
11 years agoValidate dtc is new enough
Stephen Warren [Wed, 24 Jul 2013 17:09:16 +0000 (10:09 -0700)]
Validate dtc is new enough

Subsequent patches assume that dtc supports various recent features.
These are available in dtc 1.4.0. Validate that dtc is at least that
version.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
11 years agoMerge branch 'master' of git://git.denx.de/u-boot-usb
Tom Rini [Thu, 1 Aug 2013 13:19:28 +0000 (09:19 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-usb

11 years agospi: bfin_spi: Use DIV_ROUND_UP instead of open-coded
Axel Lin [Fri, 12 Jul 2013 09:39:41 +0000 (17:39 +0800)]
spi: bfin_spi: Use DIV_ROUND_UP instead of open-coded

Use DIV_ROUND_UP to simplify the code.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
11 years agoblackfin: Fix using gd->baudrate before setting its value
Axel Lin [Mon, 1 Jul 2013 05:16:17 +0000 (13:16 +0800)]
blackfin: Fix using gd->baudrate before setting its value

Current code uses gd->baudrate before setting its value.
Besides, I got below build warning which is introduced by
commit ddb5c5be "blackfin: add baudrate to bdinfo".

board.c:235:3: warning: passing argument 1 of 'simple_strtoul' makes pointer from integer without a cast [enabled by default]
include/vsprintf.h:27:7: note: expected 'const char *' but argument is of type 'unsigned int'

This patch ensures we get the baudrate setting before using it.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
11 years agoblackfin: gpio: Use proper mask for comparing function
Axel Lin [Fri, 28 Jun 2013 06:45:06 +0000 (14:45 +0800)]
blackfin: gpio: Use proper mask for comparing function

The function return from P_FUNCT2MUX(per) takes 2 bits, however
for BF537_FAMILY with offset != 1 the function is 1 bit.

Also has small refactor for better readability.
In portmux_setup(), it looks odd having "muxreg &= ~(3 << 1);"
while in current code we do muxreg |= (function << offset);.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
11 years agogpio: adi_gpio2: Unreserve gpio in special_gpio_free()
Axel Lin [Wed, 26 Jun 2013 02:10:04 +0000 (10:10 +0800)]
gpio: adi_gpio2: Unreserve gpio in special_gpio_free()

In special_gpio_free(), call unreserve() rather than reserve() to release gpio.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
11 years agoblackfin: gpio: Unreserve gpio in special_gpio_free()
Axel Lin [Wed, 26 Jun 2013 02:09:16 +0000 (10:09 +0800)]
blackfin: gpio: Unreserve gpio in special_gpio_free()

In special_gpio_free(), call unreserve() rather than reserve() to release gpio.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
11 years agocfi_flash: Add prototypes of overridable functions
Masahiro Yamada [Thu, 6 Jun 2013 07:54:04 +0000 (16:54 +0900)]
cfi_flash: Add prototypes of overridable functions

This commit adds some prototypes into include/mtd/cfi_flash.h.
These functions are defined with a weak attribute in
drivers/mtd/cfi_flash.c.
This means they can be overrided by board-specific ones
if necessary.

When defining such functions under board/ directory or
somewhere, cfi_flash.h should be included.
This makes sure that board-specfic cfi functions
are defined in a correct prototype.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Stefan Roese <sr@denx.de>