Stefan Brüns [Tue, 6 Sep 2016 02:36:44 +0000 (04:36 +0200)]
ext4: Scan all directory blocks for space when inserting a new entry
Previously, only the last directory block was scanned for available space.
Instead, scan all blocks back to front, and if no sufficient space is
found, eventually append a new block.
Blocks are only appended if the directory does not use extents or the new
block would require insertion of indirect blocks, as the old code does.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
Stefan Brüns [Tue, 6 Sep 2016 02:36:43 +0000 (04:36 +0200)]
ext4: Do not crash when trying to grow a directory using extents
The following command crashes u-boot:
./sandbox/u-boot -c 'i=0; host bind 0 ./sandbox/test/fs/3GB.ext4.img ;
while test $i -lt 200 ; do echo $i; setexpr i $i + 1;
ext4write host 0 0 /foobar${i} 0; done'
Previously, the code updated the direct_block even for extents, and
fortunately crashed before pushing garbage to the disk.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
Stefan Brüns [Tue, 6 Sep 2016 02:36:42 +0000 (04:36 +0200)]
ext4: propagate error if creation of directory entry fails
In case the dir entry creation failed, ext4fs_write would later overwrite
a random inode, as inodeno was never initialized.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
Stefan Brüns [Tue, 6 Sep 2016 02:36:41 +0000 (04:36 +0200)]
ext4: fix possible crash on directory traversal, ignore deleted entries
The following command triggers a segfault in search_dir:
./sandbox/u-boot -c 'host bind 0 ./sandbox/test/fs/3GB.ext4.img ;
ext4write host 0 0 /./foo 0x10'
The following command triggers a segfault in check_filename:
./sandbox/u-boot -c 'host bind 0 ./sandbox/test/fs/3GB.ext4.img ;
ext4write host 0 0 /. 0x10'
"." is the first entry in the directory, thus previous_dir is NULL. The
whole previous_dir block in search_dir seems to be a bad copy from
check_filename(...). As the changed data is not written to disk, the
statement is mostly harmless, save the possible NULL-ptr reference.
Typically a file is unlinked by extending the direntlen of the previous
entry. If the entry is the first entry in the directory block, it is
invalidated by setting inode=0.
The inode==0 case is hard to trigger without crafted filesystems. It only
hits if the first entry in a directory block is deleted and later a lookup
for the entry (by name) is done.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
Michael Walle [Mon, 29 Aug 2016 08:46:46 +0000 (10:46 +0200)]
ext4: fix wrong usage of le32_to_cpu()
le32_to_cpu() must only convert the revision_level and not the boolean
result.
Signed-off-by: Michael Walle <michael@walle.cc>
Michael Walle [Thu, 1 Sep 2016 09:21:40 +0000 (11:21 +0200)]
ext4: fix endianess problems in ext4 write support
All fields were accessed directly instead of using the proper byte swap
functions. Thus, ext4 write support was only usable on little-endian
architectures. Fix this.
Signed-off-by: Michael Walle <michael@walle.cc>
Michael Walle [Mon, 29 Aug 2016 08:46:44 +0000 (10:46 +0200)]
ext4: use kernel names for byte swaps
Instead of __{be,le}{16,32}_to_cpu use {be,le}{16,32}_to_cpu.
Signed-off-by: Michael Walle <michael@walle.cc>
Michael Walle [Mon, 29 Aug 2016 08:46:43 +0000 (10:46 +0200)]
ext4: change structure fields to __le/__be types
Change all the types of ext2/4 fields to little endian types and all the
JBD fields to big endian types. Now we can use sparse (make C=1) to check
for statements where we need byteswaps.
Signed-off-by: Michael Walle <michael@walle.cc>
Stefan Brüns [Tue, 13 Sep 2016 23:01:31 +0000 (01:01 +0200)]
test/fs: Check writes using "." (same dir) relative path
<path>/<fname> and <path>/./<fname> should reference the same file.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Stefan Brüns [Tue, 13 Sep 2016 23:01:30 +0000 (01:01 +0200)]
test/fs: Check ext4 behaviour if dirent is first entry in directory block
This is a regression test for a crash happening if the first dirent
in the block matches. Code tried to access a predecessor entry which
does not exist.
The crash happened for any block, but "." is always the first entry in
the first directory block and thus easy to check for.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Stefan Brüns [Tue, 13 Sep 2016 23:01:29 +0000 (01:01 +0200)]
test/fs: strip noise from filesystem code prior to checking results
ext4 and fat code emit some diagnostic messages during command execution.
These additional lines force a match window size which strictly is not
necessary.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Stefan Brüns [Tue, 13 Sep 2016 23:01:28 +0000 (01:01 +0200)]
test/fs: remove use of undefined WRITE_FILE variable
The write file is created from $SMALL_FILE by appending ".w" on all
other occurences in the code.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Stefan Brüns [Tue, 13 Sep 2016 23:01:27 +0000 (01:01 +0200)]
test/fs: Restructure file path specification to allow some flexibility
Instead of providing the full path, specify directory and filename
separately. This allows to specify intermediate directories, required
for some additional tests.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Stefan Brüns [Sun, 11 Sep 2016 20:51:42 +0000 (22:51 +0200)]
cmd/fat: Do not crash on write when <bytes> is not specified
argc is checked, but is off by one. In case <bytes> is not specified,
create an empty file, which is identical to the ext4write behaviour.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Stefan Brüns [Sun, 11 Sep 2016 20:51:41 +0000 (22:51 +0200)]
fs/fat: Correct description of determine_fatent function
Current description does not match the function behaviour.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Stefan Brüns [Sun, 11 Sep 2016 20:51:40 +0000 (22:51 +0200)]
fs/fat: Do not write unmodified fat entries to disk
The code caches 6 sectors of the FAT. On FAT traversal, the old contents
needs to be flushed to disk, but only if any FAT entries had been modified.
Explicitly flag the buffer on modification.
Currently, creating a new file traverses the whole FAT up to the first
free cluster and rewrites the on-disk blocks.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
Stefan Brüns [Sun, 11 Sep 2016 20:51:39 +0000 (22:51 +0200)]
fs/fat: Remove two statements without effect
fatlength is a local variable which is no more used after the assignment.
s_name is not used in the function, save the strncpy.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
Tom Rini [Thu, 22 Sep 2016 20:51:19 +0000 (16:51 -0400)]
Merge git://git.denx.de/u-boot-rockchip
Tom Rini [Thu, 22 Sep 2016 19:36:45 +0000 (15:36 -0400)]
ns16650: Make sure we have CONFIG_CLK set before using infrastructure
We cannot call on the CONFIG_CLK based clk_get_rate function unless
CONFIG_CLK is set.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 22 Sep 2016 17:34:55 +0000 (13:34 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-uniphier
Masahiro Yamada [Wed, 21 Sep 2016 22:42:23 +0000 (07:42 +0900)]
ARM: dts: uniphier: sync clock/reset controller nodes with Linux
Sync device trees with Linux for easier DT life.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 21 Sep 2016 22:42:22 +0000 (07:42 +0900)]
clk: uniphier: allow to have clock node under syscon node
To sync the DT binding with Linux, the register base must be taken
from the parent syscon node.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 21 Sep 2016 22:42:21 +0000 (07:42 +0900)]
clk: uniphier: move U_BOOT_DRIVER entry to core code
Move U_BOOT_DRIVER() entry from the data file (clk-uniphier-mio.c)
to the core support file (clk-uniphier-core.c) because I do not want
to repeat the driver boilerplate when I add more clock data.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 21 Sep 2016 22:42:20 +0000 (07:42 +0900)]
clk: uniphier: constify clock data arrays/structures
Clarify these clock data are constant.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 21 Sep 2016 22:42:19 +0000 (07:42 +0900)]
ARM: uniphier: add PLL init code for LD11 SoC
- Initialize PLLs (SPL initializes only DPLL to save the precious
SPL memory footprint)
- Adjust CPLL/MPLL to the final tape-out frequency
- Set the Cortex-A53 clock to the maximum frequency since it is
running at 500MHz (SPLL/4) on startup
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Tue, 20 Sep 2016 05:27:00 +0000 (14:27 +0900)]
ARM: uniphier: move CONFIG_SPL_* to defconfig or select
As I repeated in the ML, I am unhappy with config entries with bare
defaults. Kick them out of arch/arm/mach-uniphier/Kconfig.
Currently, CONFIG_SPL_SERIAL_SUPPORT is not user-configurable
(build fails without it), but it should be fixed later anyway,
so I am moving CONFIG_SPL_SERIAL_SUPPORT to defconfigs.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 22 Sep 2016 15:36:45 +0000 (11:36 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-spi
Tom Rini [Thu, 22 Sep 2016 15:36:23 +0000 (11:36 -0400)]
Merge branch 'master' of git://denx.de/git/u-boot-microblaze
Stephen Warren [Mon, 19 Sep 2016 18:20:26 +0000 (12:20 -0600)]
Makefile: rm u-boot.cfg dependencies are missing
Prior to the previous patch, a freshly created .u-boot.cfg.cmd may not
correctly represent all dependencies for u-boot.cfg. The previous change
only solved this issue for fresh builds; when performing an incremental
build, the deficient .u-boot.cfg.cmd is already present, so u-boot.cfg
is not rebuilt, and hence .u-boot.cfg.cmd is not rebuilt with the correct
content.
Solve this by explicitly detecting when the dependency file .u-boot.cfg.d
has not been integrated into .u-boot.cfg.cmd, and force u-boot.cfg to be
rebuilt in this case by deleting it first. This is possible since
if_changed_dep will always delete .u-boot.cfg.d when it executes
successfully, so its presence means either that the previous build was
made by a source tree that contained a Makefile that didn't include the
previous patch, or that the build failed part way through executing
if_changed_dep for u-boot.cfg. Forcing a rebuild of u-boot.cfg is required
in the former case, and will cause no additional work in the latter case,
since the file would be rebuilt anyway for the same reason it was being
rebuilt by the previous build.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Stephen Warren [Mon, 19 Sep 2016 18:20:25 +0000 (12:20 -0600)]
Makefile: use if_change_dep for u-boot.cfg
cmd_cpp_cfg generates a dependency output, but because it's invoked using
if_changed rather than if_changed_dep, that dependency file is ignored.
This results in Kbuild not knowing about which files u-boot.cfg depends
on, so it may not be rebuilt when required.
A practical result of this is that u-boot.cfg may continue to reference
CONFIG_ options that no longer exist in the source tree, and this can
cause the adhoc config options check to fail.
This change modifies Makefile to use if_changed_dep, which in turn causes
all dependencies to be known to the next make invocation.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tom Rini [Sun, 18 Sep 2016 13:46:58 +0000 (09:46 -0400)]
test/py/tests/test_vboot.py: Add check that we boot the image
Make sure that when we're telling bootm to boot an image, and we expect
the image to boot we get the output from sandbox that we attempted to
run Linux and that U-Boot completed its job.
Cc: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Paul Burton [Tue, 20 Sep 2016 17:17:12 +0000 (18:17 +0100)]
image-fit: Fix fit_get_node_from_config semantics
Commit
bac17b78dace ("image-fit: switch ENOLINK to ENOENT") changed
fit_get_node_from_config to return -ENOENT when a property doesn't
exist, but didn't change any of its callers which check return values.
Notably it didn't change boot_get_ramdisk, which leads to U-Boot failing
to boot FIT images which don't include ramdisks with the following
message:
Ramdisk image is corrupt or invalid
It also didn't take into account that by returning -ENOENT to denote the
lack of a property we lost the ability to determine from the return
value of fit_get_node_from_config whether it was the property or the
configuration node that was missing, which may potentially lead callers
to accept invalid FIT images.
Fix this by having fit_get_node_from_config return -EINVAL when the
configuration node isn't found and -ENOENT when the property isn't
found, which seems to make semantic sense. Callers that previously
checked for -ENOLINK are adjusted to check for -ENOENT, which fixes the
breakage introduced by commit
bac17b78dace ("image-fit: switch ENOLINK
to ENOENT").
The only other user of the return fit_get_node_from_config return value,
indirectly, is bootm_find_os which already checked for -ENOENT. From a
read-through of the code I suspect it ought to have been checking for
-ENOLINK prior to
bac17b78dace ("image-fit: switch ENOLINK to ENOENT")
anyway, which would make it right after this patch, but this would be
good to get verified by someone who knows this x86 code or is able to
test it.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Jonathan Gray <jsg@jsg.id.au>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: George McCollister <george.mccollister@gmail.com>
Tested-by: George McCollister <george.mccollister@gmail.com>
Kever Yang [Fri, 12 Aug 2016 09:57:05 +0000 (17:57 +0800)]
clk: rk3288: add PWM clock get rate
This patch add clk_get_rate for PWM device.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Kever Yang [Fri, 12 Aug 2016 09:47:15 +0000 (17:47 +0800)]
clk: rk3399: add pmucru controller support
pmucru is a module like cru which is a clock controller manage some PLL
and module clocks.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Kever Yang [Thu, 1 Sep 2016 02:14:20 +0000 (10:14 +0800)]
rk3399: add a empty "sys_proto.h" header file
driver/usb/dwc3/gadget.c need a "sys_proto.h" header file, add a
empty one to make compile success.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Xu Ziyuan [Sat, 27 Aug 2016 13:53:14 +0000 (21:53 +0800)]
rockchip: rk3288: skip lowlevel_init process
lowlevel_init() is never needed for rk3288, so drop it.
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Kever Yang [Wed, 24 Aug 2016 04:02:22 +0000 (12:02 +0800)]
board: evb-rk3399: enable usb 2.0 host vbus power on board_init
rk3399 using one gpio control signal for two usb 2.0 host port,
it's better to enable the power in board file instead of in usb driver.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Kever Yang [Wed, 24 Aug 2016 04:02:23 +0000 (12:02 +0800)]
config: evb-rk3399: enable fixed regulator
This patch enable fixed regulator driver for rk3399 evb.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Kever Yang [Wed, 24 Aug 2016 04:02:21 +0000 (12:02 +0800)]
dts: rk3399-evb: add regulator-fixed for usb host vbus
rk3399 evb using one gpio to enable 5V output for both USB 2.0
host port, let's use fixed regulator for them.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
MengDongyang [Wed, 24 Aug 2016 04:02:20 +0000 (12:02 +0800)]
dts: rk3399: add dwc3_typec node for rk3399
rk3399 has two dwc3 controller for type-C port, add the dts node
and enable them.
Signed-off-by: MengDongyang <daniel.meng@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
MengDongyang [Wed, 24 Aug 2016 04:02:19 +0000 (12:02 +0800)]
config: rk3399: add usb related configs
This patch to enable configs for usb module
- xhci
- ehci
- usb storage
- usb net
Signed-off-by: MengDongyang <daniel.meng@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Squashed in patch to move to Kconfig:
https://patchwork.ozlabs.org/patch/672543/
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Kever Yang [Wed, 21 Sep 2016 03:35:42 +0000 (11:35 +0800)]
usb: host: add Kconfig for USB_XHCI_ROCKCHIP
Add a Kconfig for Rockchip xhci controller.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Marek Vasut <marex@denx.de>
MengDongyang [Wed, 24 Aug 2016 04:02:18 +0000 (12:02 +0800)]
rockchip: select DM_USB for rockchip SoC
Select DM_USB to compatible with USB DM driver model.
Signed-off-by: MengDongyang <daniel.meng@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
MengDongyang [Wed, 24 Aug 2016 04:02:17 +0000 (12:02 +0800)]
usb: xhci-rockchip: add rockchip dwc3 controller driver
This patch add support for rockchip dwc3 controller, which corresponding
to the two type-C port on rk3399 evb.
Only support usb2.0 currently for we have not enable the usb3.0 phy
driver and PD(fusb302) driver.
Signed-off-by: MengDongyang <daniel.meng@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Kever Yang [Fri, 12 Aug 2016 09:58:12 +0000 (17:58 +0800)]
rk3288: add arch_cpu_init for rk3288
We do some SoC level one time setting initialization in
arch_cpu_init.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Kever Yang [Fri, 12 Aug 2016 09:58:02 +0000 (17:58 +0800)]
rk_pwm: remove grf setting code from driver
We consider the grf setting for pwm controller select as the system
operation instead of driver operation, move it to soc init, let's
remove it from pwm driver first.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Kever Yang [Fri, 12 Aug 2016 09:57:48 +0000 (17:57 +0800)]
rk_pwm: use clock framework API to get module clock
This patch use clock API instead of hardcode for get pwm clock.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Fix printf() to debug() nit:
Signed-off-by: Simon Glass <sjg@chromium.org>
Xu Ziyuan [Fri, 12 Aug 2016 07:43:48 +0000 (15:43 +0800)]
rockchip: use dummy byte only enable OF_PLATDATA
Add a condition to determine the rk3288_sdram_channel size.
This patch fixes read sdram_channel property failed from DT on rk3288
boards, which not enable OF_PLATDATA.
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Kever Yang [Tue, 16 Aug 2016 09:58:14 +0000 (17:58 +0800)]
dts: rk3399: add pinctrl for sdmmc
This patch add pinctrl for sdcard which may not be initialized before
uboot.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Kever Yang [Tue, 16 Aug 2016 09:58:13 +0000 (17:58 +0800)]
rk3399: enable the pwm2/3 pinctrl in board init
There is no interrupt line for each PWM which used by pinctrl to get the
periph_id, so it's not able to enable the default pinctrl setting by pinctrl
framework, let's enable it at board_init().
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Kever Yang [Tue, 16 Aug 2016 09:58:12 +0000 (17:58 +0800)]
config: evb-rk3399: enable pinctrl driver
This patch enable rk3399 pinctrl driver and gpio driver which is sub-node
of pinctrl.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Kever Yang [Tue, 16 Aug 2016 09:58:11 +0000 (17:58 +0800)]
pinctrl: add driver for rk3399
This patch add pinctrl driver for rk3399.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Kever Yang [Tue, 16 Aug 2016 09:58:10 +0000 (17:58 +0800)]
rk3399: syscon: add support for pmugrf
pmugrf is a module like grf which contain some of the iomux registers
and other registers.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Jagan Teki [Wed, 21 Sep 2016 19:55:48 +0000 (01:25 +0530)]
configs: fsl: Move SPI/SPI-FLASH configs to defconfig
Moved FSL_QSPI/SPI/SPI-FLASH configs from include/configs
into respective used defconfigs.
- CONFIG_FSL_QSPI
- CONFIG_SPI_FLASH
- CONFIG_SPI_FLASH_BAR
- CONFIG_SPI_FLASH_STMICRO
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Sat, 3 Sep 2016 07:28:33 +0000 (12:58 +0530)]
spi: Kconfig: Move FSL_QSPI entry to non-dm place
Since FSL_QSPI driver still supporting non-dm code
better to move the Kconfig from DM undefined place.
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Siva Durga Prasad Paladugu [Mon, 1 Aug 2016 04:49:38 +0000 (10:19 +0530)]
zynqmp: Remove unnnecessary board config file for dc4
Remove unnecessary board specific config file for DC4
board.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Acked-by: Jagan Teki <jteki@openedev.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 21 Sep 2016 09:42:58 +0000 (11:42 +0200)]
ARM64: zynqmp: Use the same name for atf image everywhere
Use atf-uboot.ub image instead of atf.ub.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 7 Sep 2016 11:16:31 +0000 (13:16 +0200)]
ARM64: zynqmp: Enable CONFIG_AHCI via Kconfig
Move CONFIG_AHCI to defconfig.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 1 Feb 2016 14:05:58 +0000 (15:05 +0100)]
ARM64: zynqmp: Add support for chip ID detection
Chip ID needs to be known for loading bitstream because
U-Boot checks ID from bitstream header in BIT format.
BIN format is completely unchecked.
The chipid is get from ATF via SMC.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu [Wed, 13 Jan 2016 10:55:37 +0000 (16:25 +0530)]
fpga: xilinx: zynqmp: Add PL bitstream download support for ZynqMP
Add PL bitstream dowload support for ZynqMP
Bitstream will be validated by uboot and loaded
to PL by invoking an smc instruction to ATF which route this request to
PMU FW which will take care of loading it to PL
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 16 Aug 2016 13:40:05 +0000 (15:40 +0200)]
ARM64: zynqmp: Fix USB ulpi phy sequence
It should be enough to call low(5us)->high pulse for all cases
to provide proper reset. There is no need to call high->low->high.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 15 Aug 2016 07:41:36 +0000 (09:41 +0200)]
ARM64: zynqmp: Add support for USB ulpi phy reset via mode pins
Mode pins can be used as output for reset. Xilinx boards are using
this feature as additional way how to reset USB phys and also others
chips on the boards.
Mode1 is used on all these boards for this feature.
Let SPL toggle reset on this pin by default.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 19 Aug 2016 12:14:52 +0000 (14:14 +0200)]
ARM64: zynqmp: Add support for DFU from SPL
SPL needs to have bigger stack size because of USB.
Simple malloc needs to be disabled because dfu code requires different
allocation functions. There is no space in OCM that's why random place
in DDR is used.
BOOTD must be disabled because it is causing compilation error.
All variables are disabled and used only variables valid for DFU because
they are simple huge. Including automatic variables added by
CONFIG_ENV_VARS_UBOOT_CONFIG.
Hardcode addresses for u-boot, atf, kernel and dtb
just for SPL DFU code.
Enable SPL DFU for zcu100.
Create new usb_dfu_spl variable just to run Linux kernel loaded in SPL.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 30 Aug 2016 13:38:57 +0000 (15:38 +0200)]
ARM: Add new BOOT_DEVICE_DFU boot mode
This enum is needed when SPL_DFU is enabled.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 29 Apr 2016 11:00:10 +0000 (13:00 +0200)]
ARM64: zynqmp: Add USB boot mode
Add USB boot mode.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 30 Aug 2016 12:58:46 +0000 (14:58 +0200)]
ARM64: zynqmp: Move BSS location to the beginning of ram
With SPL_DFU support memory layout needs to be cleanup
that's why move bss to the start of memory.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 1 Sep 2016 10:51:27 +0000 (12:51 +0200)]
spi: zynq: Use variable to remove u32 to u64 conversions
Current code generates warning when it is compiled for arm64:
Warnings:
In file included from drivers/spi/zynq_spi.c:14:0:
drivers/spi/zynq_spi.c: In function ‘zynq_spi_init_hw’:
drivers/spi/zynq_spi.c:95:9: warning: large integer implicitly truncated
to unsigned type [-Woverflow]
writel(~ZYNQ_SPI_ENR_SPI_EN_MASK, ®s->enr);
^
./arch/arm/include/asm/io.h:146:34: note: in definition of macro
‘writel’
#define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v;
})
^
drivers/spi/zynq_spi.c: In function ‘zynq_spi_release_bus’:
drivers/spi/zynq_spi.c:177:9: warning: large integer implicitly
truncated to unsigned type [-Woverflow]
writel(~ZYNQ_SPI_ENR_SPI_EN_MASK, ®s->enr);
^
./arch/arm/include/asm/io.h:146:34: note: in definition of macro
‘writel’
#define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v;
})
^
This patch is using one variable to do conversion via u32 variable.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Michal Simek [Thu, 1 Sep 2016 09:16:40 +0000 (11:16 +0200)]
ARM64: zynqmp: Fix usb_gadget_handle_interrupt routine
Function is defined in g_dnl.h and have different parameter
then it is used. This patch fixes it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 30 Aug 2016 14:17:27 +0000 (16:17 +0200)]
ARM64: zynqmp: Force certain bootmode for SPL
ZynqMP provides an option to overwrite bootmode setting which
can change SPL behavior.
For example: boot SPL via JTAG and then SPL loads images from SD.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 8 Aug 2016 08:11:26 +0000 (10:11 +0200)]
ARM64: zynqmp: Wire up both USBs available on ZynqMP
The second USB wasn't enabled. This patch fixes it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 19 Sep 2016 08:41:55 +0000 (10:41 +0200)]
fpga: Add Kconfig to fpga subsystem
Add missing Kconfig to fpga subsystem to be able
to add new options.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Tom Rini [Wed, 21 Sep 2016 22:38:41 +0000 (18:38 -0400)]
omap4_panda: Disable ext2/3/4 support in SPL
Pandaboard is growing again, disable EXT2/3/4 support in SPL save more
space.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 21 Sep 2016 21:56:01 +0000 (17:56 -0400)]
clk.h: Add <asm/errno.h>
Since we return -ENOSYS in some cases we must have <asm/errno.>
available.
Signed-off-by: Tom Rini <trini@konsulko.com>
Jagan Teki [Mon, 8 Aug 2016 13:55:55 +0000 (19:25 +0530)]
sf: Move flags macro's to spi_flash_params{} members
This patch moves flags macro's to respective member position on
spi_flash_params{}, for better readabilty and finding the
respective member macro's easily.
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Mon, 8 Aug 2016 11:53:56 +0000 (17:23 +0530)]
sf: Add CONFIG_SPI_FLASH_USE_4K_SECTORS in spi_flash
Add CONFIG_SPI_FLASH_USE_4K_SECTORS in spi_flash code from header file.
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Mon, 8 Aug 2016 11:49:08 +0000 (17:19 +0530)]
sf: Remove SECT_32K
SECT_32K never used anywhere in the code.
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Wed, 10 Aug 2016 15:18:14 +0000 (20:48 +0530)]
spi: Remove SPI_RX_FAST
Removed SPI_RX_FAST since default read for spi slaves
are always 1-wire fast read.
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Mon, 8 Aug 2016 11:42:12 +0000 (17:12 +0530)]
spi: Use mode for rx mode flags
Make rx mode flags as generic to spi, earlier mode_rx is
maintained separately because of some flash specific code.
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Mon, 8 Aug 2016 11:32:18 +0000 (17:02 +0530)]
sf: Remove e_rd_cmd from param table
e_rd_cmd is maintained separately for fastest read command code,
since the read commands are computed normally this e_rd_cmd
is not required in spi_flash_params table.
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Mon, 8 Aug 2016 11:20:45 +0000 (16:50 +0530)]
sf: Simplify fastest read cmd code
Fastest read command code look for fastest read command
taking inputs from spi->mode_rx and flags from param table
and controller mode_rx is always been a priority.
Since mode_rx is always set from controller side this optimized
code doesn't require much and this code required exctra overhead like
1) Maintain e_rx_cmd in param table
2) Maintain mode_rx in spi_slave {}
Hence removed this code, and look for read command from normal
spi->mode from spi_slave{} and params->flags
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Vignesh R [Wed, 7 Sep 2016 09:48:23 +0000 (15:18 +0530)]
spi: ti_qspi: Remove unnecessary udelay for AM437x
This udelay() was added as an HACK and is no longer required. All
read/write/erase operations work fine even without this delay. Hence,
remove the udelay() call.
Tested read/write/erase operation on AM437x SK. Also tested QSPI Boot.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Vignesh R [Wed, 7 Sep 2016 09:48:22 +0000 (15:18 +0530)]
spi: ti_qspi: use 128 bit transfer mode when writing to flash
TI QSPI has four 32 bit data registers which can be used to transfer 16
bytes of data at once. The register group QSPI_SPI_DATA_REG_3,
QSPI_SPI_DATA_REG_2, QSPI_SPI_DATA_REG_1 and QSPI_SPI_DATA_REG is
treated as a single 128-bit word for shifting data in and out. The bit
at QSPI_SPI_DATA_REG_3[31] position is the first bit to be shifted out
in case of 128 bit transfer mode. Therefore the first byte to be written
to flash should be at QSPI_SPI_DATA_REG_3[31-25] position.
Instead of writing 1 byte at a time when interacting with SPI NOR flash,
make use of all the four registers so that 16 bytes can be transferred
in one go.
With this patch, the flash write speed increases from ~250KBs/ to
~650KB/s on DRA74 EVM.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Lad, Prabhakar [Sat, 30 Jul 2016 21:28:24 +0000 (22:28 +0100)]
spi: zynq_spi: Fix infinite looping while xfer
During spi transfer, for example:
sspi 1:1.0 8 ff
the rx_len values will be:
rx_len = 0
rx_len =
4294967295
This caused a busy looping during xfer, this patch fixes it
by adding a check while reading the rx fifo
Signed-off-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Tom Rini [Wed, 21 Sep 2016 18:50:18 +0000 (14:50 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-mips
Tom Rini [Wed, 21 Sep 2016 15:48:02 +0000 (11:48 -0400)]
Merge branch 'master' of git.denx.de/u-boot-mmc
Paul Burton [Wed, 21 Sep 2016 13:59:54 +0000 (14:59 +0100)]
MIPS: Hang if run on a secondary CPU
Some systems are configured such that multiple CPUs begin running from
their reset vector following a system reset. If this occurs then U-Boot
will be run on multiple CPUs simultaneously, which causes all sorts of
issues as the multiple instances of U-Boot clobber each other.
Prevent this from happening by simply hanging with an infinite loop if
we run on a CPU whose ID, as determined by GlobalNumber or EBase.CPUNum
as appropriate, is non-zero.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Paul Burton [Wed, 21 Sep 2016 10:11:06 +0000 (11:11 +0100)]
MIPS: Fix cache maintenance in relocate_code & simplify
The relocate_code function was handling cache maintenance incorrectly.
It copied U-Boot to its new location, flushed the caches & then
proceeded to apply relocations & jump to the new code without flushing
the caches again. This is problematic as the instruction cache could
potentially have already fetched instructions that hadn't had relocs
applied.
Rework this to perform the flush_cache call using the code in the
original copy of U-Boot, after having applied relocations to the new
copy of U-Boot. The new U-Boot can then be jumped to safely once that
cache flush has been performed.
As part of this, since the old U-Boot is used up until after that cache
flush, complexity around loading values from the GOT using a jump & link
instruction & loads from a table is removed. Instead we can simply load
the needed values with PTR_LA fromt the original GOT.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Paul Burton [Thu, 8 Sep 2016 06:47:39 +0000 (07:47 +0100)]
boston: Introduce support for the MIPS Boston development board
This patch introduces support for building U-Boot to run on the MIPS
Boston development board. This is a board built around an FPGA & an
Intel EG20T Platform Controller Hub, used largely as part of the
development of new CPUs and their software support. It is essentially
the successor to the older MIPS Malta board.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Paul Burton [Thu, 8 Sep 2016 06:47:38 +0000 (07:47 +0100)]
clk: boston: Providea simple driver for Boston board clocks
Add a simple driver for the clocks provided by the MIPS Boston
development board. The system provides information about 2 clocks whose
rates are fixed by the bitfile flashed in the boards FPGA, and this
driver simply reads the rates of these 2 clocks.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Paul Burton [Thu, 8 Sep 2016 06:47:37 +0000 (07:47 +0100)]
dm: syscon: Provide a generic syscon driver
Provide a trivial syscon driver matching the generic "syscon" compatible
string, allowing for simple system controllers to be used without a
custom driver just as in Linux.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Paul Burton [Thu, 8 Sep 2016 06:47:36 +0000 (07:47 +0100)]
dm: core: Match compatible strings in order of priority
Device model drivers have previously been matched to FDT nodes by virtue
of being the first driver in the driver list to be compatible with the
node. This ignores the fact that compatible strings in the device tree
are listed in order of priority - that is, if we have a node with 2
compatible strings & a driver that matches each then we should always
probe the driver that matches the first compatible string.
Fix this by looping through the compatible strings for a node when
attempting to bind it in lists_bind_fdt and checking each driver for
a match of the first string, then each driver for a match of the second
string etc. Effectively this inverts the loops over compatible strings &
drivers.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Paul Burton [Thu, 8 Sep 2016 06:47:35 +0000 (07:47 +0100)]
dm: regmap: Implement simple regmap_read & regmap_write
The regmap_read & regmap_write functions were previously declared in
regmap.h but not implemented anywhere. The regmap implementation &
commit message of
6f98b7504f70 ("dm: Add support for register maps
(regmap)") indicate that only memory mapped accesses are supported for
now, so providing simple implementations of regmap_read & regmap_write
is trivial. The access size is presumed to be 4 bytes & endianness is
presumed native, which are the defaults for the regmap code in Linux.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Paul Burton [Thu, 8 Sep 2016 06:47:34 +0000 (07:47 +0100)]
net: pch_gbe: Make 64 bit safe
The pch_gbe driver previously casted pointers to & from unsigned 32 bit
integers in many locations. This breaks the driver on 64 bit systems,
producing streams of compiler warnings about mismatched pointer &
integer sizes and then failing to keep track of addresses correctly at
runtime.
Fix the driver for 64 bit systems by using unsigned longs in place of
the previously used 32 bit integers.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Paul Burton [Thu, 8 Sep 2016 06:47:33 +0000 (07:47 +0100)]
net: pch_gbe: Use dm_pci_map_bar to discover MMIO base
Reading the PCI BAR & converting the result to a physical address is not
safe across all architectures. For example on MIPS the virtual:physical
mapping is not 1:1, so we cannot directly make use of the physical
address.
Use the more generic BAR-mapping function dm_pci_map_bar to discover the
MMIO base address, which should work across architectures.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Paul Burton [Thu, 8 Sep 2016 06:47:32 +0000 (07:47 +0100)]
pci: Flip condition for detecting non-PCI parent devices
In pci_uclass_pre_probe an attempt is made to detect whether the parent
of a device is a PCI device and that the device is thus a bridge. This
was being done by checking whether the parent of the device is of the
UCLASS_ROOT class. This causes problems if the PCI controller is a child
of some other non-PCI node, for example a simple-bus node.
For example, if the device tree contains something like the following
then pci_uclass_pre_probe would incorrectly believe that the PCI
controller is a bridge, with a PCI parent:
/ {
some_child {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <>;
pci_controller: pci@
10000000 {
compatible = "my-pci-controller";
device_type = "pci";
reg = <0x10000000 0x2000000>;
};
};
};
Avoid this incorrect detection of bridges by instead checking whether
the parent devices class is UCLASS_PCI and treating a device as a bridge
when this is true, making use of device_is_on_pci_bus to perform this
test.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Paul Burton [Thu, 8 Sep 2016 06:47:31 +0000 (07:47 +0100)]
pci: xilinx: Add a driver for Xilinx AXI to PCIe bridge
This patch adds a driver for the Xilinx AXI bridge for PCI express, an
IP block which can be used on some generations of Xilinx FPGAs. This is
mostly a case of implementing PCIe ECAM specification, but with some
quirks about what devices are valid to access.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Paul Burton [Thu, 8 Sep 2016 06:47:30 +0000 (07:47 +0100)]
dt-bindings: Add interrupt-controller/mips-gic.h header
Import a copy of the dt-bindings/interrupt-controller/mips-gic.h header
from Linux, such that we can use device trees which include it without
modification.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Paul Burton [Thu, 8 Sep 2016 06:47:29 +0000 (07:47 +0100)]
serial: ns16550: Support clocks via phandle
Previously ns16550 compatible UARTs probed via device tree have needed
their device tree nodes to contain a clock-frequency property. An
alternative to this commonly used with Linux is to reference a clock via
a phandle. This patch allows U-Boot to support that, retrieving the
clock frequency by probing the appropriate clock device.
For example, a system might choose to provide the UART base clock as a
reference to a clock common to multiple devices:
sys_clk: clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <
10000000>;
};
uart0: uart@
10000000 {
compatible = "ns16550a";
reg = <0x10000000 0x1000>;
clocks = <&sys_clk>;
};
uart1: uart@
10000000 {
compatible = "ns16550a";
reg = <0x10001000 0x1000>;
clocks = <&sys_clk>;
};
This removes the need for the frequency information to be duplicated in
multiple nodes and allows the device tree to be more descriptive of the
system.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Paul Burton [Thu, 8 Sep 2016 06:47:28 +0000 (07:47 +0100)]
clk: Use dummy clk_get_by_* functions when CONFIG_CLK is disabled
The implementations of clk_get_by_index & clk_get_by_name are only
available when CONFIG_CLK is enabled. Provide the dummies when this is
not the case in order to avoid build failures.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Paul Burton [Wed, 21 Sep 2016 10:18:59 +0000 (11:18 +0100)]
MIPS: Ensure cache ops complete in mips_cache_reset
Ensure that cache operations complete before returning from
mips_cache_reset by placing a completion barrier (sync instruction)
before the return. Without this there is no guarantee that the cache ops
will complete before any subsequent memory accesses, since they are
indexed cache ops & thus not implicitly ordered with memory accesses.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>