Simon Glass [Mon, 8 Apr 2019 19:20:44 +0000 (13:20 -0600)]
sandbox: Move pre-console buffer out of the way of tracing
These two buffers currently conflict if tracing is enabled. Move the
pre-console buffer and update the documentation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 8 Apr 2019 19:20:43 +0000 (13:20 -0600)]
sandbox: Drop the printf() in setup_ram_buf()
This was really intended for debugging. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 8 Apr 2019 19:20:42 +0000 (13:20 -0600)]
sandbox: Correct maths in allocation routines
Allocation routines were adjusted to ensure that the returned addresses
are a multiple of the page size, but the header code was not updated to
take account of this. These routines assume that the header size is the
same as the page size which is unlikely.
At present os_realloc() does not work correctly due to this bug. The only
user is the hostfs 'ls' command, and only if the directory contains a
unusually long filename, which likely explains why this bug was not
caught earlier.
Fix this by doing the calculations using the obtained page size.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 8 Apr 2019 19:20:41 +0000 (13:20 -0600)]
sandbox: Improve debugging in initcall_run_list()
At present if one of the initcalls fails on sandbox the address printing
is not help, e.g.:
initcall sequence
0000557678967c80 failed at call
00005576709dfe1f (err=-96)
This is because U-Boot gets relocated high into memory and the relocation
offset (gd->reloc_off) does not work correctly for sandbox.
Add support for finding the base address of the text region (at least on
Linux) and use that to set the relocation offset. This makes the output
better:
initcall sequence
0000560775957c80 failed at call
0000000000048134 (err=-96)
Then you use can use grep to see which init call failed, e.g.:
$ grep
0000000000048134 u-boot.map
stdio_add_devices
Of course another option is to run it with a debugger such as gdb:
$ gdb u-boot
...
(gdb) br initcall.h:41
Breakpoint 1 at 0x4db9d: initcall.h:41. (2 locations)
Note that two locations are reported, since this function is used in both
board_init_f() and board_init_r().
(gdb) r
Starting program: /tmp/b/sandbox/u-boot
[Thread debugging using libthread_db enabled]
Using host libthread_db library "/lib/x86_64-linux-gnu/libthread_db.so.1".
U-Boot
2018.09-00264-ge0c2ba9814-dirty (Sep 22 2018 - 12:21:46 -0600)
DRAM: 128 MiB
MMC:
Breakpoint 1, initcall_run_list (init_sequence=0x5555559619e0 <init_sequence_f>)
at /scratch/sglass/cosarm/src/third_party/u-boot/files/include/initcall.h:41
41 printf("initcall sequence %p failed at call %p (err=%d)\n",
(gdb) print *init_fnc_ptr
$1 = (const init_fnc_t) 0x55555559c114 <stdio_add_devices>
(gdb)
Signed-off-by: Simon Glass <sjg@chromium.org>
Christoph Muellner [Fri, 5 Apr 2019 11:03:46 +0000 (13:03 +0200)]
common: command: Add command execution tracer.
When using boot scripts it can become quite hard to understand
which commands are actually executed during bootup (e.g. where
is a kernel image loaded from or which DTB is in use).
Shell scripts suffer from a similar problem and many shells address
this problem with a command execution tracer (e.g. BASH has xtrace,
which can be enabled by "set -x").
This patch introduces a command tracer for U-Boot, which prints
every command with its arguments before it is executed.
Signed-off-by: Christoph Muellner <christoph.muellner@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Eugeniu Rosca [Mon, 1 Apr 2019 10:52:52 +0000 (12:52 +0200)]
fdt: boot_get_fdt: android: use ENV 'fdtaddr' as fallback
Our platform doesn't store the DTB into the Android image second area,
but rather copies the DTB to RAM from a dedicated dtb.img partition [0],
prior to booting the Android image by calling bootm.
Similar to [1], we find it useful to just call 'bootm' and have the
right DTB being passed to OS (assuming its address has been previously
stored in 'fdtaddr' by calling `fdt addr <dtb-addr>`).
Booting Android with DTB from 'fdtaddr' will only occur if:
- No DTB is embedded in the second area of Android image
- 'fdtaddr' points to a valid DTB in RAM
[0] https://source.android.com/devices/architecture/dto/partitions
[1] https://patchwork.ozlabs.org/patch/
1046652/
("Support boot Android image without address on bootm command")
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Eugeniu Rosca [Mon, 1 Apr 2019 10:45:36 +0000 (12:45 +0200)]
fdt: boot_get_fdt: android: compress handling (non-functional)
Prepare for booting Android images which lack any DTB in the second
area by using 'fdtaddr' environment variable as source/address of FDT.
No functional/behavioral change expected in this patch.
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Eugeniu Rosca [Mon, 1 Apr 2019 10:45:35 +0000 (12:45 +0200)]
fdt: boot_get_fdt: simplify no_fdt handling (non-functional)
Increase the readability of boot_get_fdt().
No change in behavior is expected.
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Eugeniu Rosca [Mon, 1 Apr 2019 10:45:34 +0000 (12:45 +0200)]
fdt: boot_get_fdt: really boot w/o FDT when "goto no_fdt"
The 'no_fdt' goto label was introduced by v2015.01 commit [0] and it
had two review stages [1-2]. The *documented* purpose behind commit [0]
is (excerpt from commit description):
> allows both FDT and non-FDT kernels to boot by making the
> third parameter to the bootm/bootz optional
While [1] and [2] share the same goal, they have very different
implementations:
- [1] was based on a very simple 'argc' check at function error out
with returning success to the caller if the third parameter was NOT
passed to bootm/bootz command. This approach had the downside of
returning success to the caller even in case of legitimate internal
errors, which should halt booting.
- [2] added the "no_fdt" label and several "goto no_fdt" statements.
This allowed to report the legitimate internal errors to the caller.
IOW the major difference between [1] and [2] is:
- [1] boot w/o FDT if FDT address is not passed to boot{m,z,*}
- [2] give *freedom* to the developer to boot w/o FDT from any
(more or less) arbitrary point in the function flow (and here
comes the peculiar aspect, which looks to be a leftover from [1])
with the precondition that the 3rd argument (FDT address) is NOT
provided to boot{m,z,*}. In practice, this means that only a subset
of "goto no_fdt" end up booting w/o FDT while the other subset is
returning an error to the caller.
This patch removes the peculiar behavior described above, such that
"goto no_fdt" performs really what it tells to the developer.
The motivation of this patch is to decrease the unneeded complexity
and increase the readability of boot_get_fdt().
[0]
48aead71c1ad ("fdt: Allow non-FDT kernels to boot when CONFIG_OF_LIBFDT is defined")
[1] https://patchwork.ozlabs.org/patch/412923/
("[U-Boot,v1] fdt: Allow non-FDT kernels to boot when CONFIG_OF_LIBFDT is defined")
[2] https://patchwork.ozlabs.org/patch/415635/
("[U-Boot,v2] fdt: Allow non-FDT kernels to boot when CONFIG_OF_LIBFDT is defined")
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Eugeniu Rosca [Mon, 1 Apr 2019 10:45:33 +0000 (12:45 +0200)]
fdt: boot_get_fdt: remove redundant zeroing out
Paranoid programming [1] lies at the foundation of proper software
development, but the repetitive zeroing-out of output arguments in the
context of the same function rather clutters the code and inhibits
further refactoring/optimization than is doing any good.
In boot_get_fdt(), we already perform zero/NULL-initialization of
*of_flat_tree and *of_size at the beginning of the function, so doing
the same at function error-out is redundant/superfluous.
Moreover, keeping the code unchanged might encourage the developers to
update *of_flat_tree and *of_size during some interim computations,
which is against the current design of boot_get_fdt(). Currently,
writing useful data into these arguments happens just before
successfully returning from boot_get_fdt() and it should better stay so.
[1] https://blog.regehr.org/archives/1106
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Sun, 21 Apr 2019 23:00:04 +0000 (19:00 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-usb
- Various fastboot, dwc2/stm32 updates
Tom Rini [Sun, 21 Apr 2019 22:59:30 +0000 (18:59 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
- Various stratix10, gen5 updates
Fabrice Gasnier [Wed, 17 Apr 2019 14:46:13 +0000 (16:46 +0200)]
usb: dwc2: fix gadget disconnect
This fixes a disconnect issue detected with fastboot command, when using
dwc2 driver.
- On u-boot side:
uboot>$ fastboot 0
- On USB host PC side, few seconds after
PC>$ fastboot reboot # Get stuck, uboot target never reboots
By enabling DEBUG_ISR logs, the bus suspend interrupt is seen before the
PC command has been issued. When the USB bus suspend occurs, there's a HACK
that disables the fastboot (composite driver). Here is the call stack
upon USB bus suspend:
- dwc2_handle_usb_suspend_intr()
- dev->driver->disconnect()
- composite_disconnect()
- reset_config()
- f->disable()
- fastboot_disable()
- usb_ep_disable(f_fb->out_ep);
- usb_ep_disable(f_fb->in_ep);
.. other disable calls.
When the resume interrupt happens, everything has been disabled, then
nothing happens. fastboot command gets stuck on HOST side.
Remove original HACK, that disconnects the composite driver upon
USB bus suspend. Implement disconnect detection instead:
- check GINTSTS OTG interrupt
- read GOTGINT register
- check GOTGINT, SesEndDet bit (e.g. session end)
This is inspired by what is implemented currently in Linux dwc2 driver.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Patrick Delaunay [Thu, 18 Apr 2019 15:18:39 +0000 (17:18 +0200)]
usb: reload watchdog during ums command
Reload the watchdog in the mass storage command ums
to avoid reboot during the usb waiting loop
when the host doesn't send any request.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Eugeniu Rosca [Tue, 9 Apr 2019 19:11:40 +0000 (21:11 +0200)]
fastboot: add support for 'getvar platform'
Our R-Car3 Android userspace relies on the output of 'fastboot
getvar platform' and U-Boot currently is not able to handle it:
host $> fastboot getvar platform
getvar:platform FAILED (remote: Variable not implemented)
finished. total time: 0.001s
We either have the option of adding 'fastboot.platform' variable
to the default/saved environment as a workaround or add proper
'fastboot getvar platform' support in U-Boot via this patch.
In the latter case, other platforms can benefit from it too.
Note that R-Car3 already exports 'platform' environment variable via
v2019.01 commit
00e4b57e9e71c3 ("ARM: rmobile: Set environment variable
containing CPU type").
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Alex Kiernan [Tue, 9 Apr 2019 05:30:05 +0000 (05:30 +0000)]
fastboot: Replace literal 32 with PART_NAME_LEN
Where we have to compute partition names, rather than using a hardcoded
32 for the partition name length, replace with PART_NAME_LEN.
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Eugeniu Rosca <rosca.eugeniu@gmail.com>
Patrick Delaunay [Fri, 29 Mar 2019 14:42:24 +0000 (15:42 +0100)]
stm32mp1: add stusb1600 support for DK1 and DK2 board
The DK1 and DK2 boards use the USB Type-C controller STUSB1600.
This patch updates:
- the device tree to add the I2C node in the DT
- the board stm32mp1 to probe this I2C device and use this controller
to check cable detection.
- the DWC2 driver to support a new dt property
"u-boot,force-b-session-valid" which forces B session and
device mode; it is a workaround because the VBUS sensing and
ID detection isn't available with stusb1600.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Patrick Delaunay [Fri, 29 Mar 2019 14:42:23 +0000 (15:42 +0100)]
stm32mp1: migrate USBOTG device to driver model
Use the DWC2 device driver with DM_USB_GADGET support and
cleanup the USB support in STM32MP1 board.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Fri, 29 Mar 2019 14:42:22 +0000 (15:42 +0100)]
stm32mp1: remove CONFIG_USB_DWC2, HOST support for USBO
Remove the HOST support for STM32MP1 USBO device = OTG DWC2.
The current DWC2 driver have no dynamic detection of device,
So it is dangerous to have start 3V3 when PC is
connected to the micro USB connector.
=> it is preferable to have only DEVICE support
CONFIG_USB_GADGET_DWC2_OTG for OTG port
See DWC3 driver for clean dual role support...
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Fri, 29 Mar 2019 14:42:21 +0000 (15:42 +0100)]
usb: dwc2: add support for STM32MP1
Add compatible "st,stm32mp1-hsotg" and associated driver data to manage
the usb33d-supply and the ST specific register for VBus sensing.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
# Conflicts:
# drivers/usb/gadget/dwc2_udc_otg.c
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Patrice Chotard [Fri, 29 Mar 2019 14:42:20 +0000 (15:42 +0100)]
usb: dwc2_udc_otg: Add tx_fifo_sz array support
All TX fifo size can be different, add tx_fifo_sz_array[]
into dwc2_plat_otg_data to be able to set them.
tx_fifo_sz_array[] is 17 Bytes long and can contains max 16
tx fifo size (synopsys IP supports max 16 IN endpoints).
First entry of tx_fifo_sz_array[] is the number of valid
fifo size the array contains.
In case of tx_fifo_sz_array[] doesn't contains the same
number of element than max hardware endpoint, display
a warning message.
Compatibility with board which doesn't use tx_fifo_sz_array[]
(Rockchip rk322x/rk3128/rv1108/rk3288/rk3036) is kept.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Patrick Delaunay [Fri, 29 Mar 2019 14:42:19 +0000 (15:42 +0100)]
usb: dwc2_udc_otg: Read MAX_HW_ENDPOINT from HWCFG4 register
Some DWC2 ip variant doesn't use 16 hardware endpoint as hardcoded
in the driver. Bits INEps [29:26] of HWCFG4 register allows to get
this information.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Patrick Delaunay [Fri, 29 Mar 2019 14:42:18 +0000 (15:42 +0100)]
usb: dwc2: Add function for session B check
Add a new function to check the session B validity, to be use to check
cable connection.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Patrick Delaunay [Fri, 29 Mar 2019 14:42:17 +0000 (15:42 +0100)]
usb: dwc2: Add force-b-session-valid support
Handle "force-b-session-valid" property from DT.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Patrick Delaunay [Fri, 29 Mar 2019 14:42:16 +0000 (15:42 +0100)]
usb: dwc2: force reset assert before to probe the driver
Reset the hardware to be sure of the device state.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Patrick Delaunay [Fri, 29 Mar 2019 14:42:15 +0000 (15:42 +0100)]
usb: dwc2: convert driver to DM_USB_GADGET
Minimal conversion to driver model by using the uclass
UCLASS_USB_GADGET_GENERIC based on:
- reset uclass
- clock uclass
- generic uclass.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Patrick Delaunay [Fri, 29 Mar 2019 14:42:14 +0000 (15:42 +0100)]
usb: dwc2: remove unused variable regs_otg
Remove the global regs_otg variable.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Patrick Delaunay [Fri, 29 Mar 2019 14:42:13 +0000 (15:42 +0100)]
phy: usbphyc: increase PLL wait timeout
wait 200us to solve USB init issue on device mode
(ums and stm32prog commands)
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Fri, 29 Mar 2019 14:42:12 +0000 (15:42 +0100)]
phy: usbphyc: move vdda1v1 and vdda1v8 in phy_init
vdda1v1 and vdda1v8 are used by the PLL.
Both need to be enabled before starting the PLL.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Fri, 29 Mar 2019 14:42:11 +0000 (15:42 +0100)]
phy: usbphyc: Binding update of vdda supply
Move supply vdda1v1 and vdda1v8 in usbphyc node and
no more in port
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Fri, 29 Mar 2019 14:42:10 +0000 (15:42 +0100)]
phy: usbphyc: update xlate with DT binding
Parameter added for port 1, for example:
&usbh_ehci {
phys = <&usbphyc_port0>;
phy-names = "usb";
vbus-supply = <&vbus_sw>;
status = "okay";
};
&usbotg_hs {
pinctrl-names = "default";
pinctrl-0 = <&usbotg_hs_pins_a>;
phys = <&usbphyc_port1 0>;
phy-names = "usb2-phy";
status = "okay";
};
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Fri, 29 Mar 2019 14:42:09 +0000 (15:42 +0100)]
phy: usbphyc: remove unused variable index
Remove unused field index in struct stm32_usbphyc_phy.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Eugeniu Rosca [Thu, 28 Mar 2019 13:31:33 +0000 (14:31 +0100)]
fastboot: Improve error reporting on 'getvar partition-{size, type}'
Currently U-Boot reports the same error message in all below cases:
[A] host> fastboot getvar partition-type
[B] host> fastboot getvar partition-size
[C] host> fastboot getvar partition-type:
[D] host> fastboot getvar partition-size:
[E] host> fastboot getvar partition-type:<invalid-part>
[F] host> fastboot getvar partition-size:<invalid-part>
The message looks like:
host> fastboot getvar partition-size:
getvar:partition-size: FAILED (remote: partition not found)
Finished. Total time: 0.003s
Be more user friendly and output:
- "partition not given" for [A-D]
- "partition not found" for [E-F]
Fixes:
f73a7df984a9 ("net: fastboot: Merge AOSP UDP fastboot")
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Acked-by: Alex Kiernan <alex.kiernan@gmail.com>
Eugeniu Rosca [Tue, 26 Mar 2019 16:46:14 +0000 (17:46 +0100)]
fastboot: getvar: correct/rename "has_slot" to "has-slot"
Since its inception in upstream fastboot android-n-preview-1 [1],
"has-slot" option has never taken the form of "has_slot". Amongst the
users of "getvar has-slot:" is the upstream bootloadertest.py [2].
Current U-Boot "has_slot" version must be a typo. Fix it.
[1] https://android.googlesource.com/platform/system/core/+/
a797479bd51c
("Fix fastboot variable name")
[2] https://android.googlesource.com/platform/system/extras/+/
72de393e118e3
("Bootloader verification for AndroidThings.")
Fixes:
f73a7df984a9 ("net: fastboot: Merge AOSP UDP fastboot")
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Acked-by: Alex Kiernan <alex.kiernan@gmail.com>
Andy Shevchenko [Mon, 4 Mar 2019 14:04:44 +0000 (16:04 +0200)]
dfu: Avoid declaring unused variables and absent parameters
The compiler is not happy when neither USB nor TFTP transport for DFU defined:
cmd/dfu.c: In function ‘do_dfu’:
cmd/dfu.c:31:8: warning: unused variable ‘devstring’ [-Wunused-variable]
char *devstring = argv[3];
^~~~~~~~~
cmd/dfu.c:30:8: warning: unused variable ‘interface’ [-Wunused-variable]
char *interface = argv[2];
^~~~~~~~~
Surround those variables by #ifdef expression.
More serious, that comes under same circumstances, is a compilation error due
to absence of macro parameter:
In file included from include/image.h:45,
from include/common.h:35,
from cmd/dfu.c:13:
include/command.h:207:24: error: expected expression before ‘,’ token
# define _CMD_HELP(x) x,
^
include/command.h:286:18: note: in expansion of macro ‘_CMD_HELP’
_cmd, _usage, _CMD_HELP(_help) _CMD_COMPLETE(_comp) }
^~~~~~~~~
include/command.h:290:3: note: in expansion of macro ‘U_BOOT_CMD_MKENT_COMPLETE’
U_BOOT_CMD_MKENT_COMPLETE(_name, _maxargs, _rep, _cmd, \
^~~~~~~~~~~~~~~~~~~~~~~~~
include/command.h:332:2: note: in expansion of macro ‘U_BOOT_CMD_COMPLETE’
U_BOOT_CMD_COMPLETE(_name, _maxargs, _rep, _cmd, _usage, _help, NULL)
^~~~~~~~~~~~~~~~~~~
cmd/dfu.c:70:1: note: in expansion of macro ‘U_BOOT_CMD’
U_BOOT_CMD(dfu, CONFIG_SYS_MAXARGS, 1, do_dfu,
^~~~~~~~~~
make[1]: *** [scripts/Makefile.build:279: cmd/dfu.o] Error 1
make: *** [Makefile:1518: cmd] Error 2
Put empty string unconditionally to have macro parameter present.
Fixes:
0f44d33536a5 ("dfu: Fix up the Kconfig mess")
Cc: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
Alex Kiernan [Thu, 18 Apr 2019 11:10:50 +0000 (11:10 +0000)]
usb: Select USB_MUSB_DSPS with USB_MUSB_TI
USB_MUSB_TI requires USB_MUSB_DSPS, failing at link time if it's not
selected:
drivers/usb/musb-new/built-in.o: In function `ti_musb_host_ofdata_to_platdata':
drivers/usb/musb-new/ti-musb.c:193: undefined reference to `musb_dsps_ops'
or if OF_CONTROL is not selected:
arch/arm/mach-omap2/built-in.o:(.data.usb0+0x24): undefined reference to `musb_dsps_ops'
Reviewed-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Tested-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Alex Kiernan [Fri, 12 Apr 2019 10:51:05 +0000 (10:51 +0000)]
configs: Migrate USB_MUSB_DISABLE_BULK_COMBINE_SPLIT to Kconfig
Migrate support for disable MUSB bulk split/combine to Kconfig
Green Travis build:
https://travis-ci.org/akiernan/u-boot/builds/
519101867
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Tom Rini [Thu, 18 Apr 2019 16:12:16 +0000 (12:12 -0400)]
Merge tag 'arc-for-2019.07' of git://git.denx.de/u-boot-arc
In this small series we migrate ARC boards to DM_MMC
so we're hopefully are good now and our boards will be kept
in U-Boot for some more time :)
Eugeniy Paltsev [Thu, 21 Mar 2019 13:37:23 +0000 (16:37 +0300)]
ARC: [plat-axs10x]: migrate to DM_MMC
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Eugeniy Paltsev [Mon, 25 Feb 2019 15:35:29 +0000 (18:35 +0300)]
ARC: [plat-hsdk]: migrate to DM_MMC
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Eugeniy Paltsev [Mon, 25 Feb 2019 15:35:28 +0000 (18:35 +0300)]
ARC: dwmmc: Adding DesignWare MMC driver support for ARC devboards
Add the DM_MMC-compatible DesignWare MMC driver support for Synopsys
ARC devboards. It is created to switch ARC devboards to use DM_MMC.
It required information such as clocks (Bus Interface Unit clock,
Card Interface Unit clock) and SDIO bus width.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Marek Vasut [Wed, 10 Apr 2019 11:44:05 +0000 (13:44 +0200)]
timer: dw-apb: Add missing 64bit up-conversion
The generic timer count is an incrementing 64bit value and a timer driver
must return an incrementing 64bit value. The DW APB timer only provides a
32bit timer counting down, thus the result must be inverted and converted
to a 64bit value. The current implementation is however missing the 64bit
up-conversion and this results in random timer roll-overs, which in turn
triggers random timeouts throughout the codebase.
This patch adds the missing 64bit up-conversion to fix the issue.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
Ley Foon Tan [Wed, 3 Apr 2019 05:45:02 +0000 (13:45 +0800)]
arm: dts: Stratix10: Add QSPI node
Merge qspi dts node from Linux.
Commit
0cb140d07fc75fb (arm64: dts: stratix10: Add QSPI support for Stratix10)
Add -u-boot.dtsi files for non Linux dts properties and
update properties for Uboot.
- add u-boot,dm-pre-reloc
- add alias for spi0
- change compatible for flash
- support quad read and quad write
- change maximum frequency to 100MHz
Tested on Stratix 10 SoC devkit.
SOCFPGA_STRATIX10 # sf probe 0:0
SF: Detected mt25qu02g with page size 256 Bytes, erase size 64 KiB, total 256 MiB
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Ley Foon Tan [Thu, 21 Mar 2019 17:24:05 +0000 (01:24 +0800)]
ddr: altera: Stratix10: Add ECC memory scrubbing
Scrub memory content if ECC is enabled and it is not
from warm reset boot.
Enable icache and dcache before scrub memory
and use "DC ZVA" instruction to clear memory
to zeros. This instruction writes a cache line
at a time and it can prevent false ECC error
trigger if write cache line partially.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Ley Foon Tan [Thu, 21 Mar 2019 17:24:04 +0000 (01:24 +0800)]
arm: socfpga: stratix10: Add cpu_has_been_warmreset()
Add helper function cpu_has_been_warmreset() to check
if CPU is from warm reset boot.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Ley Foon Tan [Thu, 21 Mar 2019 17:24:03 +0000 (01:24 +0800)]
arm: dts: Stratix10: Modify stratix10 socdk memory node
The stratix10 socdk ships with 4GB of memory. Modify the
device tree to represent this. Note that to access 4GB of
memory in Stratix 10, due to the IO space from 2GB to 4GB,
we use the fact that the DDR controller ignores upper address
bits outside of the configured DRAM's size. This means that
, the 4GB DRAM is mapped to memory every 4GB.
For an 8GB memory, you can either live with the 2GB IO space,
and loose access to that memory from the processor, or use
the same trick:
Loose 2GB of memory:
memory {
device_type = "memory";
/* 8GB */
/* first 2GB */
reg = <0 0x00000000 0 0x80000000>,
/* last 4GB */
<1 0x00000000 1 0x00000000>;
u-boot,dm-pre-reloc;
};
or to map it all:
memory {
device_type = "memory";
/* 8GB */
/* first 2GB */
reg = <0 0x00000000 0 0x80000000>,
/* next 6GB */
<2 0x80000000 1 0x80000000>;
u-boot,dm-pre-reloc;
};
Signed-off-by: Dalon Westergreen <dalon.westergreen@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Ley Foon Tan [Thu, 21 Mar 2019 17:24:02 +0000 (01:24 +0800)]
configs: stratix10: Change CONFIG_NR_DRAM_BANKS to 2
Stratix10 maps dram in 2 address spans, from 0-2GB and from
2GB up to 128GB.
Signed-off-by: Dalon Westergreen <dalon.westergreen@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Ley Foon Tan [Thu, 21 Mar 2019 17:24:01 +0000 (01:24 +0800)]
ddr: altera: Stratix10: Add multi-banks DRAM size check
Stratix 10 maps dram from 0 to 128GB. There is a 2GB hole
in the memory for peripherals and other IO from 2GB to 4GB.
However the dram controller ignores upper address bits for
smaller dram configurations. Example: a 4GB dram
maps to multiple locations, every 4GB on the address.
Signed-off-by: Dalon Westergreen <dalon.westergreen@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Ley Foon Tan [Thu, 21 Mar 2019 17:24:00 +0000 (01:24 +0800)]
ddr: altera: stratix10: Move SDRAM size check to SDRAM driver
Move SDRAM size check to SDRAM driver. sdram_calculate_size()
is called in SDRAM initialization already, avoid calling
twice in size check function.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Simon Goldschmidt [Fri, 1 Mar 2019 19:12:36 +0000 (20:12 +0100)]
arm: socfpga: implement proper peripheral reset
This commit removes ad-hoc reset handling for peripheral resets from SPL
for socfpga gen5.
This is done because as U-Boot drivers support reset handling by now.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Simon Goldschmidt [Fri, 1 Mar 2019 19:12:35 +0000 (20:12 +0100)]
spi: cadence_qspi: add reset handling
This adds reset handling to the cadence qspi driver.
For backwards compatibility, only a warning is printed when failing to
get reset handles.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Simon Goldschmidt [Fri, 1 Mar 2019 19:12:34 +0000 (20:12 +0100)]
mtd: rawnand: denali: add reset handling
This adds reset handling to the devicetree-enabled Denali NAND driver.
For backwards compatibility, only a warning is printed when failing to
get reset handles.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Simon Goldschmidt [Tue, 16 Apr 2019 20:04:39 +0000 (22:04 +0200)]
arm: socfpga: move gen5 SDR driver to DM
To clean up reset handling for socfpga gen5, port the DDR driver to DM
using UCLASS_RAM and implement proper reset handling.
This gets us rid of one ad-hoc call to socfpga_per_reset().
The gen5 driver is implemented in 2 distinct files. One of it (containing
the calibration training) is not touched much and is kept at using
hard coded addresses since the code grows even more otherwise.
SPL is changed from calling hard into the DDR driver code to just
probing UCLASS_RESET and UCLASS_RAM. It is happy after finding a RAM
driver after that.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Simon Goldschmidt [Fri, 1 Mar 2019 19:12:32 +0000 (20:12 +0100)]
reset: socfpga: add reset handling for old kernels
This adds code to take peripherals out of reset based on an environment
variable. This is in preparation for removing the code that does this from
SPL.
However, some drivers even in current Linux cannot handle peripheral reset,
so until this works, we need a compatibility workaround.
This workaround is implemented in the 'assert' and 'remove' callbacks of
this reset driver: the 'assert' callback does not disable peripherals that
were already taken out of reset, while the 'remove' callback, which is
called on OS_PREPARE, deasserts all peripheral resets if the environment
variable "socfpga_legacy_reset_compat" is set to 1, which is what the gen5
SPL did up to now.
This is in preparation to clean up the SPL and implementing proper reset
handling for U-Boot.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Simon Goldschmidt [Fri, 1 Mar 2019 19:12:31 +0000 (20:12 +0100)]
arm: socfpga: gen5: deassert peripheral reset by default
To keep the current behaviour of taking all peripherals out of reset
before booting the OS before removing that code from socfpga gen5 SPL,
this enables the new behaviour by default for all gen5 boards by adding
the environment variable "socfpga_legacy_reset_compat=1" to the default
environment.
This can be overridden in board config files or by saving an environment
without this variable enabled.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Simon Goldschmidt [Fri, 1 Mar 2019 19:12:30 +0000 (20:12 +0100)]
reset: socfpga: rename membase ptr to modrst_base
The only member of this driver's priv struct is a pointer, which is
called 'membase'. However, since this driver handles multiple sub-
architectures, this is not the base address from dts but the base
address of some common registers of those sub-arches.
Reflect this better in sourcecode by renaming 'membase' to 'modrst_base'.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Simon Goldschmidt [Fri, 1 Mar 2019 19:12:29 +0000 (20:12 +0100)]
arm: socfpga: gen5: add reset & sdr node to SPL devicetrees
The SPL for socfpga gen5 currently takes all peripherals out of reset
unconditionally. To implement proper reset handling for peripherals,
the reset node has to be provided with the SPL dts.
In preparation to move the DDR driver to DM, the sdr node is required
in SPL, too.
This patch adds "u-boot,dm-pre-reloc" to U-Boot specific dtsi addon
files so that the reset manager and SDR driver correctly probe in SPL.
It centralizes these settings into a common file since in contrast to
boot-type specific nodes, "soc", "rst" and "sdr" are always needed.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Simon Goldschmidt [Fri, 1 Mar 2019 19:12:28 +0000 (20:12 +0100)]
arm: socfpga: gen5: sync devicetrees to Linux
This is again a sync to linux-next + pending patches in Dinh's tree at
commit
1c909b2dfe6a ("ARM: dts: socfpga: update more missing reset
properties")'
It adds missing peripheral reset properties to socfpga.dtsi and removes
U-Boot specific leftovers from socfpga_cyclone5_socrates.dts.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tom Rini [Wed, 17 Apr 2019 13:21:32 +0000 (09:21 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-spi
- drop non-DM code from ti_qspi
- support spi-mem for ti_qspi
Uri Mashiach [Sun, 14 Apr 2019 09:17:53 +0000 (12:17 +0300)]
arm: am57xx: cl-som-am57x: remove board support
U-Boot support for the CL-SOM-AM57x module is no longer required.
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Tom Rini [Wed, 17 Apr 2019 13:19:45 +0000 (09:19 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-sunxi
- Convert DM_MMC and DM_SCSI
- A20, R40, H6 Linux dts(i) sync
- CLK, RESET support for sunxi, sun8_emac net drivers
Tom Rini [Wed, 17 Apr 2019 13:19:13 +0000 (09:19 -0400)]
Merge tag 'xilinx-for-v2019.07' of git://git.denx.de/u-boot-microblaze
Xilinx/FPGA changes for v2019.07
fpga:
- Add support for external data in FIT
- Extend testing for external data case
- Inform user about a need to run post config on Zynq
arm:
- Tune zynq command functions
- Fix internal variable setting
arm64:
- Add support for zc39dr decoding
- Disable WDT for zcu100
- Small changes in reset_reason()
- Some DT changes (spi)
- Tune qspi-mini configuration
- Remove useless eeprom setting
- Fix two sdhci boot case
spi:
- Fix tap delay programming
clk:
- Enable i2c in SPL
net:
- Fix gem phydev handling
- Remove phy detection code from gem driver
general:
- Correct EXT_DTB usage for MULTI_DTB_FIT configuration
Tom Rini [Wed, 17 Apr 2019 13:16:38 +0000 (09:16 -0400)]
Merge tag 'uniphier-v2019.07' of git://git.denx.de/u-boot-uniphier
UniPhier SoC updates for v2019.07
- Sync DT with Linux 5.1-rc4
- Enable CONFIG_SUPPORT_EMMC_RPMB for uniphier_v8_defconfig
Vignesh Raghavendra [Tue, 16 Apr 2019 16:02:00 +0000 (21:32 +0530)]
spi: ti_qspi: Convert to spi-mem ops
Convert driver to use spi-mem ops in order to support accelerated MMIO
flash interface in generic way and for better performance.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Vignesh Raghavendra [Tue, 16 Apr 2019 16:01:59 +0000 (21:31 +0530)]
spi: ti_qspi: Drop non DM code
Now that all boards using TI QSPI have moved to DM and DT, drop non DM
code completely.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
[jagan: update MIGRATION.txt, rebase config_whitelist.txt]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Andre Przywara [Fri, 12 Apr 2019 10:58:54 +0000 (16:28 +0530)]
sunxi: update SATA driver to always use DM_SCSI
It seems like the Allwinner SATA driver is already quite capable of
using the driver model, so we can force this on all boards and can
remove support for a non-DM_SCSI build.
This removes the warning about boards with SATA ports not being
DM_SCSI compliant.
It also takes the opportunity to move the driver out of the board/sunxi
directory to join its siblings in drivers/ata, and to make it a proper
Kconfig citizen.
The board defconfigs stay untouched.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
[jagan: select DM_SCSI separately]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Fri, 12 Apr 2019 11:18:25 +0000 (16:48 +0530)]
arm: sunxi: Enable DM_MMC and DM_SCSI
- Enable DM_MMC if MMC defined
- Enable DM_SCSI if SCSI defined
globally through Allwinner platform, the effected SoC families
and boards will make use of MMC and SCSI subsystems in driver-model.
Tested DM_MMC in one board from A64, H6, H5, H3, R40, A83T, A20, A10
SoCs.
Tested-by: Pablo Sebastián Greco <pgreco@centosproject.org> # BPI-M2-Ultra
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Mon, 15 Apr 2019 06:12:32 +0000 (11:42 +0530)]
ARM: dts: sun8i-r40-bananapi-m2-berry: Enable AHCI
Enable ahci node for BPI-M2-Berry, this would require since
we have DM_SCSI enabled on the respective SoC.
Unable to sync the same node from Linux, since the similar change
is still in Linux ML.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Fri, 12 Apr 2019 12:11:58 +0000 (17:41 +0530)]
ARM: dts: a20-wits-pro-a20-dkt: Enable AHCI
Enable ahci node for a20-wits-pro-a20-dkt, this would require since
we have DM_SCSI enabled on the respective SoC.
Right now, ahci enabled in -u-boot.dtsi and will remove once same
supported by Linux.
Cc: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Fri, 12 Apr 2019 12:05:24 +0000 (17:35 +0530)]
ARM: dts: a20-m5: Enable AHCI
Enable ahci node for sun7i-a20-m5.dts, this would require since
we have DM_SCSI enabled on the respective SoC.
No need to send patch to Linux for this change, since this
dts is U-Boot specific.
Cc: Ian Campbell <ijc@hellion.org.uk>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Fri, 12 Apr 2019 11:17:56 +0000 (16:47 +0530)]
board: sunxi: Add R40 sata compatible
Add sata compatible for R40.
Cc: Pablo Sebastián Greco <pgreco@centosproject.org>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Fri, 12 Apr 2019 10:49:34 +0000 (16:19 +0530)]
arm: allwinner: dts: a20: Sync A20 dts(i) files from Linux 5.1-rc2
Sync sun7i-a20 dts(i) files from Linux 5.1-rc2
Linux commit details about the sun7i-a20* sync:
"ARM: dts: sun7i: bananapi: Add GPIO banks regulators"
(sha1:
09c6572290f018d73ec2e812e28bada34d41815f)
Here are U-Boot specific dts changes.
- s/uart0_pins_a/uart0_pb_pins for
sun7i-a20-ainol-aw1.dts
sun7i-a20-m5.dts
sun7i-a20-primo73.dts
sun7i-a20-yones-toptech-bd1078.dts
sunxi-itead-core-common.dtsi
- s/gmac_pins_mii_a/gmac_rgmii_pins for
sun7i-a20-m5.dts
- drop i2c0, i2c1 pins from
sunxi-itead-core-common.dtsi
- drop mmc0 pins from
sun7i-a20-primo73.dts
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Tue, 9 Apr 2019 09:38:51 +0000 (15:08 +0530)]
arm: allwinner: r40: Sync R40 dts(i) files from Linux 5.1-rc2
Sync sun8i-r40 dts(i) files from Linux 5.1-rc2
Linux commit details about the sun8i-r40* sync:
"ARM: dts: sun8i: r40: bananapi-m2-ultra: Add Bluetooth device node"
(sha1:
1e5f1db4ccd8348a21da55bff82f4263000879ef)
Linux commit details about the sun8i-v40* sync:
"ARM: dts: sunxi: Fix I2C bus warnings"
(sha1:
0729b4af5753b65aa031f58c435da53dbbf56d19)
Cc: Pablo Sebastián Greco <pgreco@centosproject.org>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Masahiro Yamada [Fri, 12 Apr 2019 09:55:51 +0000 (18:55 +0900)]
ARM: uniphier_v8: enable CONFIG_SUPPORT_EMMC_RPMB
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 12 Apr 2019 09:55:50 +0000 (18:55 +0900)]
ARM: dts: uniphier: sync with Linux 5.1-rc4
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Jagan Teki [Wed, 27 Feb 2019 18:57:01 +0000 (00:27 +0530)]
board: sunxi: gmac: Remove Ethernet clock and reset
Since Ethernet clock and reset is now handling via
CLK and RESET frameworks via driver API's remove
explicit ccm writes.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Wed, 27 Feb 2019 18:56:58 +0000 (00:26 +0530)]
net: sun8i_emac: Add CLK and RESET support
Add CLK and RESET support for sun8i_emac driver to
enable TX clock and reset pins via CLK and RESET
framework.
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Lothar Felten <lothar.felten@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Jagan Teki [Wed, 27 Feb 2019 18:56:51 +0000 (00:26 +0530)]
net: sun8i_emac: Retrieve GMAC clock via 'syscon' phandle
Unlike other Allwinner SoC's R40 GMAC clock control register
is locate in CCU, but rest located via syscon itself. Since
the phandle property for current code look for 'syscon' and
it will grab the respective ccu or syscon base address based
on DT property defined in respective SoC dtsi.
So, use the existing 'syscon' code even for R40 for retrieving
GMAC clock via CCU and update the register directly in
sun8i_emac_set_syscon instead of writing it separately using
ccm base.
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Lothar Felten <lothar.felten@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Wed, 27 Feb 2019 18:56:50 +0000 (00:26 +0530)]
net: sunxi_emac: Add CLK support
Add CLk support for sunxi_emac to enable AHB_EMAC clock
via CLK framework.
Cc: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Jagan Teki [Mon, 15 Apr 2019 11:12:16 +0000 (16:42 +0530)]
clk: sunxi: r40: Fix GMAC reset reg offset
GMAC reset reg offset added by below commit seems to assume
it as EMAC but R40 indeed using GMAC.
"clk: sunxi: Implement EMAC, GMAC clocks, resets"
(sha1:
68620c9698f109c1f001f80d282138a5c67cabef)
So, fix by updating the reg offset for RST_BUS_GMAC.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Luca Ceresoli [Mon, 15 Apr 2019 14:18:18 +0000 (16:18 +0200)]
arm64: zynqmp: fix preprocessor check for SPL_ZYNQMP_TWO_SDHCI
A missing CONFIG_ prefix while checking for this Kconfig variable makes the
check always fail. Fix it. While there also switch from the '#if defined'
form to the '#ifdef' form as the other checks in this function.
Fixes:
35e2b92344b1 ("arm64: zynqmp: Fix logic around CONFIG_ZYNQ_SDHCI")
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 25 Feb 2019 09:01:22 +0000 (10:01 +0100)]
arm64: zynqmp: Remove eeprom setting
By moving to DM_I2C there is no need to specify any eeprom configuration
because it is read from DT.
Reported-by: Sreeja Vadakattu <sreeja.vadakattu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 29 Mar 2019 08:25:09 +0000 (09:25 +0100)]
net: gem: Remove phy autodetection code
There is no reason to detect phy when core is doing it for us.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu [Wed, 27 Mar 2019 12:09:59 +0000 (17:39 +0530)]
net: zynq_gem: Modify phy supported features after max-speed was set
The phydev supported features were reset in phy_set_supported() so,
move the setting of driver supported features after this so that it
wont lost in phy_set_supported().
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Sat, 23 Mar 2019 05:43:00 +0000 (11:13 +0530)]
Makefile: Prioritize external dtb if defined
Prioritize external dtb if its passed via EXT_DTB
than the dtb that was built in the tree. With this
patch it appends the specified external dtb to
the u-boot image.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Siva Durga Prasad Paladugu [Sat, 23 Mar 2019 10:31:36 +0000 (16:01 +0530)]
arm: zynq: Add an info message about post config
Post configuration cant be run at u-boot as u-boot
didn't has any info about the design.So,this patch
adds an info message that post config was not run
and needs to be run manually if needed.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu [Sat, 23 Mar 2019 09:30:06 +0000 (15:00 +0530)]
arm64: zynqmp: Add idcode for new RFSoC silicon ZU39DR
This patch adds "zu39dr" to the list of zynqmp devices
The zu39DR is the new RFSoC silicon with id value of 0x66.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Melin Tomas [Wed, 10 Apr 2019 07:26:07 +0000 (07:26 +0000)]
ARM: zynq: fix environment command syntax
Update EXTRA_ENV_SETTINGS and related commands to use 'setenv'
instead of short name 'set' in commands.
E.g. in case command setexpr is enabled the short form does not work
properly as the name becomes ambigous.
Fixes error messages like:
U-Boot> set
Unknown command 'set' - try 'help'
Signed-off-by: Tomas Melin <tomas.melin@vaisala.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Hannes Schmelzer [Thu, 14 Feb 2019 07:54:42 +0000 (08:54 +0100)]
ARM: zynq: Add missing i2c get_rate for fixing i2c SPL
The commit '
f48ef0d81aa837a33020f8d61abb3929ba613774' did break I2C
support because requesting the clock for the I2C ip-block isn't
supported during SPL.
To fixup this we add support requesting clocks for:
- i2c0
- i2c1
Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu [Tue, 19 Mar 2019 06:20:52 +0000 (11:50 +0530)]
arm64: xilinx: zynqmp: Remove unneeded configs
Remove unneeded configs from mini qspi configuration
so that it saves space for this mini configuration.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu [Tue, 19 Mar 2019 06:20:50 +0000 (11:50 +0530)]
arm64: zynqmp: Define label for flash node
Define a label for flash node so that it can be
referenced easily as required.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu [Tue, 19 Mar 2019 06:20:49 +0000 (11:50 +0530)]
arm64: zynqmp: Add spi-flash compatible string to flash node
spi-flash compatible string is needed for reading tx and rx bus
widths, hence add this compatible string to flash node.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 21 Feb 2019 09:42:40 +0000 (10:42 +0100)]
arm64: zynqmp: Add debug message about clearing BSS
Just have better view on system.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
T Karthik Reddy [Tue, 12 Mar 2019 14:50:21 +0000 (20:20 +0530)]
ARM: zynq: Check zynq aes & rsa command parameters count
This patch checks for zynq aes & rsa commands max parameters count. Also
checks minimum number of parameters count for aes command.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
T Karthik Reddy [Wed, 13 Mar 2019 14:54:18 +0000 (20:24 +0530)]
arm64: zynqmp: Use zynqmp_mmio_read/write functions
Changed the return type of reset_reason() to int from u32, because
zynqmp_mmio_read/write() returns signed value on error.
Replaced readl and writel functions with zynqmp_mmio_read &
zynqmp_mmio_write functions to access RESET_REASON(CRL_APB) registers.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu [Thu, 7 Mar 2019 10:38:48 +0000 (16:08 +0530)]
spi: zynqmp_gqspi: Fix tap delay values at 100MHz and 150MHz
This patch fixes the tap delay values to be set at 100MHz and 150MHz
as per TRM by fixing the if condition to use <= instead of <.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 14 Feb 2019 13:22:48 +0000 (14:22 +0100)]
arm64: zynqmp: Disable WDT for zcu100
Do not enable WDT by default on this target because distributions are
not enabling watchdog driver to service it.
Feature has been enabled by:
"arm64: zynqmp: Enable cadence WDT for zcu100"
(sha1:
767afebbcda59f3ccb04f6c94de8cab2fb7905b6)
And WDT is still enabled in rebranded Avnet Ultra 96 board support.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 18 Feb 2019 12:22:56 +0000 (13:22 +0100)]
test: py: Extend fpga test with fit image with external data
Images are created
mkimage -f fit.its -E download-fit-external.ub
and test expects these entries.
env__fpga_under_test = {
...
"mkimage_fit_external": download-fit-external.ub",
"mkimage_fit_external_size": xxxxx,
...
}
Test download file and loads it to fpga.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tien Fong Chee [Fri, 15 Feb 2019 07:57:07 +0000 (15:57 +0800)]
fpga: Replace char * with const char * for filename
Ensure the string for filename is always constant, otherwise it can be
corrupted by the writing.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Tien Fong Chee [Tue, 12 Feb 2019 12:41:34 +0000 (20:41 +0800)]
fpga: Add support for getting external data address and length
This function supports getting both data address and length for
existing FPGA subimage and FPGA external data.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>