oweals/u-boot.git
15 years agoppc: Remove board.c relocation fixups
Peter Tyser [Mon, 21 Sep 2009 16:20:27 +0000 (11:20 -0500)]
ppc: Remove board.c relocation fixups

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
15 years agoppc: Check for compilers that don't support relocation
Peter Tyser [Mon, 21 Sep 2009 16:20:26 +0000 (11:20 -0500)]
ppc: Check for compilers that don't support relocation

Certain ppc compilers are known not to generate the .fixup section
properly.  The .fixup section is necessary to create a relocatable
U-Boot image.  A basic check for the existence of the .fixup section
should hopefully catch the majority of broken compilers which don't
support relocation.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
15 years agoppc: Enable full relocation to RAM
Peter Tyser [Mon, 21 Sep 2009 16:20:25 +0000 (11:20 -0500)]
ppc: Enable full relocation to RAM

The following changes allow U-Boot to fully relocate from flash to
RAM:
 - Remove linker scripts' .fixup sections from the .text section
 - Add -mrelocatable to PLATFORM_RELFLAGS for all boards
 - Define CONFIG_RELOC_FIXUP_WORKS for all boards

Previously, U-Boot would partially relocate, but statically initialized
pointers needed to be manually relocated.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
15 years agoMerge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Wolfgang Denk [Wed, 30 Sep 2009 21:39:36 +0000 (23:39 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

15 years agoMerge branch 'master' of git://git.denx.de/u-boot-nand-flash
Wolfgang Denk [Wed, 30 Sep 2009 21:34:36 +0000 (23:34 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-nand-flash

15 years agoMerge branch 'master' of git://git.denx.de/u-boot-ubi
Wolfgang Denk [Wed, 30 Sep 2009 21:28:18 +0000 (23:28 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-ubi

15 years agoMerge branch 'master' of git://git.denx.de/u-boot-ppc4xx
Wolfgang Denk [Wed, 30 Sep 2009 21:26:59 +0000 (23:26 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx

15 years agoMerge branch 'master' of git://git.denx.de/u-boot-i2c
Wolfgang Denk [Wed, 30 Sep 2009 21:24:10 +0000 (23:24 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-i2c

15 years agoMerge branch 'master' of git://git.denx.de/u-boot-mpc83xx
Wolfgang Denk [Wed, 30 Sep 2009 21:22:46 +0000 (23:22 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx

15 years agoMerge branch 'master' of git://git.denx.de/u-boot-fdt
Wolfgang Denk [Wed, 30 Sep 2009 21:16:49 +0000 (23:16 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-fdt

15 years agoppc/85xx: get_law_entry isn't used in CONFIG_NAND_SPL
Kumar Gala [Wed, 30 Sep 2009 13:39:44 +0000 (08:39 -0500)]
ppc/85xx: get_law_entry isn't used in CONFIG_NAND_SPL

Don't include get_law_entry as part of the NAND_SPL build since the
code isnt used.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 years agoAdd README.mpc8536ds
Mingkai Hu [Wed, 23 Sep 2009 07:20:39 +0000 (15:20 +0800)]
Add README.mpc8536ds

Add boot from NAND/eSDHC/eSPI description

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 years agoOn-chip ROM boot: MPC8536DS support
Mingkai Hu [Wed, 23 Sep 2009 07:20:38 +0000 (15:20 +0800)]
On-chip ROM boot: MPC8536DS support

The MPC8536E is capable of booting from the on-chip ROM - boot from
eSDHC and boot from eSPI. When power on, the porcessor excutes the
ROM code to initialize the eSPI/eSDHC controller, and loads the mian
U-Boot image from the memory device that interfaced to the controller,
such as the SDCard or SPI EEPROM, to the target memory, e.g. SDRAM or
L2SRAM, then boot from it.

The memory device should contain a specific data structure with control
word and config word at the fixed address. The config word direct the
process how to config the memory device, and the control word direct
the processor where to find the image on the memory device, or where
copy the main image to. The user can use any method to store the data
structure to the memory device, only if store it on the assigned address.

The on-chip ROM code will map the whole 4GB address space by setting
entry0 in the TLB1, so the main image need to switch to Address space 1
to disable this mapping and map the address space again.

This patch implements loading the mian U-Boot image into L2SRAM, so
the image can configure the system memory by using SPD EEPROM.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 years agoNAND boot: MPC8536DS support
Mingkai Hu [Wed, 23 Sep 2009 07:20:37 +0000 (15:20 +0800)]
NAND boot: MPC8536DS support

MPC8536E can support booting from NAND flash which uses the
image u-boot-nand.bin. This image contains two parts: a 4K
NAND loader and a main U-Boot image. The former is appended
to the latter to produce u-boot-nand.bin. The 4K NAND loader
includes the corresponding nand_spl directory, along with the
code twisted by CONFIG_NAND_SPL. The main U-Boot image just
like a general U-Boot image except the parts that included by
CONFIG_SYS_RAMBOOT.

When power on, eLBC will automatically load from bank 0 the
4K NAND loader into the FCM buffer RAM where CPU can execute
the boot code directly. In the first stage, the NAND loader
copies itself to RAM or L2SRAM to free up the FCM buffer RAM,
then loads the main image from NAND flash to RAM or L2SRAM
and boot from it.

This patch implements the NAND loader to load the main image
into L2SRAM, so the main image can configure the RAM by using
SPD EEPROM. In the first stage, the NAND loader copies itself
to the second to last 4K address space, and uses the last 4K
address space as the initial RAM for stack.

Obviously, the size of L2SRAM shouldn't be less than the size
of the image used. If so, the workaround is to generate another
image that includes the code to configure the RAM by SPD and
load it to L2SRAM first, then relocate the main image to RAM
to boot up.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 years agompc8536: fix board config file line length
Mingkai Hu [Wed, 23 Sep 2009 07:19:32 +0000 (15:19 +0800)]
mpc8536: fix board config file line length

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 years agosbc8548: reclaim wasted sector in boot flash
Paul Gortmaker [Fri, 25 Sep 2009 15:14:11 +0000 (11:14 -0400)]
sbc8548: reclaim wasted sector in boot flash

By nature of being based off the MPC8548CDS board, this
board inherited an ENV_SIZE setting of 256k.  But since
it has a smaller flash device (8MB soldered on), it has
a native sector size of 128k, and hence the ENV_SIZE was
causing 2 sectors to be used for the environment.

By removing the unused sector, we can push TEXT_BASE up
closer to the end of address space and reclaim that
sector for any other application.  This also fixes the
mismatch between TEXT_BASE and MONITOR_LEN reported by
Kumar earlier.

Since this board also supports the ability to boot off
the 64MB SODIMM flash, this change is forward looking
with that in mind; i.e. the settings for MONITOR_LEN
and ENV_SIZE will work when the 512k sectors of the
SODIMM flash are used for alternate boot in the future.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 years agoppc/85xx: Clean up immap_85xx.h
Kumar Gala [Tue, 29 Sep 2009 02:38:00 +0000 (21:38 -0500)]
ppc/85xx: Clean up immap_85xx.h

* Converted all white space to tabs
* Converted all types to u8/u16/u32
* Reduce lines to fit in 80 columns
* Renamed MPC85xx_{Q,B}MAN -> FSL_CORENET_{Q,B}MAN

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 years agoNAND: davinci: Fix warnings when 4-bit ECC not used
Scott Wood [Mon, 28 Sep 2009 21:33:18 +0000 (16:33 -0500)]
NAND: davinci: Fix warnings when 4-bit ECC not used

I accidentally left v2 of "NAND: DaVinci:Adding 4 BIT ECC support"
applied when I pushed the tree last merge window, and missed these fixes
which were in v3 of that patch.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
15 years agoRefactor OneNAND IPL code
Kyungmin Park [Tue, 22 Sep 2009 00:05:00 +0000 (09:05 +0900)]
Refactor OneNAND IPL code

Refactoring the OneNAND IPL code

and some minor fixed:
- Remove unnecessary header file
- Fix wrong access at read interrupt
- The recent OneNAND has 4KiB pagesize

Also Board can override OneNAND IPL image

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
15 years agoMIPS: VCT: Remove read_spareram reference
Shinya Kuribayashi [Sat, 12 Sep 2009 09:01:40 +0000 (18:01 +0900)]
MIPS: VCT: Remove read_spareram reference

The commit ecad289fc6bd9d89ef4d5093cc7b6fd712fd0d29 (OneNAND: Remove
unused read_spareram and add unlock_all as kernel does) forgot to remove
a local reference to read_spareram in board/micronas/vct/ebi_onenand.c,
which causes the following build failure when configured with OneNAND:

ebi_onenand.c: In function 'onenand_board_init':
ebi_onenand.c:196: error: 'struct onenand_chip' has no member named 'read_spareram'
make[1]: *** [ebi_onenand.o] Error 1
make[1]: *** Waiting for unfinished jobs....
make: *** [board/micronas/vct/libvct.a] Error 2

Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
Acked-by: Stefan Roese <sr@denx.de>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
15 years agoubifs: Correct dereferencing of files-after-symlinks
Simon Kagstrom [Fri, 25 Sep 2009 12:05:57 +0000 (14:05 +0200)]
ubifs: Correct dereferencing of files-after-symlinks

Files in directories which are symlinked to were not dereferenced
correctly in last commit. E.g., with a symlink

   /boot/lnk -> /boot/real_dir

loading

   /boot/lnk/uImage

will fail. This patch fixes that by simply seeing to it that the target
base directory has a slash after it.

Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Signed-off-by: Stefan Roese <sr@denx.de>
15 years agoppc4xx: Remove mtsdram0() marcos and use common mtsdram() instead
Stefan Roese [Thu, 24 Sep 2009 12:10:30 +0000 (14:10 +0200)]
ppc4xx: Remove mtsdram0() marcos and use common mtsdram() instead

Additionally some whitespace coding style fixes.

Signed-off-by: Stefan Roese <sr@denx.de>
15 years agoppc4xx: Convert PPC4xx SDRAM defines from lower case to upper case
Stefan Roese [Thu, 24 Sep 2009 11:59:57 +0000 (13:59 +0200)]
ppc4xx: Convert PPC4xx SDRAM defines from lower case to upper case

The latest PPC4xx register cleanup patch missed some SDRAM defines.
This patch now changes lower case UIC defines to upper case. Also
some names are changed to match the naming in the IBM/AMCC users
manuals (e.g. mem_mcopt1 -> SDRAM0_CFG).

Signed-off-by: Stefan Roese <sr@denx.de>
15 years agoppc4xx: Convert PPC4xx UIC defines from lower case to upper case
Stefan Roese [Thu, 24 Sep 2009 07:55:50 +0000 (09:55 +0200)]
ppc4xx: Convert PPC4xx UIC defines from lower case to upper case

The latest PPC4xx register cleanup patch missed the UIC defines.
This patch now changes lower case UIC defines to upper case.

Signed-off-by: Stefan Roese <sr@denx.de>
15 years agofsl_i2c: Do not generate STOP after read.
Joakim Tjernlund [Tue, 22 Sep 2009 11:40:44 +0000 (13:40 +0200)]
fsl_i2c: Do not generate STOP after read.

__i2c_read always ends with a STOP condition thereby releasing
the bus. It is cleaner to do the STOP magic in i2c_read(), like
i2c_write() does. This may also help future multimaster systems which
wants to hold on to the bus until all transactions are finished.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
15 years agofsl_i2c: Impl. AN2919, rev 5 to calculate FDR/DFSR
Joakim Tjernlund [Thu, 17 Sep 2009 09:07:17 +0000 (11:07 +0200)]
fsl_i2c: Impl. AN2919, rev 5 to calculate FDR/DFSR

The latest AN2919 has changed the way FDR/DFSR should be calculated.
Update the driver according to spec. However, Condition 2
is not accounted for as it is not clear how to do so.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Acked-by: Wolfgang Grandegger <wg@grandegger.com>
15 years agofsl_i2c: Add CONFIG_FSL_I2C_CUSTOM_{DFSR/FDR}
Joakim Tjernlund [Thu, 17 Sep 2009 09:07:16 +0000 (11:07 +0200)]
fsl_i2c: Add CONFIG_FSL_I2C_CUSTOM_{DFSR/FDR}

Some boards need a higher DFSR value than the spec currently
recommends so give these boards the means to define there own.

For completeness, add CONFIG_FSL_I2C_CUSTOM_FDR too.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
15 years agofsl_i2c: Wait for STOP condition to propagate
Joakim Tjernlund [Thu, 17 Sep 2009 09:07:15 +0000 (11:07 +0200)]
fsl_i2c: Wait for STOP condition to propagate

After issuing a STOP one must wait until the STOP has completed
on the bus before doing something new to the controller.

Also add an extra read of SR as the manual mentions doing that
is a good idea.

Remove surplus write of CR just before a write, isn't required and
could potentially disturb the I2C bus.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
15 years agompc83xx: retain POR values of non-configured ACR, SPCR, SCCR, and LCRR bitfields
Kim Phillips [Fri, 25 Sep 2009 23:19:44 +0000 (18:19 -0500)]
mpc83xx: retain POR values of non-configured ACR, SPCR, SCCR, and LCRR bitfields

some LCRR bits are not documented throughout the 83xx family RMs.
New board porters copying similar board configurations might omit
setting e.g., DBYP since it was not documented in their SoC's RM.

Prevent them bricking their board by retaining power on reset values
in bit fields that the board porter doesn't explicitly configure
via CONFIG_SYS_<registername>_<bitfield> assignments in the board
config file.

also move LCRR assignment to cpu_init_r[am] to help ensure no
transactions are being executed via the local bus while CLKDIV is being
modified.

also start to use i/o accessors.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
15 years agosbc8349: tidy up Makefile to use new configuration script.
Paul Gortmaker [Mon, 21 Sep 2009 21:44:51 +0000 (17:44 -0400)]
sbc8349: tidy up Makefile to use new configuration script.

Commit 804d83a5 allows us to move all the configuration
variation tweaks out of the top level Makefile and down
into the board config header.  This takes advantage of
that for the sbc8349 board.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
15 years agompc83xx: mpc8360emds: Add QE USB device tree fixups
Anton Vorontsov [Wed, 16 Sep 2009 19:22:08 +0000 (23:22 +0400)]
mpc83xx: mpc8360emds: Add QE USB device tree fixups

With this patch we can change QE USB mode without need to hand-edit
the device tree.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
15 years agompc83xx: mpc8360emds: Use RGMII-ID mode, add workarounds for rev. 2.1 CPUs
Anton Vorontsov [Wed, 16 Sep 2009 19:21:59 +0000 (23:21 +0400)]
mpc83xx: mpc8360emds: Use RGMII-ID mode, add workarounds for rev. 2.1 CPUs

This patch fixes various ethernet issues with gigabit links handling
in U-Boot. The workarounds originally implemented by Kim Phillips for
Linux kernel.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
15 years agompc83xx: mpc8360emds: Don't use LBC SDRAM when DDR is available
Anton Vorontsov [Wed, 16 Sep 2009 19:21:57 +0000 (23:21 +0400)]
mpc83xx: mpc8360emds: Don't use LBC SDRAM when DDR is available

Since commit 5c2ff323a94e27e481f70c44838d43fcd844dd46 ("mpc8360emds:
rework LBC SDRAM setup"), LBC SDRAM is available for use in Linux.

Though, it appears that QE Ethernet in Gigabit mode can't transmit
large packets when it tries to work with a data in LBC SDRAM (memtest
didn't discover any issues, is LBC SDRAM just too slow?).

With this patch we can still use the board without DDR memory, but
if DDR is available, we don't use LBC SDRAM.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
15 years agonet: uec: Fix uccf.h and uec.h headers to include headers they depend on
Anton Vorontsov [Wed, 16 Sep 2009 19:21:55 +0000 (23:21 +0400)]
net: uec: Fix uccf.h and uec.h headers to include headers they depend on

Headers should include headers containing prototypes and defines they
depend on, don't assume that they're included by somebody else.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
15 years agonet: uec_phy: Implement TXID and RXID RGMII modes for Marvell PHYs
Anton Vorontsov [Wed, 16 Sep 2009 19:21:53 +0000 (23:21 +0400)]
net: uec_phy: Implement TXID and RXID RGMII modes for Marvell PHYs

This will be needed for MPC8360E-MDS boards with rev. 2.1 CPUs.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
15 years agompc5121ads: fix breakage introduced when reordering elpida_mddrc_config[]
Wolfgang Denk [Fri, 25 Sep 2009 12:16:00 +0000 (14:16 +0200)]
mpc5121ads: fix breakage introduced when reordering elpida_mddrc_config[]

Signed-off-by: Wolfgang Denk <wd@denx.de>
15 years agocmd_fdt.c: fix parse of byte streams and strings
Ken MacLeod [Fri, 11 Sep 2009 20:16:18 +0000 (15:16 -0500)]
cmd_fdt.c: fix parse of byte streams and strings

Commit 4abd844d8e extended the fdt command parser to handle property
strings which are split across multiple arguments but it was broken for
byte streams and strings.

Byte stream parsing:

 * Fixes where it would terminate early or go into an endless loop.

 * Fixes a 0x00 being inserted into the data if there is a space after
   '[' or a separate argument.

 * Fixes dereferencing the argument pointer after the last argument.

 * Checks for bad characters.

String parsing:

 * Treat multiple arguments as a string list.  This fixes an issue where
   only the last argument was stored.

Signed-off-by: Ken MacLeod <ken@bitsko.slc.ut.us>
15 years agomucmc52, uc101: delete ata@3a00 node, if no CF card is detected
Heiko Schocher [Wed, 23 Sep 2009 05:56:08 +0000 (07:56 +0200)]
mucmc52, uc101: delete ata@3a00 node, if no CF card is detected

U-Boot can detect if an IDE device is present or not.
If not, and this new config option is activated, U-Boot
removes the ATA node from the DTS before booting Linux,
so the Linux IDE driver does not probe the device and
crash. This is needed for buggy hardware (uc101) where
no pull down resistor is connected to the signal IDE5V_DD7.

Signed-off-by: Heiko Schocher <hs@denx.de>
15 years agompc5200, mucmc52, uc101: config cleanup
Heiko Schocher [Wed, 23 Sep 2009 05:56:04 +0000 (07:56 +0200)]
mpc5200, mucmc52, uc101: config cleanup

- As these boards are similiar, collect common config options
  in manroland/common.h and manroland/mpc52xx-common.h
  for mpc5200 specific common options for this manufacturer.
- add OF support
- update default environment

Signed-off-by: Heiko Schocher <hs@denx.de>
Minor edit of commit message.

Signed-off-by: Wolfgang Denk <wd@denx.de>
15 years agoFix "ppc/85xx: Clean up use of LAWAR defines" breakage
Wolfgang Denk [Thu, 24 Sep 2009 22:57:49 +0000 (00:57 +0200)]
Fix "ppc/85xx: Clean up use of LAWAR defines" breakage

Commit 002741ae86 modified include/asm-ppc/mmu.h such that the LAWAR_
defines were only enabled for the 83xx platform, but they are also
needed on MPC512x system. Enabling these for E300 systems seems thus
more appropriate.

Signed-off-by: Wolfgang Denk <wd@denx.de>
15 years agoAdd Elpida Memory Configuration to mpc5121ads Boards
Martha M Stan [Mon, 21 Sep 2009 18:08:00 +0000 (14:08 -0400)]
Add Elpida Memory Configuration to mpc5121ads Boards

Signed-off-by: Martha M Stan <mmarx@silicontkx.com>
Minor coding style cleanup.

Signed-off-by: Wolfgang Denk <wd@denx.de>
15 years agompc512x: Streamlined fixed_sdram() init sequence.
Martha M Stan [Mon, 21 Sep 2009 18:07:14 +0000 (14:07 -0400)]
mpc512x: Streamlined fixed_sdram() init sequence.

Signed-off-by: Martha M Stan <mmarx@silicontkx.com>
Minor cleanup:

Re-ordered default_mddrc_config[] to have matching indices.

This allows to use the same index "N" for source and target fields;
before, we had code like this

out_be32(&im->mddrc.ddr_time_config2, mddrc_config[3]);

which always looked like a copy & paste error because 2 != 3.

Also, use NULL when meaning a null pointer.

Signed-off-by: Wolfgang Denk <wd@denx.de>
15 years agoMerge branch 'master' of /home/wd/git/u-boot/custodians
Wolfgang Denk [Thu, 24 Sep 2009 21:40:25 +0000 (23:40 +0200)]
Merge branch 'master' of /home/wd/git/u-boot/custodians

15 years agoppc/p4080: Determine various chip frequencies on CoreNet platforms
Kumar Gala [Thu, 19 Mar 2009 07:46:19 +0000 (02:46 -0500)]
ppc/p4080: Determine various chip frequencies on CoreNet platforms

The means to determine the core, bus, and DDR frequencies are completely
new on CoreNet style platforms.  Additionally on p4080 we can have
different frequencies for FMAN and PME IP blocks.  We need to keep track
of the FMAN & PME frequencies since they are used for time stamping
capabilities inside each block.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 years agoppc/p4080: Handle timebase enabling and frequency reporting
Kumar Gala [Thu, 17 Sep 2009 06:52:37 +0000 (01:52 -0500)]
ppc/p4080: Handle timebase enabling and frequency reporting

On CoreNet style platforms the timebase frequency is the bus frequency
defined by 16 (on PQ3 it is divide by 8).  Also on the CoreNet platforms
the core not longer controls the enabling of the timebase.  We now need
to enable the boot core's timebase via CCSR register writes.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 years agoppc/p4080: Add various p4080 related defines (and p4040)
Kumar Gala [Thu, 19 Mar 2009 07:39:17 +0000 (02:39 -0500)]
ppc/p4080: Add various p4080 related defines (and p4040)

There are various locations that we have chip specific info:

* Makefile for which ddr code to build
* Added p4080 & p4040 to cpu_type_list and SVR list
* Added number of LAWs for p4080
* Set CONFIG_MAX_CPUS to 8 for p4080

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 years agoppc/p4080: CoreNet platfrom style secondary core release
Kumar Gala [Thu, 17 Sep 2009 06:44:39 +0000 (01:44 -0500)]
ppc/p4080: CoreNet platfrom style secondary core release

The CoreNet platform style of bringing secondary cores out of reset is
a bit different that the PQ3 style.  Mostly the registers that we use
to setup boot translation, enable time bases, and boot release the cores
have moved around.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 years agoppc/p4080: CoreNet platfrom style CCSRBAR setting
Kumar Gala [Thu, 17 Sep 2009 06:44:00 +0000 (01:44 -0500)]
ppc/p4080: CoreNet platfrom style CCSRBAR setting

On CoreNet based platforms the CCSRBAR address is split between an high &
low register and we no longer shift the address.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Scott Wood <scottwood@freescale.com>
15 years agoppc/p4080: Add support for CoreNet style platform LAWs
Kumar Gala [Thu, 19 Mar 2009 07:32:23 +0000 (02:32 -0500)]
ppc/p4080: Add support for CoreNet style platform LAWs

On CoreNet based platforms the LAW address is split between an high &
low register and we no longer shift the address.  Also, the target IDs
on CoreNet platforms have been completely re-assigned.

Additionally, added a new find_law() API to which LAW an address hits in.
This is need for the CoreNet style boot release code since it will need
to determine what the target ID should be set to for boot window
translation.

Finally, enamed LAWAR_EN to LAW_EN and moved to header so we can use
it elsewhere.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 years agoppc/p4080: Add p4080 platform immap definitions
Kumar Gala [Wed, 16 Sep 2009 14:43:12 +0000 (09:43 -0500)]
ppc/p4080: Add p4080 platform immap definitions

The p4080 SoC has a significant amount of commonality with the 85xx/PQ3
platform.  We reuse the 85xx immap and just add new definitions for
local access and global utils.  The global utils is now broken into
global utils, clocking and run control/power management.

The offsets from CCSR for a number of blocks have also changed.  We
introduce the CONFIG_FSL_CORENET define to distinquish the PQ3 style of
platform from the new p4080 platform.  We don't use QoirQ as there are
products (like p2020) that are PQ3 based platforms but have the QoirQ
name.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 years agoppc/85xx: Fix enabling of L2 cache
Kumar Gala [Tue, 22 Sep 2009 20:45:44 +0000 (15:45 -0500)]
ppc/85xx: Fix enabling of L2 cache

We need to flash invalidate the locks in addition to the cache
before we enable.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 years ago85xx-fdt: Fixed l2-ctlr's compatible prop for QorIQ
Vivek Mahajan [Tue, 22 Sep 2009 07:18:27 +0000 (12:48 +0530)]
85xx-fdt: Fixed l2-ctlr's compatible prop for QorIQ

The code assumed names where just numbers and always prefixed 'mpc'.
However newer QorIQ don't follow the mpc naming scheme.

Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 years agoppc/85xx: add cpu init config file for boot from NAND
Mingkai Hu [Tue, 22 Sep 2009 06:53:21 +0000 (14:53 +0800)]
ppc/85xx: add cpu init config file for boot from NAND

When boot from NAND, the NAND flash must be connected to br/or0.
Also init RAM(L2 SRAM or DDR SDRAM) for load the second image to
it.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 years agoimmap_85xx: add porpllsr's plat ratio definition
Mingkai Hu [Tue, 22 Sep 2009 06:53:34 +0000 (14:53 +0800)]
immap_85xx: add porpllsr's plat ratio definition

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 years agoppc/85xx: add ld script file for boot from NAND
Mingkai Hu [Tue, 22 Sep 2009 06:53:10 +0000 (14:53 +0800)]
ppc/85xx: add ld script file for boot from NAND

The first stage 4K image uses a seperate ld script file to
generate 4K image. This patch moves it to the cpu/mpc85xx/*
to make it avaliable for 85xx platform.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 years agompc8610hpcd: Use common 86xx fdt fixup code
Peter Tyser [Tue, 22 Sep 2009 04:09:28 +0000 (23:09 -0500)]
mpc8610hpcd: Use common 86xx fdt fixup code

Using the common 86xx fdt fixups removes some board-specific code and
should make the mpc8610hpcd easier to maintain in the long run.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 years agosbc85x0: tidy up Makefile to use new configuration script.
Paul Gortmaker [Mon, 21 Sep 2009 21:19:17 +0000 (17:19 -0400)]
sbc85x0: tidy up Makefile to use new configuration script.

Commit 804d83a5 allows us to move all the configuration
variation tweaks out of the top level Makefile and down
into the boards config header.  This takes advantage of
that for the sbc8540/sbc8560 boards.

There were a couple of cheezy comments pointing at incorrect
files, or files that don't exist, so I've cleaned those up too.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 years agosbc8548: allow enabling PCI via a make config option
Paul Gortmaker [Mon, 21 Sep 2009 00:36:06 +0000 (20:36 -0400)]
sbc8548: allow enabling PCI via a make config option

Prior to this commit, to enable PCI, you had to go manually
edit the board config header, and if you had 33MHz PCI, you
had to manually change CONFIG_SYS_NS16550_CLK too, which was
not real user friendly,

This adds the typical PCI and clock speed make targets to the
toplevel Makefile in accordance with what is being done with
other boards (i.e. using the "-t" to mkconfig).

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 years agosbc8548: update PCI/PCI-e support code
Paul Gortmaker [Mon, 21 Sep 2009 00:36:05 +0000 (20:36 -0400)]
sbc8548: update PCI/PCI-e support code

The PCI/PCI-e support for the sbc8548 was based on an earlier
version of what the MPC8548CDS board was using, and in its
current state it won't even compile.  This re-syncs it to match
the latest codebase and makes use of the new shared PCI functions
to reduce board duplication.

It borrows from the MPC8568MDS, in that it pulls the PCI-e I/O
back to 0xe280_0000 (where PCI2 would be on MPC8548CDS), and
similarly it coalesces the PCI and PCI-e mem into one single TLB.

Both PCI-x and PCI-e have been tested with intel e1000 cards
under linux (with an accompanying dts change in place)

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 years agofsl_pci: create a SET_STD_PCI_INFO() helper wrapper
Paul Gortmaker [Mon, 21 Sep 2009 00:36:01 +0000 (20:36 -0400)]
fsl_pci: create a SET_STD_PCI_INFO() helper wrapper

Recycle the recently added PCI-e wrapper used to reduce board
duplication of code by creating a similar version for plain PCI.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 years agosbc8548: correct local bus SDRAM size from 64M to 128M
Paul Gortmaker [Mon, 21 Sep 2009 00:36:04 +0000 (20:36 -0400)]
sbc8548: correct local bus SDRAM size from 64M to 128M

The size of the LB SDRAM on this board is 128MB, spanning CS3
and CS4.  It was previously only being configured for 64MB on
CS3, since that was what the original codebase of the MPC8548CDS
had.  In addition to setting up BR4/OR4, this also adds the TLB
entry for the second half of the SDRAM.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 years agosbc8548: use I/O accessors
Paul Gortmaker [Mon, 21 Sep 2009 00:36:03 +0000 (20:36 -0400)]
sbc8548: use I/O accessors

Sweep throught the board specific file and replace the various
register proddings with the equivalent I/O accessors.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 years agosbc8548: remove eTSEC3/4 voltage hack
Paul Gortmaker [Mon, 21 Sep 2009 00:36:02 +0000 (20:36 -0400)]
sbc8548: remove eTSEC3/4 voltage hack

With only eTSEC1 and 2 being brought out to RJ-45 connectors, we
aren't interested in the eTSEC3/4 voltage hack on this board

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 years agosbc8548: enable access to second bank of flash
Paul Gortmaker [Fri, 18 Sep 2009 23:08:41 +0000 (19:08 -0400)]
sbc8548: enable access to second bank of flash

The sbc8548 has a 64MB SODIMM flash module off of CS6 that
previously wasn't enumerated by u-boot.  There were already
BR6/OR6 settings for it [used by cpu_init_f()] but there
was no TLB entry and it wasn't in the list of flash banks
reported to u-boot.

The location of the 64MB flash is "pulled back" 8MB from
a 64MB boundary, in order to allow address space for the
8MB boot flash that is at the end of 32 bit address space.
This means creating two 4MB TLB entries for the 8MB chunk,
and then expanding the original boot flash entry to 64MB
in order to cover the 8MB boot flash and the remainder
(56MB) of the user flash.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 years agosbc8548: cosmetic line re-wrap
Paul Gortmaker [Wed, 23 Sep 2009 21:30:57 +0000 (17:30 -0400)]
sbc8548: cosmetic line re-wrap

Fix the extra long lines to be consistent with u-boot coding style.
No functional change here.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
15 years agosbc8548: get_clock_freq is not valid for this board
Paul Gortmaker [Fri, 18 Sep 2009 23:08:40 +0000 (19:08 -0400)]
sbc8548: get_clock_freq is not valid for this board

The get_clock_freq() comes from freescale/common/cadmus.c and is
only valid for the CDS based 85xx reference platforms.  It would
be nice if we could read the 33 vs. 66MHz status somehow, but in
the meantime, tie it to CONFIG_SYS_CLK_FREQ like all the other
non-CDS boards do.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 years agosbc8548: delete unused MPC8548CDS info carried over from port
Paul Gortmaker [Fri, 18 Sep 2009 23:08:39 +0000 (19:08 -0400)]
sbc8548: delete unused MPC8548CDS info carried over from port

There are a couple defines and PCI bridge quirks related to the PCI
backplane of the MPC8548CDS that have no meaning in the context of
the port to the sbc8548 board, so delete them.

Also, the form factor of the sbc8548 is a standalone board with a
single PCI-X and a single PCI-e slot.  That pretty much guarantees
that it will never be a PCI agent itself, so the host/agent and root
complex/end node distinctions have been removed.

Similarly, since there is no physical connector mapping to PCI2, so
all references of PCI2 in the board support files have been removed
as well.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 years agosbc8548: enable use of PCI network cards
Paul Gortmaker [Fri, 18 Sep 2009 23:08:44 +0000 (19:08 -0400)]
sbc8548: enable use of PCI network cards

Create a board_eth_init to allow a place to hook in
the PCI ethernet init after all the eTSEC are up
and configured.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 years agoppc/85xx: 32bit DDR changes for P1020/P1011
Poonam Aggrwal [Sat, 19 Sep 2009 12:20:17 +0000 (17:50 +0530)]
ppc/85xx: 32bit DDR changes for P1020/P1011

The P1020/P1011 SOCs support max 32bit DDR width as opposed to P2020/P2010
where max DDR data width supported is 64bit.

As a next step the DDR data width initialization would be made more dynamic
with more flexibility from the board perspective and user choice.
Going forward we would also remove the hardcodings for platforms with onboard
memories and try to use the FSL SPD code for DDR initialization.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 years agosbc8548: replace README with completely new document
Paul Gortmaker [Fri, 18 Sep 2009 23:08:46 +0000 (19:08 -0400)]
sbc8548: replace README with completely new document

The previous README.sbc8548 was pretty much content-free. Replace
it with something that actually gives the end user some relevant
hardware details, and also lists the u-boot configuration choices.

Also in the cosmetic department, fix the bogus line in the Makefile
that was carried over from the SBC8560 Makefile, and the typo in
the sbc8548.c copyright.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 years agoppc/85xx: Clean up use of LAWAR defines
Kumar Gala [Sat, 19 Sep 2009 16:20:54 +0000 (11:20 -0500)]
ppc/85xx: Clean up use of LAWAR defines

On 85xx platforms we shouldn't be using any LAWAR_* defines
but using the LAW_* ones provided by fsl-law.h.  Rename any such
uses and limit the LAWAR_ to the 83xx platform as the only user so
we will get compile errors in the future.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 years agoppc/85xx: Clean up mpc8572DS PCI setup code
Kumar Gala [Thu, 3 Sep 2009 15:20:09 +0000 (10:20 -0500)]
ppc/85xx: Clean up mpc8572DS PCI setup code

Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 years agoppc/85xx: Clean up p2020ds PCI setup code
Kumar Gala [Thu, 3 Sep 2009 14:42:01 +0000 (09:42 -0500)]
ppc/85xx: Clean up p2020ds PCI setup code

Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 years agoppc/85xx: Clean up p1_p2_rdb PCI setup
Kumar Gala [Thu, 3 Sep 2009 15:09:04 +0000 (10:09 -0500)]
ppc/85xx: Clean up p1_p2_rdb PCI setup

General code cleanup to use in/out IO accessors as well as making
the code that prints out info sane between board and generic fsl pci
code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 years agoppc/85xx: Simplify the top makefile for P1_P2_RDB boards
Kumar Gala [Thu, 10 Sep 2009 21:31:53 +0000 (16:31 -0500)]
ppc/85xx: Simplify the top makefile for P1_P2_RDB boards

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 years agoppc/85xx: Simplify the top makefile for 36-bit config for P2020DS
Kumar Gala [Thu, 10 Sep 2009 21:26:37 +0000 (16:26 -0500)]
ppc/85xx: Simplify the top makefile for 36-bit config for P2020DS

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 years agoppc/85xx: Simplify the top makefile for 36-bit config for MPC8572DS
Kumar Gala [Thu, 10 Sep 2009 21:23:45 +0000 (16:23 -0500)]
ppc/85xx: Simplify the top makefile for 36-bit config for MPC8572DS

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 years agoppc/85xx: simplify the top makefile for 36-bit config for mpc8536ds
Mingkai Hu [Fri, 18 Sep 2009 03:45:09 +0000 (11:45 +0800)]
ppc/85xx: simplify the top makefile for 36-bit config for mpc8536ds

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
15 years agoppc/85xx: Fix LCRR_CLKDIV defines
Kumar Gala [Wed, 16 Sep 2009 03:21:58 +0000 (22:21 -0500)]
ppc/85xx: Fix LCRR_CLKDIV defines

For some reason the CLKDIV field varies between SoC in how it interprets
the bit values.

All 83xx and early (e500v1) PQ3 devices support:
 clk/2: CLKDIV = 2
 clk/4: CLKDIV = 4
 clk/8: CLKDIV = 8

Newer PQ3 (e500v2) and MPC86xx support:
 clk/4: CLKDIV = 2
 clk/8: CLKDIV = 4
 clk/16: CLKDIV = 8

Ensure that the MPC86xx and MPC85xx still get the same behavior and make
the defines reflect their logical view (not the value of the field).

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Peter Tyser <ptyser@xes-inc.com>
15 years agoMAKEALL: Use POSIX math
Peter Tyser [Mon, 21 Sep 2009 17:04:33 +0000 (12:04 -0500)]
MAKEALL: Use POSIX math

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
15 years agoMAKEALL: Add summary information
Peter Tyser [Mon, 21 Sep 2009 17:04:32 +0000 (12:04 -0500)]
MAKEALL: Add summary information

This change adds some basic summary information to the MAKEALL script.
The summary information includes how many boards were compiled, how many
boards had compile warnings or errors, and which specific boards had
compile warnings or errors.

This information is useful when doing compile testing to quickly
determine which boards are broken.

As a side benefit, no empty $BOARD.ERR files are generated by MAKEALL.
Previously, each board had a corresponding $BOARD.ERR file, even if the
board compiled cleanly.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
15 years agogalaxy5200: enable version environment variable
Eric Millbrandt [Mon, 21 Sep 2009 16:05:55 +0000 (11:05 -0500)]
galaxy5200: enable version environment variable

Add version environment variable configuration to the galaxy5200
board header file.

Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>
Edited commit message.

Signed-off-by: Wolfgang Denk <wd@denx.de>
15 years agodigsy_mtc: Add TCR register value for RTC (DS1339)
Werner Pfister [Mon, 21 Sep 2009 12:49:56 +0000 (14:49 +0200)]
digsy_mtc: Add TCR register value for RTC (DS1339)

Signed-off-by: Werner Pfister <werner.pfister@intercontrol.de>
Signed-off-by: Detlev Zundel <dzu@denx.de>
15 years agortc/ds1337.c: Allow to set TCR register
Werner Pfister [Mon, 21 Sep 2009 12:49:55 +0000 (14:49 +0200)]
rtc/ds1337.c: Allow to set TCR register

This is needed to correctly start the charging of an attached capacitor
or battery.

Signed-off-by: Werner Pfister <werner.pfister@intercontrol.de>
Signed-off-by: Detlev Zundel <dzu@denx.de>
15 years agoMerge branch 'master' of /home/wd/git/u-boot/custodians
Wolfgang Denk [Wed, 23 Sep 2009 22:18:15 +0000 (00:18 +0200)]
Merge branch 'master' of /home/wd/git/u-boot/custodians

15 years agoMerge branch 'master' of git://git.denx.de/u-boot-ubi
Wolfgang Denk [Wed, 23 Sep 2009 22:18:10 +0000 (00:18 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-ubi

15 years agoMerge branch 'master' of /home/wd/git/u-boot/custodians
Wolfgang Denk [Wed, 23 Sep 2009 22:17:17 +0000 (00:17 +0200)]
Merge branch 'master' of /home/wd/git/u-boot/custodians

15 years agoubifs: Add support for looking up directory and relative symlinks
Simon Kagstrom [Tue, 15 Sep 2009 07:53:29 +0000 (09:53 +0200)]
ubifs: Add support for looking up directory and relative symlinks

This patch adds support for resolving symlinks to directories as well as
relative symlinks. Symlinks are now always resolved during file lookup,
so the load stage no longer needs to special-case them.

Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Signed-off-by: Stefan Roese <sr@denx.de>
15 years agoppc4xx: Fix PCIE PLL lock on 440SPe Yucca board
Rupjyoti Sarmah [Mon, 21 Sep 2009 18:26:19 +0000 (11:26 -0700)]
ppc4xx: Fix PCIE PLL lock on 440SPe Yucca board

u-boot reports a PCIE PLL lock error at boot time on Yucca board, and
left PCIe nonfunctional. This is fixed by making u-boot function
ppc4xx_init_pcie() to wait 300 uS after negating reset before the
first check of the PLL lock.

Signed-off-by: Rupjyoti Sarmah <rsarmah@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
15 years agoppc4xx: Make DDR2 timing for intip more robust
Dirk Eibach [Mon, 21 Sep 2009 11:27:14 +0000 (13:27 +0200)]
ppc4xx: Make DDR2 timing for intip more robust

DDR2 timing for intip was on the edge for some of the available chips
for this board. Now it is verfied to work with all of them.

Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
15 years agoboard/linkstation/ide.c: Fix compile warning
Wolfgang Denk [Mon, 14 Sep 2009 22:26:02 +0000 (00:26 +0200)]
board/linkstation/ide.c: Fix compile warning

Fix warning: ide.c:60: warning: dereferencing type-punned pointer will
break strict-aliasing rules

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Guennadi Liakhovetski <lg@denx.de>
15 years agoppc: Clean up calling of phy_reset() during init
Peter Tyser [Thu, 17 Sep 2009 03:03:08 +0000 (22:03 -0500)]
ppc: Clean up calling of phy_reset() during init

Remove board-specific #ifdefs for calling phy_reset() during
initializtion

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
15 years agoppc: Clean up calling of misc_init_r() during init
Peter Tyser [Thu, 17 Sep 2009 03:03:07 +0000 (22:03 -0500)]
ppc: Clean up calling of misc_init_r() during init

Remove board-specific #ifdefs for calling misc_init_r() during
initializtion

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Heiko Schocher <hs@denx.de>
15 years agoRemove deprecated 'autoscr' command/variables
Peter Tyser [Thu, 17 Sep 2009 02:38:10 +0000 (21:38 -0500)]
Remove deprecated 'autoscr' command/variables

The more standard 'source' command provides identical functionality to
the autoscr command.

Environment variable names/values on the MVBC_P, MVBML7, kmeter1,
mgcoge, and km8xx boards are updated to no longer refernce 'autoscr'.

The 'autoscript' and 'autoscript_uname' environment variables are
also removed.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Acked-by: Heiko Schocher <hs@denx.de>
15 years agompc512x. Micron nand flash needs a reset before a read command is issued.
Paul Gibson [Wed, 16 Sep 2009 00:05:00 +0000 (10:05 +1000)]
mpc512x. Micron nand flash needs a reset before a read command is issued.

Micron nand flash needs a reset before a read command is issued.
The current mpc5121_nfc driver ignores the reset command.

15 years agoFDT: remove obsolete OF_CPU and OF_SOC macros.
Marcel Ziswiler [Wed, 9 Sep 2009 19:18:41 +0000 (21:18 +0200)]
FDT: remove obsolete OF_CPU and OF_SOC macros.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@noser.com>
Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Heiko Schocher <hs@denx.de>
15 years agoboard/flagadm/flash.c: fix compile warning
Wolfgang Denk [Mon, 14 Sep 2009 22:09:21 +0000 (00:09 +0200)]
board/flagadm/flash.c: fix compile warning

Fix warning: flash.c:531: warning: dereferencing type-punned pointer
will break strict-aliasing rules

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Kári Davíðsson <kd@flaga.is>
15 years agoMerge branch 'warning-cleanup'
Wolfgang Denk [Fri, 18 Sep 2009 21:20:12 +0000 (23:20 +0200)]
Merge branch 'warning-cleanup'

15 years agoMerge branch 'master' of git://git.denx.de/u-boot-ppc4xx
Wolfgang Denk [Thu, 17 Sep 2009 21:28:31 +0000 (23:28 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx

15 years agoCorrect ffs/fls regression for PowerPC etc
Simon Kagstrom [Thu, 17 Sep 2009 13:15:52 +0000 (15:15 +0200)]
Correct ffs/fls regression for PowerPC etc

Commits

  02f99901ed1c9d828e3ea117f94ce2264bf8389e
  52d61227b66d4099b39c8309ab37cb67ee09a405

introduced a regression where platform-specific ffs/fls implementations
were defined away. This patch corrects that by using PLATFORM_xxx
instead of the name itself.

Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Stefan Roese <sr@denx.de>