Thomas Chou [Fri, 4 Sep 2015 05:18:00 +0000 (13:18 +0800)]
nios2: permit device tree control of U-Boot
Enable this in the Kconfig so that nios2 boards can use device
tree to configure U-Boot.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
Thomas Chou [Sat, 29 Aug 2015 07:24:01 +0000 (15:24 +0800)]
nios2: enable CONFIG_NET_RANDOM_ETHADDR
Enable CONFIG_NET_RANDOM_ETHADDR to generate a random MAC address
when ETHADDR is not set.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Thomas Chou [Wed, 26 Aug 2015 13:24:35 +0000 (21:24 +0800)]
nios2: move command line configuration to Kconfig
This patch moves command line configuration from board header
file to board defconfig in the way of Kconfig. The change passed
savedefconfig.
This fixes warnings such as : "CONFIG_SYS_HUSH_PARSER" redefined,
when "Use hush shell" is selected with menuconfig, etc.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Mugunthan V N [Tue, 13 Oct 2015 08:32:29 +0000 (14:02 +0530)]
ARM: AM335x: mux: change mmc0 cd pinmux from mmc0_sdcd to gpio
Currently omap_hsmmc driver doesn't use sdcd pin to detect
whether the card is present or not. Instead the same pin is used
as GPIO to detect card presence. So change the pin mux mode from
mmc0_sdcd to gpio0_6.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Mugunthan V N [Tue, 13 Oct 2015 08:27:16 +0000 (13:57 +0530)]
drivers: gpio: omap: add support for parsing additional gpio parameters
With DM_GPIO, gpio parameters like ACTIVE_(LOW/HIGH) are to be
parsed in xlate gpio drivers-ops. Since xlate is not implemented
in omap_gpio driver, the driver considers all gpio to be
ACTIVE_HIGH which is the default case and fails to return actual
gpio status for ACTIVE_LOW gpios. So adding .xlate ops to
omap_gpio.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Mugunthan V N [Tue, 29 Sep 2015 09:12:27 +0000 (14:42 +0530)]
am437x: Add am57xx_evm_defconfig using CONFIG_DM
Import various DT files for am57xx-beagle-x15 from
Linux Kernel v4.2
Add config file for this board, enable DM, DM_GPIO,
DM_SERIAL and DM_MMC.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Mugunthan V N [Tue, 29 Sep 2015 09:12:26 +0000 (14:42 +0530)]
ti_omap5_common: mmc: do not define DM_MMC for spl
Since spl doesn't support DM currently, do not define DM_MMC
for spl build.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
asdfsadf
Mugunthan V N [Mon, 28 Sep 2015 10:47:52 +0000 (16:17 +0530)]
am437x: Add am437x_sk_evm_defconfig using CONFIG_DM
Import various DT files for am437x-sk-evm from Linux Kernel v4.2
Add config file for this board, enable DM, DM_GPIO, DM_SERIAL
and DM_MMC.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Mugunthan V N [Mon, 28 Sep 2015 10:47:51 +0000 (16:17 +0530)]
am437x: Add am437x_gp_evm_defconfig using CONFIG_DM
Import various DT files for am4372, an43xx pinctrl and
am437x-gp-evm from Linux Kernel v4.2
Add config file for this board, enable DM, DM_GPIO, DM_SERIAL
and DM_MMC.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Mugunthan V N [Mon, 28 Sep 2015 10:47:50 +0000 (16:17 +0530)]
am43xx_evm: mmc: do not define DM_MMC for spl
Since spl doesn't support DM currently, do not define DM_MMC
for spl build.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Mugunthan V N [Mon, 28 Sep 2015 10:47:49 +0000 (16:17 +0530)]
am43xx_evm.h: : switch to CONFIG_OMAP_SERIAL for non-SPL DM_SERIAL
Tested on am437x gp evm and am437x sk evm
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Mugunthan V N [Mon, 28 Sep 2015 10:47:48 +0000 (16:17 +0530)]
drivers: serial: serial_omap: add comaptibles for all ti platforms
Adding compatibles for am335x, am437x and dra7 platforms.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Mugunthan V N [Mon, 28 Sep 2015 10:47:47 +0000 (16:17 +0530)]
drivers: serial: serial_omap: populate default clock frequency when not found in dt
In some platforms like am437x, serial node is not populated with
clock-frequency node. So in that case have a default clock-clock
frequency.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Mugunthan V N [Mon, 28 Sep 2015 07:26:32 +0000 (12:56 +0530)]
defconfig: am335x: gp_evm: enable mmc driver model
enable mmc driver model for am335x gp_evm as omap_hsmmc
supports driver model
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Mugunthan V N [Mon, 28 Sep 2015 07:26:31 +0000 (12:56 +0530)]
defconfig: am335x: bbb: enable mmc driver model
enable mmc driver model for am335x bbb as omap_hsmmc
supports driver model
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Mugunthan V N [Mon, 28 Sep 2015 07:26:30 +0000 (12:56 +0530)]
drivers: mmc: omap_hsmmc: convert driver to adopt device driver model
adopt omap_hsmmc driver to device driver model
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Mugunthan V N [Mon, 28 Sep 2015 07:26:29 +0000 (12:56 +0530)]
am335x_evm: mmc: do not define DM_MMC for spl
Since spl doesn't support DM currently, do not define DM_MMC
for spl build.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Mugunthan V N [Mon, 28 Sep 2015 07:26:28 +0000 (12:56 +0530)]
omap_hsmmc: update struct hsmmc to accomodate base address from DT
Existing driver gets the actual omap hammc base address + 0x100
bytes as the first 0x100 bytes is not used by the driver. But
with DM conversion the base address from DT is different, to
accommodate the offset adding res0[0x100] to struct hsmmc.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Mugunthan V N [Tue, 22 Sep 2015 13:15:12 +0000 (18:45 +0530)]
dra7xx: Add dra74_evm_defconfig using CONFIG_DM
Import various DT files for dra7-evm from Linux Kernel v4.2
Add config file for this board, enable DM and DM_GPIO
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Lokesh Vutla [Sat, 19 Sep 2015 10:56:56 +0000 (16:26 +0530)]
ARM: k2g: Add config file
Add config file for k2g
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Lokesh Vutla [Sat, 19 Sep 2015 10:56:55 +0000 (16:26 +0530)]
ARM: dts: k2g: Add DT support
Add basic DT support for k2g evm.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Sat, 19 Sep 2015 10:56:54 +0000 (16:26 +0530)]
ARM: k2g: Enable SPI flash
GPIO1_9 controls SPI flash on k2g evm.
So make GPIO1_9 as output pin, inorder to use SPI.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Roger Quadros [Sat, 19 Sep 2015 10:56:53 +0000 (16:26 +0530)]
ARM: k2g: add SD card and eMMC support
Add MMC support for k2g
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
Vitaly Andrianov [Sat, 19 Sep 2015 10:56:52 +0000 (16:26 +0530)]
ARM: k2g: Add Ethernet Support
Add Ethernet support for tftp support
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Mugunthan V N [Sat, 19 Sep 2015 10:56:51 +0000 (16:26 +0530)]
driver: net: keystone_net: removing unused code
remove unused code as the same is achieved when configuring sgmii
and link status is verifed.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Vitaly Andrianov [Sat, 19 Sep 2015 10:56:50 +0000 (16:26 +0530)]
driver: net: keystone_net: add support for rgmii phy
In K2G, Ethernet doesn't support SGMII instead it support RGMII,
adding support to the driver to connect to RGMII phy.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Vitaly Andrianov [Sat, 19 Sep 2015 10:56:49 +0000 (16:26 +0530)]
dma: keystone_nav: Fix linkram size
Fix Linkram size.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Mugunthan V N [Sat, 19 Sep 2015 10:56:48 +0000 (16:26 +0530)]
driver: net: keystone_net: fix phy mode configuration
Phy mode is a board property and it can be different between
multiple board and ports, so it should not be hardcoded in
driver to one specific mode. So adding a field in eth_priv_t
structure to pass phy mode to driver.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Vitaly Andrianov [Sat, 19 Sep 2015 10:56:47 +0000 (16:26 +0530)]
ARM: k2g: update keystone nav rx queue numbers
update K2G nav rx queue number
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Vitaly Andrianov [Sat, 19 Sep 2015 10:56:46 +0000 (16:26 +0530)]
ARM: k2g: Correct base addresses
Coreect base addresses for SPI, Queue Manager, Ethernet, GPIO,
and MSMC segments.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Vitaly Andrianov [Sat, 19 Sep 2015 10:56:45 +0000 (16:26 +0530)]
ARM: k2g: Add pin mux data
Add pin mux data for k2g-evm
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Vitaly Andrianov [Sat, 19 Sep 2015 10:56:44 +0000 (16:26 +0530)]
ARM: k2g: Add support for pin mux configuration
Add api for configuring pin mux.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Vitaly Andrianov [Sat, 19 Sep 2015 10:56:43 +0000 (16:26 +0530)]
ARM: k2g: Add ddr3 info
Add ddr3 related info
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Vitaly Andrianov [Sat, 19 Sep 2015 10:56:42 +0000 (16:26 +0530)]
ARM: k2g: Add PSC info
Add psc information for k2g
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Vitaly Andrianov [Sat, 19 Sep 2015 10:56:41 +0000 (16:26 +0530)]
ARM: k2g: Add clock information
Add clock information for Galileo
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Vitaly Andrianov [Sat, 19 Sep 2015 10:56:40 +0000 (16:26 +0530)]
ARM: k2g: Add pll data
Add pll data for k2g
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Sat, 19 Sep 2015 10:56:39 +0000 (16:26 +0530)]
ARM: k2g: Add kconfig support
Add Kconfig support
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Sat, 19 Sep 2015 10:56:38 +0000 (16:26 +0530)]
ARM: k2g: Add support for CPU detection
Adding CPU detection support for Keystone2 Galileo.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Sat, 19 Sep 2015 09:30:23 +0000 (15:00 +0530)]
ARM: keystone2: Use dtb images by default
Now that OF_CONTROL is enabled on all keystone2 platforms,
build the default images with DT.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Sat, 19 Sep 2015 09:30:22 +0000 (15:00 +0530)]
ARM: dts: k2e: Enable OF_CONTROL and DM
Import k2e specific DT files from Linux Kernel and enable
OF_CONTROL, DM, DM_SERIAL.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Sat, 19 Sep 2015 09:30:21 +0000 (15:00 +0530)]
ARM: dts: k2l: Enable OF_CONTROL and DM
Import k2l specific DT files from Linux Kernel and enable
OF_CONTROL, DM, DM_SERIAL.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Sat, 19 Sep 2015 09:30:20 +0000 (15:00 +0530)]
ARM: dts: k2hk: Enable OF_CONTROL and DM
Import k2hk specific DT files from Linux Kernel and enable
OF_CONTROL, DM, DM_SERIAL.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Sat, 19 Sep 2015 09:30:19 +0000 (15:00 +0530)]
ARM: dts: keystone2: Do not use LPAE addresses in U-Boot
Keystone dts files assumes that LPAE is enabled and top level root
node uses 64bit addresses. This breaks the keystone boot with
CONFIG_OF_CONTROL enabled. So do not use 64 bit addresse in U-Boot DT.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Sat, 19 Sep 2015 09:30:18 +0000 (15:00 +0530)]
ARM: dts: Keystone2: Import generic dt files from Linux Kernel
Import various generic dts files from Linux kernel so that
all keystone2 platforms can be DT in U-boot.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Sat, 19 Sep 2015 09:30:17 +0000 (15:00 +0530)]
ARM: keystone2: spl: Fix stack allocation with CONFIG_SYS_MALLOC_F_LEN
If CONFIG_SYS_MALLOC_F_LEN is enabled, the stack is moved down to the
specified size to make the malloc function available before relocation.
But on keystone platforms SYS_SPL_MALLOC is immediately preceding stack,
which is causing an overlap with this config enabled.
So leave a gap between malloc space and stack space.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Sat, 19 Sep 2015 09:30:16 +0000 (15:00 +0530)]
ARM: keystone2: Fix serial port init
With CONFIG_DM_SERIAL is enabled NS16550_init() cannot be
called directly. Driver probe should be taking care of this.
So call this function only when DM_SERIAL is not enabled.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Tom Rini [Thu, 17 Sep 2015 20:47:05 +0000 (16:47 -0400)]
dra72_evm: Switch to DM_SERIAL
Tested on J6Eco EVM.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Lokesh Vutla <lokeshvutla@ti.com>
Tom Rini [Thu, 17 Sep 2015 20:47:04 +0000 (16:47 -0400)]
ti_omap5_common.h: Switch to CONFIG_OMAP_SERIAL for non-SPL DM_SERIAL
Tested on J6Eco EVM
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 17 Sep 2015 20:47:03 +0000 (16:47 -0400)]
ti_omap4_common.h: Switch to CONFIG_OMAP_SERIAL for non-SPL DM_SERIAL
Tested on Pandaboard
Signed-off-by: Tom Rini <trini@konsulko.com>
Nishanth Menon [Thu, 17 Sep 2015 20:42:42 +0000 (15:42 -0500)]
test: Add basic tests for remoteproc
Use the sandbox environment for the basic tests.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Simon Glass <sjg@chromium.org>
Nishanth Menon [Thu, 17 Sep 2015 20:42:41 +0000 (15:42 -0500)]
sandbox: Introduce dummy remoteproc nodes
Introduce dummy devices for sandbox remoteproc device and enable it by
default
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Simon Glass <sjg@chromium.org>
Nishanth Menon [Thu, 17 Sep 2015 20:42:40 +0000 (15:42 -0500)]
remoteproc: Introduce a sandbox dummy driver
Introduce a dummy driver for sandbox that allows us to verify basic
functionality. This is not meant to do anything functional - but is
more or less meant as a framework plumbing debug helper.
The sandbox remoteproc driver maintains absolutey no states and is a
simple driver which just is filled with empty hooks. Idea being to give
an approximate idea to implement own remoteproc driver using this as a
template.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Simon Glass <sjg@chromium.org>
Nishanth Menon [Thu, 17 Sep 2015 20:42:39 +0000 (15:42 -0500)]
drivers: Introduce a simplified remoteproc framework
Many System on Chip(SoC) solutions are complex with multiple processors
on the same die dedicated to either general purpose of specialized
functions. Many examples do exist in today's SoCs from various vendors.
Typical examples are micro controllers such as an ARM M3/M0 doing a
offload of specific function such as event integration or power
management or controlling camera etc.
Traditionally, the responsibility of loading up such a processor with a
firmware and communication has been with a High Level Operating
System(HLOS) such as Linux. However, there exists classes of products
where Linux would need to expect services from such a processor or the
delay of Linux and operating system being able to load up such a
firmware is unacceptable.
To address these needs, we need some minimal capability to load such a
system and ensure it is started prior to an Operating System(Linux or
any other) is started up.
NOTE: This is NOT meant to be a solve-all solution, instead, it tries to
address certain class of SoCs and products that need such a solution.
A very simple model is introduced here as part of the initial support
that supports microcontrollers with internal memory (no MMU, no
execution from external memory, or specific image format needs). This
basic framework can then (hopefully) be extensible to other complex SoC
processor support as need be.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Simon Glass <sjg@chromium.org>
Mugunthan V N [Mon, 7 Sep 2015 08:52:23 +0000 (14:22 +0530)]
defconfig: am335x: gp_evm: enable ethernet driver model
enable ethernet driver model for am335x gp evm as cpsw supports
driver model
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Mugunthan V N [Mon, 7 Sep 2015 08:52:22 +0000 (14:22 +0530)]
defconfig: am335x: bbb: enable ethernet driver model
enable ethernet driver model for am335x beagle bone black as cpsw
supports driver model
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Mugunthan V N [Mon, 7 Sep 2015 08:52:21 +0000 (14:22 +0530)]
drivers: net: cpsw: convert driver to adopt device driver model
adopt cpsw driver to device driver model
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Mugunthan V N [Mon, 7 Sep 2015 08:52:20 +0000 (14:22 +0530)]
drivers: net: cpsw: prepare driver for device model migration
prepare driver for device model migration
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Mugunthan V N [Mon, 7 Sep 2015 08:52:19 +0000 (14:22 +0530)]
am335x_evm: do not define usb ether gadget when Eth DM is defined
Since usb ether gadget doesn't have support for driver model, so
not defining usb ether gadget when ethernet driver model is
defined.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Mugunthan V N [Mon, 7 Sep 2015 08:52:18 +0000 (14:22 +0530)]
am335x_evm: prepare for eth driver model support
Prepare board file so that ethernet registration are
commented for DM conversion
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Sjoerd Simons [Fri, 28 Aug 2015 13:01:56 +0000 (15:01 +0200)]
configs: am335x_evm: Support distro bootcmds
Add support for distro bootcmds and network booting while retaining
backwards compatibility with the current "legacy" setup. With these
changes the default boot sequence becomes:
* SD card (standard distro boot)
* SD card (legacy boot)
* EMMC (standard distro boot)
* EMMC (legacy boot)
* Nand (legacy boot)
* PXE (standard distro boot)
* DHCP (standard distro boot)
The older boot scripts have some overlap with what the distro
bootcommands to however i've left them unchanged to prevent introduction
of subtle bugs.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Sjoerd Simons [Fri, 28 Aug 2015 13:01:55 +0000 (15:01 +0200)]
configs: ti_armv7_common.h: Add default addresses for pxe and scripts
Add mandatory address variables for loading scripts and pxe configuration as
per README.distro
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Sjoerd Simons [Fri, 28 Aug 2015 13:01:54 +0000 (15:01 +0200)]
config_distro_bootcmd.h: Use a private variable for bootpart
Hush has an oddity where using ${var} causes var to resolved in the the global
address space (iotw the environment) first and only afterwards will the local
variable space be searched.
This causes odd side-effects when iterating over the boot partitions
using ${bootpart} if the environment also has a bootpart variable (e.g. for
the various TI boards). Fix this by using the hopefully more unique
${distro_bootpart} instead of ${bootpart}.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Paul Kocialkowski [Thu, 27 Aug 2015 17:37:14 +0000 (19:37 +0200)]
omap-common: Common get_board_serial function to pass serial through ATAG
Since there is a common function to grab the serial number from the die id bits,
it makes sense have one to parse that serial number and feed it to the serial
ATAG.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@konsulko.com>
Paul Kocialkowski [Thu, 27 Aug 2015 17:37:13 +0000 (19:37 +0200)]
omap-common: Common function to display die id, replacing omap3-specific version
This introduces omap_die_id_display to display the full die id.
There is no need to store it in an environment variable, that no boot script
is using anyway.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@konsulko.com>
Paul Kocialkowski [Thu, 27 Aug 2015 17:37:12 +0000 (19:37 +0200)]
omap-common: Common serial and usbethaddr functions based on die id
Now that we have a common prototype to grab the omap die id, functions to figure
out a serial number and usb ethernet address can use it directly.
Those also get an omap_die_id prefix for better consistency.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@konsulko.com>
Paul Kocialkowski [Thu, 27 Aug 2015 17:37:11 +0000 (19:37 +0200)]
omap5: omap_die_id support
This introduces omap5 support for omap_die_id, which matches the common
omap_die_id definition. It replaces board-specific code to grab the die id bits.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@konsulko.com>
Paul Kocialkowski [Thu, 27 Aug 2015 17:37:10 +0000 (19:37 +0200)]
omap4: omap_die_id support
This introduces omap4 support for omap_die_id, which matches the common
omap_die_id definition. It replaces board-specific code to grab the die id bits.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@konsulko.com>
Paul Kocialkowski [Thu, 27 Aug 2015 17:37:09 +0000 (19:37 +0200)]
omap3: omap_die_id support
This replaces the previous get_dieid definition with omap_die_id, that matches
the common omap_die_id definition.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@konsulko.com>
Paul Kocialkowski [Thu, 27 Aug 2015 17:37:08 +0000 (19:37 +0200)]
omap-common: Common omap_die_id definition
This introduces a common definition for omap_die_id, that aims at providing a
common interface for accessing omap platform's die id bits.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@konsulko.com>
dbatzle@dcbcyber.com [Wed, 26 Aug 2015 00:55:30 +0000 (20:55 -0400)]
ARM Fix pandaboard es and a4 revision ID
board_name environment variable was not getting set correctly for Pandaboard A4 and ES
Signed-off-by: David Batzle <dbatzle@dcbcyber.com>
CC: Albert Aribaud <albert.u.boot@aribaud.net>; Tom Rini <trini@ti.com>; Peter Robinson <pbrobinson@gmail.com>
Tom Rini [Thu, 22 Oct 2015 00:47:40 +0000 (20:47 -0400)]
Merge git://git.denx.de/u-boot-x86
George McCollister [Wed, 21 Oct 2015 13:05:33 +0000 (08:05 -0500)]
x86: Add support for Advantech SOM-6896
Advantech SOM-6896 is a Broadwell U based COM Express Compact Module
Type 6. This patch adds support for it as a coreboot payload.
On board SATA and SPI are functional. On board Ethernet isn't functional
but since it's optional and ties up a PCIe x4 that is otherwise brought
out, this isn't a concern at the moment. USB doesn't work since the
xHCI driver appears to be broken.
Signed-off-by: George McCollister <george.mccollister@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Bin Meng [Sun, 18 Oct 2015 21:55:37 +0000 (15:55 -0600)]
x86: ivybridge: Enable the MRC cache
This works correctly now, so enable it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Dropped malloc() and adjusted commit message:
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 18 Oct 2015 21:55:36 +0000 (15:55 -0600)]
x86: ivybridge: Measure the MRC code execution time
This code takes about 450ms without the MRC cache and about 27ms with the
cache. Add a debug timer so that this time can be displayed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 18 Oct 2015 21:55:35 +0000 (15:55 -0600)]
x86: ivybridge: Fix car_uninit() to correctly set run state
At present a missing $ causes this code to hang when using the MRC cache/
Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 18 Oct 2015 21:55:33 +0000 (15:55 -0600)]
x86: ivybridge: Check the RTC return value
The RTC can fail, so check the return value for reads.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 18 Oct 2015 21:55:32 +0000 (15:55 -0600)]
x86: ivybridge: Use 'ret' instead of 'rcode'
For consistency, use 'ret' to handle a return value.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 18 Oct 2015 21:55:31 +0000 (15:55 -0600)]
dm: rtc: Correct rtc_read32() return value
The current check is incorrect and will fail when any non-zero byte is read.
Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 18 Oct 2015 21:55:30 +0000 (15:55 -0600)]
rtc: mc146818: Use probe() to set up the device
At present this driver uses bind() to set up the device. The bind() method
should not touch the hardware, so move the init code to probe().
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 18 Oct 2015 21:55:29 +0000 (15:55 -0600)]
rtc: mc146818: Add a comment to the #endif
Add a comment to make it clear to which block the #endif relates.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 19 Oct 2015 01:51:27 +0000 (19:51 -0600)]
x86: chromebook_link: Enable the debug UART
Add support for the debug UART on link. This is useful for early debugging.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 19 Oct 2015 01:51:26 +0000 (19:51 -0600)]
x86: Init the debug UART if enabled
If the debug UART is enabled, get it ready for use at the earliest possible
opportunity. This is not actually very early, but until we have a stack it
is difficult to make it work.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 19 Oct 2015 01:51:25 +0000 (19:51 -0600)]
debug_uart: Add an option to announce the debug UART
It is useful to see a message from the debug UART early during boot so that
you know things are working. Add an option to enable this. The message will
be displayed as soon as debug_uart_init() is called.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 19 Oct 2015 01:51:24 +0000 (19:51 -0600)]
debug_uart: Support board-specific UART initialisation
Some boards need to set things up before the debug UART can be used. On
these boards a call to debug_uart_init() is insufficient. When this option
is enabled, the function board_debug_uart_init() will be called when
debug_uart_init() is called. You can put any code here that is needed to
set up the UART ready for use, such as set pin multiplexing or enable
clocks.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 19 Oct 2015 01:51:23 +0000 (19:51 -0600)]
debug_uart: Adjust the declaration of debug_uart_init()
We want to be able to add other common code to this function. So change the
driver's version to have an underscore before it, just like
_debug_uart_putc(). Define debug_uart_init() to call this version.
Update all drivers to this new method.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
George McCollister [Mon, 12 Oct 2015 21:18:41 +0000 (16:18 -0500)]
x86: spi: Add support for Wildcat Point
Add the Wildcat Point ID so Broadwell U based boards can use SPI.
Signed-off-by: George McCollister <george.mccollister@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
George McCollister [Mon, 12 Oct 2015 21:18:40 +0000 (16:18 -0500)]
x86: pci: Add PCI IDs for Wildcat Point
Add Wildcat Point AHCI and LPC PCI IDs which are present on Broadwell U
based (and possibly other) boards.
Signed-off-by: George McCollister <george.mccollister@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Bin Meng [Wed, 14 Oct 2015 09:01:21 +0000 (02:01 -0700)]
x86: Pass correct cpu_index to ap_init()
In sipi_vector.S, cpu_index (passed as %eax) is wrongly overwritten
by the ap_init() function address. Correct it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 12 Oct 2015 08:30:43 +0000 (01:30 -0700)]
x86: galileo: Enable mrc cache
Now that we have added MRC cache on quark support codes,
enable it on Intel Galileo board.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 12 Oct 2015 08:30:42 +0000 (01:30 -0700)]
x86: quark: Implement mrc cache
Using existing mrccache library to implement mrc cache support
for Intel Quark.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 12 Oct 2015 04:37:47 +0000 (21:37 -0700)]
x86: ivybridge: Correct two typos for MRC
It should be MRC, not MCR.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 12 Oct 2015 04:37:46 +0000 (21:37 -0700)]
x86: Remove unused rw-mrc-cache properties in the link and panther dts files
"type" and "wipe-value" are never used by the mrccache codes.
Remove them to avoid confusion. This also removes the alignment
comment in the panther dts file.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 12 Oct 2015 04:37:45 +0000 (21:37 -0700)]
x86: baytrail: Issue full system reset in reset_cpu()
With MRC cache enabled, when typing 'reset' in the U-Boot shell,
BayTrail FSP initialization hangs at "Configuring Memory Start":
Setting BootMode to 0
Install PPI:
1F4C6F90-B06B-48D8-A201-
BAE5F1CD7D56
Register PPI Notify:
F894643D-C449-42D1-8EA8-
85BDD8C65BDE
About to call MrcInit();
BayleyBay Platform Type
CurrentMrcData.BootMode = 4
Taking Fastboot path!
Configuring Memory Start...
Changing reset_cpu() to do a full system reset fixes this issue.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 12 Oct 2015 04:37:44 +0000 (21:37 -0700)]
x86: Enable mrc cache for bayleybay and minnowmax
Now that we have added MRC cache for Intel FSP and BayTrail codes,
enable it for all BayTrail boards (Bayley Bay and Minnow Max).
Note it turns out that FSP for Intel Atom E6xx does not produce
the HOB for NV storage, so we don't have such functionality on
Intel Crown Bay board.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 12 Oct 2015 04:37:43 +0000 (21:37 -0700)]
x86: baytrail: Save mrc cache to spi flash
Save MRC cache to SPI flash in arch_misc_init().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 12 Oct 2015 04:37:42 +0000 (21:37 -0700)]
x86: fsp: Pass mrc cache to fsp_init() and save it to gd after fsp_init()
fsp_init() call has a parameter nvs_buf which is used by FSP as the
MRC cache but currently is blindly set to NULL. Retreive the MRC
cache from SPI flash and pass it to fsp_init() call. After the call,
save FSP produced MRC cache to SPI flash too.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 12 Oct 2015 04:37:41 +0000 (21:37 -0700)]
x86: Use struct mrc_region to describe a mrc region
Currently struct fmap_entry is used to describe a mrc region.
However this structure contains some other fields that are not
related to mrc cache and causes confusion. Besides, it does not
include a base address field to store SPI flash's base address.
Instead in the mrccache.c it tries to use CONFIG_ROM_SIZE to
calculate the SPI flash base address, which unfortunately is
not 100% correct as CONFIG_ROM_SIZE may not match the whole
SPI flash size.
Define a new struct mrc_region and use it instead.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 12 Oct 2015 04:37:40 +0000 (21:37 -0700)]
x86: ivybridge: Use APIs provided in the mrccache lib
Remove the call to custom mrc cache APIs, and use the ones
provided in the mrccache lib.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 12 Oct 2015 04:37:39 +0000 (21:37 -0700)]
x86: Add more common routines to manipulate mrc cache
This adds mrccache_reserve(), mrccache_get_region() and
mrccache_save() APIs to the mrccache codes. They are ported
from the ivybridge implementation, but with some changes.
For example, in the mrccache_reserve(), ivybridge version
only reserves the pure MRC data, which causes additional
malloc() when saving the cache as the save API needs some
meta data. Now we change it to save the whole MRC date plus
the meta data to elinimate the need for the malloc() later.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 12 Oct 2015 04:37:38 +0000 (21:37 -0700)]
x86: Add various minor tidy-ups in mrccache codes
Fix some nits, improve some comments and reorder some codes
a little bit.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
projects / oweals / u-boot.git / log