oweals/u-boot.git
8 years agoMX6UL: Add definition for UART6 base address
Fabio Estevam [Mon, 18 Apr 2016 12:56:15 +0000 (09:56 -0300)]
MX6UL: Add definition for UART6 base address

Define the UART6_BASE_ADDR for MX6UL.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
8 years agoboard: ge: bx50v3: Fix to meet LVDS display power on timing
Akshay Bhat [Tue, 12 Apr 2016 22:14:00 +0000 (18:14 -0400)]
board: ge: bx50v3: Fix to meet LVDS display power on timing

On a reset/reboot, the display power needs to be off for atleast 500ms
before turning it back on. So add a delay to the boot process to meet
the display timing requirement.

Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Cc: Stefano Babic <sbabic@denx.de>
8 years agoboard: ge: bx50v3: Use pwm for display backlight
Akshay Bhat [Tue, 12 Apr 2016 22:13:59 +0000 (18:13 -0400)]
board: ge: bx50v3: Use pwm for display backlight

Setup the LCD backlight brightness control pin to use PWM

Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Cc: Stefano Babic <sbabic@denx.de>
8 years agoboard: ge: bx50v3: Setup LDB_DI_CLK source
Akshay Bhat [Tue, 12 Apr 2016 22:13:58 +0000 (18:13 -0400)]
board: ge: bx50v3: Setup LDB_DI_CLK source

To generate accurate pixel clocks required by the displays we need to
set the ldb_di_clk source on bx50v3 to PLL3 and b850v3 to PLL5. Since
PLL5 is disabled on reset, we need to enable PLL5.

Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Cc: Stefano Babic <sbabic@denx.de>
8 years agoboard: ge: bx50v3: Split display setup function
Akshay Bhat [Tue, 12 Apr 2016 22:13:57 +0000 (18:13 -0400)]
board: ge: bx50v3: Split display setup function

B450v3/B650v3 uses single channel LVDS and does not support HDMI.
B850v3 uses dual channel LVDS and supports HDMI. Hence split the display
setup into two different functions.

Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Cc: Stefano Babic <sbabic@denx.de>
8 years agoimx: mx6: Fix procedure to switch the parent of LDB_DI_CLK
Akshay Bhat [Tue, 12 Apr 2016 22:13:56 +0000 (18:13 -0400)]
imx: mx6: Fix procedure to switch the parent of LDB_DI_CLK

Due to incorrect placement of the clock gate cell in the ldb_di[x]_clk tree,
the glitchy parent mux of ldb_di[x]_clk can cause a glitch to enter the
ldb_di_ipu_div divider. If the divider gets locked up, no ldb_di[x]_clk is
generated, and the LVDS display will hang when the ipu_di_clk is sourced from
ldb_di_clk.

To fix the problem, both the new and current parent of the ldb_di_clk should
be disabled before the switch. This patch ensures that correct steps are
followed when ldb_di_clk parent is switched in the beginning of boot.

This patch was ported from the 3.10.17 NXP kernel
http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/commit/?h=imx_3.10.17_1.0.1_ga&id=eecbe9a52587cf9eec30132fb9b8a6761f3a1e6d

NXP errata number: ERR009219, EB821

Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
8 years agoarm: mx5: Fix NAND image generation
Marek Vasut [Tue, 5 Apr 2016 08:54:06 +0000 (10:54 +0200)]
arm: mx5: Fix NAND image generation

The echo -ne "\xNN" does not work in certain bourne-compatible shells, like
dash. The recommended way of hex->char conversion is using printf(1), but
there is a pitfall here. The GNU printf does support "\xNN" format, but
according to the opengroup documentation, this is not part of POSIX. The
POSIX printf only defines "\NNN" where N is octal. Thus, for the sake of
compatibility, we use that.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
8 years agoboard: ge: bx50v3: Disable unused pins
Justin Waters [Wed, 13 Apr 2016 21:03:18 +0000 (17:03 -0400)]
board: ge: bx50v3: Disable unused pins

Certain pins are not used on the i.MX6, and should have a neutral
pad configuration in order to reduce electrical interference on
the board. This commit defines these pins with a default value
rather than relying on the system defaults.

Signed-off-by: Justin Waters <justin.waters@timesys.com>
Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Cc: Stefano Babic <sbabic@denx.de>
8 years agoARM: rpi: fix 64-bit CONFIG_SYS_TEXT_BASE
Stephen Warren [Sat, 16 Apr 2016 02:42:59 +0000 (20:42 -0600)]
ARM: rpi: fix 64-bit CONFIG_SYS_TEXT_BASE

The Pi firmware has changed the default "kernel" load address for 64-bit
mode. The authors have confirmed that this is a deliberate and long-term
change. Adapt U-Boot to the new value.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
8 years agodrivers/tpm/tpm_tis_sandbox.c: Fix uninitialized variable use
Tom Rini [Tue, 12 Apr 2016 19:11:22 +0000 (15:11 -0400)]
drivers/tpm/tpm_tis_sandbox.c: Fix uninitialized variable use

In rollback_space_kernel we were not initializing the reserved fields
which should be for safety sake, and doing memset here means we don't
need to set the version field specifically either.

Reported-by: Coverity (CID: 143917)
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
8 years agofdt: implement dev_get_addr_name()
Stephen Warren [Wed, 6 Apr 2016 18:49:19 +0000 (12:49 -0600)]
fdt: implement dev_get_addr_name()

This function parses the reg property based on an index found in the
reg-names property. This is required for bindings that are written
using reg-names rather than hard-coding indices in reg.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
8 years agosandbox: Enable many more commands
Tom Rini [Tue, 15 Mar 2016 17:20:23 +0000 (13:20 -0400)]
sandbox: Enable many more commands

- Set CONFIG_SYS_CACHELINE_SIZE to ARCH_DMA_MINALIGN as that should be
  good enough.
- Make <asm/io.h> include <asm/types.h> like other arches do
- Enable many many more drivers in sandbox_defconfig so that we can get
  more build-time testing on this platform.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agotest/dm/core.c: Make pre-reloc test use pre-reloc struct
Tom Rini [Sun, 20 Mar 2016 14:10:28 +0000 (10:10 -0400)]
test/dm/core.c: Make pre-reloc test use pre-reloc struct

LLVM 3.5 noted:
test/dm/core.c:41:35: warning: unused variable 'test_pdata_pre_reloc' [-Wunused-const-variable]
static const struct dm_test_pdata test_pdata_pre_reloc = {

And the correct fix here is that the driver_info_pre_reloc test should
use the test_pdata_pre_reloc not test_pdata_manual variable

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
8 years agoboard: README.sandbox: Update dm test command
Jagan Teki [Thu, 17 Mar 2016 06:53:19 +0000 (12:23 +0530)]
board: README.sandbox: Update dm test command

Update dm test command with pytest instead of ./test/dm/test-dm.sh

Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
8 years agodoc: driver-model: Update dm tests run using test.py
Jagan Teki [Thu, 17 Mar 2016 06:53:18 +0000 (12:23 +0530)]
doc: driver-model: Update dm tests run using test.py

Since all the tests are implemented in pytest infrastructure,
So update the dm tests with the same instead of ./test/dm/test-dm.sh

Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
8 years agodm: device.c: Minor coding-style fix
Stefan Roese [Wed, 16 Mar 2016 08:58:01 +0000 (09:58 +0100)]
dm: device.c: Minor coding-style fix

Fix multi-line comment indentation in device_bind()

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
8 years agodm: part: fix missing driver name in debug print
Nishanth Menon [Tue, 15 Mar 2016 21:15:32 +0000 (16:15 -0500)]
dm: part: fix missing driver name in debug print

Fixes the following warning with PART_DEBUG enabled:
disk/part.c: In function ‘get_partition_info’:
disk/part.c:372:3: warning: format ‘%s’ expects a matching ‘char *’ argument [-Wformat]

Signed-off-by: Nishanth Menon <nm@ti.com>
8 years agodm: core: device: set pinctrl state for pinctrl device
Peng Fan [Sat, 12 Mar 2016 05:17:38 +0000 (13:17 +0800)]
dm: core: device: set pinctrl state for pinctrl device

We may have pinmux settings for pinctrl device, like the following
example:
"
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog_1>;
imx6ul-evk {
pinctrl_hog_1: hoggrp-1 {
fsl,pins = <
MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059 /* SD1 CD */
MX6UL_PAD_GPIO1_IO05__USDHC1_VSELECT 0x17059 /* SD1 VSELECT */
MX6UL_PAD_GPIO1_IO09__GPIO1_IO09        0x17059 /* SD1 RESET */
MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x80000000
>;
};
[......]
};
"

We should not only select pinctrl state for non pinctrl devices, we
need also to handle pin mux settings such as pinctrl_log for pinctrl
devices.

So at the end of probing process of pinctrl device, select the default
state of pinctrl device.

Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
8 years agoxpress: Update <usb/ehci-fsl.h> include
Tom Rini [Wed, 13 Apr 2016 19:45:50 +0000 (15:45 -0400)]
xpress: Update <usb/ehci-fsl.h> include

This has been renamed to <usb/ehci-ci.h> some time ago but was missed
here.

Signed-off-by: Tom Rini <trini@konsulko.com>
8 years agoMerge branch 'master' of git://www.denx.de/git/u-boot-microblaze
Tom Rini [Wed, 13 Apr 2016 16:53:11 +0000 (12:53 -0400)]
Merge branch 'master' of git://denx.de/git/u-boot-microblaze

8 years agoARM64: zynqmp: Use i2c cadence DM driver
Michal Simek [Wed, 13 Apr 2016 06:49:03 +0000 (08:49 +0200)]
ARM64: zynqmp: Use i2c cadence DM driver

Use i2c cadence DM driver for all zynqmp targets except ZCU102
because I2C muxes and PCA953x are not supported in the tree yet.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
8 years agodm: i2c: Add driver for Cadence I2C IP
Moritz Fischer [Mon, 28 Dec 2015 17:47:11 +0000 (09:47 -0800)]
dm: i2c: Add driver for Cadence I2C IP

This is a possible drop in replacement for drivers/i2c/zynq-i2c.c

Since this is cadence IP it has been renamed to cdns-i2c,
to make sense with the compatible string.

Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoi2c: Describe Cadence I2C devicetree bindings
Moritz Fischer [Mon, 28 Dec 2015 17:47:10 +0000 (09:47 -0800)]
i2c: Describe Cadence I2C devicetree bindings

Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Enable pca953x driver for zcu102
Michal Simek [Mon, 11 Apr 2016 11:48:32 +0000 (13:48 +0200)]
ARM64: zynqmp: Enable pca953x driver for zcu102

zcu102 has two pca953x on i2c bus 0. Chips 0x20 and 0x21.
Enable option to work with these two chips.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoGPIO: pca953x: Remove compilation warnings on arm64
Michal Simek [Mon, 11 Apr 2016 11:51:26 +0000 (13:51 +0200)]
GPIO: pca953x: Remove compilation warnings on arm64

Warnings:
w+../drivers/gpio/pca953x.c: In function ‘do_pca953x’:
w+../drivers/gpio/pca953x.c:220:5: warning: cast from pointer to integer
of different size [-Wpointer-to-int-cast]
w+../drivers/gpio/pca953x.c:233:10: warning: cast from pointer to
integer of different size [-Wpointer-to-int-cast]

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Enable CMD_GPIO and DM_GPIO for ep108
Michal Simek [Mon, 11 Apr 2016 09:33:26 +0000 (11:33 +0200)]
ARM64: zynqmp: Enable CMD_GPIO and DM_GPIO for ep108

Enable missing GPIO options.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agozynqmp: Kconfig: Enable ZYNQ_GPIO for ZynqMP
Siva Durga Prasad Paladugu [Thu, 10 Mar 2016 10:57:44 +0000 (16:27 +0530)]
zynqmp: Kconfig: Enable ZYNQ_GPIO for ZynqMP

Enable ZYNQ_GPIO for ZynqMP using Kconfig. It enables the GPIO
driver support for ZynqMP.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agogpio: zynqmp: Add GPIO driver support for ZynqMP
Siva Durga Prasad Paladugu [Thu, 10 Mar 2016 10:57:43 +0000 (16:27 +0530)]
gpio: zynqmp: Add GPIO driver support for ZynqMP

Add GPIO driver support for ZynqMP platform

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agogpio: zynq: Move the definitions to driver file
Siva Durga Prasad Paladugu [Thu, 10 Mar 2016 10:57:42 +0000 (16:27 +0530)]
gpio: zynq: Move the definitions to driver file

Move all the gpio definitions to driver file as
there is no use of them in other files.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agogpio: zynq: Remove non driver model code
Siva Durga Prasad Paladugu [Thu, 10 Mar 2016 10:57:40 +0000 (16:27 +0530)]
gpio: zynq: Remove non driver model code

Remove non driver model support as it moved
to driver model. Dont need non driver model
anymore.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agogpio: Kconfig: Enable Zynq GPIO driver using kconfig
Siva Durga Prasad Paladugu [Thu, 10 Mar 2016 10:57:39 +0000 (16:27 +0530)]
gpio: Kconfig: Enable Zynq GPIO driver using kconfig

Enable DM GPIO and ZYNQ GPIO using kconfig instead of the board
config file.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agogpio: zynq: Convert Zynq GPIO to driver model
Siva Durga Prasad Paladugu [Thu, 10 Mar 2016 10:57:38 +0000 (16:27 +0530)]
gpio: zynq: Convert Zynq GPIO to driver model

Convert Zynq GPIO driver to driver model

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Clean header after moving stuff to Kconfig
Michal Simek [Thu, 7 Apr 2016 14:25:35 +0000 (16:25 +0200)]
ARM64: zynqmp: Clean header after moving stuff to Kconfig

Moving stuff to Kconfig by script is keep some empty lines
or comment in the file. Remove them.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Add support for zc1751 with DC cards
Michal Simek [Thu, 7 Apr 2016 14:00:11 +0000 (16:00 +0200)]
ARM64: zynqmp: Add support for zc1751 with DC cards

Support ZynqMP zc1751 with DC cards.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Add defconfig for zcu102 revB board
Michal Simek [Mon, 11 Apr 2016 06:07:07 +0000 (08:07 +0200)]
ARM64: zynqmp: Add defconfig for zcu102 revB board

Support natively revB board. Till now support for revB was done via
zcu102 defconfig where device-tree was changed to revB.
This patch is adding direct defconfig for RevB.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Add support for ZCU102 platform
Michal Simek [Thu, 7 Apr 2016 13:58:23 +0000 (15:58 +0200)]
ARM64: zynqmp: Add support for ZCU102 platform

Add new board support.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Remove netdev.h from board file
Michal Simek [Mon, 11 Apr 2016 09:44:40 +0000 (11:44 +0200)]
ARM64: zynqmp: Remove netdev.h from board file

Including netdev.h is causing compilation warning:
+ int fecmxc_register_mii_postcall(struct eth_device *dev, int
(*cb)(int));
+                                         ^
w+In file included from ../board/xilinx/zynqmp/zynqmp.c:9:0:
w+../include/netdev.h:204:41: warning: ‘struct eth_device’ declared
inside parameter list [enabled by default]
w+../include/netdev.h:204:41: warning: its scope is only this definition
or declaration, which is probably not what you want [enabled by default]

This patch removes it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Make DDR detection code work on 32bit system
Michal Simek [Fri, 1 Apr 2016 13:55:47 +0000 (15:55 +0200)]
ARM64: zynqmp: Make DDR detection code work on 32bit system

Define u64 types to be usable on 32bit system because of 64bit address
and size cells and 32bit shifts in the code.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Extend early malloc space to be able to run DM drivers
Michal Simek [Mon, 22 Feb 2016 09:01:27 +0000 (10:01 +0100)]
ARM64: zynqmp: Extend early malloc space to be able to run DM drivers

DM drivers need more malloc space for early DM models allocation.
Use 4k instead of 1k.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Do not setup DM_ETH/GPIO/MMC by default for all boards
Michal Simek [Mon, 4 Apr 2016 13:32:20 +0000 (15:32 +0200)]
ARM64: zynqmp: Do not setup DM_ETH/GPIO/MMC by default for all boards

There are mini configurations which need to be fit to OCM that's why
these options shouldn't be enabled by default.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Add missing nand node for ep108
Punnaiah Choudary Kalluri [Thu, 5 Nov 2015 16:51:14 +0000 (22:21 +0530)]
ARM64: zynqmp: Add missing nand node for ep108

Add missing nand node for ep108.

Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Added OOB timing settings in zynqmp-ep108.dts
Anurag Kumar Vulisha [Thu, 5 Nov 2015 11:51:37 +0000 (17:21 +0530)]
ARM64: zynqmp: Added OOB timing settings in zynqmp-ep108.dts

This patch adds the sata port phy OOB timing values in the sata
device-tree node.

Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Use 64bit size cell format for memory node
Michal Simek [Thu, 7 Apr 2016 13:07:38 +0000 (15:07 +0200)]
ARM64: zynqmp: Use 64bit size cell format for memory node

Enable option to support more then 4GB memories in single size block.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Fix DWC3 binding with the kernel
Michal Simek [Thu, 7 Apr 2016 13:06:07 +0000 (15:06 +0200)]
ARM64: zynqmp: Fix DWC3 binding with the kernel

Use the same binding as is used in mainline Linux kernel.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Add serdes address space dp driver
Michal Simek [Wed, 27 Jan 2016 18:02:37 +0000 (19:02 +0100)]
ARM64: zynqmp: Add serdes address space dp driver

For run time serdes adjustment.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Align register description
Michal Simek [Thu, 7 Apr 2016 13:01:33 +0000 (15:01 +0200)]
ARM64: zynqmp: Align register description

Separate register space and put it on more lines.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: dp: Add default properties to zynqmp.dtsi
Hyun Kwon [Tue, 24 Nov 2015 01:12:55 +0000 (17:12 -0800)]
ARM64: zynqmp: dp: Add default properties to zynqmp.dtsi

Add some default properties to zynqmp.dtsi.

Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Use correct addresses in node names
Hyun Kwon [Tue, 24 Nov 2015 01:12:54 +0000 (17:12 -0800)]
ARM64: zynqmp: Use correct addresses in node names

Reflect actual silicon addresses in DT node names.

Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Align node address with parent node for dpdma
Michal Simek [Wed, 27 Jan 2016 18:04:56 +0000 (19:04 +0100)]
ARM64: zynqmp: Align node address with parent node for dpdma

Use right addresses for channel names

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Add backward compatible string for uart
Michal Simek [Fri, 27 Nov 2015 12:22:58 +0000 (13:22 +0100)]
ARM64: zynqmp: Add backward compatible string for uart

Mainline kernel has no r1p12 compatible string that's why console stops
to work with the latest DTS files. Append generic compatible string.
Keep in your mind that using this generic compatible string not all uart
features will be available.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Fix coding style for pcie
Michal Simek [Wed, 20 Jan 2016 11:59:23 +0000 (12:59 +0100)]
ARM64: zynqmp: Fix coding style for pcie

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Extend pcie node to support legacy interrupts
Bharat Kumar Gogada [Mon, 15 Feb 2016 15:48:58 +0000 (21:18 +0530)]
ARM64: zynqmp: Extend pcie node to support legacy interrupts

Modifying device tree node to support legacy interrupts.

Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com>
Signed-off-by: Ravi Kiran Gummaluri <rgummal@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Add interrupt-controller property to gpio nodes
Michal Simek [Mon, 23 Nov 2015 12:26:15 +0000 (13:26 +0100)]
ARM64: zynqmp: Add interrupt-controller property to gpio nodes

GPIO driver supports an input interrupt that's why gpio node itself can
be labeled as interrupt controller.

Reported-by: John Linn <linnj@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Add ddrc node in dts
Naga Sureshkumar Relli [Fri, 11 Mar 2016 07:40:26 +0000 (13:10 +0530)]
ARM64: zynqmp: Add ddrc node in dts

This patch adds ddrc memory controller node in dts.
size mentioned in dts is 0x30000, because we need to access DDR_QOS
INTR registers located at fd090208 from this driver.

Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Added clocks to DT
VNSL Durga [Thu, 24 Mar 2016 17:15:12 +0000 (22:45 +0530)]
ARM64: zynqmp: Added clocks to DT

ZynqMP DMA's main clock and apb clock are added
in zynqmp DT.

Signed-off-by: VNSL Durga <vnsldurg@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
8 years agoARM64: zynqmp: Add CCI-400 node
Michal Simek [Thu, 26 Nov 2015 10:21:25 +0000 (11:21 +0100)]
ARM64: zynqmp: Add CCI-400 node

Add CCI-400 node to DTSI.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Add missing interrupt-parent to PMU node
Michal Simek [Thu, 7 Apr 2016 13:28:33 +0000 (15:28 +0200)]
ARM64: zynqmp: Add missing interrupt-parent to PMU node

ZynqMP is not using global interrupt-parent setting that's why
it has to be listed in every node separately. PMU node missed it and
this patch is adding it.

Reported-by: John Linn <John.Linn@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: DT: Add power domains
Soren Brinkmann [Mon, 11 Jan 2016 23:34:42 +0000 (15:34 -0800)]
ARM64: zynqmp: DT: Add power domains

Add power-domains to the DT and attach devices to them.
The power-domains are all logical domains as understood by firmware.
Each PD is identified by a unique identifier that the platform firmware
understands.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Added broken-tuning property to SD, eMMC nodes
P L Sai Krishna [Tue, 19 Jan 2016 13:31:10 +0000 (19:01 +0530)]
ARM64: zynqmp: Added broken-tuning property to SD, eMMC nodes

This patch adds broken-tuning property to SD and
eMMC nodes.

Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Sync GEM nodes with Linux
Michal Simek [Thu, 11 Feb 2016 14:26:46 +0000 (15:26 +0100)]
ARM64: zynqmp: Sync GEM nodes with Linux

Remove jumbo properties which are handled in the driver directly
and use mainline compatible string which is already handled by the
driver.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Hook up the GEMs to the SMMU
Edgar E. Iglesias [Thu, 26 Nov 2015 13:12:20 +0000 (14:12 +0100)]
ARM64: zynqmp: Hook up the GEMs to the SMMU

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Correct IRQ nr for the SMMU
Edgar E. Iglesias [Thu, 26 Nov 2015 13:12:19 +0000 (14:12 +0100)]
ARM64: zynqmp: Correct IRQ nr for the SMMU

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Add 8-bit bus width property.
P L Sai Krishna [Thu, 7 Jan 2016 09:27:27 +0000 (14:57 +0530)]
ARM64: zynqmp: Add 8-bit bus width property.

This patch add 8-bit bus width property to eMMC node.

Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: dt: Change qspi node compatible string
Ranjit Waghmode [Wed, 2 Dec 2015 04:36:58 +0000 (10:06 +0530)]
ARM64: zynqmp: dt: Change qspi node compatible string

This patch makes compatible string as "m25p80" for qspi node in
ep108 device tree file

Signed-off-by: Ranjit Waghmode <ranjit.waghmode@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Add missing mmc aliases
Michal Simek [Tue, 23 Feb 2016 08:30:15 +0000 (09:30 +0100)]
ARM64: zynqmp: Add missing mmc aliases

Add missing mmc aliases.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Use C pre-processor for includes in dts
Alistair Francis [Thu, 25 Feb 2016 17:30:03 +0000 (09:30 -0800)]
ARM64: zynqmp: Use C pre-processor for includes in dts

Change the dtsi include code to use the C pre-processor #include instead
of the device tree /include/. This brings all ZynqMP device trees inline
with each other.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Sören Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM64: zynqmp: Move kernel and fdt offsets and sizes to board config file
Siva Durga Prasad Paladugu [Mon, 2 Nov 2015 14:15:35 +0000 (19:45 +0530)]
ARM64: zynqmp: Move kernel and fdt offsets and sizes to board config file

Move kernel and fdt offsets and sizes to board config file
as the flash size varies across boards

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: Do not perform reset at the end of thor
Michal Simek [Thu, 7 Apr 2016 16:55:11 +0000 (18:55 +0200)]
ARM: zynq: Do not perform reset at the end of thor

Setup reset off for lthor.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: Support systems with more memory banks
Michal Simek [Fri, 1 Apr 2016 13:56:33 +0000 (15:56 +0200)]
ARM: zynq: Support systems with more memory banks

This is example how to change u-boot to support more memory banks read
from DT.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: Use memory initialization based on DTS file
Michal Simek [Fri, 1 Apr 2016 14:04:14 +0000 (16:04 +0200)]
ARM: zynq: Use memory initialization based on DTS file

Remove hardcoded memory sizes. Use information from DT memory node.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: Fix usb phy node for Zybo
Michal Simek [Thu, 7 Apr 2016 12:42:53 +0000 (14:42 +0200)]
ARM: zynq: Fix usb phy node for Zybo

Compatible property should be the first.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: Extend microzed board support
Michal Simek [Tue, 12 Jan 2016 07:06:36 +0000 (08:06 +0100)]
ARM: zynq: Extend microzed board support

Add missing DT nodes and enable USB.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Nathan Rossi <nathan@nathanrossi.com>
8 years agoARM: zynq: Add missing qspi for xm013
Michal Simek [Thu, 7 Apr 2016 11:08:35 +0000 (13:08 +0200)]
ARM: zynq: Add missing qspi for xm013

Add missing qspi node and make qspi as spi0.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: Create empty line below headers
Michal Simek [Thu, 7 Apr 2016 13:24:08 +0000 (15:24 +0200)]
ARM: zynq: Create empty line below headers

Sync with others zynq DTS files.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: Align spi and qspi node locations
Michal Simek [Thu, 7 Apr 2016 11:04:15 +0000 (13:04 +0200)]
ARM: zynq: Align spi and qspi node locations

Keep nodes alphabelitally sorted.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Nathan Rossi <nathan@nathanrossi.com>
8 years agoARM: zynq: zc706: Add adv7511 on i2c bus
Christian Kohn [Thu, 12 Nov 2015 23:53:36 +0000 (15:53 -0800)]
ARM: zynq: zc706: Add adv7511 on i2c bus

Add missing adv7511 and configure to match Base TRD.

Signed-off-by: Christian Kohn <christian.kohn@xilinx.com>
Reviewed-by: Nathan Rossi <nathan@nathanrossi.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: zc702: Add adv7511 on i2c bus
Christian Kohn [Thu, 12 Nov 2015 23:53:35 +0000 (15:53 -0800)]
ARM: zynq: zc702: Add adv7511 on i2c bus

Add bindings for adv7511.

Signed-off-by: Christian Kohn <christian.kohn@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: DT: Add ethernet phy reset information
Punnaiah Choudary Kalluri [Wed, 3 Feb 2016 09:57:18 +0000 (15:27 +0530)]
ARM: zynq: DT: Add ethernet phy reset information

Added phy reset gpio information for gem0.

Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: Fix bootargs in board dtsi
Michal Simek [Thu, 7 Apr 2016 09:15:00 +0000 (11:15 +0200)]
ARM: zynq: Fix bootargs in board dtsi

- Sync with Linux kernel
- Remove rootfs
- Remove earlyprintk

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: Align devcfg node
Michal Simek [Thu, 7 Apr 2016 09:00:37 +0000 (11:00 +0200)]
ARM: zynq: Align devcfg node

- Have compatible string as the first property
- Sync with Linux kernel dtsi
- Add missing interrupt properties

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: dts: Updated devicetree bindings for Zynq 7000 platform
Moritz Fischer [Tue, 23 Jun 2015 06:18:44 +0000 (23:18 -0700)]
ARM: dts: Updated devicetree bindings for Zynq 7000 platform

Added addtional bindings required for FPGA Manager operation
of the Xilinx Zynq Devc configuration interface.

Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: dts: zynq: Add devicetree entry for Xilinx Zynq reset controller.
Moritz Fischer [Fri, 31 Jul 2015 01:13:55 +0000 (18:13 -0700)]
ARM: dts: zynq: Add devicetree entry for Xilinx Zynq reset controller.

Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoARM: zynq: Add interrupt-controller property to gpio nodes
Michal Simek [Thu, 7 Apr 2016 08:54:08 +0000 (10:54 +0200)]
ARM: zynq: Add interrupt-controller property to gpio nodes

GPIO driver supports an input interrupt that's why gpio node itself can
be labeled as interrupt controller.

Reported-by: John Linn <linnj@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
8 years agoMerge git://www.denx.de/git/u-boot-cfi-flash
Tom Rini [Wed, 13 Apr 2016 12:27:49 +0000 (08:27 -0400)]
Merge git://www.denx.de/git/u-boot-cfi-flash

8 years agomtd: cfi: Unlock current sector instead of sector 0 before buffered write
Rouven Behr [Sun, 10 Apr 2016 11:38:13 +0000 (13:38 +0200)]
mtd: cfi: Unlock current sector instead of sector 0 before buffered write

Unlock current sector instead of sector 0 before buffered write.

[Patch subject and commit text slightly reworded, Stefan]

Signed-off-by: Rouven Behr <u-boot@behr-iss.de>
Signed-off-by: Stefan Roese <sr@denx.de>
8 years agoMerge branch 'master' of git://www.denx.de/git/u-boot-imx
Tom Rini [Wed, 13 Apr 2016 11:19:50 +0000 (07:19 -0400)]
Merge branch 'master' of git://denx.de/git/u-boot-imx

8 years agoMerge git://www.denx.de/git/u-boot-marvell
Tom Rini [Tue, 12 Apr 2016 13:10:54 +0000 (09:10 -0400)]
Merge git://www.denx.de/git/u-boot-marvell

8 years agoarm: mvebu: theadorable: Remove Board name output in checkboard
Stefan Roese [Fri, 8 Apr 2016 14:09:39 +0000 (16:09 +0200)]
arm: mvebu: theadorable: Remove Board name output in checkboard

This line is not needed, as the board supports DT based probing. And
here the "Model:" is already printed:

Model: Marvell Armada XP theadorable
Board: theadorable

One line for the board name is enough.

Signed-off-by: Stefan Roese <sr@denx.de>
8 years agoarm: mvebu: theadorable: Add PEX-switch detection and reset code
Stefan Roese [Fri, 8 Apr 2016 13:58:30 +0000 (15:58 +0200)]
arm: mvebu: theadorable: Add PEX-switch detection and reset code

Sometimes the PCIe link for the PEX-switch will not come-up. In this case,
the board is not in a usable state. This patch makes sure that in this
case a soft-reset is issued. If this soft-reset does not result in the
PEX-switch being detected after some soft-reset cycles, an I2C message
is sent to the uC to issue a complete power-cycle of the board.

Signed-off-by: Stefan Roese <sr@denx.de>
8 years agoarm: mvebu: theadorable: Enable 2nd I2C controller
Stefan Roese [Fri, 8 Apr 2016 13:58:29 +0000 (15:58 +0200)]
arm: mvebu: theadorable: Enable 2nd I2C controller

This patch enables the 2nd I2C controller on the Armada XP theadorable
board.

Signed-off-by: Stefan Roese <sr@denx.de>
8 years agoarm: mvebu: Add base address for 2nd I2C controller
Stefan Roese [Fri, 8 Apr 2016 13:58:28 +0000 (15:58 +0200)]
arm: mvebu: Add base address for 2nd I2C controller

Add MVEBU_TWSI1_BASE define so that the 2nd I2C controller on e.g. AXP
can be used.

Signed-off-by: Stefan Roese <sr@denx.de>
8 years agoarm: mvebu: theadorable: Add bootcounter support
Stefan Roese [Thu, 7 Apr 2016 08:48:14 +0000 (10:48 +0200)]
arm: mvebu: theadorable: Add bootcounter support

This patch adds bootcount support to the MVEBU theadorable board. Since
no reset-safe registers seem to be available, it uses the last 4KiB
of SDRAM for the bootcounter location.

Signed-off-by: Stefan Roese <sr@denx.de>
8 years agoarm: mvebu: theadorable: Add USB power toggle and tweak USB PHY register
Stefan Roese [Thu, 7 Apr 2016 08:48:13 +0000 (10:48 +0200)]
arm: mvebu: theadorable: Add USB power toggle and tweak USB PHY register

This patch adds an USB power toggle for theadorable. Additionally, the
USB PHY RX Channel Control 0 Register is changed to fix some issues
noticed while accessing some specific USB sticks.

Signed-off-by: Stefan Roese <sr@denx.de>
8 years agogpio: mvebu_gpio: Add missing out value set to gpio_direction_output()
Stefan Roese [Thu, 7 Apr 2016 05:41:00 +0000 (07:41 +0200)]
gpio: mvebu_gpio: Add missing out value set to gpio_direction_output()

This patch adds the missing configuration of the output value to the
gpio_direction_output() function. Without this, calling
gpio_direction_output() does not set the out-value at all and only
configures the gpio as output.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Kevin Smith <kevin.smith@elecsyscorp.com>
Reviewed-by: Kevin Smith <kevin.smith@elecsyscorp.com>
8 years agosunxi: Add defconfig and dts file for Orange Pi One SBC
Hans de Goede [Sat, 9 Apr 2016 13:02:24 +0000 (15:02 +0200)]
sunxi: Add defconfig and dts file for Orange Pi One SBC

The Orange Pi One SBC, is a stripped down version of the popular
Orange Pi PC. The one is a H3 based SBC, with 512M of RAM,
micro-sd slot, 1 host usb, 1 otg usb, hdmi and 100Mbit ethernet.

The dts is identical to the dts submitted to the upstream kernel.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
8 years agosunxi: H3: Do not clear usb companion clk-gate / reset on remove
Hans de Goede [Sat, 9 Apr 2016 13:00:52 +0000 (15:00 +0200)]
sunxi: H3: Do not clear usb companion clk-gate / reset on remove

On the H3 we need to enable the clk and de-assert the reset of the
companion to be able to talk to the actual usb host controller.

Before this commit we were also disabling the companion clk-gate /
asserting its reset on remove, causing the later remove callback of
the companion itself to (sometimes) fail with:

ERROR: USB HC reset timed out!

This commit fixes this by not disabling the companion's clk-gate nor
asserting its reset on remove.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
8 years agosunxi: Enable CMD_GPIO on all sunxi boards
Hans de Goede [Sun, 3 Apr 2016 07:41:44 +0000 (09:41 +0200)]
sunxi: Enable CMD_GPIO on all sunxi boards

We have CONFIG_CMD_GPIO=y in almost all sunxi boards, but after
its Kconfig conversion it has ended up missing on some recently
added boards.

Simply select it for ARCH_SUNXI, so that we get it on all
sunxi boards for both a consistent user experience and simpler
defconfig files.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
8 years agosunxi: Enable usb ports on the Sinovoip BPI M3
Hans de Goede [Fri, 1 Apr 2016 10:55:08 +0000 (12:55 +0200)]
sunxi: Enable usb ports on the Sinovoip BPI M3

DLDO3 is used to provide Port-D power and PD is used for the
usb-hub / sata-5v enable pins. The 2.5V comes from the schematic
and matches the factory image fex file.

The dts changes are the minimal changes needed for u-boot to
pick-up the usb host controllers. The upstream kernel does not
(yet) have usb host support.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
8 years agosunxi: Set DCDC1 to 3.3V on the Sinovoip BPI M3
Hans de Goede [Fri, 1 Apr 2016 10:53:20 +0000 (12:53 +0200)]
sunxi: Set DCDC1 to 3.3V on the Sinovoip BPI M3

This is the value used in the fex file of the manufacturer images,
and also the DCDC1 default. Sometimes lower values are used to save
battery power, but that does not apply to a SBC.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
8 years agosunxi: Add INITIAL_USB_SCAN_DELAY Kconfig option
Hans de Goede [Fri, 1 Apr 2016 20:39:26 +0000 (22:39 +0200)]
sunxi: Add INITIAL_USB_SCAN_DELAY Kconfig option

Some boards have on board usb devices which need longer than the USB
spec's 1 second to connect from board powerup. Add a config option which
when non 0 adds an extra delay before the first usb bus scan.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>