oweals/u-boot.git
16 years ago85xx: Fix detection of MP cpu spin up
Kumar Gala [Wed, 9 Apr 2008 09:20:57 +0000 (04:20 -0500)]
85xx: Fix detection of MP cpu spin up

We were looking at the wrong memory offset to determine of a secondary
cpu had been spun up or not.  Also added a warning message if the
all the secondary cpus we expect don't spin up.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
16 years ago85xx: Use SVR_SOC_VER instead of SVR_VER
Kumar Gala [Tue, 8 Apr 2008 15:45:50 +0000 (10:45 -0500)]
85xx: Use SVR_SOC_VER instead of SVR_VER

The recent change introduced by 'Update SVR numbers to expand support'
now requires that we use SVR_SOC_VER instead of SVR_VER if we want
to compare against a particular processor id.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
16 years agoRevert merge of git://www.denx.de/git/u-boot-arm, commit 62479b18:
Wolfgang Denk [Fri, 11 Apr 2008 13:11:26 +0000 (15:11 +0200)]
Revert merge of git://denx.de/git/u-boot-arm, commit 62479b18:

Reverting became necessary after it turned out that the patches in
the u-boot-arm repo were modified, and in some cases corrupted.

This reverts the following commits:

066bebd6353e33af3adefc3404560871699e9961
7a837b7310166ae8fc8b8d66d7ef01b60a80f9d6
c88ae20580b2b01487b4cdcc8b2a113f551aee36
a147e56f03871bba4f05058d5e04ce7deb010b04
d6674e0e2a6a1f033945f78838566210d3f28c95
8c8463cce44d849e37744749b32d38e1dfb12e50
c98b47ad24b2d91f41c09a3d62d7f70ad84f4b7d
8bf69d81782619187933a605f1a95ee1d069478d
8c16cb0d3b971f46fbe77c072664c0f2dcd4471d
a574a73852a527779234e73e17e7597fd8128882
1377b5583a48021d983e1fd565f7d40c89e84d63
1704dc20917b4f71e373e2c888497ee666d40380

Signed-off-by: Wolfgang Denk <wd@denx.de>
16 years agoMerge branch 'master' of git://www.denx.de/git/u-boot-fdt
Wolfgang Denk [Mon, 7 Apr 2008 22:20:52 +0000 (00:20 +0200)]
Merge branch 'master' of git://denx.de/git/u-boot-fdt

16 years agoMerge branch 'master' of git://www.denx.de/git/u-boot-at91
Wolfgang Denk [Mon, 7 Apr 2008 22:16:36 +0000 (00:16 +0200)]
Merge branch 'master' of git://denx.de/git/u-boot-at91

16 years agoMerge branch 'master' of git://www.denx.de/git/u-boot-net
Wolfgang Denk [Mon, 7 Apr 2008 22:11:22 +0000 (00:11 +0200)]
Merge branch 'master' of git://denx.de/git/u-boot-net

16 years agoMerge branch 'master' of git://www.denx.de/git/u-boot-coldfire
Wolfgang Denk [Mon, 7 Apr 2008 22:10:17 +0000 (00:10 +0200)]
Merge branch 'master' of git://denx.de/git/u-boot-coldfire

16 years agoMerge branch 'master' of git://www.denx.de/git/u-boot-blackfin
Wolfgang Denk [Mon, 7 Apr 2008 22:06:47 +0000 (00:06 +0200)]
Merge branch 'master' of git://denx.de/git/u-boot-blackfin

16 years agoMerge branch 'master' of git://www.denx.de/git/u-boot-arm
Wolfgang Denk [Mon, 7 Apr 2008 22:05:42 +0000 (00:05 +0200)]
Merge branch 'master' of git://denx.de/git/u-boot-arm

16 years agoMerge branch 'master' of git://www.denx.de/git/u-boot-sh
Wolfgang Denk [Mon, 7 Apr 2008 22:04:39 +0000 (00:04 +0200)]
Merge branch 'master' of git://denx.de/git/u-boot-sh

16 years agoMerge branch 'master' of git://www.denx.de/git/u-boot-mpc83xx
Wolfgang Denk [Mon, 7 Apr 2008 21:59:10 +0000 (23:59 +0200)]
Merge branch 'master' of git://denx.de/git/u-boot-mpc83xx

Conflicts:

lib_ppc/board.c

Signed-off-by: Wolfgang Denk <wd@denx.de>
16 years agoMerge branch 'master' of git://www.denx.de/git/u-boot-cfi-flash
Wolfgang Denk [Mon, 7 Apr 2008 21:55:47 +0000 (23:55 +0200)]
Merge branch 'master' of git://denx.de/git/u-boot-cfi-flash

16 years agoMerge branch 'master' of git://www.denx.de/git/u-boot-ppc4xx
Wolfgang Denk [Mon, 7 Apr 2008 21:52:32 +0000 (23:52 +0200)]
Merge branch 'master' of git://denx.de/git/u-boot-ppc4xx

16 years agoppc4xx: Fix 4xx enet driver to support 460GT EMAC2+3
Stefan Roese [Thu, 3 Apr 2008 12:50:34 +0000 (14:50 +0200)]
ppc4xx: Fix 4xx enet driver to support 460GT EMAC2+3

This patch fixes a problem with the RGMII setup of the 460GT. The 460GT
has 2 RGMII instances and we need to configure the 2nd RGMII instance
for the EMAC2+3 channels.

Signed-off-by: Stefan Roese <sr@denx.de>
16 years agoMPC8xx: Fix libfdt support introduced in commit 77ff7b74
Jean-Christophe PLAGNIOL-VILLARD [Wed, 2 Apr 2008 06:03:56 +0000 (08:03 +0200)]
MPC8xx: Fix libfdt support introduced in commit 77ff7b74

fdt.c: In function 'ft_cpu_setup':
fdt.c:33: warning: implicit declaration of function 'do_fixup_by_prop_u32'
fdt.c:39: warning: implicit declaration of function 'do_fixup_by_compat_u32'
fdt.c:43: warning: implicit declaration of function 'fdt_fixup_ethernet'
fdt.c:45: warning: implicit declaration of function 'fdt_fixup_memory'

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
16 years agoFix fdt set command to conform to dts spec
Andy Fleming [Tue, 1 Apr 2008 01:45:56 +0000 (20:45 -0500)]
Fix fdt set command to conform to dts spec

The fdt set command was treating properties specified as <00> and <0011>
as byte streams, rather than as an array of cells.  As we already have
syntax for expressing the desire for a stream of bytes ([ xx xx ...]),
we should use the <> syntax to describe arrays of cells, which are always
32-bits per element.  If we imagine this likely (IMHO) scenario:

> fdt set /ethernet-phy@1 reg <1>

With the old code, this would create a bad fdt, since the reg cell would be
made to be one byte in length.  But the cell must be 4 bytes, so this would
break mysteriously.

Also, the dts spec calls for constants inside the angle brackets (<>)
to conform to C constant standards as they pertain to base.
Take this scenario:

> fdt set /ethernet@f00 reg <0xe250000\ 0x1000>

The old fdt command would complain that it couldn't parse that.  Or, if you
wanted to specify that a certain clock ran at 33 MHz, you'd be required to
do this:

> fdt set /mydev clock <1f78a40>

Whereas the new code will accept decimal numbers.

While I was in there, I extended the fdt command parser to handle property
strings which are split across multiple arguments:

> fdt set /ethernet@f00 interrupts < 33 2 34 2 36 2 >
> fdt p /ethernet@f00
ethernet@f00 {
interrupts = <0x21 0x2 0x22 0x2 0x24 0x2>;
};

Lastly, the fdt print code was rearranged slightly to print arrays of cells
if the length of the property is a multiple of 4 bytes, and to not print
leading zeros.

Signed-off-by: Andy Fleming <afleming@freescale.com>
16 years agoppc4xx: Canyonlands: Init SATA/PCIe port correctly
Stefan Roese [Wed, 2 Apr 2008 06:39:33 +0000 (08:39 +0200)]
ppc4xx: Canyonlands: Init SATA/PCIe port correctly

Canyonlands (460EX) shares the first PCIe interface with the SoC SATA
interface. This usage can be configured with the jumper J6. This patch
correctly configures the SATA/PCIe PHY for SATA usage when this jumper
is installed.

Signed-off-by: Stefan Roese <sr@denx.de>
16 years agoremove remaining CONFIG_OF_HAS_{UBOOT_ENV,BD_T} code
Kim Phillips [Fri, 28 Mar 2008 22:37:49 +0000 (17:37 -0500)]
remove remaining CONFIG_OF_HAS_{UBOOT_ENV,BD_T} code

finish off what commit 43ddd9c820fec44816188f53346b464e20b3142d,
"Remove deprecated CONFIG_OF_HAS_UBOOT_ENV and CONFIG_OF_HAS_BD_T"
started.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
16 years agodataflash: Move CONFIG_HAS_DATAFLASH to Makefile
Jean-Christophe PLAGNIOL-VILLARD [Tue, 1 Apr 2008 05:30:51 +0000 (07:30 +0200)]
dataflash: Move CONFIG_HAS_DATAFLASH to Makefile

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
16 years agoAdd Vitesse 8601 support to TSEC driver
Tor Krill [Fri, 28 Mar 2008 14:29:45 +0000 (15:29 +0100)]
Add Vitesse 8601 support to TSEC driver

Add phy_info for Vitesse VSC8601.
Add config option, CFG_VSC8601_SKEWFIX, to enable RGMII skew timing compensation.

Signed-off-by: Tor Krill <tor@excito.com>
Reviewed-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
16 years agoSPARC: added SMC91111 driver in and out macros for LEON processors.
Daniel Hellstrom [Mon, 31 Mar 2008 14:25:00 +0000 (14:25 +0000)]
SPARC: added SMC91111 driver in and out macros for LEON processors.

This patch makes SPARC/LEON processors able to read and write
to the SMC91111 chip using the chip external I/O bus of the memory
controller. This patchs defines the standard in and out macros
expected by the SMC9111 driver.

To access that I/O bus one must set up the memory controller
(MCTRL or FTMCTRL) correctly. It is assumed that the user sets
up this correctly when the other MCTRL parameters are set up. It
can be set up from the board configuration header file.

Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
16 years agoAdd maintainership information for AT91CAP9ADK and AT91SAM9260EK boards
Stelian Pop [Wed, 26 Mar 2008 17:52:34 +0000 (18:52 +0100)]
Add maintainership information for AT91CAP9ADK and AT91SAM9260EK boards

Signed-off-by: Stelian Pop <stelian@popies.net>
16 years agoAT91SAM9260EK: Move CONFIG_CMD_NAND to Makefile
Jean-Christophe PLAGNIOL-VILLARD [Mon, 31 Mar 2008 19:31:04 +0000 (21:31 +0200)]
AT91SAM9260EK: Move CONFIG_CMD_NAND to Makefile

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
16 years agoAdd support for AT91SAM9260EK
Stelian Pop [Wed, 26 Mar 2008 17:52:33 +0000 (18:52 +0100)]
Add support for AT91SAM9260EK

Support for booting from internal DataFlash, external DataFlash card
or NAND flash is available.

Signed-off-by: Stelian Pop <stelian@popies.net>
16 years agoAT91SAM9: Move CONFIG_HAS_DATAFLASH to Makefile
Jean-Christophe PLAGNIOL-VILLARD [Mon, 31 Mar 2008 19:20:49 +0000 (21:20 +0200)]
AT91SAM9: Move CONFIG_HAS_DATAFLASH to Makefile

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
16 years agoAT91CAP9ADK: Move CONFIG_CMD_NAND to Makefile
Jean-Christophe PLAGNIOL-VILLARD [Mon, 31 Mar 2008 19:12:17 +0000 (21:12 +0200)]
AT91CAP9ADK: Move CONFIG_CMD_NAND to Makefile

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
16 years agoPort AT91CAP9 to the new headers
Stelian Pop [Wed, 26 Mar 2008 19:52:32 +0000 (20:52 +0100)]
Port AT91CAP9 to the new headers

Adapt the existing AT91CAP9 code to the new headers and APIs.

Signed-off-by: Stelian Pop <stelian@popies.net>
16 years agoFinish header files reworking
Stelian Pop [Wed, 26 Mar 2008 18:52:31 +0000 (19:52 +0100)]
Finish header files reworking

Replace AT91CAP9.h file with several splitted header files coming
from the Linux kernel.

This is part 2 of the replacement: more header imports and edits.

Signed-off-by: Stelian Pop <stelian@popies.net>
16 years agoImport several header files from Linux
Stelian Pop [Wed, 26 Mar 2008 18:52:30 +0000 (19:52 +0100)]
Import several header files from Linux

Replace AT91CAP9.h file with several splitted header files coming
from the Linux kernel.

This is part 1 of the replacement: pristine header files import.

Signed-off-by: Stelian Pop <stelian@popies.net>
16 years agoMove at91cap9 specific files to at91sam9 directory
Stelian Pop [Wed, 26 Mar 2008 19:52:28 +0000 (20:52 +0100)]
Move at91cap9 specific files to at91sam9 directory

AT91CAP9 and AT91SAM9 SoCs are very close hardware wise, so a
common infrastructure can be used. Let this infrastructure be
named after the AT91SAM9 family, and move the existing AT91CAP9
files to the new place.

Signed-off-by: Stelian Pop <stelian@popies.net>
16 years agoUse timer_init() instead of board supplied interrupt_init()
Stelian Pop [Wed, 26 Mar 2008 20:52:27 +0000 (21:52 +0100)]
Use timer_init() instead of board supplied interrupt_init()

The timer on AT91CAP9/AT91SAM9 is supplied by the SoC, and not by
the board, so use timer_init() instead of interrupt_init().

Signed-off-by: Stelian Pop <stelian@popies.net>
16 years agoCleanup DataFlash partition handling
Stelian Pop [Wed, 26 Mar 2008 20:52:36 +0000 (21:52 +0100)]
Cleanup DataFlash partition handling

DataFlash partition information has become a mess. This patch
defines a single partition scheme for Atmel DataFlashes. This partition
scheme will be used by all AT91CAP9 and AT91SAM9 boards.

Signed-off-by: Stelian Pop <stelian@popies.net>
16 years agoColdFire: Fix alignment issue after CONFIG_IDENT_STRING in start.S
TsiChung Liew [Fri, 28 Mar 2008 13:47:45 +0000 (08:47 -0500)]
ColdFire: Fix alignment issue after CONFIG_IDENT_STRING in start.S

When the version_string function in start.S is not 4-byte align,
it will cause the compiler generates "unaligned opcodes detected
in executable segment". This issue affects all ColdFire CPUs.
By adding .align 4 after CONFIG_IDENT_STRING, it will pad 0's if
it is not aligned.

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: John Rigby <jrigby@freescale.com>
16 years agoColdFire: Add dspi and serial flash support for MCF5445x
TsiChung Liew [Tue, 25 Mar 2008 20:41:15 +0000 (15:41 -0500)]
ColdFire: Add dspi and serial flash support for MCF5445x

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: John Rigby <jrigby@freescale.com>
16 years agoColdFire: Remove R5200 board
TsiChung Liew [Tue, 18 Mar 2008 22:37:01 +0000 (17:37 -0500)]
ColdFire: Remove R5200 board

This board never went into production

Signed-off-by: Zachary P. Landau <zachary.landau@labxtechnologies.com>
Acked-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: John Rigby <jrigby@freescale.com>
16 years agoColdFire: Added M5275EVB support.
Matthew Fettke [Thu, 24 Jan 2008 20:02:32 +0000 (14:02 -0600)]
ColdFire: Added M5275EVB support.

Signed-off-by: Matthew Fettke <mfettke@videon-central.com>
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: John Rigby <jrigby@freescale.com>
16 years agoColdFire: Added MCF5275 cpu support.
Matthew Fettke [Mon, 4 Feb 2008 21:38:20 +0000 (15:38 -0600)]
ColdFire: Added MCF5275 cpu support.

Signed-off-by: Matthew Fettke <mfettke@videon-central.com>
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: John Rigby <jrigby@freescale.com>
16 years agoColdFire: Define bootdelay in configuration file for M52277EVB
TsiChung Liew [Mon, 17 Mar 2008 17:14:11 +0000 (12:14 -0500)]
ColdFire: Define bootdelay in configuration file for M52277EVB

Signed-off-by: Matt Wadel <Matt.Waddel@freescale.com>
Acked-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: John Rigby <jrigby@freescale.com>
16 years agoColdFire: Fix second memory Chipselect for M5475EVB
TsiChung Liew [Mon, 17 Mar 2008 17:09:07 +0000 (12:09 -0500)]
ColdFire: Fix second memory Chipselect for M5475EVB

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: John Rigby <jrigby@freescale.com>
16 years agoColdFire: Update correct FLASHBAR and RAMBAR1 for MCF5282
TsiChung Liew [Thu, 13 Mar 2008 19:26:32 +0000 (14:26 -0500)]
ColdFire: Update correct FLASHBAR and RAMBAR1 for MCF5282

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: John Rigby <jrigby@freescale.com>
16 years agoppc4xx: Add CFG_MEM_TOP_HIDE to Denali SPD-based SDRAM setup
Larry Johnson [Mon, 31 Mar 2008 01:33:04 +0000 (20:33 -0500)]
ppc4xx: Add CFG_MEM_TOP_HIDE to Denali SPD-based SDRAM setup

Signed-off-by: Larry Johnson <lrj@acm.org>
16 years agoppc4xx: Small whitespace fix of esd patches
Stefan Roese [Mon, 31 Mar 2008 10:20:48 +0000 (12:20 +0200)]
ppc4xx: Small whitespace fix of esd patches

Signed-off-by: Stefan Roese <sr@denx.de>
16 years agoppc4xx: Cleanup PMC440 board support
Matthias Fuchs [Sun, 30 Mar 2008 16:52:44 +0000 (18:52 +0200)]
ppc4xx: Cleanup PMC440 board support

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
16 years agoppc4xx: Add ptm configuration variables for PMC440
Matthias Fuchs [Sun, 30 Mar 2008 16:52:06 +0000 (18:52 +0200)]
ppc4xx: Add ptm configuration variables for PMC440

Add support for the ptm1la, ptm1ms, ptm2la and ptm2ms
environment variables.

Cleanup pci_target_init.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
16 years agoppc4xx: Minor updates for DU440 boards
Matthias Fuchs [Sun, 30 Mar 2008 16:01:15 +0000 (18:01 +0200)]
ppc4xx: Minor updates for DU440 boards

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
16 years agoBlackfin: cleanup and overhaul common board init functions
Mike Frysinger [Tue, 19 Feb 2008 05:54:20 +0000 (00:54 -0500)]
Blackfin: cleanup and overhaul common board init functions

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
16 years agoBlackfin: cleanup lib_blackfin/cache.c
Mike Frysinger [Tue, 19 Feb 2008 05:50:58 +0000 (00:50 -0500)]
Blackfin: cleanup lib_blackfin/cache.c

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
16 years agoBlackfin: unify cpu and boot modes
Mike Frysinger [Sun, 30 Mar 2008 19:46:13 +0000 (15:46 -0400)]
Blackfin: unify cpu and boot modes

All of the duplicated code for Blackfin processors and boot modes have been
unified.  After all, the core is the same for all processors, just the
peripheral set differs (which gets handled in the drivers).

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
16 years agoFix CFG_NO_FLASH compilation.
Stelian Pop [Wed, 26 Mar 2008 21:52:35 +0000 (22:52 +0100)]
Fix CFG_NO_FLASH compilation.

Many Atmel boards have no "real" (NOR) flash on board, and rely only
on DataFlash and NAND memories. This patch enables CFG_NO_FLASH to
be present in a board configuration file, while still enabling flash
commands like 'flinfo', 'protect', etc.

Signed-off-by: Stelian Pop <stelian@popies.net>
16 years agoBlackfin: BF537-stamp: cleanup spi flash driver
Mike Frysinger [Tue, 19 Feb 2008 05:58:13 +0000 (00:58 -0500)]
Blackfin: BF537-stamp: cleanup spi flash driver

This punts the old spi flash driver for a new/generalized one until the
common one can be integrated.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
16 years agoFix macro typo in common/cmd_mii.c
Ben Warren [Sun, 30 Mar 2008 15:34:34 +0000 (11:34 -0400)]
Fix macro typo in common/cmd_mii.c

This typo was introduced in commit 233a8bcd94997f3f345833a3b82e836222f2a206.  I
actually applied the wrong patch.

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
16 years agouse correct at91rm9200 register name in m501sk board
Jean-Christophe PLAGNIOL-VILLARD [Sun, 30 Mar 2008 14:39:53 +0000 (16:39 +0200)]
use correct at91rm9200 register name in m501sk board

This fixes a naming bug for at91rm9200 lowlevel init code:
NOR boot flash is on chipselect 0, not chipselect 2.  This
makes code use the register name from chip datasheets.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
16 years agouse correct at91rm9200 register name
David Brownell [Fri, 18 Jan 2008 20:55:00 +0000 (12:55 -0800)]
use correct at91rm9200 register name

This fixes a naming bug for at91rm9200 lowlevel init code:
NOR boot flash is on chipselect 0, not chipselect 2.  This
makes code use the register name from chip datasheets.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
16 years agoadd missing ARM boards to MAKEALL
David Brownell [Fri, 18 Jan 2008 20:45:45 +0000 (12:45 -0800)]
add missing ARM boards to MAKEALL

Add some missing ARM boards to MAKEALL.  These build correctly,
unlike several of the boards already listed.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
16 years agoBracket READ_TIMER macro in cpu/arm1136/omap24xx/interrupts.c
Peter Pearse [Sun, 30 Mar 2008 10:34:09 +0000 (11:34 +0100)]
Bracket READ_TIMER macro in cpu/arm1136/omap24xx/interrupts.c
to prevent compilation error.

Signed-off-by: Peter Pearse <peter.pearse@arm.com>
16 years agoSupport for the MX31ADS evaluation board from Freescale
Guennadi Liakhovetski [Sun, 30 Mar 2008 10:32:30 +0000 (11:32 +0100)]
Support for the MX31ADS evaluation board from Freescale

This patch adds support for the MX31ADS evaluation board from Freescale,
initialization code is copied from RedBoot sources, also provided by Freescale.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
16 years agoPhytec Phycore-i.MX31 support
Sascha Hauer [Sun, 30 Mar 2008 10:32:27 +0000 (11:32 +0100)]
Phytec Phycore-i.MX31 support

This patch adds support for the Phytec Phycore-i.MX31 board

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
16 years agomx31 litekit support
Sascha Hauer [Sun, 30 Mar 2008 10:32:24 +0000 (11:32 +0100)]
mx31 litekit support

This patch adds support for the mx31 litekit board

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
16 years agoadd SMSC LAN9x1x Network driver
Sascha Hauer [Sun, 30 Mar 2008 10:32:21 +0000 (11:32 +0100)]
add SMSC LAN9x1x Network driver

This patch adds a driver for the following smsc network controllers:
LAN9115
LAN9116
LAN9117
LAN9215
LAN9216
LAN9217

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
16 years agoadd an i2c driver for mx31
Sascha Hauer [Sun, 30 Mar 2008 10:32:16 +0000 (11:32 +0100)]
add an i2c driver for mx31

This patch adds an i2c driver for Freescale i.MX processors

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
16 years agocore support for Freescale mx31
Sascha Hauer [Sun, 30 Mar 2008 10:30:43 +0000 (11:30 +0100)]
core support for Freescale mx31

This patch adds the core support for Freescale mx31

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
16 years agoSeparate omap24xx specific code from arm1136
Sascha Hauer [Sun, 30 Mar 2008 10:28:46 +0000 (11:28 +0100)]
Separate omap24xx specific code from arm1136

Move omap24xx code to cpu/arm1136/omap24xx, rename include/asm-arm/arch-arm1136 to cpu/arm1136/omap24xx.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
16 years agoAdd pmdra into MAKEALL
Peter Pearse [Sun, 30 Mar 2008 10:23:05 +0000 (11:23 +0100)]
Add pmdra into MAKEALL

Signed-off-by: Peter Pearse <peter.pearse@arm.com>
16 years agoAdds support for the Prodrive PMDRA board, based on a DM6441
Pieter Voorthuijsen [Sun, 30 Mar 2008 10:21:58 +0000 (11:21 +0100)]
Adds support for the Prodrive PMDRA board, based on a DM6441

Signed-off-by: Pieter Voorthuijsen <pv@prodrive.nl>
16 years agoRemoves all board specific code from the arch. part for DM644x (DaVinci) boards
Pieter Voorthuijsen [Sun, 30 Mar 2008 10:11:34 +0000 (11:11 +0100)]
Removes all board specific code from the arch. part for DM644x (DaVinci) boards

Signed-off-by: Pieter Voorthuijsen <pv@prodrive.nl>
16 years ago- Remove *_masked() functions as noted by Wolfgang
Dirk Behme [Sun, 30 Mar 2008 10:09:01 +0000 (11:09 +0100)]
- Remove *_masked() functions as noted by Wolfgang
- Adapt register naming to recent TI spec (sprue26, March 2007)
- Fix reset_timer() handling
- As reported by Pieter [1] the overflow fix introduced a
delay of factor 16 (e.g 2 seconds became 32). While the
overflow fix is basically okay, it missed to divide udelay by
16, too. Fix this.
[1] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/38179
- Remove software division of timer count value (DIV(x)
macro) and do it in hardware (TIM_CLK_DIV).
Many thanks to Troy Kisky <troy.kisky@boundarydevices.com>
and Pieter Voorthuijsen <pieter.voorthuijsen@Prodrive.nl> for
the hints & testing!

Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Acked-by: Pieter Voorthuijsen <pieter.voorthuijsen@Prodrive.nl>
16 years agonew PHY @ e1000 - 2nd try
Andre Schwarz [Thu, 6 Mar 2008 15:45:44 +0000 (16:45 +0100)]
new PHY @ e1000 - 2nd try

Add 82541ER device with latest integrated IGP2 PHY.
Introduced CONFIG_E1000_FALLBACK_MAC for NIC bring-up with empty eeprom.

Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
16 years agoSPARC/LEON3: Added GRETH Ethernet 10/100/1000 driver.
Daniel Hellstrom [Fri, 28 Mar 2008 19:22:53 +0000 (20:22 +0100)]
SPARC/LEON3: Added GRETH Ethernet 10/100/1000 driver.

GRETH is an Ethernet 10/100 or 10/100/1000 MAC with out without
a debug link (EDCL). The GRETH core is documented in GRIP.pdf
available at www.gaisler.com.

If the GRETH has GigaBit support (GBIT, Scatter gather, checksum
offloading etc.) can be determined by a bit in the control register.
The GBIT MAC is supported by operating in GRTEH 10/100 legacy mode.

Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
16 years agoAdd CONFIG_MII_INIT in cmd_mii.c
Tsi-Chung Liew [Mon, 17 Mar 2008 22:08:22 +0000 (17:08 -0500)]
Add CONFIG_MII_INIT in cmd_mii.c

Provide common configuration in do_mii() to execute mii_init()
for all cpu architectures

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
16 years agoColdFire: Fix FEC transmit issue for MCF5275
Tsi-Chung Liew [Mon, 17 Mar 2008 22:08:16 +0000 (17:08 -0500)]
ColdFire: Fix FEC transmit issue for MCF5275

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
16 years agoDHCP request fix for Windows Server 2003
Aras Vaichas [Tue, 25 Mar 2008 22:43:57 +0000 (09:43 +1100)]
DHCP request fix for Windows Server 2003

Added option CONFIG_BOOTP_DHCP_REQUEST_DELAY. This provides an optional
delay before sending "DHCP Request" in net/bootp.c. Required to overcome
interoperability problems with Windows Server 200x DHCP server when U-Boot
client responds too fast for server to handle.

Signed-off-by: Aras Vaichas <arasv@magtech.com.au>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
16 years agoMerge git://www.denx.de/git/u-boot into uboot
Gerald Van Baren [Sat, 29 Mar 2008 22:08:02 +0000 (18:08 -0400)]
Merge git://www.denx.de/git/u-boot into uboot

16 years agoMTD/CFI: flash_read64 is defined a weak function (for SPARC)
Daniel Hellstrom [Fri, 28 Mar 2008 19:40:19 +0000 (20:40 +0100)]
MTD/CFI: flash_read64 is defined a weak function (for SPARC)

SPARC has implemented __raw_readq, it reads 64-bit from any 32-bit address.
SPARC CPUs implement flash_read64 which calls __raw_readq.

For current SPARC architectures (LEON2 and LEON3) each read from the
FLASH must lead to a cache miss. This is because FLASH can not be set
non-cacheable since program code resides there, and alternatively disabling
cache is poor from performance view, or doing a cache flush between each
read is even poorer.

Forcing a cache miss on a SPARC is done by a special instruction "lda" -
load alternative space, the alternative space number (ASI) is processor
implementation spcific and can be found by including <asm/processor.h>.

Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
16 years agoMake MPC83xx one step closer to full relocation.
Joakim Tjernlund [Fri, 28 Mar 2008 14:41:25 +0000 (15:41 +0100)]
Make MPC83xx one step closer to full relocation.

Remove a few absolute references to CFG_MONITOR_BASE for ppc/mpc83xx
and use GOT relative reference.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
16 years agompc8323erdb: fix EEPROM page size and get MAC from EEPROM
Michael Barkowski [Thu, 27 Mar 2008 18:34:43 +0000 (14:34 -0400)]
mpc8323erdb: fix EEPROM page size and get MAC from EEPROM

This patch fixes eeprom page size so that you can now write more than
64 bytes at a time.

It also makes the board take MAC addresses, if found, from EEPROM.

User should place up to 4 addresses at offset 0x7f00, for
eth{,1,2,3}addr.  Any unused addresses should be zero.  This group of
four six-byte values should have it's CRC at the end.  crc32 and
eeprom commands can be used to accomplish this.

If CRC fails, MAC addresses come from the environment.  If CRC
succeeds, the environment is overwritten at startup.

Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
16 years agompc8323erdb: define CONFIG_PCI_SKIP_HOST_BRIDGE
Michael Barkowski [Fri, 28 Mar 2008 19:15:38 +0000 (15:15 -0400)]
mpc8323erdb: define CONFIG_PCI_SKIP_HOST_BRIDGE

Commit 55774b512fdf63c0516d441cc5da7c54bbffb7f2 broke the onboard USB
controller on the PCI bus in Linux on the MPC8323ERDB.

This fixes it by defining CONFIG_PCI_SKIP_HOST_BRIDGE in the board's
config file.

Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
16 years agompc83xx: cleanup System Part and Revision ID Register (SPRIDR) code
Kim Phillips [Fri, 28 Mar 2008 15:19:07 +0000 (10:19 -0500)]
mpc83xx: cleanup System Part and Revision ID Register (SPRIDR) code

in the spirit of commit 1ced121600b2060ab2ff9f0fddd9421fd70a0dc6,
85xx's "Update SVR numbers to expand support", simplify SPRIDR processing
and processor ID display.  Add REVID_{MAJ,MIN}OR macros to make
REVID dependent code simpler.  Also added PARTID_NO_E and IS_E_PROCESSOR
convenience macros.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
16 years agompc83xx: display ddr frequency in board_add_ram_info banner
Kim Phillips [Fri, 28 Mar 2008 15:18:53 +0000 (10:18 -0500)]
mpc83xx: display ddr frequency in board_add_ram_info banner

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
16 years agompc83xx: unreinvent mem_clk
Kim Phillips [Fri, 28 Mar 2008 15:18:40 +0000 (10:18 -0500)]
mpc83xx: unreinvent mem_clk

delete ddr_clk and use mem_clk instead.  Rename other ddr_*_clk to
mem_*_clk for consistency's sake.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
16 years agompc83xx: enable the SATA interface on mpc8315 rdb and mpc837x rdb boards
Kim Phillips [Fri, 28 Mar 2008 19:31:23 +0000 (14:31 -0500)]
mpc83xx: enable the SATA interface on mpc8315 rdb and mpc837x rdb boards

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
16 years agompc83xx: enable the SATA interface on mpc837xemds board
Dave Liu [Wed, 26 Mar 2008 14:57:19 +0000 (22:57 +0800)]
mpc83xx: enable the SATA interface on mpc837xemds board

Enable the first two SATA interfaces on MPC837xEMDS board,
The two SATA ports are on LYNX1. (SATA0/1 on J4/5)

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
16 years agompc83xx: initialize serdes for MPC837xEMDS boards
Dave Liu [Wed, 26 Mar 2008 14:56:36 +0000 (22:56 +0800)]
mpc83xx: initialize serdes for MPC837xEMDS boards

This patch is stolen from Anton Vorontsov's patch
for mpc837xerdb boards.

The reference clk and xcorevdd voltage of serdes1/2
is same between mpc837xemds and mpc837xerdb.

8377E: LYNX1- 2 SATA LYNX2- 2 PCIE
8378E: LYNX1- 2 SGMII LYNX2- 2 PCIE
8379E: LYNX1- 2 SATA LYNX2- 2 SATA

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
16 years agoppc4xx: Canyonlands: Print SATA/PCIe configuration and board revision
Stefan Roese [Fri, 28 Mar 2008 13:09:04 +0000 (14:09 +0100)]
ppc4xx: Canyonlands: Print SATA/PCIe configuration and board revision

Canyonlands (460EX) shares the first PCIe interface with the SoC SATA
interface. This usage can be configured with the jumper J6. This patch
displays the current configuration upon bootup and changes the PCIe
init loop, to only initialize the availabel PCIe slots.

Signed-off-by: Stefan Roese <sr@denx.de>
16 years agoMTD/CFI: Add support for 16bit legacy AMD flash
Tor Krill [Fri, 28 Mar 2008 10:29:10 +0000 (11:29 +0100)]
MTD/CFI: Add support for 16bit legacy AMD flash

Add entry for 512Kx16 AMD flash to jedec_table.
Read out 16bit device id if chipwidth is 16bit.
Fixed coding style after Stefans feedback

Signed-off-by: Tor Krill <tor@excito.com>
16 years agoppc: Small change to CFG_MEM_TOP_HIDE description
Stefan Roese [Fri, 28 Mar 2008 10:02:53 +0000 (11:02 +0100)]
ppc: Small change to CFG_MEM_TOP_HIDE description

Signed-off-by: Stefan Roese <sr@denx.de>
16 years agosh: Add support stat structure and stat.h
Nobuhiro Iwamatsu [Thu, 27 Mar 2008 06:44:12 +0000 (15:44 +0900)]
sh: Add support stat structure and stat.h

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
16 years agosh: Removed warning when compiling drivers/serial/serial_sh.c.
Mark Jonas [Sat, 22 Mar 2008 18:27:52 +0000 (19:27 +0100)]
sh: Removed warning when compiling drivers/serial/serial_sh.c.

Signed-off-by: Mark Jonas <mark.jonas@de.bosch.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
16 years agosh: Remove disable_ctrlc function from R7780MP
Nobuhiro Iwamatsu [Wed, 12 Mar 2008 09:02:57 +0000 (18:02 +0900)]
sh: Remove disable_ctrlc function from R7780MP

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
16 years agosh: Add maintainer of R7780MP to MAINTAINER file
Nobuhiro Iwamatsu [Wed, 12 Mar 2008 08:55:15 +0000 (17:55 +0900)]
sh: Add maintainer of R7780MP to MAINTAINER file

Update MAINTAINER entry for R7780MP. And fix maintainer's name.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
16 years agosh: Add support Renesas Solutions R2D plus board
Nobuhiro Iwamatsu [Tue, 25 Mar 2008 08:11:24 +0000 (17:11 +0900)]
sh: Add support Renesas Solutions R2D plus board

R2D plus is SH reference board used with SH7751R.
This board has 266Mhz CPU, 64MB SDRAM, Cardbus, CF interface,
one PCI bus, VGA, and two Ethernet controller.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
16 years agosh: Add support SH4 cache control
Nobuhiro Iwamatsu [Wed, 12 Mar 2008 03:15:29 +0000 (12:15 +0900)]
sh: Add support SH4 cache control

Add support SH4 cache control and flash_cache function

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
16 years agosh: Add support PCI host driver for SH7751/SH7751R
Nobuhiro Iwamatsu [Sun, 23 Mar 2008 16:53:01 +0000 (01:53 +0900)]
sh: Add support PCI host driver for SH7751/SH7751R

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
16 years agosh: Move SuperH PCI driver from cpu/sh4 to drivers/pci
Nobuhiro Iwamatsu [Sun, 23 Mar 2008 17:11:26 +0000 (02:11 +0900)]
sh: Move SuperH PCI driver from cpu/sh4 to drivers/pci

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
16 years agosh: Add support SuperH SH7751/SH7751R
Nobuhiro Iwamatsu [Wed, 12 Mar 2008 03:10:28 +0000 (12:10 +0900)]
sh: Add support SuperH SH7751/SH7751R

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
16 years agosh: Added support for SH7720 based board MPR2.
Mark Jonas [Mon, 10 Mar 2008 10:37:10 +0000 (11:37 +0100)]
sh: Added support for SH7720 based board MPR2.

Signed-off-by: Mark Jonas <mark.jonas@de.bosch.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
16 years agosh: Fix receive FIFO level register of SH4A
Nobuhiro Iwamatsu [Thu, 6 Mar 2008 05:05:53 +0000 (14:05 +0900)]
sh: Fix receive FIFO level register of SH4A

Receive FIFO level register is different in SH4A.
Because register is different, cannot occasionally receive data.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
16 years agosh: Add support Renesas Solutions R7780MP
Yusuke Goda [Tue, 11 Mar 2008 03:55:12 +0000 (12:55 +0900)]
sh: Add support Renesas Solutions R7780MP

Renesas Solutions R7780MP is a reference board on SH7780.
This board has serial, 10/100 base Ethernet deivice, CF slot
and VGA devices. This board can set extension board.
Extension board has 10/100/1000 base Ethernet device, PCI slot,
S-ATA, iDVR slot.

Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
16 years agosh: Add support PCI of SuperH and SH7780
Yusuke Goda [Wed, 5 Mar 2008 05:30:02 +0000 (14:30 +0900)]
sh: Add support PCI of SuperH and SH7780

This patch add support PCI of SuperH base code and SH7780 specific code.

Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
16 years agosh: Add support SH7780
Yusuke Goda [Wed, 5 Mar 2008 05:23:26 +0000 (14:23 +0900)]
sh: Add support SH7780

SH7780 is CPU of Renesas Technology.
This CPU has
 - CPU clock 400MHz
 - PCI support
 - DDR-SDRAM controller
 - etc ...

Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
16 years agosh: Add support Renesas Solutions Migo-R board
goda.yusuke [Fri, 25 Jan 2008 11:46:36 +0000 (20:46 +0900)]
sh: Add support Renesas Solutions Migo-R board

Migo-R is a board based on SH7722 and has may devices.
In this patch, supported SCIF, NOR flash and Ethernet.

Signed-off-by: Yusuke Goda <goda.yusuke@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>