Tom Rini [Fri, 24 Nov 2017 16:45:15 +0000 (11:45 -0500)]
Merge git://git.denx.de/u-boot-arc
Alexey Brodkin [Fri, 17 Nov 2017 13:02:17 +0000 (16:02 +0300)]
arc: cache: Add required NOPs after invalidation of instruction cache
As per ARC HS databook (see chapter 5.3.3.2) it is required to add
3 NOPs after each write to IC_IVIC which we do from now on.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Eugeniy Paltsev <paltsev@synopsys.com>
Alexey Brodkin [Fri, 17 Nov 2017 12:53:20 +0000 (15:53 +0300)]
arc: bootm: Move slave cores kick-starting under !fake
Currently slave cores will be kick-started even if we want
to dry run bootm which is not what we really want.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Eugeniy Paltsev <paltsev@synopsys.com>
Eugeniy Paltsev [Mon, 16 Oct 2017 13:21:32 +0000 (16:21 +0300)]
ARC: HSDK: introduce CREG GPIO driver
The HSDK can manage some pins via CREG registers block.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Tom Rini [Fri, 24 Nov 2017 03:48:35 +0000 (22:48 -0500)]
Merge git://git.denx.de/u-boot-dm
Simon Glass [Mon, 13 Nov 2017 04:52:29 +0000 (21:52 -0700)]
binman: Return non-zero exit code on test failure
Return exit code 1 when test fail so that callers can detect this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 13 Nov 2017 04:52:28 +0000 (21:52 -0700)]
binman: Add add test for using an Intel MRC binary
MRC (Memory Reference Code) is a binary blob used to set up the SDRAM
controller on some Intel boards. Add a test for this feature.
With this test coverage on binman is back up to 100%.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 13 Nov 2017 04:52:27 +0000 (21:52 -0700)]
binman: Add add test for SPL with a microcode pointer
Add a test for this feature. It allows SPL to hold a pointer to the
microcode block. This is used for 64-bit U-Boot on x86.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 13 Nov 2017 04:52:26 +0000 (21:52 -0700)]
binman: Add a test for x86-start16-spl
This allows us to put the 16-bit x86 start-up code in SPL. Add a test for
it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 13 Nov 2017 04:52:25 +0000 (21:52 -0700)]
binman: Add test for u-boot-spl-bss-pad
Add a test that we can pad the BSS with zero bytes.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 13 Nov 2017 04:52:24 +0000 (21:52 -0700)]
binman: Check for files missing from test coverage
Files that are never imported are not shown in the test-coverage report.
Detect these and show an error.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 13 Nov 2017 04:52:23 +0000 (21:52 -0700)]
binman: Increase test coverage back to 100%
Make a minor tweak to fix test coverage.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 13 Nov 2017 04:52:22 +0000 (21:52 -0700)]
binman: Add a main program to the tests
Add a main program so that the tests can be executed directly, without
going through the main binman program.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 13 Nov 2017 04:52:21 +0000 (21:52 -0700)]
binman: Add tests for importlib availability
Add a test that the 'entry' module works with or without importlib.
The tests are numbered so that they are executed in the correct order.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 13 Nov 2017 04:52:20 +0000 (21:52 -0700)]
binman: Set up 'entry' to permit full test coverage
There is a little check at the top of entry.py which decides if importlib
is available. At present this has no test coverage. To add this we will
need to import the module twice, once with importlib and once without.
In preparation for allowing a test to control the importing of this
module, remove all global imports of the 'entry' module.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 13 Nov 2017 04:52:19 +0000 (21:52 -0700)]
binman: Append to PYTHONPATH when running test coverage
Rather that overwrite this, append to it, in case the caller has already
set up the path correctly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 13 Nov 2017 04:52:17 +0000 (21:52 -0700)]
dtoc: Fix up tests
The tool has changed slightly since it was originally written. Update the
tests to suit.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 13 Nov 2017 04:52:15 +0000 (21:52 -0700)]
buildman: Fix up tests
The tests were broken by two separate commits which adjusted the output
when boards are listed. Fix this by adding back a PowerPC board and
putting the name of each board in the test.
Fixes:
b9f7d881 (powerpc, 5xx: remove some "5xx" remains)
Fixes:
8d7523c5 (buildman: Allow showing the list of boards with -n)
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 13 Nov 2017 04:52:14 +0000 (21:52 -0700)]
buildman: Allow skipping of tests which use the network
Accessing the network slows down the test and limits the environment in
which it can be run. Add an option to disable network tests.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 13 Nov 2017 04:52:12 +0000 (21:52 -0700)]
patman: Fix up tests to pass with newest checkpatch
The checkpatch tool was updated but the patman tests were not. Fix this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 13 Nov 2017 04:52:10 +0000 (21:52 -0700)]
test/run: Report and return failure
This script runs the tests but does not report failure. Also it always
returns an exit code of 0 even on failure.
Fix these problems by checking the result of each test.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 13 Nov 2017 04:52:09 +0000 (21:52 -0700)]
binman: Disable the no-unit_address_vs_reg warnings
These warnings are not useful for binman tests. Disable them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 13 Nov 2017 04:52:08 +0000 (21:52 -0700)]
binman: Rename tests to ftest
At present these tests use the same filename as patman. This adds
confusion when running all tests, since error messages look very similar.
In fact binman tries to run the wrong tests at present.
Rename the tests.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 13 Nov 2017 04:52:07 +0000 (21:52 -0700)]
binman: Add a Makefile for test-program compilation
These test programs are includedd as binary files in U-Boot to avoid
having to build them (and associated toolchain differences). Instructions
on building are in the files themselves, but it seems better to provide
a Makefile which can be manually run when desired.
Add a Makefile, separate from the normal build system, to handle this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 13 Nov 2017 04:52:06 +0000 (21:52 -0700)]
binman: Add docs explaining how to enable binman for a board
The process is not obvious. Add a little section to explain how to move a
board to use binman.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 13 Nov 2017 04:52:05 +0000 (21:52 -0700)]
binman: Add better Makefile debugging
There is a debugging option in the Makefile to allow people to figure out
which u-boot.dtsi files are used in the build. But is it not easy to use
since it only shows files it finds, not those it is looking for. Update it
and update the mention of it to the docs.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tom Rini [Wed, 22 Nov 2017 12:28:58 +0000 (07:28 -0500)]
Merge git://git.denx.de/u-boot-rockchip
Philipp Tomsich [Tue, 21 Nov 2017 21:35:56 +0000 (22:35 +0100)]
rockchip: remove duplicate CONFIG_ENV_SIZE definitions
A few header files still have a definition of CONFIG_ENV_SIZE, causing
warnings during buildman runs. This removes the duplicate definitions
from evb_px5.h, geekbox.h and rv1108_common.h.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Andy Yan [Wed, 11 Oct 2017 07:01:31 +0000 (15:01 +0800)]
rockchip: check download key before bootup
Enter download mode if the download key pressed.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[Converted printfs in boot_mode.c to debug/pr_err:]
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Andy Yan [Wed, 11 Oct 2017 07:00:49 +0000 (15:00 +0800)]
rockchip: add support for enter to bootrom download mode
Rockchip bootrom will enter download mode if it returns from
spl/tpl with a non-zero value and couldn't find a valid image
in the backup partition.
This patch provide a method to instruct the system to back to
bootrom download mode by checking the BROM_DOWNLOAD_FLAG register.
As the bootrom download function relys on some modules such as
interrupts, so we need to back to bootrom as early as possbile
before the tpl/spl code override the interrupt configurations.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Andy Yan [Wed, 11 Oct 2017 07:00:16 +0000 (15:00 +0800)]
rockchip: make boot_mode related codes reused across all platforms
setup_boot_mode function use the same logic but different
mode register address across all the rockchip platforms,
so it's better to make this function reused across all the
platforms, and let the mode register address setting from
the config file.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Heinrich Schuchardt [Sun, 12 Nov 2017 19:59:44 +0000 (20:59 +0100)]
rockchip: spi: the symbol for Hertz is Hz
fix typo
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Kever Yang [Fri, 3 Nov 2017 07:16:13 +0000 (15:16 +0800)]
rockchip: clock: update sysreset driver binding
Using priv for new sysreset driver binding.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich [Tue, 21 Nov 2017 21:28:55 +0000 (22:28 +0100)]
rockchip: sysreset: update Makefile to work with merged sysreset driver
After applying the merged sysreset driver, there are build failures
due to an out-of-sync Makefile. This updates drivers/sysreset/Makefile
to address these build failures.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Kever Yang [Fri, 3 Nov 2017 07:16:12 +0000 (15:16 +0800)]
rockchip: sysreset: merge into one common driver
Use a common driver for all Rockchip SOC instead of one for each SoC.
Use driver_data for reg offset.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich [Tue, 10 Oct 2017 14:21:18 +0000 (16:21 +0200)]
rockchip: mkimage: remove unused code-paths (spl_boot0 is now implied)
With all targets converted to generate prepadded images, this removes
the spl_boot0 field from our config structure and removes the unused
code-path (for images that are not prepadded): i.e. spl_boot0 is now
implied as 'true' and the code is specialised by removing the other
case.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich [Tue, 10 Oct 2017 14:21:17 +0000 (16:21 +0200)]
rockchip: rk3188: move CONFIG_SPL_* entries from rk3188_common.h to Kconfig
There still are a few CONFIG_SPL_* options selected using defines from
rk3188_common.h instead of via Kconfig. This migrates those over to
Kconfig.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich [Tue, 10 Oct 2017 14:21:16 +0000 (16:21 +0200)]
rockchip: back-to-bootrom: allow passing a cmd to the bootrom
The BROM supports forcing it to enter download-mode, if an appropriate
result/cmd-word is returned to it. There already is a series to
support this in review, so this prepares the (newly C-version) of the
back-to-bootrom code to accept a cmd to passed on to the BROM.
All the existing call-sites are adjusted to match the changed function
signature.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Andy Yan <andy.yan@rock-chips.com>
Philipp Tomsich [Tue, 10 Oct 2017 14:21:15 +0000 (16:21 +0200)]
rockchip: rk3188: use boot0 hook to load up SPL in 2 steps
For the RK3188, the BROM will attempt to load up the first stage
image (SPL for the RK3188) in two steps: first 1KB to offset 0x800
in the SRAM and then the remainder to offset 0xc00 in the SRAM.
It always enters at 0x804, though.
With this changeset, the RK3188 boot removes the TPL (stub) stage and
builds a single SPL binary that utilizes the early back-to-bootrom via
the boot0-hook.
Consequently, the passing of the saved boot params via pmu->os_reg[2]
is also removed.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich [Tue, 10 Oct 2017 14:21:14 +0000 (16:21 +0200)]
rockchip: back-to-bootrom: replace assembly-implementation with C-code
The back-to-bootrom implementation for Rockchip has always relied on
the stack-pointer being valid on entry, so there was little reason to
have this as an assembly implementation.
This provides a new C-only implementation of save_boot_params and
back_to_bootrom (relying on setjmp/longjmp) and removes the older
assembly-only implementation.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Andy Yan <andy.yan@rock-chips.com>
Philipp Tomsich [Tue, 10 Oct 2017 14:21:13 +0000 (16:21 +0200)]
arm: provide a PCS-compliant setjmp implementation
The previous setjmp-implementation (as a static inline function that
contained an 'asm volatile' sequence) was extremely fragile: (some
versions of) GCC optimised the set of registers. One critical example
was the removal of 'r9' from the clobber list, if -ffixed-reg9 was
supplied.
To increase robustness and ensure PCS-compliant behaviour, the setjmp
and longjmp implementation are now in assembly and closely match what
one would expect to find in a libc implementation.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Andy Yan <andy.yan@rock-chips.com>
Philipp Tomsich [Tue, 10 Oct 2017 14:21:12 +0000 (16:21 +0200)]
arm: mark save_boot_params_ret as a function
As no '.type' was set for save_boot_params_ret in start.S, binutils
did not track whether it was emitted as A32 or T32. By properly
marking save_boot_params_ret as a potential function entry, we can
make sure that the compiler will insert the appropriate instructions
for branching to save_boot_params_ret both for call-sites emitted as
A32 and T32.
Reported-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Andy Yan <andy.yan@rock-chips.com>
Philipp Tomsich [Tue, 10 Oct 2017 14:21:11 +0000 (16:21 +0200)]
arm: make save_boot_params_ret prototype visible for AArch64
The save_boot_params_ret() prototype (for those of us, that have a
valid SP on entry and can implement save_boot_params() in C), was
previously only defined for !defined(CONFIG_ARM64).
This moves the declaration to a common block to ensure the prototype
is available to everyone that might need it.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Andy Yan <andy.yan@rock-chips.com>
Philipp Tomsich [Tue, 10 Oct 2017 14:21:10 +0000 (16:21 +0200)]
rockchip: boot0 hook: support early return for RK3188/RK3066-style BROM
Some Rockchip BROM versions (e.g. the RK3188 and RK3066) first read 1KB data
from NAND into SRAM and executes it. Then, following a return to bootrom, the
BROM loads additional code to SRAM (not overwriting the first block read) and
reenters at the same address as the first time.
To support booting either a TPL (on the RK3066) or SPL (on the RK3188) using
this model of having to count entries, this commit adds code to the boot0
hook to track the number of entries and handle them accordingly.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Tested-by: Andy Yan <andy.yan@rock-chips.com>
Philipp Tomsich [Tue, 10 Oct 2017 14:21:09 +0000 (16:21 +0200)]
bcm281xx: boot0 hook: adjust to unified boot0 semantics
This updates the BCM281xx boot0-hook to the updated boot0 semantics
by emitting _start and the vector table before the boot0 hook (as
was the case before).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich [Tue, 10 Oct 2017 14:21:08 +0000 (16:21 +0200)]
bcm235xx: boot0 hook: adjust to unified boot0 semantics
This updates the BCM235xx boot0-hook to the updated boot0 semantics
by emitting _start and the vector table before the boot0 hook (as
was the case before).
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Version-changes: 5
- ran 'whitespace-cleanup'
Philipp Tomsich [Tue, 10 Oct 2017 14:21:07 +0000 (16:21 +0200)]
socfpga: boot0 hook: adjust to unified boot0 semantics
With the updated boot0 semantics (i.e. giving the boot0-hook control
over when and where the vector table is emitted), the boot0-hook for
the socfpga needs to be adjusted.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich [Tue, 10 Oct 2017 14:21:06 +0000 (16:21 +0200)]
rockchip: rk3036: use aligned address for SPL_TEXT_BASE
With the boot0-hook inserting the additional padding to receive our
SPL magic, the SPL_TEXT_BASE can be aligned again.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Kever Yang [Tue, 10 Oct 2017 14:21:05 +0000 (16:21 +0200)]
rockchip: rk3288: use aligned address for SPL_TEXT_BASE
After we use boot0 hook, we can use offset '000' instead of '004' as
SPL_TEXT_BASE.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
[Updated tag in commit summary:]
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Kever Yang [Tue, 10 Oct 2017 14:21:04 +0000 (16:21 +0200)]
rockchip: mkimage: use spl_boot0 for all Rockchip SoCs
Enable the spl_boot0 in SPL and use the pre-padding TAG memory,
the mkimage do not need to pad it but only need to replace the value
with correct TAG value.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
[Updated:]
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich [Tue, 10 Oct 2017 14:21:03 +0000 (16:21 +0200)]
rockchip: enable boot0-hook for all Rockchip SoCs
Rockchip SoCs bootrom design is like this:
- First 2KB or 4KB internal memory is for bootrom stack and heap;
- Then the first 4-byte suppose to be a TAG like 'RK33';
- The the following memory address end with '0004' is the first
instruction load and running by bootrom;
Let's use the boot0 hook to reserve the first 4-byte tag for all
the Rockchip SoCs.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[Commit message taken from an older patch by:]
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 10 Oct 2017 14:21:02 +0000 (16:21 +0200)]
rockchip: boot0: align to 0x20 for armv7 '_start'
The '_start' is using as vector table base address, and will write
to VBAR register, so it needs to be aligned to 0x20 for armv7.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
[Updated to current code base:]
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Philipp Tomsich [Tue, 10 Oct 2017 14:21:01 +0000 (16:21 +0200)]
arm: boot0 hook: move boot0 hook before '_start'
The boot0 hook on ARM does not insert its payload before the vector
table. This is both a mismatch with thec comment above it and
contradict usage of the boot0 hook on ARM64.
To fix this (and unify the semantics for ARM and ARM64), we change the
boot0-hook semantics on ARM to match those on ARM64:
(1) if a boot0-hook is present it is inserted at the start of
the image
(2) if a boot0-hook is present, emitting the ARM vector table
(and the _start) symbol are suppressed in vectors.S and
the boot0-hook has full control over where and when it
wants to emit these
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Faiz Abbas [Tue, 14 Nov 2017 10:42:33 +0000 (16:12 +0530)]
ARM: dra7: Kconfig: Add thermal configs for dra7xx and am57xx
Configure thermal configs to remain set by default for dra7xx and am57xx
devices.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Faiz Abbas [Tue, 14 Nov 2017 10:42:32 +0000 (16:12 +0530)]
ARM: dts: OMAP5+: Add support for bandgap sensor in SPL
Mark bandgap node as uboot,dm-spl so that it can be accessed in spl
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Faiz Abbas [Tue, 14 Nov 2017 10:42:31 +0000 (16:12 +0530)]
thermal: ti-bandgap: Add support for temperature sensor
The dra7xx series of SOCs contain a temperature sensor and an
associated analog-to-digital converter (ADC) which produces
an output which is proportional to the SOC temperature.
Add support for this temperature sensor.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Tue, 21 Nov 2017 12:47:17 +0000 (07:47 -0500)]
TI: am57xx; Remove am57xx_evm_nodt_defconfig
We don't want this build anymore.
Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
S. Lockwood-Childs [Wed, 15 Nov 2017 06:56:42 +0000 (22:56 -0800)]
README: update mailing list url
Old url currently returns 403; modify to url that actually works
with current state of the list server
Signed-off-by: S. Lockwood-Childs <sjl@vctlabs.com>
Stefan Agner [Tue, 14 Nov 2017 14:47:18 +0000 (15:47 +0100)]
envtools: make sure version/timestamp header file are available
With commit
84d46e7e8948 ("tools: env: allow to print U-Boot version")
the fw_env utilities need the version.h header file. Building only
the envtools in a pristine build directory will fail due to missing
header files.
Make sure the header files are a dependency of the envtools target.
Fixes:
84d46e7e8948 ("tools: env: allow to print U-Boot version")
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Tue, 14 Nov 2017 13:39:35 +0000 (08:39 -0500)]
env: Remove CONFIG_ENV_AES support
This support has been deprecated since v2017.09 due to security issues.
We now remove this support.
Signed-off-by: Tom Rini <trini@konsulko.com>
Heinrich Schuchardt [Sun, 12 Nov 2017 20:02:52 +0000 (21:02 +0100)]
omap3: spi: the symbol for Hertz is Hz
fix typo
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
M. Vefa Bicakci [Sun, 12 Nov 2017 03:48:40 +0000 (22:48 -0500)]
Makefile: Correct SPL/TPL/DTB build race condition
When building on a multi-core machine for an SPL-enabled board that
also uses CONFIG_OF_EMBED, the following error can be encountered
due to a race condition:
make[3]: *** No rule to make target 'spl/dts/dt.dtb.o', needed by
'spl/dts/built-in.o'. Stop.
../scripts/Makefile.spl:364: recipe for target 'spl/dts' failed
make[2]: *** [spl/dts] Error 2
make[2]: *** Waiting for unfinished jobs....
A reliable way to trigger this race condition is to add "sleep 60" to
the end of the "arch-dtbs" rule's recipe in "dts/Makefile" and to build
U-Boot against a board which uses the CONFIG_OF_EMBED and CONFIG_SPL
options using "make -j8" or a similar command.
This commit corrects this race condition via the use of CONFIG_OF_EMBED
in the same way that commit
3c00a2c8b5e2 ("Makefile: Correct dependency
race condition with TPL") and commit
054b3a1e80fc ("dm: Makefile: Build
of-platdata before SPL") use CONFIG_OF_SEPARATE.
Signed-off-by: M. Vefa Bicakci <m.v.b@runbox.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Heinrich Schuchardt [Fri, 10 Nov 2017 20:46:34 +0000 (21:46 +0100)]
malloc: don't compare pointers to 0
0 is not a pointer. So do not compare pointers to 0.
Do not return 0 from functions with a pointer return
type.
Problem identified with Coccinelle.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Heinrich Schuchardt [Fri, 10 Nov 2017 18:15:02 +0000 (19:15 +0100)]
scripts/coccinelle: add some more coccinelle tests
Add some useful static code analysis scripts for coccinelle
copied from the Linux kernel v4.14-rc8:
Warn on check against NULL before calling free.
scripts/coccinelle/free/ifnullfree.cocci
Detect superfluous NULL check for list iterator.
scripts/coccinelle/iterators/itnull.cocci
Check if list iterator is reassigned.
scripts/coccinelle/iterators/list_entry_update.cocci
Check if list iterator is used after loop.
scripts/coccinelle/iterators/use_after_iter.cocci
Find wrong argument of sizeof in allocation function:
scripts/coccinelle/misc/badty.cocci
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sun, 19 Nov 2017 13:33:14 +0000 (14:33 +0100)]
Makefile: add coccicheck target
Coccinelle is a program for static code analysis.
For details on Coccinelle see
http://coccinelle.lip6.fr/
Add scripts/coccicheck copied from Linux kernel v4.14.
The coccicheck script executes the tests *.cocci in
directory scripts/coccinelle by calling spatch.
In Makefile add a coccicheck target. You can use it with
make coccicheck MODE=<mode>
where mode in patch, report, context, org.
Add a copy of Linux v4.14 file Documentation/dev-tools/coccinelle.rst
as doc/README.coccinelle.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Thu, 9 Nov 2017 00:26:43 +0000 (01:26 +0100)]
yaffs2: rework yaffs_new_obj_id
The iterator variable of list_for_each is never NULL.
if (1 || A) is always true.
Use break if entry found.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Praneeth Bajjuri [Wed, 8 Nov 2017 23:12:56 +0000 (17:12 -0600)]
dra7x: fastboot: Increase recovery partition size
As per current android recommendation
https://source.android.com/devices/architecture/kernel/modular-kernels
1. Android recovery mode should contain both SOC and ODM
kernel modules in the recovery partition.
2. If a kernel module is required both in recovery and normal boot
mode, the module has to be located in recovery and vendor
partition seperately.
3. Kernel modules used in recovery mode should be independent
of vendor and odm partition
4. Recovery image should contain atleast
storage, display, keypad, battery and pmic modules.
Due to these requirements, recovery image size has increased
to >10MB.
This patch is to increase recovery partition size for TI devices
so that we dont see such flashing error
log:
sending 'recovery' (12560 KB)...
OKAY [ 0.436s]
writing 'recovery'...
FAILED (remote: too large for partition)
finished. total time: 0.458s
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Heinrich Schuchardt [Wed, 8 Nov 2017 22:44:55 +0000 (23:44 +0100)]
scripts/ld-version.sh: regular expression compile fails
ld --version | scripts/ld-version.sh
fails with
awk: scripts/ld-version.sh:
line 4: regular expression compile failed (missing '(')
.*)
So let's refresh the script from Linux kernel v4.14-rc8.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Wed, 8 Nov 2017 21:13:54 +0000 (22:13 +0100)]
kconfig/symbol.c: use correct pointer type argument for sizeof
sym_arr is of type struct symbol **.
So in malloc we need sizeof(struct symbol *).
The problem was indicated by coccinelle.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tom Rini [Mon, 20 Nov 2017 16:46:08 +0000 (11:46 -0500)]
Merge git://git.denx.de/u-boot-ubi
Tom Rini [Mon, 20 Nov 2017 15:51:11 +0000 (10:51 -0500)]
Merge git://git.denx.de/u-boot-i2c
Heinrich Schuchardt [Wed, 8 Nov 2017 21:30:59 +0000 (22:30 +0100)]
ubi: no NULL check needed before kmem_cache_destroy
kmem_cache_destroy calls free which checks for NULL.
Problem was indicated by coccinelle.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Wed, 8 Nov 2017 21:28:47 +0000 (22:28 +0100)]
ubifs: no NULL check needed before free
kfree() calls free.
free() checks if the parameter is NULL.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Beniamino Galvani [Sun, 29 Oct 2017 09:09:01 +0000 (10:09 +0100)]
odroid-c2: enable I2C
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Beniamino Galvani [Sun, 29 Oct 2017 09:09:00 +0000 (10:09 +0100)]
i2c: add Amlogic Meson driver
Add a driver for the I2C controller available on Amlogic Meson SoCs.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Tom Rini [Mon, 20 Nov 2017 01:35:45 +0000 (20:35 -0500)]
Merge git://git.denx.de/u-boot-dm
Tom Rini [Mon, 6 Nov 2017 23:15:11 +0000 (18:15 -0500)]
Kconfig: Introduce USE_BOOTCOMMAND and migrate BOOTCOMMAND
We first introduce CONFIG_USE_BOOTCOMMAND, similar to
CONFIG_USE_BOOTARGS. We then migrate CONFIG_BOOTCOMMAND for most
CONFIG_DISTRO_DEFAULT users. In some cases platforms have a complex
scheme around this usage, and these have been defered for the moment so
that platform maintainers can work on a migration plan.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Dongjin Kim [Sat, 28 Oct 2017 04:22:27 +0000 (00:22 -0400)]
arm: config: fix default console only to specify the device
Since CONFIG_DEFAULT_CONSOLE is already started with "console=",
the console argument in CONFIG_EXTRA_ENV_SETTINGS is expanded to
"console=console=ttySAC1,115200n8" and this causes the wrong
console device.
#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
...
#define CONFIG_EXTRA_ENV_SETTINGS \
"console=" CONFIG_DEFAULT_CONSOLE
Signed-off-by: Dongjin Kim <tobetter@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Landheer-Cieslak, Ronald [Wed, 25 Oct 2017 13:46:53 +0000 (13:46 +0000)]
Add UART base addresses for additional UARTs
UARTs 1 through 5 were missing in the code - added.
Also pick the default according to the configuration setting for the
console index.
Signed-off-by: Ronald Landheer-Cieslak <ronaldlandheercieslak@eaton.com>
Minghuan Lian [Fri, 20 Oct 2017 02:45:50 +0000 (10:45 +0800)]
dm: pci: change bus number register setting compliant with Linux
This patch is to change U-Boot PCI bus assignement compliant with Linux.
It means each PCIe controller's bus number is 0, not the current maximum
PCI bus number, when start to scan this controller.
Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Gan, Yau Wai [Fri, 28 Jul 2017 05:07:17 +0000 (22:07 -0700)]
nios2: 10m50: Add CPU pre-relocation in device tree
Tag CPU with dm-pre-reloc to enable driver before
relocation.
Signed-off-by: Gan, Yau Wai <yau.wai.gan@intel.com>
Cc: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Baruch Siach [Thu, 9 Nov 2017 11:44:28 +0000 (13:44 +0200)]
dm: core: fix member name in ofnode_union documentation
Fixes:
4984de2baaa ("dm: core: Add ofnode to represent device tree nodes")
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Simon Glass <sjg@chromium.org>
André Draszik [Tue, 3 Oct 2017 15:55:54 +0000 (16:55 +0100)]
tpm: add more missing va_end()
While commit
36d35345b1f6 ("tpm: add missing va_end") added
some missing calls to va_end(), it missed a few places.
Signed-off-by: André Draszik <adraszik@tycoint.com>
Acked-by: Simon Glass <sjg@chromium.org>
André Draszik [Tue, 3 Oct 2017 15:55:53 +0000 (16:55 +0100)]
tpm: add more useful NV storage permission flags
TPM_NV_PER_PPREAD: physical presence needed for reading
TPM_NV_PER_WRITEDEFINE: persistent write lock by writing size 0
TPM_NV_PER_WRITEALL: write in one go
Signed-off-by: André Draszik <adraszik@tycoint.com>
Acked-by: Simon Glass <sjg@chromium.org>
André Draszik [Tue, 3 Oct 2017 15:55:52 +0000 (16:55 +0100)]
tpm: add tpm_get_random()
Add a function to obtain random data from the TPM.
Signed-off-by: André Draszik <adraszik@tycoint.com>
Added commit message, add cast to min()
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Adam Ford [Tue, 7 Nov 2017 01:57:30 +0000 (19:57 -0600)]
omap3: omap3_logic: Move pinmuxing to header file
To keep the board file smaller and clean, let's move the pinmux to the header file.
Signed-off-by: Adam Ford <aford173@gmail.com>
Jorge Ramirez-Ortiz [Mon, 6 Nov 2017 13:16:38 +0000 (14:16 +0100)]
configs: dragonboard410c: Save environment data on eMMC
Save the environment data at the end of the boot partition on emmc
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Jorge Ramirez-Ortiz [Mon, 6 Nov 2017 13:16:37 +0000 (14:16 +0100)]
env: Save environment at the end of an MMC partition
Allow the platform to define a partition by name at the end of which
the environment data will be located.
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Wilson Lee [Fri, 3 Nov 2017 06:39:51 +0000 (23:39 -0700)]
serial: nulldev: Implement "pending" function to fix tstc return "true"
In U-boot, serial_tstc was use to determine is there have a character in
serial console that pending for read. If there is no "pending" function
implemented in serial driver, the serial-uclass will return "true(1)"
to indicate there have a character pending to read.
Thus, read a character from nulldev serial will result in continuous
getting -EAGAIN return which might lead system to hang.
This commit is to fix a bug in nulldev serial which implement "pending"
function in nulldev serial to always indicate there is no character in
console that pending for read.
Signed-off-by: Wilson Lee <wilson.lee@ni.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Keng Soon Cheah <keng.soon.cheah@ni.com>
Cc: Chen Yee Chew <chen.yee.chew@ni.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Kever Yang [Fri, 3 Nov 2017 02:10:27 +0000 (10:10 +0800)]
armv8: update gd after relocate
We need to update gd in assamble code after relocate,
this is a fix to:
adc421e arm: move gd handling outside of C code
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Stephen Warren [Fri, 3 Nov 2017 00:11:27 +0000 (18:11 -0600)]
arm64: support running at addr other than linked to
This is required in the case where U-Boot is typically loaded and run at
a particular address, but for some reason the RAM at that location is not
available, e.g. due to memory fragmentation loading other boot binaries or
firmware, splitting an SMP complex between various different OSs without
using e.g. the EL2 second-stage page tables to hide the memory asignments,
or due to known ECC failures.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Stephen Warren [Fri, 27 Oct 2017 17:04:08 +0000 (11:04 -0600)]
test/py: add timestamps to log
It can be useful to record how long tests take; this can help debug slow
running test systems or track changes in performance over time. Enhance
the test system to record timestamps while running test:
- Whenever a new log file section is started.
- After U-Boot is started and communication has been established.
- After each host or U-Boot command is executed.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Patrice Chotard [Thu, 26 Oct 2017 11:23:19 +0000 (13:23 +0200)]
clk: clk_stm32f7: fix PLL clock division factor
Fix clock division factor initialization for RCC_PLLCFGR
registers.
PLLR bits (bit 31-28) in RCC_PLLCFGR must not be cleared,
it's a forbidden value. So update RCC_PLLCFGR using
clrsetbits_le32() to set only necessary bits fields.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrice Chotard [Mon, 23 Oct 2017 08:57:34 +0000 (10:57 +0200)]
mmc: arm_pl180_mmci: add .getcd callback
Add .getcd callback to check is MMC card is present
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Mon, 23 Oct 2017 08:57:33 +0000 (10:57 +0200)]
mmc: arm_pl180_mmci: add clock support
Allow to get and enable MMC related clock
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Mon, 23 Oct 2017 08:57:32 +0000 (10:57 +0200)]
mmc: arm_pl180_mmci: add bus_width DT property support
Allow to get "bus-width" property from device tree
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Mon, 23 Oct 2017 08:57:31 +0000 (10:57 +0200)]
mmc: arm_pl180_mmci: adapt driver to DM usage
Convert this driver to driver model.
This driver is also used by VEXPRESS platforms which doesn't
use driver model.
Tested on STM32F746 and STM32F769 platforms.
Signed-off-by: Christophe Priouzeau <christophe.priouzeau@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Mon, 23 Oct 2017 08:57:30 +0000 (10:57 +0200)]
mmc: arm_pl180_mmci: update arm_pl180_mmci_init() prototype
Update arm_pl180_mmci_init() prototype by adding struct mmc**
param. This is needed before converting this driver to driver model
in order to use arm_pl180_mmci_init() in driver model and in none
driver model implementation
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Tom Rini [Fri, 20 Oct 2017 20:55:51 +0000 (16:55 -0400)]
omap2: nand: Make NAND_OMAP_GPMC_PREFETCH default
This option provides better performance and should really always be
enabled. Make this be default y.
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Neil Armstrong [Wed, 18 Oct 2017 08:02:12 +0000 (10:02 +0200)]
arm: amlogic: p212: Add support for Ethernet with Internal PHY
This patch adds support for the Internal RMII Ethernet PHY on the
Amlogic P212 Reference Board.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>