oweals/u-boot.git
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-socfpga
Tom Rini [Sun, 20 May 2018 13:44:05 +0000 (09:44 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-socfpga

6 years agoFixup various SPDX tags from the latest merge
Tom Rini [Fri, 18 May 2018 21:54:39 +0000 (17:54 -0400)]
Fixup various SPDX tags from the latest merge

Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agoMerge git://git.denx.de/u-boot-imx
Tom Rini [Fri, 18 May 2018 11:11:11 +0000 (07:11 -0400)]
Merge git://git.denx.de/u-boot-imx

6 years agoarm: dts: socfpga: stratix10: update dtsi and dts
Ley Foon Tan [Fri, 18 May 2018 14:05:35 +0000 (22:05 +0800)]
arm: dts: socfpga: stratix10: update dtsi and dts

Update dtsi and dts files for resets, phy node and other properties.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoarm: socfpga: misc: Add CONFIG_SYS_L2_PL310 switch
Ley Foon Tan [Fri, 18 May 2018 14:05:25 +0000 (22:05 +0800)]
arm: socfpga: misc: Add CONFIG_SYS_L2_PL310 switch

Preparation for Stratix 10 enablement. In ARM64, L2 cache controller is
accessed through processor registers. So, add CONFIG_SYS_L2_PL310 switch
conditional build in order this file can by shared across other SOCFPGAs.

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoarm: socfpga: stratix10: Add pinmux support for Stratix10 SoC
Ley Foon Tan [Fri, 18 May 2018 14:05:24 +0000 (22:05 +0800)]
arm: socfpga: stratix10: Add pinmux support for Stratix10 SoC

Add pinmux driver support for Stratix SoC

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoarm: socfpga: stratix10: Add reset manager driver for Stratix10 SoC
Ley Foon Tan [Fri, 18 May 2018 14:05:23 +0000 (22:05 +0800)]
arm: socfpga: stratix10: Add reset manager driver for Stratix10 SoC

Add Reset Manager driver support for Stratix SoC

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoarm: socfpga: stratix10: Add clock manager driver for Stratix10 SoC
Ley Foon Tan [Fri, 18 May 2018 14:05:22 +0000 (22:05 +0800)]
arm: socfpga: stratix10: Add clock manager driver for Stratix10 SoC

Add Clock Manager driver support for Stratix SoC

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoarm: socfpga: stratix10: Add watchdog and firewall base addresses
Ley Foon Tan [Fri, 18 May 2018 14:05:21 +0000 (22:05 +0800)]
arm: socfpga: stratix10: Add watchdog and firewall base addresses

Add the base address for watchdog and firewall.

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoARM: socfpga: Fix Documentation errors in scu_registers
Ben Kalo [Tue, 15 May 2018 16:45:37 +0000 (19:45 +0300)]
ARM: socfpga: Fix Documentation errors in scu_registers

According to ARM Cortex-A9 MPCore TRM section 2.2 - SCU registers
Access Control register offset is 0x50.

Signed-off-by: Ben Kalo <ben.h.kalo@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
6 years agoARM: socfpga: Adding SoCFPGA info for both SPL and U-Boot
Tien Fong Chee [Tue, 5 Dec 2017 07:58:08 +0000 (15:58 +0800)]
ARM: socfpga: Adding SoCFPGA info for both SPL and U-Boot

SoC FPGA info is required in both SPL and U-Boot.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
6 years agoARM: socfpga: Adding clock frequency info for U-Boot
Tien Fong Chee [Tue, 5 Dec 2017 07:58:07 +0000 (15:58 +0800)]
ARM: socfpga: Adding clock frequency info for U-Boot

Clock frequency info is required in U-Boot because info would be erased
when transition from SPL to U-Boot.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
6 years agoARM: socfpga: Enable SPL memory allocation
Tien Fong Chee [Tue, 5 Dec 2017 07:58:04 +0000 (15:58 +0800)]
ARM: socfpga: Enable SPL memory allocation

Enable memory allocation in SPL for preparation to enable FAT
in SPL. Memory allocation is needed by FAT to work properly.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
6 years agoconfigs: Add DDR Kconfig support for Arria 10
Tien Fong Chee [Tue, 5 Dec 2017 07:58:03 +0000 (15:58 +0800)]
configs: Add DDR Kconfig support for Arria 10

This patch enables DDR Kconfig support for Arria 10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Dinh Nguyen <dinguyen@kernel.org>
6 years agoARM: socfpga: Add DDR driver for Arria 10
Tien Fong Chee [Tue, 5 Dec 2017 07:58:02 +0000 (15:58 +0800)]
ARM: socfpga: Add DDR driver for Arria 10

Add DDR driver support for Arria 10.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
6 years agoARM: socfpga: Add DRAM bank size initialization function
Tien Fong Chee [Tue, 5 Dec 2017 07:58:01 +0000 (15:58 +0800)]
ARM: socfpga: Add DRAM bank size initialization function

Add function for both multiple DRAM bank and single DRAM bank size
initialization. This common functionality could be used by every single
SOCFPGA board.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Tested-by: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoARM: socfpga: Rename the gen5 sdram driver to more specific name
Tien Fong Chee [Tue, 5 Dec 2017 07:58:00 +0000 (15:58 +0800)]
ARM: socfpga: Rename the gen5 sdram driver to more specific name

Current sdram driver is only applied to gen5 device, hence it is better
to rename sdram driver to more specific name which is related to gen5
device.

Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
6 years agoARM: socfpga: Repair A10 EMAC reset handling
Marek Vasut [Mon, 23 Apr 2018 20:49:31 +0000 (22:49 +0200)]
ARM: socfpga: Repair A10 EMAC reset handling

The EMAC reset and PHY mode configuration was never working on the
Arria10 SoC, fix this. This patch pulls out the common code into
misc.c and passes the SoC-specific function call in as a function
pointer.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
6 years agoARM: socfpga: Synchronize Arria10 SoCDK SDMMC handoff
Marek Vasut [Sat, 12 May 2018 10:00:47 +0000 (12:00 +0200)]
ARM: socfpga: Synchronize Arria10 SoCDK SDMMC handoff

Regenerate Altera Arria 10 SoCDK SDMMC handoff file using latest
Quartus to get the new set of clock bindings in.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
6 years agoARM: socfpga: Synchronize Arria10 DTs
Marek Vasut [Sun, 22 Apr 2018 23:37:57 +0000 (01:37 +0200)]
ARM: socfpga: Synchronize Arria10 DTs

Synchronize Altera Arria 10 DT sources with Linux 4.16.3 as of commit
ef8216d28a5920022cddcb694d2d75bd1f0035ca

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
6 years agoARM: socfpga: Sort the DT Makefile
Marek Vasut [Mon, 7 May 2018 20:29:17 +0000 (22:29 +0200)]
ARM: socfpga: Sort the DT Makefile

Sort the Makefile entries, no functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
6 years agoARM: socfpga: Sync A10 clock manager binding parser
Marek Vasut [Fri, 11 May 2018 22:09:21 +0000 (00:09 +0200)]
ARM: socfpga: Sync A10 clock manager binding parser

The A10 clock manager parsed DT bindings generated by Quartus the
bsp-editor to configure the A10 clocks. Sadly, those DT bindings
changed at some point. The clock manager patch used the old ones,
this patch replaces the bindings parser with one for the new set.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
6 years agoARM: socfpga: Convert to DM serial
Marek Vasut [Fri, 11 May 2018 20:26:35 +0000 (22:26 +0200)]
ARM: socfpga: Convert to DM serial

Pull the serial port configuration from DT and use DM serial instead
of having the serial configuration in two places, DT and board config.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
6 years agoARM: socfpga: Clean up Kconfig entries
Marek Vasut [Fri, 11 May 2018 20:25:59 +0000 (22:25 +0200)]
ARM: socfpga: Clean up Kconfig entries

Shuffle the default Kconfig entries around so it is not such a mess.
No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
6 years agoARM: socfpga: Zap CONFIG_SOCFPGA_VIRTUAL_TARGET
Marek Vasut [Sun, 22 Apr 2018 23:26:10 +0000 (01:26 +0200)]
ARM: socfpga: Zap CONFIG_SOCFPGA_VIRTUAL_TARGET

This was never used, is not used anywhere and is just in the way
by adding annoying ifdeffery. Get rid of it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
6 years agoARM: socfpga: Put stack at the end of SRAM
Marek Vasut [Thu, 26 Apr 2018 20:23:05 +0000 (22:23 +0200)]
ARM: socfpga: Put stack at the end of SRAM

The global data are in the .data section, so there's no point in
reserving any space for it above stack. Put stack at the end of
SRAM.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
6 years agofdt: Add another Altera Arria10 clock init compatible
Marek Vasut [Sat, 12 May 2018 09:56:10 +0000 (11:56 +0200)]
fdt: Add another Altera Arria10 clock init compatible

The DT bindings for the Arria10 clock init have changed, add another
compatible to make them work with U-Boot until a proper clock driver
gets written.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
6 years agoarm: imx53: Add support for imx53 boards from K+P
Lukasz Majewski [Thu, 26 Apr 2018 13:07:18 +0000 (15:07 +0200)]
arm: imx53: Add support for imx53 boards from K+P

This commit adds support for DDC and HSC boards from
K+P in u-boot.

Console output:

U-Boot 2018.05-rc2-00090-g752b7ed6f9 (Apr 26 2018 - 14:24:24 +0200)

CPU:   Freescale i.MX53 rev2.1 at 800 MHz
Reset cause: WDOG
Model: K+P iMX53
DRAM:  512 MiB
MMC:   FSL_SDHC: 0
Loading Environment from MMC... OK
In:    serial
Out:   serial
Err:   serial
Module EEPROM:
  ID: TQMa53-CB.0401
  SN: 63152762
  MAC: 00:0b:64:03:14:2a
BBoard:40x0 Rev:10
Net:   eth0: ethernet@63fec000
Hit any key to stop autoboot:  0

Signed-off-by: Lukasz Majewski <lukma@denx.de>
6 years agosandbox: tests: Add tests for mc34708 PMIC device
Lukasz Majewski [Tue, 15 May 2018 14:26:43 +0000 (16:26 +0200)]
sandbox: tests: Add tests for mc34708 PMIC device

Following tests has been added for mc34708 device:

- get_test for mc34708 PMIC
- Check if proper number of registers is read
- Check if default (emulated via i2c device) value is properly read
- Check if value write/read operation is correct
- Perform tests to check if pmic_clrsetbits() is working correctly

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agosandbox: tests: Exclude common test code (pmic_get) in test/dm/pmic.c
Lukasz Majewski [Tue, 15 May 2018 14:26:42 +0000 (16:26 +0200)]
sandbox: tests: Exclude common test code (pmic_get) in test/dm/pmic.c

The common code can be excluded to be reused by tests for other PMIC.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agosandbox: Enable MC34708 PMIC support
Lukasz Majewski [Tue, 15 May 2018 14:26:41 +0000 (16:26 +0200)]
sandbox: Enable MC34708 PMIC support

This MC34708 PMIC is somewhat special - it used single transfers (R/W) with
3 bytes size - up till now U-Boot's PMICs only used 1 byte.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agosandbox: Enable support for MC34708 PMIC in DTS
Lukasz Majewski [Tue, 15 May 2018 14:26:40 +0000 (16:26 +0200)]
sandbox: Enable support for MC34708 PMIC in DTS

This commit also provides the default values of the emulated MC34708 PMIC
internal registers content.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agosandbox: Rewrite i2c_pmic_emul.c to support PMIC with 3 bytes transmission
Lukasz Majewski [Tue, 15 May 2018 14:26:39 +0000 (16:26 +0200)]
sandbox: Rewrite i2c_pmic_emul.c to support PMIC with 3 bytes transmission

This change enables support for MC34708 PMIC in sandbox. Now we can
emulate the I2C transfers larger than 1 byte.

Notable changes for this driver:

- From now on the register number is not equal to index in the buffer,
  which emulates the PMIC registers

- The PMIC register's pool is now dynamically allocated up till
  64 regs * 3 bytes each = 192 B

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agopmic: Rewrite the pmic command to not only work with single byte transmission
Lukasz Majewski [Tue, 15 May 2018 14:26:38 +0000 (16:26 +0200)]
pmic: Rewrite the pmic command to not only work with single byte transmission

Up till now it was only possible to use 'pmic' command with a single byte
transmission.
The pmic_read|write functions has been replaced with ones, which don't need
the transmission length as a parameter.

Due to that it is possible now to read data from PMICs transmitting more
data than 1 byte at once (e.g. mc34708)

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agopmic: dm: Add support for MC34708 for PMIC DM
Lukasz Majewski [Tue, 15 May 2018 14:26:37 +0000 (16:26 +0200)]
pmic: dm: Add support for MC34708 for PMIC DM

This patch adds support for MC34708 PMIC, to be used with driver model
(DM).

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agopmic: dm: Rewrite pmic_reg_{read|write|clrsetbits} to support 3 bytes transmissions
Lukasz Majewski [Tue, 15 May 2018 14:26:36 +0000 (16:26 +0200)]
pmic: dm: Rewrite pmic_reg_{read|write|clrsetbits} to support 3 bytes transmissions

This commit provides support for transmissions larger than 1 byte for
PMIC devices used with DM (e.g. MC34708 from NXP).

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agopmic: Add support for setting transmission length in uclass private data
Lukasz Majewski [Tue, 15 May 2018 14:26:35 +0000 (16:26 +0200)]
pmic: Add support for setting transmission length in uclass private data

The struct uc_pmic_priv's trans_len field stores the number of types to
be transmitted per PMIC transfer.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agopmic: fsl: Define number of bytes sent at once by MC34708 PMIC
Lukasz Majewski [Tue, 15 May 2018 14:26:34 +0000 (16:26 +0200)]
pmic: fsl: Define number of bytes sent at once by MC34708 PMIC

This patch adds definition of the number of bytes sent at once by the
MC34708 PMIC.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agopmic: fsl: Provide some more definitions for MC34708 PMIC
Lukasz Majewski [Tue, 15 May 2018 14:26:33 +0000 (16:26 +0200)]
pmic: fsl: Provide some more definitions for MC34708 PMIC

This commit adds some more defines for MC34708 PMIC.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agoconfigs: imx6dl-mamoj: Enable HAB
Jagan Teki [Mon, 7 May 2018 05:51:40 +0000 (11:21 +0530)]
configs: imx6dl-mamoj: Enable HAB

Enable Secure boot(HAB) for BTicino Mamoj board.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agoconfigs: imx6dl-mamoj: Add Falcon mode support
Jagan Teki [Mon, 7 May 2018 05:51:39 +0000 (11:21 +0530)]
configs: imx6dl-mamoj: Add Falcon mode support

Add Falcon mode support to boot Linux directly after SPL.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agoconfigs: imx6dl-mamoj: Add DFU support
Jagan Teki [Mon, 7 May 2018 05:51:38 +0000 (11:21 +0530)]
configs: imx6dl-mamoj: Add DFU support

Add DFU support for BTicino Mamoj board and update
the same steps in README.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Simone CIANNI <simone.cianni@bticino.it>
Signed-off-by: Raffaele RECALCATI <raffaele.recalcati@bticino.it>
6 years agoconfigs: imx6dl_mamoj: Enable fastboot and ums
Jagan Teki [Mon, 7 May 2018 05:51:37 +0000 (11:21 +0530)]
configs: imx6dl_mamoj: Enable fastboot and ums

Enable fastboot and ums for host to interact eMMC on
Mamoj board.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Simone CIANNI <simone.cianni@bticino.it>
Signed-off-by: Raffaele RECALCATI <raffaele.recalcati@bticino.it>
6 years agoi.MX6DL: mamoj: Add PFUZE100 support
Jagan Teki [Mon, 7 May 2018 05:51:36 +0000 (11:21 +0530)]
i.MX6DL: mamoj: Add PFUZE100 support

MX6DL Mamoj boards has Freescale PFUZE100 PMIC, add support
for it through DM_PMIC dt definition.

pmic log:
Reviewed-by: Stefano Babic <sbabic@denx.de>
========
=> pmic list
| Name                            | Parent name         | Parent uclass @ seq
| pfuze100@08                     | i2c@021f8000        | i2c @ 3
=> pmic dev pfuze100@08
dev: 0 @ pfuze100@08
=> pmic dump
Dump pmic: pfuze100@08 registers

0x00: 10 00 00 21 00 01 3f 01 00 7f 00 00 00 00 00 81
0x10: 00 00 3f 00 00 00 00 00 00 00 00 10 00 00 00 00
0x20: 2b 2b 2b 08 c4 00 00 00 00 00 00 00 00 00 2b 2b
0x30: 2b 08 c4 00 00 72 72 72 08 d4 00 00 2c 2c 2c 08
0x40: e4 00 00 2c 2c 2c 08 e4 00 00 6f 6f 6f 08 f4 00
0x50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
0x60: 00 00 00 00 00 00 48 00 00 00 10 06 1e 1e 17 10
0x70: 1a 1f 00 00 00 00 00 00 00 00 00 00 00 00 00

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Simone CIANNI <simone.cianni@bticino.it>
Signed-off-by: Raffaele RECALCATI <raffaele.recalcati@bticino.it>
6 years agoi.MX6DL: mamoj: Add I2C support
Jagan Teki [Mon, 7 May 2018 05:51:35 +0000 (11:21 +0530)]
i.MX6DL: mamoj: Add I2C support

i.MX6DL Mamoj has i2c3 and i2c4 buses, add support
through DM_I2C with dt definition.

i2c log:
Reviewed-by: Stefano Babic <sbabic@denx.de>
=======
=> i2c bus
Bus 2:  i2c@021a8000
Bus 3:  i2c@021f8000
=> i2c dev 2
Setting bus to 2
=> i2c speed 400000
Setting bus speed to 400000 Hz
=> i2c probe
Valid chip addresses: 20 51 53
=> i2c md 53 0xff
00ff: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff    ................
=> i2c md 51 0xff
00ff: a8 08 40 50 09 43 46 52 42 18 80 8e ae a9 d0 53    ..@P.CFRB......S
=> i2c dev 3
Setting bus to 3
=> i2c speed 100000
Setting bus speed to 100000 Hz
=> i2c probe
Valid chip addresses: 08 40 48 4B
=> i2c md 08 0xff
00ff: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Simone CIANNI <simone.cianni@bticino.it>
Signed-off-by: Raffaele RECALCATI <raffaele.recalcati@bticino.it>
6 years agoi.MX6: board: Add BTicino i.MX6DL Mamoj initial support
Jagan Teki [Mon, 7 May 2018 05:51:34 +0000 (11:21 +0530)]
i.MX6: board: Add BTicino i.MX6DL Mamoj initial support

Add initial support for i.MX6DL BTicino Mamoj board.

Mamoh board added:
- SPL
- SPL_DM
- SPL_OF_CONTROL
- DM for U-Boot proper
- OF_CONTROL for U-Boot proper
- eMMC
- FEC
- Boot from eMMC
- Boot from USB SDP

Signed-off-by: Simone CIANNI <simone.cianni@bticino.it>
Signed-off-by: Raffaele RECALCATI <raffaele.recalcati@bticino.it>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agoARM: i.MX6: dts: Build dtb based on SOC type
Jagan Teki [Wed, 11 Apr 2018 12:32:23 +0000 (18:02 +0530)]
ARM: i.MX6: dts: Build dtb based on SOC type

Build dtb's based on SOC type instead building arch type.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agoARM: dts: i.MX6UL: U-Boot specific dts for u-boot, dm-spl
Jagan Teki [Wed, 11 Apr 2018 12:32:22 +0000 (18:02 +0530)]
ARM: dts: i.MX6UL: U-Boot specific dts for u-boot, dm-spl

u-boot,dm-spl property is specific to U-Boot, so move it into
*u-boot.dtsi files for relevant i.MX6UL files.

This make syncing Linux dts files straight forward.

Also update the MAINTAINERS file for dts files.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agoARM: dts: imx6ul-isiot: Move usdhc2 into dtsi
Jagan Teki [Wed, 11 Apr 2018 12:32:21 +0000 (18:02 +0530)]
ARM: dts: imx6ul-isiot: Move usdhc2 into dtsi

Move usdhc2 node along with pinctrl to imx6ul-isiot.dts
from imx6ul-isiot-emmc.dts

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agoARM: dts: i.MX6QDL: U-Boot specific dts for u-boot, dm-spl
Jagan Teki [Wed, 11 Apr 2018 12:32:20 +0000 (18:02 +0530)]
ARM: dts: i.MX6QDL: U-Boot specific dts for u-boot, dm-spl

u-boot,dm-spl property is specific to U-Boot, so move it into
*u-boot.dtsi files for relevant i.MX6QDL files.

This make syncing Linux dts files straight forward.

Also update the MAINTAINERS file for dts files.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agoimx6: sabrelite: update defconfig to use distro defaults
Guillaume GARDET [Wed, 18 Apr 2018 15:04:59 +0000 (17:04 +0200)]
imx6: sabrelite: update defconfig to use distro defaults

Boot tested with boot.scr script and EFI/Grub2 on mmc0 and mmc1 slots on sabrelite board.

Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Cc: Troy Kisky <troy.kisky@boundarydevices.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Gary Bisson <gary.bisson@boundarydevices.com>
6 years agoimx6: Convert sabrelite and nitrogen6x boards to distro boot support
Guillaume GARDET [Wed, 18 Apr 2018 15:04:58 +0000 (17:04 +0200)]
imx6: Convert sabrelite and nitrogen6x boards to distro boot support

Boot tested on sabrelite board.

Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Cc: Troy Kisky <troy.kisky@boundarydevices.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Gary Bisson <gary.bisson@boundarydevices.com>
Tested-by: Denis Pynkin <denis.pynkin@collabora.com>
6 years agoMerge git://www.denx.de/git/u-boot-marvell
Tom Rini [Thu, 17 May 2018 16:38:30 +0000 (12:38 -0400)]
Merge git://www.denx.de/git/u-boot-marvell

6 years agonet: MVGBE don't automatically select PHYLIB
Chris Packham [Thu, 17 May 2018 12:12:04 +0000 (00:12 +1200)]
net: MVGBE don't automatically select PHYLIB

When Kconfig support was added for MVGBE it included automatically
selected PHYLIB support. But MVGBE does not need PHYLIB it will build
fine without it. Commit ed52ea507f12 ("net: add Kconfig for MVGBE")
should have been a no-op in terms of build size but because of the
selecting PHYLIB the openrd configs increased in size.

Remove the automatic selection of PHYLIB, boards that need it will have
already enabled it in their config header file.

Fixes: commit ed52ea507f12 ("net: add Kconfig for MVGBE")
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoARM: kirkwood: Add device-tree for sheevaplug
Chris Packham [Tue, 8 May 2018 10:34:21 +0000 (22:34 +1200)]
ARM: kirkwood: Add device-tree for sheevaplug

Import the dts files from Linux 4.17 and enable device tree control in
u-boot.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoARM: kirkwood: Add device-tree for pogo_e02
Chris Packham [Tue, 8 May 2018 10:34:20 +0000 (22:34 +1200)]
ARM: kirkwood: Add device-tree for pogo_e02

Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoARM: kirkwood: Add device-tree for openrd
Chris Packham [Tue, 8 May 2018 10:34:19 +0000 (22:34 +1200)]
ARM: kirkwood: Add device-tree for openrd

Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoARM: kirkwood: Add device-tree for nas220
Chris Packham [Tue, 8 May 2018 10:34:17 +0000 (22:34 +1200)]
ARM: kirkwood: Add device-tree for nas220

Import the dts file from Linux 4.17 and enable CONFIG_OF_CONTROL.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoARM: kirkwood: Add device-tree for iconnect
Chris Packham [Tue, 8 May 2018 10:34:16 +0000 (22:34 +1200)]
ARM: kirkwood: Add device-tree for iconnect

Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoARM: kirkwood: Add device-tree for ib62x0
Chris Packham [Tue, 8 May 2018 10:34:15 +0000 (22:34 +1200)]
ARM: kirkwood: Add device-tree for ib62x0

Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoARM: kirkwood: Add device-tree for guruplug
Chris Packham [Tue, 8 May 2018 10:34:14 +0000 (22:34 +1200)]
ARM: kirkwood: Add device-tree for guruplug

Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoARM: kirkwood: Add device-tree for goflexhome
Chris Packham [Tue, 8 May 2018 10:34:13 +0000 (22:34 +1200)]
ARM: kirkwood: Add device-tree for goflexhome

Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoARM: kirkwood: Add device-tree for dockstar
Chris Packham [Tue, 8 May 2018 10:34:12 +0000 (22:34 +1200)]
ARM: kirkwood: Add device-tree for dockstar

Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoARM: kirkwood: Add device-tree for dns325
Chris Packham [Tue, 8 May 2018 10:34:11 +0000 (22:34 +1200)]
ARM: kirkwood: Add device-tree for dns325

Import the dts files from Linux 4.17 and enable CONFIG_OF_CONTROL.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoARM: add devicetree files for kirkwood SoC
Chris Packham [Tue, 8 May 2018 10:34:10 +0000 (22:34 +1200)]
ARM: add devicetree files for kirkwood SoC

These files are taken verbatim from the Linux kernel 4.17

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agodts: pinctrl: Provide IMX_PAD_SION definition for imx53 pinctrl
Lukasz Majewski [Thu, 26 Apr 2018 11:19:13 +0000 (13:19 +0200)]
dts: pinctrl: Provide IMX_PAD_SION definition for imx53 pinctrl

The SION pin must be set for proper operation of I2C when DM is enabled.

When legacy I2C is used, this bit is set implicitly in the u-boot code:
arch/arm/include/asm/arch-mx5/iomux-mx53.h:92:
MX53_PAD_KEY_ROW3__I2C2_SDA = IOMUX_PAD(0x368, 0x040, 4 |
IOMUX_CONFIG_SION, 0x820, 0, NO_PAD_CTRL),

The Linux kernel uses similar approach with:
arch/arm/boot/dts/imx53-tqma53.dtsi:182:
MX53_PAD_KEY_ROW3__I2C2_SDA             0xc0000000

After applying this patch it is possible to have the I2C working with DM
on imx53 devices:

MX53_PAD_KEY_ROW3__I2C2_SDA (0x1ee | IMX_PAD_SION)

Signed-off-by: Lukasz Majewski <lukma@denx.de>
6 years agodts: imx53: Add gpio and i2c nodes to imx53.dtsi file
Lukasz Majewski [Thu, 26 Apr 2018 11:18:00 +0000 (13:18 +0200)]
dts: imx53: Add gpio and i2c nodes to imx53.dtsi file

Those DTS nodes has been ported from Linux kernel (v4.16)

Signed-off-by: Lukasz Majewski <lukma@denx.de>
6 years agoge: ppd: move CONFIG_ENV_IS_IN_MMC to defconfig
Sebastian Reichel [Mon, 23 Apr 2018 15:10:43 +0000 (17:10 +0200)]
ge: ppd: move CONFIG_ENV_IS_IN_MMC to defconfig

CONFIG_ENV_IS_IN_MMC must be declared in defconfig to properly
support "env save".

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
6 years agomx6: remove duplicated BOUNCE_BUFFER defines
Peter Robinson [Sat, 12 May 2018 08:48:03 +0000 (09:48 +0100)]
mx6: remove duplicated BOUNCE_BUFFER defines

The mx6_common.h file already defines BOUNCE_BUFFER so no need to
definit it again in specific configs.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
6 years agomx6: Select CONFIG_MP with MX6_SMP
Peter Robinson [Sat, 12 May 2018 08:45:31 +0000 (09:45 +0100)]
mx6: Select CONFIG_MP with MX6_SMP

It makes sense to select the MP multi processor option at the same time we
select the other SMP options needed for SMP capable i.MX6 SoCs.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
6 years agomx7: remove empty ifndef statement
Peter Robinson [Sat, 12 May 2018 08:44:20 +0000 (09:44 +0100)]
mx7: remove empty ifndef statement

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
6 years agomx6 common: remove dangling comment
Peter Robinson [Sat, 12 May 2018 08:43:10 +0000 (09:43 +0100)]
mx6 common: remove dangling comment

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
6 years agomx31: Convert MX31_HCLK_FREQ and MX31_CLK32 to Kconfig.
Magnus Lilja [Fri, 11 May 2018 12:06:55 +0000 (14:06 +0200)]
mx31: Convert MX31_HCLK_FREQ and MX31_CLK32 to Kconfig.

Also remove the #ifdef's from clock.h since the Kconfig values defaults
the to old default values in clock.h.

Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
6 years agomx31pdk: Convert CONFIG_MX31 flag to use Kconfig.
Magnus Lilja [Fri, 11 May 2018 12:06:54 +0000 (14:06 +0200)]
mx31pdk: Convert CONFIG_MX31 flag to use Kconfig.

Move CONFIG_MX31 from mx31pdk.h to mx31pdk_defconfig and introduce
necessary Kconfig changes as well.

Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
6 years agoboard: ge: bx50v3: remove redundant targets
Ian Ray [Wed, 25 Apr 2018 14:57:04 +0000 (16:57 +0200)]
board: ge: bx50v3: remove redundant targets

This replaces TARGET_GE_B{4,6,8}50V3 with common TARGET_GE_BX50V3.
The boards are identified automatically at runtime.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Nandor Han <nandor.han@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
6 years agoboard: ge: bx50v3: configure video arguments using VPD
Ian Ray [Wed, 25 Apr 2018 14:57:03 +0000 (16:57 +0200)]
board: ge: bx50v3: configure video arguments using VPD

Configure video arguments at run-time instead of at compile-time.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Nandor Han <nandor.han@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
6 years agoboard: ge: bx50v3: use VPD instead of compile-time checks
Ian Ray [Wed, 25 Apr 2018 14:57:02 +0000 (16:57 +0200)]
board: ge: bx50v3: use VPD instead of compile-time checks

B{46}50v3s have an internal LCD that needs to be configured,
in comparison with B850v3 which has only external displays.

Use VPD instead of `CONFIG_TARGET_GE_B{4,6,8}50V3' compile-time
checks to correct initialize video based on the monitor type.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Nandor Han <nandor.han@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
6 years agoboard: ge: bx50v3: detect the monitor type by reading VPD earlier
Nandor Han [Wed, 25 Apr 2018 14:57:01 +0000 (16:57 +0200)]
board: ge: bx50v3: detect the monitor type by reading VPD earlier

Move the VPD reading earlier in order to establish the monitor
type as soon as possible.

The configuration of the specific environment variables needs to be
done later after the environment is configured.

Signed-off-by: Nandor Han <nandor.han@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
6 years agoboard: ge: bx50v3: fix display support for b{46}50v3
Ian Ray [Wed, 25 Apr 2018 14:57:00 +0000 (16:57 +0200)]
board: ge: bx50v3: fix display support for b{46}50v3

Enable Video PLL to fix non-working display support for Bx50v3
internal displays.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Nandor Han <nandor.han@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
6 years agoboard: ge: bx50v3: unify two switch statements
Nandor Han [Wed, 25 Apr 2018 14:56:59 +0000 (16:56 +0200)]
board: ge: bx50v3: unify two switch statements

Simplify process_vpd() by unifying the switch statements handling
product specific configurations.

Signed-off-by: Nandor Han <nandor.han@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
6 years agoboard: ge: bx50v3: rename detect_baseboard function
Ian Ray [Wed, 25 Apr 2018 14:56:58 +0000 (16:56 +0200)]
board: ge: bx50v3: rename detect_baseboard function

The detect_baseboard() function actually determines whether there is an
internal LCD panel or not.  Rename for clarity.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Nandor Han <nandor.han@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
6 years agoboard: ge: bx50v3: add winbond SPI NOR support
Ian Ray [Mon, 23 Apr 2018 15:09:53 +0000 (17:09 +0200)]
board: ge: bx50v3: add winbond SPI NOR support

Add winbond SPI NOR support, which is being used by newer hardware.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
6 years agoMerge git://git.denx.de/u-boot-dm
Tom Rini [Wed, 16 May 2018 21:32:59 +0000 (17:32 -0400)]
Merge git://git.denx.de/u-boot-dm

6 years agoARM: re-enable MVGBE for edminiv2
Chris Packham [Wed, 16 May 2018 08:31:43 +0000 (20:31 +1200)]
ARM: re-enable MVGBE for edminiv2

This was unintentionally disabled when moving MVGBE to Kconfig.

Fixes: commit ed52ea507f12 ("net: add Kconfig for MVGBE")
Signed-off-by: Chris Packham <judge.packham@gmail.com>
6 years agopinctrl: do not set_state for device without valid ofnode
Kever Yang [Wed, 18 Apr 2018 09:54:04 +0000 (17:54 +0800)]
pinctrl: do not set_state for device without valid ofnode

Not all the udevice have a available DT node, eg. rksdmmc@ff500000.blk
which add by mmc_bind(), these device do not have/need set pinctrl
state.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agotools: buildman: Don't use the working dir as build dir
Lothar Waßmann [Sun, 8 Apr 2018 11:14:11 +0000 (05:14 -0600)]
tools: buildman: Don't use the working dir as build dir

When the U-Boot base directory happens to have the same name as the branch
that buildman is directed to use via the '-b' option and no output
directory is specified with '-o', buildman happily starts removing the
whole U-Boot sources eventually only stopped with the error message:

OSError: [Errno 20] Not a directory: '../<branch-name>/boards.cfg

Add a check to avoid this and also deal with the case where '-o' points
to the source directory, or any subdirectory of it.

Finally, tidy up the confusing logic for removing the old tree when using
-b. This is only done when building a branch.

Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Lothar Waßmann <LW@KARO-electronics.de>
6 years agousb: composite convert __set_bit to generic_set_bit
Bryan O'Donoghue [Mon, 30 Apr 2018 14:56:10 +0000 (15:56 +0100)]
usb: composite convert __set_bit to generic_set_bit

Compiling the f_mass_storage driver for an x86 target results in a
compilation error as set_bit and clear_bit are provided by bitops.h

To address that situation we discussed on the list moving to
genetic_set_bit() instead.

Doing a quick grep for similar situations in drivers/usb shows that the
composite device is using __set_bit().

This patch switches over to generic_set_bit to maintain consistency between
the two gadget drivers.

Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Marek Vasut <marex@denx.de>
6 years agousb: f_mass_storage: Fix set_bit and clear_bit usage
Bryan O'Donoghue [Mon, 30 Apr 2018 14:56:09 +0000 (15:56 +0100)]
usb: f_mass_storage: Fix set_bit and clear_bit usage

Compiling the f_mass_storage driver for an x86 target results in a
compilation error as set_bit and clear_bit are provided by bitops.h

Looking at the provenance of the current u-boot code and the git change
history in the kernel, it looks like we have a local copy of set_bit and
clear_bit as a hold-over from porting the Linux driver into u-boot.

These days __set_bit and __clear_bit are optionally provided by an arch and
can be used as inputs to generic_bit_set and generic_bit_clear.

This patch switches over to generic_set_bit and generic_clear_bit to
accommodate.

Tested on i.MX WaRP7 and Intel Edison

Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Marek Vasut <marex@denx.de>
6 years agonds32: Define PLATFORM__CLEAR_BIT for generic_clear_bit()
Bryan O'Donoghue [Mon, 30 Apr 2018 14:56:08 +0000 (15:56 +0100)]
nds32: Define PLATFORM__CLEAR_BIT for generic_clear_bit()

nds2 bitops.h provides a __clear_bit() but does not define
PLATFORM__CLEAR_BIT as a result generic_clear_bit() is used instead of the
architecturally provided __clear_bit().

This patch defines PLATFORM__CLEAR_BIT which means that __clear_bit() in
nds32 bitops.h will be called whenever generic_clear_bit() is called - as
opposed to the default cross-platform generic_clear_bit().

Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Cc: Macpaul Lin <macpaul@andestech.com>
6 years agonds32: Define PLATFORM__SET_BIT for generic_set_bit()
Bryan O'Donoghue [Mon, 30 Apr 2018 14:56:07 +0000 (15:56 +0100)]
nds32: Define PLATFORM__SET_BIT for generic_set_bit()

nds32 bitops.h provides a __set_bit() but does not define PLATFORM__SET_BIT
as a result generic_set_bit() is used instead of the architecturally
provided __set_bit().

This patch defines PLATFORM__SET_BIT which means that __set_bit() in nds32
bitops.h will be called whenever generic_set_bit() is called - as opposed
to the default cross-platform generic_set_bit().

Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Cc: Macpaul Lin <macpaul@andestech.com>
6 years agonios2: Define PLATFORM__CLEAR_BIT for generic_clear_bit()
Bryan O'Donoghue [Mon, 30 Apr 2018 14:56:06 +0000 (15:56 +0100)]
nios2: Define PLATFORM__CLEAR_BIT for generic_clear_bit()

nios2 bitops.h provides a __clear_bit() but does not define
PLATFORM__CLEAR_BIT as a result generic_clear_bit() is used instead of the
architecturally provided __clear_bit().

This patch defines PLATFORM__CLEAR_BIT which means that __clear_bit() in
nios2 bitops.h will be called whenever generic_clear_bit() is called - as
opposed to the default cross-platform generic_clear_bit().

Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Cc: Thomas Chou <thomas@wytron.com.tw>
6 years agonios2: Define PLATFORM__SET_BIT for generic_set_bit()
Bryan O'Donoghue [Mon, 30 Apr 2018 14:56:05 +0000 (15:56 +0100)]
nios2: Define PLATFORM__SET_BIT for generic_set_bit()

nios2 bitops.h provides a __set_bit() but does not define PLATFORM__SET_BIT
as a result generic_set_bit() is used instead of the architecturally
provided __set_bit().

This patch defines PLATFORM__SET_BIT which means that __set_bit() in nios2
bitops.h will be called whenever generic_set_bit() is called - as opposed
to the default cross-platform generic_set_bit().

Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Cc: Thomas Chou <thomas@wytron.com.tw>
6 years agoriscv: Define PLATFORM__CLEAR_BIT for generic_clear_bit()
Bryan O'Donoghue [Mon, 30 Apr 2018 14:56:04 +0000 (15:56 +0100)]
riscv: Define PLATFORM__CLEAR_BIT for generic_clear_bit()

riscv bitops.h provides a __clear_bit() but does not define
PLATFORM__CLEAR_BIT as a result generic_clear_bit() is used instead of the
architecturally provided __clear_bit().

This patch defines PLATFORM__CLEAR_BIT which means that __clear_bit() in
riscv bitops.h will be called whenever generic_clear_bit() is called - as
opposed to the default cross-platform generic_clear_bit().

Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Cc: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <green.hu@gmail.com>
6 years agoriscv: Define PLATFORM__SET_BIT for generic_set_bit()
Bryan O'Donoghue [Mon, 30 Apr 2018 14:56:03 +0000 (15:56 +0100)]
riscv: Define PLATFORM__SET_BIT for generic_set_bit()

riscv bitops.h provides a __set_bit() but does not define PLATFORM__SET_BIT
as a result generic_set_bit() is used instead of the architecturally
provided __set_bit().

This patch defines PLATFORM__SET_BIT which means that __set_bit() in x86
bitops.h will be called whenever generic_set_bit() is called - as opposed
to the default cross-platform generic_set_bit().

Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Cc: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <green.hu@gmail.com>
6 years agox86: Define PLATFORM__SET_BIT for generic_set_bit()
Bryan O'Donoghue [Mon, 30 Apr 2018 14:56:02 +0000 (15:56 +0100)]
x86: Define PLATFORM__SET_BIT for generic_set_bit()

x86 bitops.h provides a __set_bit() but does not define PLATFORM__SET_BIT
as a result generic_set_bit() is used instead of the architecturally
provided __set_bit().

This patch defines PLATFORM__SET_BIT which means that __set_bit() in x86
bitops.h will be called whenever generic_set_bit() is called - as opposed
to the default cross-platform generic_set_bit().

Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
6 years agoARM: mvebu: a38x: Add missing SPDX license identfier
Chris Packham [Tue, 15 May 2018 01:31:11 +0000 (13:31 +1200)]
ARM: mvebu: a38x: Add missing SPDX license identfier

mv_ddr_build_message.c is generated in Marvell's standalone mv_ddr code.
When imported into u-boot we need to add the appropriate SPDX tag and
re-format it slightly.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-video
Tom Rini [Tue, 15 May 2018 12:29:24 +0000 (08:29 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-video

6 years agodts: sunxi: add PWM node for sun50i
Vasily Khoruzhick [Mon, 14 May 2018 15:16:21 +0000 (08:16 -0700)]
dts: sunxi: add PWM node for sun50i

Add PWM definition to sun50i-a64.dtsi

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
6 years agopwm: sunxi: add support for PWM found on Allwinner A64
Vasily Khoruzhick [Mon, 14 May 2018 15:16:20 +0000 (08:16 -0700)]
pwm: sunxi: add support for PWM found on Allwinner A64

This commit adds basic support for PWM found on Allwinner A64.
It can be used for pwm_backlight driver (e.g. for Pinebook)

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
6 years agovideo: dw_hdmi: fix HSYNC and VSYNC polarity settings
Vasily Khoruzhick [Mon, 14 May 2018 20:49:53 +0000 (13:49 -0700)]
video: dw_hdmi: fix HSYNC and VSYNC polarity settings

Currently dw_hdmi configures HSYNC polarity using VSYNC setting from
EDID and vice versa. Fix it, since it breaks displays where HSYNC
and VSYNC polarity differs

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>