git.librecmc.org Git - oweals/u-boot.git/log

Merge remote-tracking branch 'u-boot-imx/master'

Merge remote-tracking branch 'u-boot-atmel/master'

mx28evk: Add missing 'setexpr' command

The environment now uses expressions but we missed the setexpr command
was not being include. This patch adds it.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>

i.MX: shut down video before launch of O/S

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>

i.MX: mxc_ipuv3_fb: add ipuv3_fb_shutdown() routine to stop IPU frame buffer

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>

mx28evk: Remove fecmxc_mii_postcall()

fecmxc_mii_postcall() is specific to the KSZ9021 PHY on m28evk and
should not be used on mx28evk, which has LAN8270 instead.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>

KARO TX25: Fix NAND Flash R/W cycle times

The NAND Flash of the KARO TX25 board is a Samsung K9F1G08U0B with 25-ns R/W
cycle times. However, the NFC clock for this board was set to 66.5 MHz, so using
the NFC driver in symmetric mode (i.e. 1 NFC clock cycle = 1 NF R/W cycle)
resulted in NF R/W cycle times of 15 ns, hence corrupted NF accesses.

This patch fixes this issue by setting the NFC clock to the highest frequency
complying to the 25-ns NF R/W cycle times specification, i.e. 33.25 MHz.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: John Rigby <jcrigby@gmail.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Daniel Gachet <Daniel.Gachet@hefr.ch>
Acked-by: Stefano Babic <sbabic@denx.de>

mx51evk: Add CONFIG_REVISION_TAG

FSL 2.6.35 kernel assumes that the bootloader passes the CONFIG_REVISION_TAG
information.

If this data is not present, the kernel misconfigures the TZIC, which results in
the timer interrupt handler never being called, so the kernel deadlocks while
calibrating its delay.

Suggested-by: Greg Topmiller <Greg.Topmiller@jdsu.com>
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>

Merge remote-tracking branch 'u-boot-imx/master'

Atmel: sam9g10/9m10/9x5: Add support to boot DT kernel

The mainline linux kernel is moving to flatten device tree support
Add the CONFIG_OF_LIBFDT option to support booting DT linux kernel

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

spiflash: at25: using common spi flash operation

Using common spi flash operation function to replace private operation
funtion

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

spi: add atmel at25df321 serial flash support

Add atmel at25df321 serial flash support

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

mx35pdk: README: Remove NAND references

Booting from NAND is currently not supported, so remove its references.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

mx28evk: extend default environment

The environment has been based on mx53loco and m28evk but keeping the
possibility to easy change the default console device as Freescale and
mainline kernels differ on the device name.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>

MX6: drop binary constants from iomux header

Constants set with binary value (0b...) are not compiled
from old toolchain when used by the clrsetbits_le32 macro.
Replaces them with the corresponding hex value.

The error reported (for example with the mx6qsabrelite board)
is something like:

mx6qsabrelite.c:369:1: error: invalid suffix "b101" on integer constant
mx6qsabrelite.c:369:1: error: invalid suffix "b10010" on integer constant
mx6qsabrelite.c:369:1: error: invalid suffix "b0000" on integer constant
mx6qsabrelite.c:369:1: error: invalid suffix "b10001" on integer constant

Signed-off-by: Stefano Babic <sbabic@denx.de>

at91sam9x5: set default EBI I/O drive configuration.

This patch configure at91sam9x5's EBI drive I/O. Without this, When SD card boot, the nand flash read/write are not stable. Which will cause kernel MTD test fail (Since mainline kernel doesn't configure the EBI register).

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

NAND: MXS: include common.h first so cache.h is included in correct order

With Simon Glass's include/nand.h alignment changes, some mxs builds
were generating errors. Fix is to ensure asm/cache.h is included before
linux/mtd/nand.h. Moving common.h to top of include list does that.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>

Tegra: Change Tegra20 to Tegra in common code, prep for T30

Convert TEGRA20_ defines to either TEGRA_ or NV_PA_ where appropriate.
Convert tegra20_ source file and function names to tegra_, also.

Upcoming Tegra30 port will use common code/defines/names where possible.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>

tegra20: usb: rework set_host_mode

This allows for two things:
- VBus GPIO may be used on other ports than the OTG one
- VBus GPIO may be low active if specified by DT

Signed-off-by: Lucas Stach <dev@lynxeye.de>
CC: Stephen Warren <swarren@wwwdotorg.org>
CC: Tom Warren <TWarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>

MX35: mx35pdk: add support for MMC

Add support for SD card and change the default
environment due to increased u-boot size.

Signed-off-by: Stefano Babic <sbabic@denx.de>

mx6qsabrelite:Use IMX_GPIO_NR Macro

Signed-off-by: Ashok Kumar Reddy <ashokkourla2000@gmail.com>

MX: set a common place to share code for Freescale i.MX

Up now only MX5 and MX6 can share code, because they have
a common source directory in cpu/armv7. Other not armv7
i.MX can profit of the same shared code. Move these files
into a directory accessible for all, similar to plat-mxc
in linux.

Signed-off-by: Stefano Babic <sbabic@denx.de>

ima3-mx53:Rename CONFIG_PRIME => CONFIG_ETHPRME, remove

unused macro CONFIG_DISCOVER_PHY

Signed-off-by: Ashok Kumar Reddy <ashokkourla2000@gmail.com>
Acked-by: Stefano Babic <sbabic@denx.de>

ARM: tegra: fix Ventana standalone build

Ventana always pulls in files from the Seaboard directory, so needs to
mkdir $(obj)../seaboard unconditionally. This fixes:

git clean -f -d -x
./MAKEALL ventana

"MAKEALL -s tegra20" passes without this change, because Seaboard
happens to be built before Ventana, and hence the directory has already
been created.

I believe the mkdir is only needed for out-of-tree builds, since the
seaboard directory is part of the source tree. However, since we always
build an SPL for Tegra now, which I believe is effectively an out-of-tree
build, we will always need this at some time. The overhead of just
uncondtionally executing the mkdir is minimal, and simplifies the
Makefile, since we don't need to code up the exact minimal condition to
execute the mkdir.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>

ARM: tegra: remove redundant mkdirs from board Makefiles

None of harmony, seaboard, ventana, whistler directly build files from
../common/, so there's no need to mkdir the obj directory for such files.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>

tegra: put eMMC environment into the boot sectors

When I set up Tegra's config files to put the environment into eMMC, I
assumed that CONFIG_ENV_OFFSET was a linearized address relative to the
start of the eMMC device, and spanning HW partitions boot0, boot1,
general* and the user area in order. However, it turns out that the
offset is actually relative to the beginning of the user area. Hence,
the environment block ended up in a different location to expected and
documented.

Set CONFIG_SYS_MMC_ENV_PART=2 (boot1) to solve this, and adjust
CONFIG_ENV_OFFSET to be relative to the start of boot1, not the entire
eMMC.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>

env_mmc: allow environment to be in an eMMC partition

eMMC devices may have hardware-level partitions: 2 boot partitions,
up to 4 general partitions, plus the user area. This change introduces
optional config variable CONFIG_SYS_MMC_ENV_PART to indicate which
partition the environment should be stored in: 0=user, 1=boot0, 2=boot1,
4..7=general0..3. This allows the environment to be kept out of the user
area, which simplifies the management of OS-/user-level (MBR/GPT)
partitions within the user area.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>

mmc: detect boot sectors using EXT_CSD_BOOT_MULT too

Some eMMC devices contain boot partitions, but do not set the PART_SUPPORT
bit in EXT_CSD_PARTITIONING_SUPPORT. Allow partition selection on such
devices, by enabling partition switching when EXT_CSD_BOOT_MULT is set.

Note that the Linux kernel enables access to boot partitions solely based
on the value of EXT_CSD_BOOT_MULT; EXT_CSD_PARTITIONING_SUPPORT only
influences access to "general" partitions.

eMMC devices affected by this issue exist on various NVIDIA Tegra
platforms (and presumably many others too), such as Harmony (plug-in eMMC),
Seaboard, Springbank, and Whistler (plug-in eMMC).

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>

tegra: Enable NAND on TEC

This commit enables NAND support on the Tamonten Evaluation Carrier and
adds the corresponding device tree nodes. Furthermore, the U-Boot
environment can now be stored in NAND.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>

cmd_nand: dump: Align data and OOB buffers

In order for cache invalidation and flushing to work properly, the data
and OOB buffers must be aligned to full cache lines.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>

tegra: enable NAND on Harmony

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>

tegra: Enable NAND on Seaboard

This enables NAND support for the Seaboard.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>

tegra: nand: Add Tegra NAND driver

A device tree is used to configure the NAND, including memory
timings and block/pages sizes.

If this node is not present or is disabled, then NAND will not
be initialized.

Signed-off-by: Jim Lin <jilin@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>

tegra: fdt: Add NAND definitions to fdt

Add a flash node to handle the NAND, including memory timings and
page / block size information.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>

tegra: fdt: Add NAND controller binding and definitions

Add a NAND controller along with a bindings file for review.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>

tegra: Add NAND support to funcmux

Add selection of NAND flash pins to the funcmux.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>

nand: Try to align the default buffers

The NAND layer needs to use cache-aligned buffers by default. Towards this
goal. align the default buffers and their members according to the minimum
DMA alignment defined for the architecture.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Scott Wood <scottwood@freescale.com>

mx31: Define default SoC input clock frequencies

Define default SoC input clock frequencies for i.MX31 in order to get rid of
duplicated definitions.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Helmut Raiger <helmut.raiger@hale.at>

MX28: MMC: Avoid DMA DCache race condition

This patch prevents dcache-related problem. The problem manifested
itself on the SPI driver, this is just a port to the MMC driver.

The scenario is the same. In case an "mmc read" is issued to a
buffer which was written right before it and data cache is enabled,
the cache eviction might happen during the DMA transfer into the
buffer, therefore corrupting the buffer. Clear any cache lines that
might contain the buffer to prevent such issue.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>

MX28: SPI: Fix the DMA chaining

It turns out that in order for the SPI DMA to properly support
continuous transfers longer than 65280 bytes, there are some very
important parts that were left out from the documentation.

Firstly, the XFER_SIZE register is not written with the whole length
of a transfer, but is written by each and every chained descriptor
with the length of the descriptors data buffer.

Next, unlike the demo code supplied by FSL, which only writes one PIO
word per descriptor, this does not apply if the descriptors are chained,
since the XFER_SIZE register must be written. Therefore, it is essential
to use four PIO words, CTRL0, CMD0, CMD1, XFER_SIZE. CMD0 and CMD1 are
written with zero, since they don't apply. The DMA programs the PIO words
in an incrementing order, so four PIO words.

Finally, unlike the demo code supplied by FSL, the SSP_CTRL0_IGNORE_CRC
must not be set during the whole transfer, but it must be set only on the
last descriptor in the chain.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>

MX28: SPI: Fix the DMA DCache race condition

This patch fixes dcache-related problem. The problem manifested
when dcache was enabled and the following command issued twice:

mw 0x42000000 0 0x4000 ; sf probe ; sf read 0x42000000 0x0 0x10000 ; sha1sum 0x42000000 0x10000

The SHA1 checksum was correct during the first call. Yet with
every subsequent call of the above command, it differed and was
wrong.

It turns out this was because of a race condition. On the first
time the command was called, no cacheline contained any data from
the destination memory location. The DMA transfered data into the
location and the cache above the location was invalidated. Then the
checksum was computed, but that meant the data were loaded into data
cache.

On any subsequent call, the DMA again transfered data into the same
destination. Yet during the transfer, some of the DCache lines were
evicted and written back into the main memory. Once the DMA transfer
completed, the data cache was invalidated over the memory location as
usual. But the data that were to be loaded back into the data cache
by subsequent SHA1 checksuming were corrupted.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>

Fix mx31_decode_pll

The MFN bit-field of the PLL registers represents a signed value. See the
reference manual.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>

mx35 timer: Switch to 32-kHz source

Switch the mx35 timer driver to the 32-kHz clock source to avoid calling
mxc_get_clock() again and again, and to be consistent with the timer drivers of
other i.MX SoCs.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>

mx35: Define default SoC input clock frequencies

Define default SoC input clock frequencies for i.MX35 in order to get rid of
duplicated definitions.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>

mx25: Define default SoC input clock frequencies

Define default SoC input clock frequencies for i.MX25 in order to get rid of
duplicated definitions.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Matthias Weisser <weisserm@arcor.de>

mx35: Fix clock dividers

The clock dividers that were used do not match at all the reference manual. They
were either completely broken, or came from an early silicon revision
incompatible with the current one.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>

mx35: Add definitions for clock gate values

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>

mx35: Fix decode_pll

The MFN bit-field of the PLL registers represents a signed value. See the
reference manual.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>

Merge remote-tracking branch 'u-boot-ti/master' into m

am33xx: Remove redundant timer config

We have the timer code in arch/arm/cpu/armv7/omap-common/timer.c that
has been configuring and enabling the timer, so remove our code that
does the same thing by different methods.

Tested on EVM GP, SK-EVM and Beaglebone.

Signed-off-by: Tom Rini <trini@ti.com>

OMAP3: mt_ventoux: added video support

Signed-off-by: Stefano Babic <sbabic@denx.de>

OMAP3: video: add macros to set display parameters

Add a common macros to set the registers for horizontal
and vertical timing.

Signed-off-by: Stefano Babic <sbabic@denx.de>

video: drop duplicate set of DISPC_CONFIG register

Signed-off-by: Stefano Babic <sbabic@denx.de>

OMAP3: mt_ventoux: disable the buzzer at start-up

Signed-off-by: Stefano Babic <sbabic@denx.de>

OMAP3: mt_ventoux: read MAC address from EEPROM

Signed-off-by: Stefano Babic <sbabic@denx.de>

OMAP3: mt_ventoux: activate GPIO4

Signed-off-by: Stefano Babic <sbabic@denx.de>

OMAP3: mt_ventoux: Correct board pinmux

Fix some issues (some pins were not set as GPIOs)

Signed-off-by: Stefano Babic <sbabic@denx.de>

OMAP3: twister : get MAC address from EEPROM

Signed-off-by: Stefano Babic <sbabic@denx.de>

OMAP3: tam3517: add function to read MAC from EEPROM

The manufacturer delivers the TAM3517 SOM with 4 MAC address.
They are stored on the EEPROM of the SOM. The patch adds a
function to get their values and set the ethaddr variables.

Signed-off-by: Stefano Babic <sbabic@denx.de>

OMAP3: add definition of CTRL_WKUP_CTRL register

AM/DM37x SoCs add the CTRL_WKUP_CTRL register. It contains the
GPIO_IO_PWRDNZ bit, which is required to be set to enable the I/O pads
of gpio_126, gpio_127 and gpio_129.

Signed-off-by: Arnout Vandecappelle (Essensium/Mind) <arnout@mind.be>
Cc: Tom Rini <trini@ti.com>

Merge remote-tracking branch 'u-boot-atmel/master' into m

Fixes the crippled console output on PortuxG20.

In order to use the serial interface on the PortuxG20 we need to enable the
level converter first by setting the PC9 pin to high. The level converter needs
some time to settle so we have to use the mdelay() function to wait for some
time. Unfortunately we have no timers available at board_early_init_f() so we
enable the serial output early within board_postclk_init().

Now the U-Boot output looks fine:

| U-Boot 2012.07-00132-gaf1a3b0-dirty (Aug 16 2012 - 18:21:32)
|
| CPU: AT91SAM9G20
| Crystal frequency:   18.432 MHz
| CPU clock        :  396.288 MHz
| Master clock     :  132.096 MHz
| DRAM:  64 MiB
| WARNING: Caches not enabled
| NAND:  128 MiB
| In:    serial
| Out:   serial
| Err:   serial
| Net:   macb0
| Hit any key to stop autoboot:  0

Signed-off-by: Markus Hubig <mhubig@imko.de>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

arm: Adds board_postclk_init to the init_sequence.

The board_postclk_init() function can be used to perform operations
that requires a working timer early within the U-Boot init_sequence.

Signed-off-by: Markus Hubig <mhubig@imko.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

atmel: eb_cpux9k2: add ram target configuration

* add ram target for EB+CPUx9k2 board (eb_cpux9k2_ram_config)

Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
Signed-off-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

integrator: break out common config

The configuration that is common for all Integrator boards may
just as well be stored in a common include file as per pattern
from other boards. This eases maintenance quite a bit.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

efikamx: refine USB support

Because of the way USB pad settings are handled it doesn't make sense to
be able to build the Efika MX board support without CONFIG_CMD_USB turned
on. So, we change the build to always compile in USB support.

We do not need to check for CONFIG_CMD_USB like we do with CONFIG_MXC_SPI
since the USB subsystem will error out of the compile for us.

Additionally, the following behaviors have changed;

* Smartbook "preboot" should not set input and output to USB keyboard as
there is no display support
* board_eth_init is implemented such that it does not cause U-Boot to
report an explicit failure ("CPU Net Initialization Failed").

Since Ethernet is implemented via USB (fixed on Smarttop, pluggable on
Smartbook, and handled by "usb start") - the warning that is left
("No ethernet found") is perfectly reasonable at the point it is printed
since the USB system hasn't been started and nothing has been probed yet.

Signed-off-by: Matt Sealey <matt@genesi-usa.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>

SCSPS1: Enable caches

Enable caches, make it faster!

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Detlev Zundel <dzu@denx.de>

mx28evk: Add USB Ethernet support

Add USB Ethernet support.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Marek Vasut <marex@denx.de>

MX28: Fixup the ad-hoc use of DIGCTL_MICROSECONDS

Use proper struct-based access for this register in the SPL code.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>

MX28: Cleanup mxsboot within make mrproper

Delete the "mxsboot" binary if make mrproper is called.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
CC: Albert Aribaud <albert.u.boot@aribaud.net>
Acked-by: Stefano Babic <sbabic@denx.de>

M28: Fix the use of gpmi-nand in mtdparts

The mtd name of the NAND in Linux is "gpmi-nand", not "gpmi-nand.0" as
it would be expected, since the controller doesn't support multiple NANDs
attached to it as of now. Rectify this flub by adjusting default mtdparts.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Stefano Babic <sbabic@denx.de>

mx28evk: Convert to mxs_adjust_memory_params()

Recent conversion from mx28_adjust_memory_params to mxs_adjust_memory_params
missed to update mx28evk, which caused the board not to boot.

Apply the conversion so that the board can boot again.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>

MX28: mx28evk: Enable SPI DMA

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>

MX28: mx28evk: Align SSP clock speed

Align the SSP clock speed with oscilator to achieve higher transfer
stability.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Marek Vasut <marex@denx.de>

eb_cpux9k2: fix chip select

* fix chip select initialization for frame buffer, this will be
increase frame buffer access speed

Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

lsxl: support power switch

This patch restores the Linkstation's original behaviour when powering off.
Once the (soft) power switch is turned off, linux will reboot and the
bootloader turns off HDD and USB power. Then it loops as long as the switch
is in the off position, before continuing the boot process again.

Additionally, this patch fixes the board function set_led(LED_OFF).

Signed-off-by: Michael Walle <michael@walle.cc>
Cc: Prafulla Wadaskar <prafulla@marvell.com>

cosmetic: Better explain how to use the kirkwood kwbimage.cfg file.

Hi,

This adds to the documenation to explain how to use the
kwbimage.cfg file necessary to generate an image with
prefixed board setup values necessary for the kirkwood
boards.

Signed-off-by: Karl O. Pinc <kop@meme.com>

Cosmetic doc typo fixes to the kwbimage feature docs

Signed-off-by: Karl O. Pinc <kop@meme.com>

arm/km: remove unused code

For some reasons we had an own implementaion of dram_init and
dram_init_banksize. This is not needed anymore, use the standard
kirkwood functions instead.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Gerlando Falauto <gerlando.falauto@keymile.com>
Acked-By: Prafulla Wadaskar <prafulla@marvell.com>

arm/km: fix frequency of the SPI NOR Flash

According to our last HW measures, this could be raised while still
compatible with the potential delays on the lines.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
Acked-By: Prafulla Wadaskar <prafulla@marvell.com>

km/ivm: fix string len check to support 7 char board names

The fanless boards now have a 7-digit (XXXXX-F) board name. This
triggers a border condition when reading this string in the IVM although
this string is smaller than the currenly read string size, but only by 1
character.

This patch corrects this by changing the size check condition for string
length. It is the same change that was done in the platform for this
same bug.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
cc: Stefan Bigler <stefan.bigler@keymile.com>

kw_spi: fix clock prescaler computation

The computation was not correct with low clock values: setting a 1MHz
clock would result in an overlap that would then configure a 25Mhz
clock.

This patch implements a correct computation method according to the
kirkwood functionnal spec. table 600 (Serial Memory Interface
Configuration Register).

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Prafulla Wadaskar <Prafulla@marvell.com>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>

km/arm: set SPI NOR Flash default parameters

These parameters are used by the the sf probe command that are used by
our update script and they therefore need to be set for all of our
boards.

The timing is the same as for the ENV SPI NOR Flash (since it's the
same physical device) and takes the boco2 delay on the bus into account.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Prafulla Wadaskar <Prafulla@marvell.com>

edminiv2: orion5x: fix GPIO inits and values

Orion5x did not actually write GPIO output values
or input polarities, and ED Mini V2 had bad or
missing values for GPIO settings.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-By: Prafulla Wadaskar <prafulla@marvell.com>

Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging

* 'agust@denx.de' of git://git.denx.de/u-boot-staging:
  tx25: Use generic gpio_* calls
  config: Always use GNU ld
  tools: add kwboot binary to .gitignore file
  fdt: Include arch specific gpio.h instead of asm-generic/gpio.h
  serial: CONSOLE macro is not used

Conflicts:
board/karo/tx25/tx25.c

Signed-off-by: Wolfgang Denk <wd@denx.de>

at91: 9x5: Enable PMECC for 5series ek board.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

at91: 9x5: change SMC config timing that both works for PMECC & non-PMECC.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Tested-by: voice.shen@atmel.com
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

at91: atmel_nand: Update driver to support Programmable Multibit ECC controller

The Programmable Multibit ECC (PMECC) controller is a programmable binary
BCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder. This controller
can be used to support both SLC and MLC NAND Flash devices. It supports to
generate ECC to correct 2, 4, 8, 12 or 24 bits of error per sector of data.

To use PMECC in this driver, the user needs to set the PMECC correction
capability, the sector size and ROM lookup table offsets in board config file.

This driver is ported from Linux kernel atmel_nand PMECC patch. The main difference
is in this version it uses registers structure access hardware instead of using macros.
It is tested in 9x5 serial boards.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
[rebase]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

at91: atmel_nand: remove unused variables.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

at91: atmel_nand: extract HWECC initialization code into one function: atmel_hw_nand_init_param().

This patch
1. extract the hwecc initialization code into one function. It is a preparation for adding atmel PMECC support.
2. enable CONFIG_SYS_NAND_SELF_INIT. Which make us can configurate the ecc parameters between nand_scan_ident() and nand_scan_tail().

Signed-off-by: Josh Wu <josh.wu@atmel.com>
[fix empty newline at EOF error and move return value check into ifdef]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

atmel: at91sam9x5: add spi flash boot support

Add at91sam9x5 series spi flash boot support

Using at91sam9x5ek_spiflash to configure, then it can boot from at25df321
serial flash

SPI mater work in 30Mhz speed, while not 1Mhz speed. This will base on
atmel_spi patch, or else, it will occur receive overrun

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

arm: sam9g10/sam9m10g45: remove CONFIG_ARCH_CPU_INIT

Remove CONFIG_ARCH_CPU_INIT for at91sam9g10ek and at91sam9m10g45ek

Signed-off-by: Bo Shen <voice.shen@atmel.com>
[rebase on TOT]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

arm:at91-boards: remove console_init_f where unnecessary

A lot of at91 boards have the console_init_f in board_init. This is useless
cause it was called before by generic code in lib/board.c.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
cc: Jens Scharsig <esw@bus-elektronik.de>
cc: Stelian Pop <stelian@popies.net>
cc: Sedji Gaouaou<sedji.gaouaou@atmel.com>
cc: Albin Tonnerre <albin.tonnerre@free-electrons.com>
cc: Eric Benard <eric@eukrea.com>
Tested-by: voice.shen@atmel.com
Tested-by: voice.shen@atmel.com
Acked-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
Tested-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>

at91sam9263ek: remove unnecessary console_init_f

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
cc: Stelian Pop <stelian@popies.net>

spi: atmel: add WDRBT bit to avoid receive overrun

The atmel at91sam9x5 series spi has feature to avoid receive overren

Using the patch to enable it

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

atmel: at91sam9x5: fix name error for spi

Fix the name error

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

Take over the maintainer for sam9g10 and sam9m10g45

As the maintainer for at91sam9g10ek and at91sam9m10g45ek can not reach
any more.

So I wish to take over the maintainer for sam9g10 and sam9m10g45

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

arm : at91sam9x5 : fix a small bug for NAND

fix a bug:
when not boot from NAND, the NAND flash can not be detected.
Using this to fix it

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

AT91: Small fix on AT91 USART initialization code

Before reset dbgu transmitter, we just wait TXEMPTY to drain the
transmitter register(Just in case). If not doing this, we may sometimes
see several weird characters from DBGU.

A short delay is also added to make sure the new serial settings are
settled.

Signed-off-by: Hong Xu <hong.xu@atmel.com>
[cherry-picked from u-boot-atmel/old-next]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>