Patrice Chotard [Fri, 3 Aug 2018 09:46:16 +0000 (11:46 +0200)]
configs: stm32h7xx: Migrate CONFIG_CMD_CACHE to defconfig
Remove CONFIG_CMD_CACHE from include/configs/stm32h7xx.h
and enable it in stm32h7xx_defconfig
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Fri, 3 Aug 2018 09:46:15 +0000 (11:46 +0200)]
configs: stm32f746-disco: Migrate CONFIG_CMD_CACHE to defconfig
Remove CONFIG_CMD_CACHE from include/configs/stm32f746-disco.h
and enable it in stm32f746-disco_defconfig
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Fri, 3 Aug 2018 09:46:14 +0000 (11:46 +0200)]
configs: stm32f4xx: Enable ICACHE and DCACHE
Enable instruction and data caches.
Fix boot_sd command as since commit
d409c962169b ("armv7m: disable
icache before linux booting"), instruction cache is automatically
disable before linux booting. "icache off" from boot_sd command
becomes useless, remove it.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Fri, 3 Aug 2018 09:46:13 +0000 (11:46 +0200)]
configs: stm32f429-disco: Remove CONFIG_SYS_RAM_CS
This flag is not used, remove it.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Fri, 3 Aug 2018 09:46:12 +0000 (11:46 +0200)]
configs: stm32fxxx: Remove CONFIG_SYS_CLK_FREQ
Since commit
aa5e3e22f4d6 ("board: stm32: switch to DM STM32 timer")
SYS_CLK_FREQ is useless, remove it from stm32f4 and stm32f7 boards.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Fri, 3 Aug 2018 09:46:11 +0000 (11:46 +0200)]
board: stm32: use bi_dram[0].start instead of hardcoded value
Use gd->bd->bi_dram[0].start initialized from DT instead of using
hardcoded CONFIG_SYS_SDRAM_BASE from config file.
Remove unused CONFIG_SYS_RAM_BASE and CONFIG_SYS_SDRAM_BASE defines.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Eugen Hristev [Fri, 3 Aug 2018 09:10:49 +0000 (12:10 +0300)]
clk: at91: utmi: add timeout for utmi lock
In case the slow clock is not properly configured, the UTMI clock
cannot lock the PLL, because UPLLCOUNT will "wait X slow clock cycles".
In this case U-boot will loop indefinitely.
Added a timeout in this case, to start U-boot even if UTMI clock is
not enabled, so the user can use different media if needed, or investigate.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Thomas Fitzsimmons [Fri, 27 Jul 2018 03:02:47 +0000 (23:02 -0400)]
arm: bcm7445: Move config defines to bcm7445.h
Move some configuration #defines that do not apply to other bcmstb
boards from bcmstb.h to bcm7445.h.
Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
Thomas Fitzsimmons [Fri, 27 Jul 2018 02:55:37 +0000 (22:55 -0400)]
arm: bcm7445: Fix parallel make race condition
Move the contents of prior_stage.h into bcmstb.h to prevent a build
failure when bcmstb.h is #include'ed before the asm/arch symbolic link
is present.
Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
Caliph Nomble [Thu, 26 Jul 2018 02:13:03 +0000 (22:13 -0400)]
rsa: Fix LibreSSL before v2.7.0
Fix LibreSSL compilation for versions before v2.7.0.
Signed-off-by: Caliph Nomble <nomble@palism.com>
Reviewed-by: Jonathan Gray <jsg@jsg.id.au>
Heinrich Schuchardt [Sat, 11 Aug 2018 13:52:14 +0000 (15:52 +0200)]
fs: fix typo 'dumm'
%s/dumm /dummy /
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Igor Opaniuk [Fri, 10 Aug 2018 13:59:59 +0000 (16:59 +0300)]
avb2.0: add get_size_of_partition()
Implement get_size_of_partition() operation,
which is required by the latest upstream libavb [1].
[1] https://android.googlesource.com/platform/external/avb/+/android-p-preview-5
Signed-off-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Acked-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Tom Rini [Mon, 13 Aug 2018 16:34:55 +0000 (12:34 -0400)]
Merge git://git.denx.de/u-boot-fsl-qoriq
Tom Rini [Sat, 11 Aug 2018 23:49:29 +0000 (19:49 -0400)]
Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging
Tom Rini [Sat, 11 Aug 2018 23:48:13 +0000 (19:48 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-video
Mario Six [Tue, 31 Jul 2018 12:24:15 +0000 (14:24 +0200)]
misc: Add gdsys_ioep driver
Add driver for the IHS IO endpoint on IHS FPGAs.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Tue, 31 Jul 2018 12:24:14 +0000 (14:24 +0200)]
test: Add tests for misc uclass
Add a set of tests for the misc uclass.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
Mario Six [Tue, 31 Jul 2018 12:24:13 +0000 (14:24 +0200)]
misc: uclass: Add enable/disable function
Add generic enable/disable function to the misc uclass.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Tue, 31 Jul 2018 12:24:12 +0000 (14:24 +0200)]
misc: docs: Fix comments in misc.h
The comments in misc.h are not in kernel-doc format. Correct the format.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Thu, 9 Aug 2018 12:51:23 +0000 (14:51 +0200)]
video_display: Add Xilinx LogiCore DP TX
Add a driver for the Xilinx LogiCORE DisplayPort IP core, which is a
pure DP transmitter core for Xiling FPGA (no display capabilities).
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Thu, 9 Aug 2018 12:51:22 +0000 (14:51 +0200)]
video: Sort Makefile entries
The entries of Makefiles should be sorted, which is not the case in the
video driver Makefile.
Sort the entries alphabetically as far as this makes sense.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Thu, 9 Aug 2018 12:51:21 +0000 (14:51 +0200)]
cmd: Add axi command
Add a command to debug the AXI bus.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Thu, 9 Aug 2018 12:51:20 +0000 (14:51 +0200)]
test: Add AXI test
Add tests for the AXI uclass.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Thu, 9 Aug 2018 12:51:19 +0000 (14:51 +0200)]
sandbox: Add and build AXI bus and device
Add test AXI drivers to the sandbox.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Thu, 9 Aug 2018 12:51:18 +0000 (14:51 +0200)]
axi: Add AXI sandbox driver and simple emulator
Add test infrastructure and tests for the AXI uclass.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Thu, 9 Aug 2018 12:51:17 +0000 (14:51 +0200)]
axi: Add ihs_axi driver
Add a driver for the gdsys IHS AXI bus used on IHS FPGAs.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Thu, 9 Aug 2018 12:51:16 +0000 (14:51 +0200)]
drivers: Add AXI uclass
Add a uclass for AXI (Advanced eXtensible Interface) busses, and a
driver for the gdsys IHS AXI bus on IHS FPGAs.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
Stephen Warren [Mon, 30 Jul 2018 16:19:43 +0000 (10:19 -0600)]
travis: give every job a name
Travis CI now supports giving jobs an explicit name. Do this for all jobs.
This allows more direct control over jobs names than the previous
automatic or implicit naming based on the environment variables or script
text.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
[trini: Update names for jobs added/changed since posting]
Signed-off-by: Tom Rini <trini@konsulko.com>
Rob Bracero [Wed, 1 Aug 2018 02:57:42 +0000 (22:57 -0400)]
elf: Add support for PPC64 ELF V1 ABI in bootelf
This update adds PPC64 ELF V1 ABI support to bootelf for both the
program header and section header options. Elf64 support was already
present for the program header option, but it was not handling the
PPC64 ELF V1 ABI case. For the PPC64 ELF V1 ABI, the e_entry field of
the elf header must be treated as function descriptor pointer instead
of a function address. The first doubleword of the function descriptor
is the function's entry address.
Signed-off-by: Rob Bracero <robbracero@gmail.com>
[trini: Fix whitespace issues]
Signed-off-by: Tom Rini <trini@konsulko.com>
Ramon Fried [Tue, 31 Jul 2018 09:29:58 +0000 (12:29 +0300)]
db410c: Fixup DRAM
Call the MSM DRAM detection and fixup function to support
dynamic detection of onboard memory.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Ramon Fried [Tue, 31 Jul 2018 09:29:57 +0000 (12:29 +0300)]
snapdragon: Add DRAM detection & FDT fixup
Fixup the Linux FDT with the detection of onboard DRAM as
provided by SBL (Secondary boot loader) by reading
the shared-memory region.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Sam Protsenko [Mon, 30 Jul 2018 16:19:27 +0000 (19:19 +0300)]
disk: part: Don't show redundant error message
Underlying API should already print some meaningful error message, so
this one is just brings more noise. E.g. we can see log like this:
MMC: no card present
** Bad device mmc 0 **
Obviously, second error message is unwanted. Let's only print it in case
when DEBUG is defined to keep log short and clear.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Sam Protsenko [Mon, 30 Jul 2018 16:19:26 +0000 (19:19 +0300)]
env: Don't show "Failed" error message
"Failed" error message from env_load() only clutters the log with
unnecessary details, as we already have all needed warnings by that
time. Example:
Loading Environment from FAT... MMC: no card present
** Bad device mmc 0 **
Failed (-5)
Let's only print it in case when DEBUG is defined to keep log clear.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Christian Gmeiner [Mon, 30 Jul 2018 11:22:07 +0000 (13:22 +0200)]
smbios: fix checkstyle warning
Fixes the following checkstyle warning:
WARNING: Missing a blank line after declarations
+ int tmp = smbios_write_funcs[i]((ulong *)&addr, handle++);
+ max_struct_size = max(max_struct_size, tmp);
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Christian Gmeiner [Mon, 30 Jul 2018 11:22:06 +0000 (13:22 +0200)]
smbios: fix checkstyle error
Fixes the following chechpatch -f error:
ERROR: "(foo*)" should be "(foo *)"
+ strncpy((char*)t->uuid, serial_str, sizeof(t->uuid));
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Simon Goldschmidt [Mon, 30 Jul 2018 10:53:18 +0000 (12:53 +0200)]
doc: FIT image: clarify usage of "compression" property
Compressed images should have their compression property
set to "none" if U-Boot should leave them compressed.
This is especially the case for compressed ramdisks that
should be uncompressed by the kernel only.
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Adam Ford [Mon, 30 Jul 2018 01:16:49 +0000 (20:16 -0500)]
configs: omap3_logic: Disable NAND ID during SPL
For these boards, the GPMC timings are more determined by
processor speed/type than the NAND/PoP memory. This code
is never invoked, so disable the config option, so it doesn't
take the time to compile it in.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Sun, 29 Jul 2018 14:51:04 +0000 (09:51 -0500)]
configs: omap: Remove dead config CONFIG_SYS_NAND_ADDR
CONFIG_SYS_NAND_ADDR is defined and never referenced. This patch
removes the dead code.
Signed-off-by: Adam Ford <aford173@gmail.com>
Heinrich Schuchardt [Sun, 29 Jul 2018 11:50:50 +0000 (13:50 +0200)]
doc: README.iscsi: make compatible with restructured text
The Sphinx documentation system uses restructured text.
Make the README.iscsi file compatible.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sun, 29 Jul 2018 11:45:47 +0000 (13:45 +0200)]
doc: add structure to Sphinx generated docs
Create separate html pages for linker lists, the serial subsystem,
and the EFI subsystem.
Add a table of content.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sun, 29 Jul 2018 09:08:14 +0000 (11:08 +0200)]
README: U_BOOT_ENV_CALLBACK functions
Describe the interface of environment variable callback functions.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sun, 29 Jul 2018 08:41:02 +0000 (10:41 +0200)]
drivers: serial: document on_baudrate()
Add parameter description.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Adam Ford [Sat, 28 Jul 2018 19:03:21 +0000 (14:03 -0500)]
omap3_logic: Fix CONS_INDEX
The console index for SPL should be 1 not 3 in order to see text during
SPL.
Fixes:
6f6b7cfa89e5 ("Convert all of CONFIG_CONS_INDEX to Kconfig")
Signed-off-by: Adam Ford <aford173@gmail.com>
Ran Wang [Fri, 10 Aug 2018 07:00:00 +0000 (15:00 +0800)]
armv8: layerscape: Enable EHCI access for LS1012A
Program Central Security Unit (CSU) to grant access to USB 2.0
controller.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[YS: rewrite commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
Ran Wang [Fri, 10 Aug 2018 06:59:59 +0000 (14:59 +0800)]
armv8: layerscape: move ns_dev[] define from h to c file.
Move ns_dev[] from header file to C file to avoid compiling warning
when header file is included by others.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
[YS: rewrite commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
Darwin Dingel [Thu, 2 Aug 2018 08:02:45 +0000 (10:02 +0200)]
mtd: nand: fsl_ifc: Fix handling of bitflips in erased pages
This is a fix made for the fsl_ifc_nand driver on linux kernel by
Pavel Machek and is applied to uboot. It is currently on applied on
linux-mtd.
https://patchwork.kernel.org/patch/
9758117/
IFC always raises ECC errors on erased pages. It is only ignored when
the buffer is checked for all 0xFF by is_blank(). The problem is a
single bitflip will cause is_blank() and then mtd_read to fail. The fix
makes use of nand_check_erased_ecc_chunk() to check for empty pages
instead of is_blank(). This also makes sure that reads are made at ECC
page size granularity to get a proper bitflip count. If the number of
bitflips does not exceed the ECC strength, the page is considered empty
and the bitflips will be corrected when data is sent to the higher
layers (e.g. ubi).
Signed-off-by: Darwin Dingel <darwin.dingel@alliedtelesis.co.nz>
Cc: Pavel Machek <pavel@denx.de>
Cc: Scott Wood <oss@buserror.net>
Acked-by: Pavel Machek <pavel@denx.de>
[Kurt: Replaced dev_err by printf due to compiler warnings]
Tested-by: Kurt Kanzenbach <kurt@linutronix.de>
Signed-off-by: Kurt Kanzenbach <kurt@linutronix.de>
Reviewed-by: York Sun <york.sun@nxp.com>
Laurentiu Tudor [Thu, 9 Aug 2018 12:19:49 +0000 (15:19 +0300)]
armv8: ls1046a: setup SEC ICIDs and fix up device tree
Add support for SEC ICID configuration and apply it for ls1046a.
Also add code to make the necessary device tree fixups.
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Bharat Bhushan <bharat.bhushan@nxp.com>
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Laurentiu Tudor [Thu, 9 Aug 2018 12:19:48 +0000 (15:19 +0300)]
armv8: ls1046a: setup fman ports ICIDs and device tree
Add support for ICID setting of fman ports and the required device
tree fixups.
Reviewed-by: Bharat Bhushan <bharat.bhushan@nxp.com>
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Laurentiu Tudor [Thu, 9 Aug 2018 12:19:47 +0000 (15:19 +0300)]
armv8: ls1046a: add icid setup for qman portals
Add support for ICID setting of qman portals and the required device
tree fixups. Also fix an endiness issue in portal setup code.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Laurentiu Tudor [Thu, 9 Aug 2018 12:19:46 +0000 (15:19 +0300)]
armv8: ls1046a: initial icid setup support
Add infrastructure for ICID setup and device tree fixup on ARM
platforms. This include basic ICID setup for several devices.
Reviewed-by: Bharat Bhushan <bharat.bhushan@nxp.com>
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Laurentiu Tudor [Thu, 9 Aug 2018 12:19:45 +0000 (15:19 +0300)]
armv8: fsl-layerscape: add missing debug stream ID
Add a define with a value for the missing debug stream ID.
Reviewed-by: Bharat Bhushan <bharat.bhushan@nxp.com>
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Laurentiu Tudor [Thu, 9 Aug 2018 12:19:44 +0000 (15:19 +0300)]
misc: fsl_portals: setup QMAN_BAR{E} also on ARM platforms
QMAN_BAR{E} register setup was disabled on ARM platforms, however the
register does need to be set. Enable the code also on ARMs and fix the
CONFIG_SYS_QMAN_MEM_PHYS define to the correct value so that the newly
enabled code works.
Reviewed-by: Bharat Bhushan <bharat.bhushan@nxp.com>
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Laurentiu Tudor [Thu, 9 Aug 2018 12:19:43 +0000 (15:19 +0300)]
armv8: ls1046a: advertise QMan v3 in configuration
The QMan IP block in this SoC is version 3.2 so advertise
this in the SoC configuration header.
Reviewed-by: Bharat Bhushan <bharat.bhushan@nxp.com>
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Laurentiu Tudor [Thu, 9 Aug 2018 12:19:42 +0000 (15:19 +0300)]
armv8: fsl-layerscape: add missing register blocks base address defines
Add defines for the edma and qdma register block base addresses.
Reviewed-by: Bharat Bhushan <bharat.bhushan@nxp.com>
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Troy Kisky [Fri, 27 Jul 2018 23:45:26 +0000 (16:45 -0700)]
sata: fix sata_Probe return value check
sata_probe returns 1 for failure, so don't checkout for < 0
fixes:
f19f1ecb6025 dm: sata: Support driver model with the 'sata' command
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrick Delaunay [Fri, 27 Jul 2018 14:37:09 +0000 (16:37 +0200)]
sandbox: led: use new function to configure default state
Initialize the led with the default state defined in device tree
in board_init and solve issue with test for led default state.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Fri, 27 Jul 2018 14:37:08 +0000 (16:37 +0200)]
stm32mp1: use new function led default state
Initialize the led with the default state defined in device tree.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Fri, 27 Jul 2018 14:37:07 +0000 (16:37 +0200)]
dm: led: move default state support in led uclass
This patch save common LED property "default-state" value
in post bind of LED uclass.
The configuration for this default state is only performed when
led_default_state() is called;
It can be called in your board_init()
or it could added in init_sequence_r[] in future.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Fri, 27 Jul 2018 14:37:06 +0000 (16:37 +0200)]
Revert "dm: led: auto probe() LEDs with "default-state""
This reverts commit
bc882f5d5c7b4d6ed5e927bf838863af43c786e7.
because this patch adds the probe of LED driver during the
binding phasis. It is not allowed in driver model because
the drivers (clock, pincontrol) needed by the LED driver can
be also probed before the binding of all the device and
it is a source of problems.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Fri, 27 Jul 2018 14:37:05 +0000 (16:37 +0200)]
stm32mp1: add gpio led support
This patch add the 4 LED available on the ED1 board and activated
gpio led driver.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Tom Rini [Fri, 10 Aug 2018 11:21:02 +0000 (07:21 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-usb
Tom Rini [Thu, 9 Aug 2018 15:48:13 +0000 (11:48 -0400)]
bcm968380gerg: Add MAINTAINERS file
Add an initial MAINTAINERS file based on author of the code.
Cc: Philippe Reynes <philippe.reynes@softathome.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 9 Aug 2018 15:10:41 +0000 (11:10 -0400)]
Merge git://git.denx.de/u-boot-dm
Tom Rini [Thu, 9 Aug 2018 00:02:39 +0000 (20:02 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-mips
Sam Protsenko [Fri, 13 Jul 2018 13:35:47 +0000 (16:35 +0300)]
dfu: Provide more verbose error message
It might be useful for user to see some human-readable root cause
message in addition to "configuration failed" message, so that the issue
can be fixed quickly.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Sam Protsenko [Fri, 13 Jul 2018 13:35:46 +0000 (16:35 +0300)]
dfu: Fix memory leak in dfu_init_env_entities()
In case of error in dfu_init_env_entities(), env_bkp will leak. Fix it
by providing single return path.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Sam Protsenko [Fri, 13 Jul 2018 13:35:45 +0000 (16:35 +0300)]
dfu: Fix data abort in dfu_free_entities()
Commit
5d8fae79163e ("dfu: avoid memory leak") brings a regression which
described below. This patch is effectively reverting that commit, adding
corresponding comment to avoid such regressions in future.
In case of error in dfu_config_entities(), it frees "dfu" array, which
leads to "data abort" in dfu_free_entities(), which tries to free the
same array (and even tries to access it from linked list first). The
issue occurs e.g. when partition table on device does not match
$dfu_alt_info layout:
=> dfu 0 mmc 1
Couldn't find part #2 on mmc device #1
DFU entities configuration failed!
data abort
To fix this issue, do not free "dfu" array in dfu_config_entities(). It
will be freed later in dfu_free_entities().
Tested on BeagleBone Black (where this regression was originally found).
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Alberto Panizzo [Thu, 12 Jul 2018 11:05:49 +0000 (13:05 +0200)]
usb: rockchip: on K_FW_LBA_WRITE_10 remove magic block size of 512 bytes
As well as in K_FW_LBA_READ_10 and K_FW_LBA_ERASE_10 take device's
block size from f_rkusb->desc->blksz instead of the fixed 512 bytes.
Keep original behaviour of retry probing assigned block device on
every host request to manage late SDCard plugs.
Signed-off-by: Alberto Panizzo <alberto@amarulasolutions.com>
Alberto Panizzo [Thu, 12 Jul 2018 11:05:48 +0000 (13:05 +0200)]
usb: rockchip: fix printing csw debug info
Workstation tool was happy while console on device were printing
random numbers..
Signed-off-by: Alberto Panizzo <alberto@amarulasolutions.com>
Alberto Panizzo [Thu, 12 Jul 2018 11:05:46 +0000 (13:05 +0200)]
usb: rockchip: be quiet on serial port while transferring data
While downloading or uploading megabytes of data we had thousands of
printf in console like:
transfer 0x10000 bytes done
OR
Uploading 0x1000 bytes
This because transfers are chunked and there is no way on target
side to know the overall transfer size (to print one string per
overall transfer).
All these prints on serial console do slow down significantly the
transfer and does not offer a significant information to the
developer: rkdeveloptool and Rockchip original tool do use small
chunks read/writes on big transfers. This allows on workstation
to print percentage of transfer complete and as well offers to
developer the information about: transfer is running OK.
On error, either the percentage will stop or an error will be shown
on workstation console.
Signed-off-by: Alberto Panizzo <alberto@amarulasolutions.com>
Alberto Panizzo [Thu, 12 Jul 2018 11:05:45 +0000 (13:05 +0200)]
usb: rockchip: implement K_FW_LBA_ERASE_10 command
This command is part of the write partition sequence performed by
rkdeveloptool: one partition is first completely erased and
than wrote.
Signed-off-by: Alberto Panizzo <alberto@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Alberto Panizzo [Thu, 12 Jul 2018 11:05:44 +0000 (13:05 +0200)]
usb: rockchip: implement K_FW_LBA_READ_10 command
This patch implement reading blocks form selected device with
LBA addressing.
Corresponding command on workstation is:
rkdeveloptool rl <start_blk> <blk_cnt> <file>
While we support reading more than one blocks per K_FW_LBA_READ_10
request, rkdeveloptool and original rockchip tool do perform
chunk reads limiting the maximum size per chunk far lower
than max int values.
Signed-off-by: Alberto Panizzo <alberto@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Alberto Panizzo [Thu, 12 Jul 2018 11:05:42 +0000 (13:05 +0200)]
usb: rockchip: implement skeleton for K_FW_GET_CHIP_VER command
Chip Version is a string saved in BOOTROM address space Little Endian.
Ex for rk3288: 0x33323041 0x32303134 0x30383133 0x56323030
which brings: 320A20140813V200
Note that memory version do invert MSB/LSB so printing the char
buffer would show: A02341023180002V
Signed-off-by: Alberto Panizzo <alberto@amarulasolutions.com>
Alberto Panizzo [Thu, 12 Jul 2018 11:05:41 +0000 (13:05 +0200)]
usb: rockchip: fix command failed on host side due to missing data
Two consecutive rockusb_tx_write without waiting for request complete
do results in transfer reset of first request and thus no or incomplete
data transfer. This because rockusb_tx_write do use just one USB request
to keep serialization.
So calls like:
rockusb_tx_write_str(emmc_id);
rockusb_tx_write_csw(cbw->tag, cbw->data_transfer_length, CSW_GOOD);
was succeeding only when DEBUG was defined because the time spent
printing debug info was enough for transfer to complete.
This patch fixes the issue adding a simple request complete handler
called rockusb_tx_write_csw to be set as complete handler of in_req
when sending back simple payload + CSW replies to commands.
This new handler will always send CSW_GOOD replies because in case
of error the command callback itself must send back an error CSW as
unique reply to command.
This patch fixes execution of:
$ rkdeveloptool rfi
when DEBUG is not defined.
Signed-off-by: Alberto Panizzo <alberto@amarulasolutions.com>
Seung-Woo Kim [Mon, 4 Jun 2018 06:53:39 +0000 (15:53 +0900)]
gadget: f_thor: fix hang-up with ctrl-c
After the commit
6aae84769a0b ("gadget: f_thor: Fix memory leaks of
usb request and its buffer"), there is hang-up with ctrl-c in some
udc. It is because req of out_ep is freed before out_ep is disabled.
Fix hang-up with ctrl-c by disabling ep before free req of the ep.
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Pankaj Bansal [Thu, 2 Aug 2018 11:01:29 +0000 (16:31 +0530)]
net: Increase ethernet name string size to 20 chars
The 16 char ethernet name size is inadequate to hold the name of ethernet
name "DPMAC17@rgmii-id", which is a valid name in LX2160AQDS/LX2160ARDB.
Therefore, increase the name string size to 20 chars.
Reported-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Suggested-by: Ioana Ciocoi Radulescu <ruxandra.radulescu@nxp.com>
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Pankaj Bansal [Thu, 2 Aug 2018 11:01:28 +0000 (16:31 +0530)]
fsl/mc: Limit the ethernet name to ETH_NAME_LEN
The ethernet name should be within the ETH_NAME_LEN, as this
is the buffer space allocated to ethernet name.
Otherwise, this causes buffer overflow.
Reported-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Joakim Tjernlund [Tue, 12 Sep 2017 17:56:41 +0000 (19:56 +0200)]
FSL PCI: Configure PCIe reference ratio
Most FSL PCIe controllers expects 333 MHz PCI reference clock.
This clock is derived from the CCB but in many cases the ref.
clock is not 333 MHz and a divisor needs to be configured.
This adds PEX_CCB_DIV #define which can be defined for each
type of CPU/platform.
Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Simon Glass [Thu, 26 Jul 2018 20:28:16 +0000 (14:28 -0600)]
patman: Correct unit test failure
A recent rename of the function did not rename the test file. Fix this.
Fixes:
12308b128fa (lib: fdtdec: Rename routine fdtdec_setup_memory_size())
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 26 Jul 2018 20:02:13 +0000 (14:02 -0600)]
libfdt: Update to latest pylibfdt implementation
The enhanced pylibfdt support in U-Boot needed for binman was a
placeholder while upstreaming of this work continued. This is now
complete, so bring in the changes and update the tools as needed.
There are quite a few changes since we decided to split the
implementation into three fdt classes instead of two.
The Fdt.del_node() method was unfortunately missed in this process and
will be dealt with later. It exists in U-Boot but not upstream.
Further syncing of libfdt probably needs to wait until we assess the
code-size impact of all the new checking code on SPL and possibly provide
a way to disable it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 3 Aug 2018 08:14:53 +0000 (01:14 -0700)]
test: dm: pci: Add cases for finding PCI capability APIs
Add several PCI capability and extended capability ID registers
in the swap_case driver, so that we can add test case for
dm_pci_find_capability() and dm_pci_find_ext_capability().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 3 Aug 2018 08:14:52 +0000 (01:14 -0700)]
dm: pci: Add APIs to find capability and extended capability
This introduces two new APIs dm_pci_find_capability() and
dm_pci_find_ext_capability() to get PCI capability address and
PCI express extended capability address for a given PCI device.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 3 Aug 2018 08:14:51 +0000 (01:14 -0700)]
pci: Add all known capability and extended capability ids
Currently we don't have a complete list of capability and extended
capability ids. This adds them.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 3 Aug 2018 08:14:50 +0000 (01:14 -0700)]
test: dm: pci: Add tests for mixed static and dynamic devices on the same bus
In the Sandbox test configuration, PCI bus#0 only has static devices
while bus#1 only has dynamic devices. Create a bus#2 that has both
types of devices and test such.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 3 Aug 2018 08:14:49 +0000 (01:14 -0700)]
pci: sandbox: emul: Rename priv structure
We have "struct sandbox_pci_priv" in pci_sandbox driver. To avoid
confusion, rename the emul's priv to "struct sandbox_pci_emul_priv".
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 3 Aug 2018 08:14:48 +0000 (01:14 -0700)]
test: dm: pci: Test driver binding with driver data provided
With struct pci_device_id, it's possible to pass a driver data for
bound driver to use. This adds a test case for this functionality.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 3 Aug 2018 08:14:47 +0000 (01:14 -0700)]
sandbox: Update test.dts for dynamic PCI device driver matching
At present we have two PCI buses in the test configuration. Both
buses have static device-tree config devices. Now we switch the
2nd bus to use dynamic PCI devices for testing.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 3 Aug 2018 08:14:46 +0000 (01:14 -0700)]
pci: sandbox: swap_case: Declare dynamic driver matching
This adds a U_BOOT_PCI_DEVICE() declaration to the swap_case driver.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 3 Aug 2018 08:14:45 +0000 (01:14 -0700)]
pci: sandbox: Support dynamically binding device driver
At present all emulated sandbox pci devices must be present in the
device tree in order to be used. The real world pci uclass driver
supports pci device driver matching, and we should add such support
on sandbox too.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 3 Aug 2018 08:14:44 +0000 (01:14 -0700)]
dm: pci: Assign correct driver data when binding a driver
The correct driver data comes from the matching 'id' instead of
'find_id' in pci_find_and_bind_driver().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 3 Aug 2018 08:14:43 +0000 (01:14 -0700)]
pci: sandbox: emul: Fix the call to pci_bus_find_devfn()
With the newly added test cases for PCI configuration access, we get:
=> ut dm pci_busdev
Test: dm_test_pci_busdev: pci.c
test/dm/pci.c:49, dm_test_pci_busdev(): SANDBOX_PCI_VENDOR_ID == vendor:
Expected 4660, got 65535
Test: dm_test_pci_busdev: pci.c (flat tree)
test/dm/pci.c:49, dm_test_pci_busdev(): SANDBOX_PCI_VENDOR_ID == vendor:
Expected 4660, got 65535
Failures: 2
The bug only shows up when bus number is not equal to zero. This is
caused by the plain find_devfn parameter is passed to function call
pci_bus_find_devfn(), inside which find_devfn is compared to devfn
in the device's pplat structure. However pplat->devfn does not carry
the bus number. Fix this by passing find_devfn with bus number masked.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 3 Aug 2018 08:14:42 +0000 (01:14 -0700)]
test: dm: pci: Add tests for configuration space access
So far we missed the testing for PCI configuration space access.
This adds tests for it, as well as removing some redundant asserts.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 3 Aug 2018 08:14:41 +0000 (01:14 -0700)]
test: dm: pci: Test more than one PCI host controller
So far there is only one PCI host controller in the sandbox test
configuration. This is normally the case for x86, but it can be
common on other architectures like ARM/PPC to have more than one
PCI host controller in the system.
This updates the case to cover such scenario.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 3 Aug 2018 08:14:40 +0000 (01:14 -0700)]
pci: sandbox: swap_case: Preserve space indicator bit in BAR registers
With the newly added testing of more than one device, we get:
=> ut dm pci_swapcase
Test: dm_test_pci_swapcase: pci.c
test/dm/pci.c:88, dm_test_pci_swapcase(): "tHIS IS A tESt" = ptr:
Expected "tHIS IS A tESt", got "this is a test"
Test: dm_test_pci_swapcase: pci.c (flat tree)
test/dm/pci.c:88, dm_test_pci_swapcase(): "tHIS IS A tESt" = ptr:
Expected "tHIS IS A tESt", got "this is a test"
Failures: 2
The failure only happens on the 2nd swap_case device on the PCI bus.
The case passes on the 1st device.
It turns out the swap_case driver does not emulate bit#0 in BAR
registers as a read-only bit. This corrects the implementation.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 3 Aug 2018 08:14:39 +0000 (01:14 -0700)]
test: dm: pci: Test more than one device on the same bus
It's quite common to have more than one device on the same PCI bus.
This updates the test case to test such scenario.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 3 Aug 2018 08:14:38 +0000 (01:14 -0700)]
test: dm: pci: Remove unnecessary steps in dm_test_pci_swapcase()
The check on uclass_get_device() and device_active() is unnecessary
as the follow-up test operations will implicitly probe the driver.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 3 Aug 2018 08:14:37 +0000 (01:14 -0700)]
dm: pci: Fix scanning multi-function device
The flag to control whether to scan multi-function device during
enumeration should be cleared at the beginning of each iteration
if the device's function number equals to zero.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 3 Aug 2018 08:14:36 +0000 (01:14 -0700)]
dm: pci: Extract vendor/device id in child_post_bind()
Currently only devfn is extracted in child_post_bind(). Now that
we have the live-tree version API to look up PCI vendor and device
id from the compatible string, let's extract and save them too.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 3 Aug 2018 08:14:35 +0000 (01:14 -0700)]
dm: core: Add ofnode function to read PCI vendor and device id
We don't have the live-tree version of fdtdec_get_pci_vendev().
This adds the API.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Fri, 3 Aug 2018 08:14:34 +0000 (01:14 -0700)]
dm: Correct typos in uclass_first/next_device_check()
Correct typos in the comment block of uclass_first/next_device_check().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>