Stefan Brüns [Sat, 17 Dec 2016 02:55:10 +0000 (03:55 +0100)]
fs/fat: simplify get_fatent for FAT12
Instead of shuffling bits from two adjacent 16 bit words, use one 16 bit
word with the appropriate byte offset in the buffer.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Stefan Brüns [Fri, 16 Dec 2016 23:27:51 +0000 (00:27 +0100)]
fs/fat: merge readwrite get_fatent_value() with readonly get_fatent()
get_fatent_value(...) flushes changed FAT entries to disk when fetching
the next FAT blocks, in every other aspect it is identical to
get_fatent(...).
Provide a stub implementation for flush_dirty_fat_buffer if
CONFIG_FAT_WRITE is not set. Calling flush_dirty_fat_buffer during read
only operation is fine as it checks if any buffers needs flushing.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
Stefan Brüns [Fri, 16 Dec 2016 23:27:50 +0000 (00:27 +0100)]
fs/fat: Avoid corruption of sectors following the FAT
The FAT is read/flushed in segments of 6 (FATBUFBLOCKS) disk sectors. The
last segment may be less than 6 sectors, cap the length.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
Fabio Estevam [Thu, 15 Dec 2016 22:02:19 +0000 (20:02 -0200)]
cmd/Kconfig: Fix typo in CMD_MEMORY help text
Fix "Memory" and "initialize" typos in the CMD_MEMORY help text.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Philipp Skadorov [Thu, 15 Dec 2016 20:52:53 +0000 (15:52 -0500)]
fat: fatwrite: fix the command for FAT12
The u-boot command fatwrite empties FAT clusters from the beginning
till the end of the file.
Specifically for FAT12 it fails to detect the end of the file and goes
beyond the file bounds thus corrupting the file system.
Additionally, FAT entry chaining-up into a file is not implemented
for FAT12.
The users normally workaround this by re-formatting the partition as
FAT16/FAT32, like here:
https://github.com/FEDEVEL/openrex-uboot-v2015.10/issues/1
The patch fixes the bounds of a file and FAT12 entries chaining into
a file, including EOF markup.
Signed-off-by: Philipp Skadorov <philipp.skadorov@savoirfairelinux.com>
Jonathan Gray [Sun, 11 Dec 2016 03:51:13 +0000 (14:51 +1100)]
relocate-rela: use compiler.h endian macros
Use the endian macros from u-boot's compiler.h instead of duplicating
the definitions.
This also avoids a build error on OpenBSD by removing swap64 which
collides with a system definition in endian.h pulled in by inttypes.h.
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Zakharov Vlad [Fri, 9 Dec 2016 14:18:32 +0000 (17:18 +0300)]
timer: Support clocks via phandle
Earlier timer driver needed a clock-frequency property in compatible
device-tree nodes. Another way is to reference a clock via a phandle.
So now timer_pre_probe tries to get clock by reference through device
tree. In case it is impossible to get clock device through the
reference, clock-frequency property of the timer node is read to provide
backward compatibility.
Signed-off-by: Vlad Zakharov <vzakhar@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Vignesh R [Wed, 7 Dec 2016 11:25:06 +0000 (16:55 +0530)]
regulator: fixed: Add support to handle enable-active-high DT property
Add support to handle enable-active-high DT property. This property is
used to drive the gpio controlling fixed regulator as active high when
claiming gpio line.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 26 Dec 2016 04:52:47 +0000 (20:52 -0800)]
binman: Remove hard-coded file name for x86 CMC/FSP/VGA
Now that we have added file names from Kconfig in x86 u-boot.dtsi,
update binman to avoid using hard-coded names.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 26 Dec 2016 04:52:46 +0000 (20:52 -0800)]
x86: Add file names from Kconfig in CMC/FSP/VGA nodes in u-boot.dtsi
Since we already have a bunch of Kconfig options for CMC/FSP/VGA file
names, add these from Kconfig in the corresponding dts nodes.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 26 Dec 2016 04:52:45 +0000 (20:52 -0800)]
x86: quark: Fix build error for quark-based boards
With the conversion to use binman to build x86 boards, Intel Galileo
board does not build anymore due to missing ucode entry. In fact
ucode is not needed for quark-based boards.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Fri, 23 Dec 2016 23:41:56 +0000 (18:41 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-sunxi
Tom Rini [Fri, 23 Dec 2016 23:41:32 +0000 (18:41 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-spi
Tom Rini [Fri, 23 Dec 2016 15:17:22 +0000 (10:17 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-samsung
Jaehoon Chung [Thu, 15 Dec 2016 09:21:12 +0000 (18:21 +0900)]
configs: enable the DM_PMIC and DM_I2C_GPIO for max8998 pmic
Enable the DM_PMIC and DM_I2C_GPIO for using max8998 pmic.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Jaehoon Chung [Thu, 15 Dec 2016 09:21:11 +0000 (18:21 +0900)]
arm: dts: s5pc1xx-goni: add the pmic node for using DM
To use driver-model adds the pmic node for max8998.
This is used as kerel device-tree in Linux.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Jaehoon Chung [Thu, 15 Dec 2016 09:21:10 +0000 (18:21 +0900)]
power: pmic: add the max8998 controller for DM
Add the max8998 controller for Driver model.
Samsung S5P series are using max8998 pmic controller.
In future, it should be supported the regulator framework.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Michal Simek [Thu, 15 Dec 2016 10:15:49 +0000 (11:15 +0100)]
mmc: Extend dependencies for zynq sdhci
There is hard dependency on BLK and DM_MMC which is also used by ATMEL
and ROCKCHIP.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Jaehoon Chung [Fri, 2 Dec 2016 08:46:10 +0000 (17:46 +0900)]
mmc: spear: remove the entire spear_sdhci.c file
Remove the entire spear_sdhci.c file.
There is no use case. This is dead codes.
Also there is no place to call "spear_sdhci_init()" anywhere.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Jagan Teki [Thu, 24 Nov 2016 19:28:58 +0000 (00:58 +0530)]
spi: Zap armada100_spi.c and env
armada100_spi.c and related env is zapping becuase
of "no DM conversion".
Cc: Ajay Bhargav <ajay.bhargav@einfochips.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Jagan Teki [Thu, 15 Dec 2016 16:36:47 +0000 (17:36 +0100)]
spi: Zap mpc52xx_spi.c, config and related code
armada100_spi.c, related config options and related codes
are zapping becuase of "no DM conversion".
Cc: Werner Pfister <Pfister_Werner@intercontrol.de>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Konstantin Porotchkin [Mon, 19 Dec 2016 15:04:42 +0000 (17:04 +0200)]
arm64: mvebu: Fix A8K memory mapping and add documentation
Fix the MMU mapping for A8K device family:
- Separate A7K and A8K memory mappings
- Fix memory regions by including IO mapping for all
3 PCIe interfaces existing on each connected CP110 controller
Add A8K memory mapping documentation with all regions
configured by Marvell ATF.
Change-Id: I9c930569b1853900f5fba2d5db319b092cc7a2a6
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
Tom Rini [Tue, 20 Dec 2016 17:20:12 +0000 (12:20 -0500)]
Merge git://git.denx.de/u-boot-mpc85xx
Chris Packham [Fri, 2 Dec 2016 08:22:30 +0000 (21:22 +1300)]
powerpc: Retain compatible property for L2 cache
When setting the compatible property for the L2 cache ensure that we
follow the documented binding by setting both
"<chip>-l2-cache-controller" and "cache" as values.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Icenowy Zheng [Mon, 19 Dec 2016 18:03:36 +0000 (02:03 +0800)]
sunxi: fix SID read on H3
H3 SID controller has some bug, which makes the initial SID value at
SUNXI_SID_BASE wrong when boot.
Change the SID retrieve code to call the SID Controller directly on H3,
which can get the correct value, and also fix the SID value at
SUNXI_SID_BASE, so that it can be used by further operations.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tom Rini [Tue, 20 Dec 2016 13:42:50 +0000 (08:42 -0500)]
Merge branch 'master' of git://denx.de/git/u-boot-microblaze
Tom Rini [Tue, 20 Dec 2016 13:42:04 +0000 (08:42 -0500)]
Merge git://git.denx.de/u-boot-dm
Tom Rini [Tue, 20 Dec 2016 13:41:54 +0000 (08:41 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-i2c
Nathan Rossi [Sun, 18 Dec 2016 14:03:34 +0000 (00:03 +1000)]
ARM64: zynqmp: Replace board specific with generic memory bank decoding
The dram_init and dram_init_banksize functions were using a board
specific implementation for decoding the memory banks from the fdt. This
board specific implementation uses a static variable 'tmp' which makes
these functions unsafe for execution from within the board_init_f
context.
This change makes the dram_init* functions use a generic implementation
of decoding and populating memory bank and size data.
Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Fixes:
8d59d7f63b ("ARM64: zynqmp: Read RAM information from DT")
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Nathan Rossi [Sun, 18 Dec 2016 14:03:34 +0000 (00:03 +1000)]
ARM: zynq: Replace board specific with generic memory bank decoding
The dram_init and dram_init_banksize functions were using a board
specific implementation for decoding the memory banks from the fdt. This
board specific implementation uses a static variable 'tmp' which makes
these functions unsafe for execution from within the board_init_f
context.
This unsafe use of a static variable was causing a specific bug when
using the zynq_zybo configuration, U-Boot would generate the following
error during image load. This was caused due to dram_init overwriting
the relocations for the 'image' variable within the do_bootm function.
Out of coincidence the un-initialized memory has a compression type
which is the same as the value for the relocation type R_ARM_RELATIVE.
Uncompressing Invalid Image ... Unimplemented compression type 23
It should be noted that this is just one way the issue could surface,
other cases my not be observed in normal boot flow. Depending on the
size of various sections, and location of relocations within __rel_dyn
and the compiler/linker the outcome of this bug can differ greatly.
This change makes the dram_init* functions use a generic implementation
of decoding and populating memory bank and size data.
Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Fixes:
758f29d0f8 ("ARM: zynq: Support systems with more memory banks")
Cc: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Nathan Rossi [Sun, 18 Dec 2016 14:03:34 +0000 (00:03 +1000)]
fdt: add memory bank decoding functions for board setup
Add two functions for use by board implementations to decode the memory
banks of the /memory node so as to populate the global data with
ram_size and board info for memory banks.
The fdtdec_setup_memory_size() function decodes the first memory bank
and sets up the gd->ram_size with the size of the memory bank. This
function should be called from the boards dram_init().
The fdtdec_setup_memory_banksize() function decode the memory banks
(up to the CONFIG_NR_DRAM_BANKS) and populates the base address and size
into the gd->bd->bi_dram array of banks. This function should be called
from the boards dram_init_banksize().
Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <monstr@monstr.eu>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 16 Dec 2016 12:12:48 +0000 (13:12 +0100)]
ARM64: zynqmp: Add one empty line between license and nodes
Sync with Linux kernel.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 16 Dec 2016 12:00:26 +0000 (13:00 +0100)]
ARM64: zynqmp: Add missing SPL dependency for boot.bin generation
boot.bin file is generated only when SPL is selected.
Reflect this depency in Kconfig.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 16 Dec 2016 09:35:40 +0000 (10:35 +0100)]
common: Fix logic in fpga programming
Stop boot process if fpga programming fails.
Without this patch boot process continues even if fpga programming
failed.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Michal Simek [Thu, 15 Dec 2016 08:57:25 +0000 (09:57 +0100)]
gpio: zynq: Remove empty line
Trivial coding style fix.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 8 Sep 2016 13:06:22 +0000 (15:06 +0200)]
block: Move ceva driver to DM
This patch also includes ARM64 zynqmp changes:
- Remove platform non DM initialization
- Remove hardcoded sata base address
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Michal Simek [Thu, 8 Sep 2016 13:06:45 +0000 (15:06 +0200)]
dm: Add support for scsi/sata based devices
All sata based drivers are bind and corresponding block
device is created. Based on this find_scsi_device() is able
to get back block device based on scsi_curr_dev pointer.
intr_scsi() is commented now but it can be replaced by calling
find_scsi_device() and scsi_scan().
scsi_dev_desc[] is commented out but common/scsi.c heavily depends on
it. That's why CONFIG_SYS_SCSI_MAX_DEVICE is hardcoded to 1 and symbol
is reassigned to a block description allocated by uclass.
There is only one block description by device now but it doesn't need to
be correct when more devices are present.
scsi_bind() ensures corresponding block device creation.
uclass post_probe (scsi_post_probe()) is doing low level init.
SCSI/SATA DM based drivers requires to have 64bit base address as
the first entry in platform data structure to setup mmio_base.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Moritz Fischer [Mon, 12 Dec 2016 16:48:50 +0000 (08:48 -0800)]
ARM: dt: zynq: Add labels to cpu nodes to allow overriding OPPs.
By adding labels to the cpu nodes in the dtsi, a dts that
includes it can change the OPPs by referencing the cpu0
through the label.
[Based on linux (
400b6a0cbef55d1ae32808eaa1ef1c28820bf6ac)]
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: u-boot@lists.denx.de
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 8 Dec 2016 09:25:44 +0000 (10:25 +0100)]
net: xilinx: Use mdio_register_seq() to support multiple instances
axi_emac, emaclite and gem have the same issue with registering
multiple instances with mdio busses. mdio bus name has to be uniq but
drivers are setting up only one name for all.
Use mdio_register_seq() and pass dev->seq number to allow multiple
mdio instances registration.
Reported-by: Phani Kiran Kara <phanikiran.kara@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Michal Simek [Thu, 8 Dec 2016 09:06:26 +0000 (10:06 +0100)]
common: miiphyutil: Add helper function for mdio bus name
The most of ethernet drivers are using this mdio registration sequence.
strcpy(priv->bus->name, "emac");
mdio_register(priv->bus);
Where driver can be used only with one MDIO bus because only unique
name should be used.
Other drivers are using unique device name for MDIO registration to
support multiple instances.
snprintf(priv->bus->name, sizeof(bus->name), "%s", name);
With DM dev->seq is used more even in logs
(like random MAC address generation:
printf("\nWarning: %s (eth%d) using random MAC address - %pM\n",
dev->name, dev->seq, pdata->enetaddr);
)
where eth%d prefix is used.
Simplify driver code to register mdio device with dev->seq number
to simplify mdio registration and reduce code duplication across
all drivers. With DM_SEQ_ALIAS enabled dev->seq reflects alias setting.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Mon, 19 Dec 2016 21:08:57 +0000 (16:08 -0500)]
Prepare v2017.01-rc2
Signed-off-by: Tom Rini <trini@konsulko.com>
Simon Glass [Sat, 26 Nov 2016 03:16:03 +0000 (20:16 -0700)]
binman: Drop microcode features from ifdtool
Now that binman supports creating images with microcode, drop the code from
ifdtool.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sat, 26 Nov 2016 03:16:02 +0000 (20:16 -0700)]
x86: Use binman all x86 boards
Change x86 boards to use binman to produce the ROM. This involves adding the
image definition to the device tree and using it in the Makefile. The
existing ifdtool features are no-longer needed.
Note that the u-boot.dtsi file is common and is used for all x86 boards which
use microcode. A separate emulation-u-boot-dtsi is used for the others.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sat, 26 Nov 2016 03:16:01 +0000 (20:16 -0700)]
sunxi: Use binman for sunxi boards
Move sunxi boards to use binman. This involves adding the image definition
to the device tree and using it in the Makefile.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Sat, 26 Nov 2016 03:16:00 +0000 (20:16 -0700)]
tegra: Use a U-Boot-specific .dtsi file
With the new device-tree rules it is possible to put device-tree changes
needed by U-Boot into their own file. As an example of this approach, move
Tegra over to use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 26 Nov 2016 03:15:59 +0000 (20:15 -0700)]
binman: Automatically include a U-Boot .dtsi file
For boards that need U-Boot-specific additions to the device tree, it is
a minor annoyance to have to add these each time the tree is synced with
upstream.
Add a means to include a file (e.g. u-boot.dtsi) automatically into the .dts
file before it is compiled.
The file uses is the first one that exists in this list:
arch/<arch>/dts/<board.dts>-u-boot.dtsi
arch/<arch>/dts/<soc>-u-boot.dtsi
arch/<arch>/dts/<cpu>-u-boot.dtsi
arch/<arch>/dts/<vendor>-u-boot.dtsi
arch/<arch>/dts/u-boot.dtsi
Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sat, 26 Nov 2016 03:15:58 +0000 (20:15 -0700)]
binman: Allow configuration options to be used in .dts files
It is sometimes useful to be able to reference configuration options in a
device tree source file. Add the necessary includes so that this works.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sat, 26 Nov 2016 03:15:57 +0000 (20:15 -0700)]
binman: Add a build rule for binman
Add a standard command definition for binman so that it can be used in
makefiles.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sat, 26 Nov 2016 03:15:56 +0000 (20:15 -0700)]
binman: Add support for building x86 images with FSP/CMC
Add support for two more from the inexhaustible supply of x86 binary blob
types.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sat, 26 Nov 2016 03:15:55 +0000 (20:15 -0700)]
binman: Add support for building x86 ROMs with SPL
When building for 64-bit x86 we need an SPL binary in the ROM. Add support
for this. Also increase entry test code coverage to 100%.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sat, 26 Nov 2016 03:15:54 +0000 (20:15 -0700)]
binman: Add support for u-boot.img as an input binary
Add an entry type for u-boot.img (a legacy U-Boot image) and a simple test.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sat, 26 Nov 2016 03:15:53 +0000 (20:15 -0700)]
binman: Add support for building x86 ROMs
The structure of x86 ROMs is pretty complex. There are various binary blobs
to place in the image. Microcode requires special handling so that it is
available to very early code and can be used without any memory whatsoever.
Add support for the various entry types that are currently needed, along
with some tests.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sat, 26 Nov 2016 03:15:52 +0000 (20:15 -0700)]
binman: Add basic entry types for U-Boot
Add entries to support some standard U-Boot binaries, such as u-boot.bin,
u-boot.dtb, etc. Also add some tests for these.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sat, 26 Nov 2016 03:15:51 +0000 (20:15 -0700)]
binman: Introduce binman, a tool for building binary images
This adds the basic code for binman, including command parsing, processing
of entries and generation of images.
So far no entry types are supported. These will be added in future commits
as examples of how to add new types.
See the README for documentation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Marek Vasut [Mon, 19 Dec 2016 14:27:50 +0000 (15:27 +0100)]
tools: mxsimage: Fix build with OpenSSL 1.1.x
The EVP_MD_CTX and EVP_CIPHER_CTX are made opaque since 1.1.x , so instead
of embedding them directly into struct sb_image_ctx and initializing them
using EVP_*_CTX_init(), we use pointers and allocate the crypto contexts
using EVP_*_CTX_new().
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Marek Vasut [Thu, 15 Dec 2016 15:48:55 +0000 (16:48 +0100)]
ARM: mxs: Remove unused variable warning
Shuffle the macros around a little to remove the following warning
when building for i.MX28:
arch/arm/cpu/arm926ejs/mxs/spl_boot.c:44:26: warning: ‘iomux_boot’ defined but not used [-Wunused-const-variable=]
static const iomux_cfg_t iomux_boot[] = {
^~~~~~~~~~
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Stefano Babic <sbabic@denx.de>
Marek Vasut [Thu, 1 Dec 2016 01:06:31 +0000 (02:06 +0100)]
serial: 16550: Add Ingenic JZ4780 support
Add compatibility string for the Ingenic JZ4780 SoC, the necessary
UART enable bit into FCR and register shift. Neither are encoded
in the DTS coming from Linux, so we need to support it this way.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Thu, 1 Dec 2016 01:06:30 +0000 (02:06 +0100)]
serial: 16550: Add port type as driver data
Add driver data to each compatible string to identify the type of
the port. Since all the ports in the driver are entirely compatible
with 16550 for now, all are marked with PORT_NS16550. But, there
are ports which have specific quirks, like the JZ4780 UART, which
do not have any DT property to denote the quirks. Instead, Linux
uses the compatible string to discern such ports and enable the
necessary quirks.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Marek Vasut [Thu, 1 Dec 2016 01:06:29 +0000 (02:06 +0100)]
serial: 16550: Add getfcr accessor
Add function which allows fetching the default FCR register setting
from platform data for DM , while retaining old behavior for non-DM
by returning UART_FCRVAL.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bradley Bolen [Tue, 13 Dec 2016 17:49:53 +0000 (12:49 -0500)]
i2c: mv_i2c.c: Correct address endianness
0c0f719ad2f46c8566a56daee37ebdb7c078c3b1 accidentally changed the
endianness of the i2c read and write addresses. This was noticable when
accessing EEPROMs that use 2 byte addressing as the LSB was being sent
first.
Signed-off-by: Bradley Bolen <bradleybolen@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tom Rini [Sun, 18 Dec 2016 18:54:25 +0000 (13:54 -0500)]
Merge branch 'master' of git://denx.de/git/u-boot-imx
Migrate CONFIG_ARCH_USE_MEMSET/MEMCPY with this merge.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 16 Dec 2016 23:32:43 +0000 (18:32 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-spi
Tom Rini [Fri, 16 Dec 2016 17:46:36 +0000 (12:46 -0500)]
Merge git://git.denx.de/u-boot-fsl-qoriq
Jagan Teki [Tue, 13 Dec 2016 16:57:06 +0000 (17:57 +0100)]
imx6: icorem6_rqs: Add FEC support
Add FEC support for Engicam i.CoreM6 RQS modules.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Tue, 13 Dec 2016 16:57:05 +0000 (17:57 +0100)]
arm: dts: imx6qdl-icore-rqs: Add FEC node
Add FEC node for Engicam i.CoreM6 RQS modules.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Tue, 13 Dec 2016 16:57:04 +0000 (17:57 +0100)]
imx6: geam6ul: Add FEC support
Add FEC support for Engicam GEAM6UL module.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Tue, 13 Dec 2016 16:57:03 +0000 (17:57 +0100)]
arm: dts: imx6ul-geam: Add FEC node
Add FEC node for Engicam GEAM6UL module.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Tue, 13 Dec 2016 16:57:02 +0000 (17:57 +0100)]
imx6: icorem6_rqs: Add I2C support
Add I2C support for Engicam i.CoreM6 RQS modules.
icorem6qdl-rqs> i2c bus
Bus 0: i2c@
021a0000
Bus 1: i2c@
021a4000
Bus 2: i2c@
021a8000
icorem6qdl-rqs> i2c dev 0
Setting bus to 0
icorem6qdl-rqs> i2c speed 100000
Setting bus speed to 100000 Hz
icorem6qdl-rqs> i2c probe
Valid chip addresses: 4F
icorem6qdl-rqs> i2c md 4F 0xff
00ff: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ................
icorem6qdl-rqs> i2c bus
Bus 0: i2c@
021a0000 (active 0)
4f: generic_4f, offset len 1, flags 0
Bus 1: i2c@
021a4000
Bus 2: i2c@
021a8000
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Tue, 13 Dec 2016 16:57:01 +0000 (17:57 +0100)]
arm: dts: imx6qdl-icore-rqs: Add I2C node's
Add I2C nodes for Engicam i.CoreM6 RQS modules.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Tue, 13 Dec 2016 16:57:00 +0000 (17:57 +0100)]
imx6: icorem6: Rename engicam icorem6 defconfig files
Rename defconfig files for better compatible with
respective board names and dts files.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Tue, 13 Dec 2016 16:56:59 +0000 (17:56 +0100)]
arm: imx6q: Add Engicam i.CoreM6 Solo/Duallite RQS Starter Kit initial support
Boot from MMC:
-------------
U-Boot SPL
2016.11-rc2-g217bd8e-dirty (Nov 08 2016 - 22:56:07)
Trying to boot from MMC1
U-Boot
2016.11-rc2-g217bd8e-dirty (Nov 08 2016 - 22:56:07 +0530)
CPU: Freescale i.MX6DL rev1.3 at 792 MHz
Reset cause: POR
Model: Engicam i.CoreM6 DualLite/Solo RQS Starter Kit
DRAM: 512 MiB
MMC: FSL_SDHC: 0
*** Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
Net: CPU Net Initialization Failed
No ethernet found.
Hit any key to stop autoboot: 0
icorem6qdl-rqs>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Tue, 13 Dec 2016 16:56:58 +0000 (17:56 +0100)]
arm: imx6q: Add Engicam i.CoreM6 Quad/Dual RQS Starter Kit initial support
Boot from MMC:
-------------
U-Boot SPL
2016.11-rc2-g217bd8e-dirty (Nov 08 2016 - 22:59:44)
Trying to boot from MMC1
U-Boot
2016.11-rc2-g217bd8e-dirty (Nov 08 2016 - 22:59:44 +0530)
CPU: Freescale i.MX6D rev1.2 at 792 MHz
Reset cause: POR
Model: Engicam i.CoreM6 Quad/Dual RQS Starter Kit
DRAM: 512 MiB
MMC: FSL_SDHC: 0
*** Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
Net: CPU Net Initialization Failed
No ethernet found.
Hit any key to stop autoboot: 0
icorem6qdl-rqs>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Tue, 13 Dec 2016 16:56:57 +0000 (17:56 +0100)]
imx6: geam6ul: Add default mtd nand partition table
geam6ul> mtdparts
device nand0 <nand>, # parts = 6
0: spl 0x00200000 0x00000000 0
1: uboot 0x00200000 0x00200000 0
2: env 0x00100000 0x00400000 0
3: kernel 0x00400000 0x00500000 0
4: dtb 0x00100000 0x00900000 0
5: rootfs 0x1f600000 0x00a00000 0
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Tue, 13 Dec 2016 16:56:56 +0000 (17:56 +0100)]
imx6: geam6ul: Enable MTD device support
Enable MTD device, partition and command support.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Tue, 13 Dec 2016 16:56:55 +0000 (17:56 +0100)]
imx6: geam6ul: Add NAND support
Add NAND support for Engicam GEAM6UL board.
Boot Log:
--------
U-Boot SPL
2016.11-g537fa5f (Nov 28 2016 - 11:42:28)
Trying to boot from NAND
NAND : 256 MiB
U-Boot
2016.11-g537fa5f (Nov 28 2016 - 11:20:06 +0100)
CPU: Freescale i.MX6UL rev1.1 69 MHz (running at 396 MHz)
CPU: Automotive temperature grade (-40C to 125C) at 42C
Reset cause: WDOG
Model: Engicam GEAM6UL
DRAM: 128 MiB
NAND: 256 MiB
MMC: FSL_SDHC: 0
* Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
Net: No ethernet found.
Hit any key to stop autoboot: 0
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Tue, 13 Dec 2016 16:56:54 +0000 (17:56 +0100)]
imx6: geam6ul: Add I2C support
Add I2C support for Engicam GEAM6UL module.
geam6ul> i2c bus
Bus 0: i2c@
021a0000
Bus 1: i2c@
021a4000
geam6ul> i2c dev 0
Setting bus to 0
geam6ul> i2c dev
Current bus is 0
geam6ul> i2c speed 100000
Setting bus speed to 100000 Hz
geam6ul> i2c probe
Valid chip addresses: 2C
geam6ul> i2c md 2C 0xff
00ff: 00 00 00 00 0f f0 01 64 ff ff 00 00 00 00 00 00 .......d........
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Tue, 13 Dec 2016 16:56:53 +0000 (17:56 +0100)]
arm: dts: imx6ul-geam: Add I2C nodes
Add I2C nodes for Engicam GEAM6UL module.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Tue, 13 Dec 2016 16:56:52 +0000 (17:56 +0100)]
arm: imx6ul: Add Engicam GEAM6UL Starter Kit initial support
Boot Log:
--------
U-Boot SPL
2016.11-rc2-00144-g922adaa-dirty (Oct 28 2016 - 18:55:30)
Trying to boot from MMC1
U-Boot
2016.11-rc2-00144-g922adaa-dirty (Oct 28 2016 - 18:55:30 +0530)
CPU: Freescale i.MX6UL rev1.1 528 MHz (running at 396 MHz)
CPU: Industrial temperature grade (-40C to 105C) at 43C
Reset cause: POR
Model: Engicam GEAM6UL
DRAM: 128 MiB
MMC: FSL_SDHC: 0
*** Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
Net: CPU Net Initialization Failed
No ethernet found.
Hit any key to stop autoboot: 0
geam6ul>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Tue, 13 Dec 2016 16:56:51 +0000 (17:56 +0100)]
arm: dts: Add devicetree for i.MX6UL
Add i.MX6UL dtsi support from Linux.
Here is the last commit:
"ARM: dts: add gpio-ranges property to iMX GPIO controllers"
(sha1:
bb728d662bed0fe91b152550e640cb3f6caa972c)
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Mon, 5 Dec 2016 23:01:00 +0000 (00:01 +0100)]
imx6: icorem6: Add I2C support
Add I2C support for Engicam i.CoreM6 qdl board.
icorem6qdl> i2c bus
Bus 0: i2c@
021a0000
Bus 1: i2c@
021a4000
Bus 2: i2c@
021a8000
icorem6qdl> i2c dev 2
Setting bus to 2
icorem6qdl> i2c speed 100000
Setting bus speed to 100000 Hz
icorem6qdl> i2c probe
Valid chip addresses: 2C
icorem6qdl> i2c md 2C 0xff
00ff: 00 00 00 00 0f f0 01 64 ff ff 00 00 00 00 00 00 .......d........
Cc: Stefano Babic <sbabic@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Heiko Schocher <hs@denx.de>
Jagan Teki [Mon, 5 Dec 2016 23:00:59 +0000 (00:00 +0100)]
i2c: mxc: Make 'no gpio pinctrl state' print as debug
Some I2C bus devicetree nodes, doesn't require to have
gpio pinctrl so replace the dev_info to debug so the
print never comes on the console and for bus that uses
gpio pinctrl anyway have dev_err.
Before:
------
U-Boot> i2c dev 1
Setting bus to 1
i2c bus 1 at 0x21a4000, no gpio pinctrl state.
After:
------
U-Boot> i2c dev 1
Setting bus to 1
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Heiko Schocher <hs@denx.de>
Jagan Teki [Mon, 5 Dec 2016 23:00:58 +0000 (00:00 +0100)]
i2c: mxc: Print hex instead of decimal for bus address
Better to print the hex value for bus address instead of
decimal, for more readbility on bus addressing.
Before:
------
U-Boot> i2c dev 1
Setting bus to 1
i2c bus 1 at
35274752, no gpio pinctrl state.
After:
------
U-Boot> i2c dev 1
Setting bus to 1
i2c bus 1 at 0x21a4000, no gpio pinctrl state.
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Heiko Schocher <hs@denx.de>
Jagan Teki [Mon, 5 Dec 2016 23:00:57 +0000 (00:00 +0100)]
i2c: Kconfig: Add SYS_I2C_MXC entry
Added kconfig for SYS_I2C_MXC driver.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Mon, 5 Dec 2016 23:00:56 +0000 (00:00 +0100)]
imx6: icorem6: Add custom splashscreen support
Add custom splashscreen, engicam.bmp support for
Engicam i.CoreM6 qdl board.
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Mon, 5 Dec 2016 23:00:55 +0000 (00:00 +0100)]
imx6: icorem6: Add framebuffer support
Add IPUv3 framebuffer support for Engicam i.CoreM6 qdl board.
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Mon, 5 Dec 2016 23:00:54 +0000 (00:00 +0100)]
video: Kconfig: Add VIDEO_IPV3 entry
Added kconfig entry for CONFIG_VIDEO_IPV3 driver.
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Mon, 5 Dec 2016 23:00:53 +0000 (00:00 +0100)]
icorem6: Use CONFIG_DM_ETH support
Use CONFIG_DM_ETH and remove board_eth_init code
from board files.
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Mon, 5 Dec 2016 23:00:52 +0000 (00:00 +0100)]
ARM: dts: imx6qdl-icore: Add FEC support
Add FEC dts support for Engicam i.CoreM6 dql modules.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Mon, 5 Dec 2016 23:00:51 +0000 (00:00 +0100)]
dm: net: fec: Add .read_rom_hwaddr
Add .read_rom_hwaddr on dm eth_ops.
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Mon, 5 Dec 2016 23:00:50 +0000 (00:00 +0100)]
net: fec_mxc: Driver cleanups
- Remove exctra space
- Add space
- Add tab space
- Fix single line comments quotes
- Fix 'CHECK: Avoid CamelCase'
- Fix 'CHECK: Alignment should match open parenthesis'
- Fix 'WARNING: line over 80 characters'
- Re-arrage header include files
Cc: Simon Glass <sjg@chromium.org>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Jagan Teki [Mon, 5 Dec 2016 23:00:49 +0000 (00:00 +0100)]
net: fec_mxc: Convert into driver model
This patch add driver model support for fec_mxc driver.
Cc: Simon Glass <sjg@chromium.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Jagan Teki [Mon, 5 Dec 2016 23:00:48 +0000 (00:00 +0100)]
net: fec_mxc: Remove unneeded eth_device arg from fec_get_hwaddr
fec_get_hwaddr never used eth_device argument, hence removed.
Cc: Simon Glass <sjg@chromium.org>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Fabio Estevam [Thu, 15 Dec 2016 21:30:40 +0000 (19:30 -0200)]
Kconfig: Move USE_ARCH_MEMCPY/MEMSET to Kconfig
Move USE_ARCH_MEMCPY/MEMSET options to Kconfig.
Make it "default y" for the ARMv7 architecture and make it
depend on !ARM64 && !SPL.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Patrick Bruenn [Fri, 4 Nov 2016 10:57:02 +0000 (11:57 +0100)]
arm: imx: add i.MX53 Beckhoff CX9020 Embedded PC
Add CX9020 board based on mx53loco.
Add simplified imx53 base device tree from kernel v4.8-rc8, to reuse
serial_mxc with DTE and prepare for device tree migration of other
functions and imx53 devices.
The CX9020 differs from i.MX53 Quick Start Board by:
- use uart2 instead of uart1
- DVI-D connector instead of VGA
- no audio
- CCAT FPGA connected to emi
- enable rtc
Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
Peng Fan [Sun, 11 Dec 2016 11:24:38 +0000 (19:24 +0800)]
imx: mx6sllevk: add plugin support
Add plugin support for mx6sllevk board.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Peng Fan [Sun, 11 Dec 2016 11:24:37 +0000 (19:24 +0800)]
arm: imx: add i.MX6SLL EVK board support
Add i.MX6SLL EVK board support.
1. Add imx6sll-evk device tree.
2. Enable SDHC/I2C/UART.
3. Enable REGULATOR/PMIC/I2C/GPIO/SDHC/PINCTRL driver.
Boot Log:
U-Boot
2016.11-00127-gc635871-dirty (Nov 24 2016 - 13:28:19 +0800)
CPU: Freescale i.MX6SLL rev1.0 at 792MHz
CPU: Commercial temperature grade (0C to 95C)Reset cause: POR
Model: Freescale i.MX6SLL EVK Board
Board: MX6SLL EVK
DRAM: 2 GiB
i2c bus 0 at
35258368, no gpio pinctrl state.
PMIC: PFUZE100! DEV_ID=0x10 REV_ID=0x21
MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
In: serial
Out: serial
Err: serial
Net: CPU Net Initialization Failed
No ethernet found.
Hit any key to stop autoboot: 0
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Peng Fan [Sun, 11 Dec 2016 11:24:36 +0000 (19:24 +0800)]
arm: dts: add i.MX6SLL device tree
Add i.MX6SLL device tree.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Peng Fan [Sun, 11 Dec 2016 11:24:35 +0000 (19:24 +0800)]
pinctrl: imx6: support i.MX6SLL
There two iomuxc for i.MX6SLL. One is normal IOMUXC, the other
is for IOMUXC_SNVS.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Peng Fan [Sun, 11 Dec 2016 11:24:34 +0000 (19:24 +0800)]
imx-common: lcdif: update lcdif regs for i.MX6SL/SLL
Update lcdif regs for i.MX6SL/SLL
Signed-off-by: Ye.Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Sun, 11 Dec 2016 11:24:33 +0000 (19:24 +0800)]
OCOTP: Update OCOTP driver to support i.MX6SLL
Add the i.MX6SLL support to OCOTP driver.
The i.MX6SLL reuses the i.MX6ULL fuse, bank 7 and bank8 have 4 words
each, and there is a hole between bank 5 and bank 6.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>