oweals/u-boot.git
5 years agoARM: dts: rmobile: Extract RPC node to u-boot specific DT
Marek Vasut [Mon, 3 Dec 2018 19:17:50 +0000 (20:17 +0100)]
ARM: dts: rmobile: Extract RPC node to u-boot specific DT

The RPC DT bindings are still work in progress. Extract the RPC DT node
from the DT to allow easier update and so it can be replaced once the DT
bindings are stable.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
V2: Rebase on u-boot/master

5 years agoARM: dts: rmobile: Add soc label to Gen3
Marek Vasut [Mon, 3 Dec 2018 20:05:55 +0000 (21:05 +0100)]
ARM: dts: rmobile: Add soc label to Gen3

Add label to the /soc node, so it can be referenced from the U-Boot DTs.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
V2: Rebase on u-boot/master

5 years agoARM: rmobile: Convert to bootm_size
Marek Vasut [Mon, 26 Nov 2018 23:19:03 +0000 (00:19 +0100)]
ARM: rmobile: Convert to bootm_size

Convert all Renesas R-Car boards to bootm_size of 256 MiB and drop both
fdt_high and initrd_high. This change implies that the FDT and initrd
will always be copied into the first 256 MiB of RAM instead of being
used in place, which can cause various kinds of inobvious problems.

The simpler problems include FDT or initrd being overwritten or being
used from unaligned addresses, especially on ARM64. The overhead of
copying the FDT to aligned location is negligible and these problems
go away, so the benefit is significant.

Regarding alignment problems with fitImage. The alignment of DT properties
is always 32 bits, which implies that the alignment of the "data" property
in fitImage is also 32 bits. The /incbin/ syntax plays no role here. The
kernel expects all elements, including DT and initrd, to be aligned to
64 bits on ARM64, thus using them in place may not be possible. Using the
bootm_size assures correct alignment, again with negligible overhead.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Tom Rini <trini@konsulko.com>
5 years agommc: Do not issue CMD 6 on SD 1.00 and SD 1.01
Marek Vasut [Sun, 18 Nov 2018 02:25:08 +0000 (03:25 +0100)]
mmc: Do not issue CMD 6 on SD 1.00 and SD 1.01

According to SD Specifications Part 1 Physical Layer Simplified Specification
Version 6.00 August 29, 2018, section 4.3.10 (Switch Function Command) and
section 5.6 (SCR register), SD cards version 1.00 and 1.01 do not support the
SD CMD 6.

Currently, U-Boot will issue CMD 6 unconditionally in sd_set_card_speed()
while configuring the bus for selected frequency. This will make SD cards
version 1.00 and 1.01 time out and thus fail detection altogether.

Fix this by not sending CMD 6 on such cards. Tested on Matsushita Electric
Industrial Co., Ltd. Japan RP-SD008B / Victor 8MB SD card, CU-SD008, which
is correctly detected with this patch as:

Device: sd@ee160000
Manufacturer ID: 1
OEM: 5041
Name: S008B
Bus Speed: 25000000
Mode : SD Legacy
Rd Block Len: 512
SD version 1.0
High Capacity: No
Capacity: 6.5 MiB
Bus Width: 4-bit
Erase Group Size: 512 Bytes

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
5 years agoPrepare v2019.01-rc1 v2019.01-rc1
Tom Rini [Tue, 4 Dec 2018 04:50:13 +0000 (23:50 -0500)]
Prepare v2019.01-rc1

Signed-off-by: Tom Rini <trini@konsulko.com>
5 years agoMAINTAINERS: board: qcom: db820c: update email.
Jorge Ramirez-Ortiz [Sat, 1 Dec 2018 20:20:28 +0000 (21:20 +0100)]
MAINTAINERS: board: qcom: db820c: update email.

Update email address

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
5 years agoRevert "serial: ns16550: fix debug uart putc called before init"
Simon Goldschmidt [Mon, 3 Dec 2018 20:55:33 +0000 (21:55 +0100)]
Revert "serial: ns16550: fix debug uart putc called before init"

This reverts commit 6f57c34473d37b8da5e6a3764d0d377d748aeef1 since it
does not seem to work at least on rk3399.

The Rockchip Technical Reference Manual (TRM) for the rk3399 says the baud
rate prescaler register is readable only when USR[0] is zero. Since this
bit is defined as "reserved" in the socfpga cylcone5 TRM, let's rather
drop this than making the ns16550 debug uart more platform specific.

Reported-by: Roosen Henri <Henri.Roosen@ginzinger.com>
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com
5 years agodm: MIGRATION: Update migration plan for BLK
Tom Rini [Thu, 29 Nov 2018 23:21:14 +0000 (18:21 -0500)]
dm: MIGRATION: Update migration plan for BLK

The biggest part of migration to using CONFIG_BLK is that we need to
have the various subsystems migrated first, so reword the plan here to
reference the new deadlines.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
5 years agodm: MIGRATION: Add migration plan for CONFIG_SATA
Tom Rini [Thu, 29 Nov 2018 23:21:13 +0000 (18:21 -0500)]
dm: MIGRATION: Add migration plan for CONFIG_SATA

As the core of the subsystem has been converted along with some of the
drivers, formalize a deadline for migration.

Cc: Akshay Bhat <akshaybhat@timesys.com>
Cc: Andreas Geisreiter <ageisreiter@dh-electronics.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Christian Gmeiner <christian.gmeiner@gmail.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Jason Liu <jason.hui.liu@nxp.com>
Cc: Ken Lin <Ken.Lin@advantech.com.tw>
Cc: Ludwig Zenz <lzenz@dh-electronics.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Max Krummenacher <max.krummenacher@toradex.com>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Soeren Moch <smoch@web.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Troy Kisky <troy.kisky@boundarydevices.com>
Cc: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Cc: York Sun <york.sun@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
5 years agodm: MIGRATION: Add migration plan for DM_USB
Tom Rini [Thu, 29 Nov 2018 23:21:12 +0000 (18:21 -0500)]
dm: MIGRATION: Add migration plan for DM_USB

As much of the USB system has been migrated to DM now, formalize a
deadline for migration.

Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
5 years agodm: MIGRATION: Add migration plan for DM_MMC
Tom Rini [Thu, 29 Nov 2018 23:21:11 +0000 (18:21 -0500)]
dm: MIGRATION: Add migration plan for DM_MMC

Given that at this point the MMC subsystem itself has been migrated
along with a number of subsystem drivers, formalize a deadline for
migration.

Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agoMerge tag 'xilinx-for-v2019.01' of git://git.denx.de/u-boot-microblaze
Tom Rini [Tue, 4 Dec 2018 00:30:54 +0000 (19:30 -0500)]
Merge tag 'xilinx-for-v2019.01' of git://git.denx.de/u-boot-microblaze

Xilinx changes for v2019.01

microblaze:
- Use default functions for memory decoding
- Showing model from DT

zynq:
- Fix spi flash DTs
- Fix zynq_help_text with CONFIG_SYS_LONGHELP
- Tune cse/mini configurations
- Enabling cse/mini testing with current targets

zynqmp:
- Enable gzip SPL support
- Fix chip detection logic
- Tune mini configurations
- DT fixes(spi-flash, models, clocks, etc)
- Add support for OF_SEPARATE configurations
- Enabling mini testing with current targets
- Add mini mtest configuration
- Some minor config setting

nand:
- arasan: Add subpage configuration

net:
- gem: Add 64bit DMA support

5 years agoMerge tag 'signed-rpi-next' of git://github.com/agraf/u-boot
Tom Rini [Mon, 3 Dec 2018 22:52:53 +0000 (17:52 -0500)]
Merge tag 'signed-rpi-next' of git://github.com/agraf/u-boot

Patch queue for rpi - 2018-12-03

A few Raspberry Pi specific changes this time:

  - Allow 2nd MMC device
  - Support RPi 3 Model A+
  - Allow UUID to find filesystem

5 years agoMerge tag 'signed-efi-next' of git://github.com/agraf/u-boot
Tom Rini [Mon, 3 Dec 2018 22:52:40 +0000 (17:52 -0500)]
Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot

Patch queue for efi - 2018-12-03

This release is fully packed with lots of glorious improvements in UEFI
land again!

  - Make PE images more standards compliant
  - Improve sandbox support
  - Improve correctness
  - Fix RISC-V execution on virt model
  - Honor board defined top of ram (fixes a few boards)
  - Imply DM USB access when distro boot is available
  - Code cleanups

5 years agoMerge branch 'master' of git://git.denx.de/u-boot-sh
Tom Rini [Mon, 3 Dec 2018 22:51:45 +0000 (17:51 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-sh

- MMC fixes for R-Car Gen3

5 years agoMerge branch '2018-12-03-master-imports'
Tom Rini [Mon, 3 Dec 2018 21:23:03 +0000 (16:23 -0500)]
Merge branch '2018-12-03-master-imports'

- Baltos platform updates
- rtc m41t62 converted to DM.
- PowerPC MPC8xx DM conversion
- Verified boot updates

5 years agorpi: add 3 Model A+
Jonathan Gray [Fri, 16 Nov 2018 12:07:39 +0000 (23:07 +1100)]
rpi: add 3 Model A+

Add Raspberry Pi 3 Model A+ to list of models, the revision code is 0xE
according to the list on raspberrypi.org.

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
5 years agorpi: add URL of official revision code list
Jonathan Gray [Fri, 16 Nov 2018 12:06:05 +0000 (23:06 +1100)]
rpi: add URL of official revision code list

Replace various third party lists of Raspberry Pi revision codes in a
comment with the list on raspberrypi.org.

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
5 years agospi, mpc8xx: migrate to DM_SPI
Christophe Leroy [Wed, 21 Nov 2018 08:51:57 +0000 (08:51 +0000)]
spi, mpc8xx: migrate to DM_SPI

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
5 years agoboard_r: fix build with DM_SPI
Christophe Leroy [Wed, 21 Nov 2018 08:51:55 +0000 (08:51 +0000)]
board_r: fix build with DM_SPI

CC      common/board_r.o
common/board_r.c:747:2: error: ‘initr_spi’ undeclared here (not in a function)
  initr_spi,
  ^
make[1]: *** [common/board_r.o] Error 1

Fixes: ebe76a2df9f6 ("dm: Remove spi_init() from board_r.c when using driver model")
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
5 years agodrivers: serial: get rid of non DM mpc8xx driver
Christophe Leroy [Wed, 21 Nov 2018 08:51:53 +0000 (08:51 +0000)]
drivers: serial: get rid of non DM mpc8xx driver

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
5 years agoboard: MCR3000: migrate to DM_SERIAL
Christophe Leroy [Wed, 21 Nov 2018 08:51:51 +0000 (08:51 +0000)]
board: MCR3000: migrate to DM_SERIAL

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
5 years agodrivers: serial: migrate mpc8xx to DM
Christophe Leroy [Wed, 21 Nov 2018 08:51:49 +0000 (08:51 +0000)]
drivers: serial: migrate mpc8xx to DM

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
5 years agoboard: MCR3000: use new DM watchdog
Christophe Leroy [Wed, 21 Nov 2018 08:51:47 +0000 (08:51 +0000)]
board: MCR3000: use new DM watchdog

This patch switches MCR3000 board to the new DM watchdog.

The change in u-boot.lds is because MCR3000.o grows a bit
with this patch and doesn't fit anymore below env_offset on
some versions of GCC.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
5 years agodrivers: watchdog: add a DM driver for the MPC8xx watchdog
Christophe Leroy [Wed, 21 Nov 2018 08:51:45 +0000 (08:51 +0000)]
drivers: watchdog: add a DM driver for the MPC8xx watchdog

This patch adds a DM driver for the MPC8xx watchdog.
Basically, the watchdog is enabled by default from the start and
SYPCR register has to be writen once to set the timeout and/or
deactivate the watchdog. Once written, it cannot be written again.

It means that wdt_stop() can be called before wdt_start() to stop the
watchdog, but cannot be called if wdt_start() has been called.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
5 years agoboard: MCR3000: Activate CONFIG_DM and CONFIG_OF_CONTROL
Christophe Leroy [Wed, 21 Nov 2018 08:51:43 +0000 (08:51 +0000)]
board: MCR3000: Activate CONFIG_DM and CONFIG_OF_CONTROL

Add mcr3000 device tree and activate CONFIG_DM and CONFIG_OF_CONTROL

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
5 years agopowerpc, mpc8xx: clear top of stack
Christophe Leroy [Wed, 21 Nov 2018 08:51:41 +0000 (08:51 +0000)]
powerpc, mpc8xx: clear top of stack

Reported-by: Joakim Tjernlund <Joakim.Tjernlund@infinera.com>
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Reviewed-by: Joakim Tjernlund <Joakim.Tjernlund@infinera.com>
5 years agotest: vboot: clean its file
Philippe Reynes [Wed, 14 Nov 2018 12:51:05 +0000 (13:51 +0100)]
test: vboot: clean its file

This update the its file used in vboot test to respect the new
node style name defined in doc/uImage.FIT (for example: replace
kernel@1 by kernel and fdt@1 by fdt-1)

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agotest: vboot: add padding pss for rsa signature
Philippe Reynes [Wed, 14 Nov 2018 12:51:04 +0000 (13:51 +0100)]
test: vboot: add padding pss for rsa signature

The padding pss is now supported for rsa signature.
This add test with padding pss on vboot test.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agoconfigs: sandbox: enable padding pss for rsa signature
Philippe Reynes [Wed, 14 Nov 2018 12:51:03 +0000 (13:51 +0100)]
configs: sandbox: enable padding pss for rsa signature

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agodoc: uImage.FIT: signature.txt: add option padding
Philippe Reynes [Wed, 14 Nov 2018 12:51:02 +0000 (13:51 +0100)]
doc: uImage.FIT: signature.txt: add option padding

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agorsa: add support of padding pss
Philippe Reynes [Wed, 14 Nov 2018 12:51:01 +0000 (13:51 +0100)]
rsa: add support of padding pss

We add the support of the padding pss for rsa signature.
This new padding is often recommended instead of pkcs-1.5.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agorsa: add a structure for the padding
Philippe Reynes [Wed, 14 Nov 2018 12:51:00 +0000 (13:51 +0100)]
rsa: add a structure for the padding

The rsa signature use a padding algorithm. By default, we use the
padding pkcs-1.5. In order to add some new padding algorithm, we
add a padding framework to manage several padding algorithm.
The choice of the padding is done in the file .its.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agorsa: use new openssl API to create signature
Philippe Reynes [Wed, 14 Nov 2018 12:50:59 +0000 (13:50 +0100)]
rsa: use new openssl API to create signature

Previous implementation of the rsa signature was using
the openssl API EVP_Sign*, but the new openssl API
EVP_DigestSign* is more flexible. So we move to this
new API.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agortc: m41t62: Convert the RTC driver to support the driver model (DM)
Lukasz Majewski [Thu, 22 Nov 2018 13:54:34 +0000 (14:54 +0100)]
rtc: m41t62: Convert the RTC driver to support the driver model (DM)

After this change the m41t62.c can be used with RTC subsystem (i.e. date
command) which uses device model (DM).

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
5 years agortc: m41t62: Extract common RTC handling code to facilitate DM conversion
Lukasz Majewski [Thu, 22 Nov 2018 13:54:33 +0000 (14:54 +0100)]
rtc: m41t62: Extract common RTC handling code to facilitate DM conversion

This change facilitates the conversion of m41t62 RTC driver to device
model (DM).

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
5 years agortc: m41t62: Break i2c_write() arguments to fix checkpatch warning
Lukasz Majewski [Thu, 22 Nov 2018 13:54:32 +0000 (14:54 +0100)]
rtc: m41t62: Break i2c_write() arguments to fix checkpatch warning

No functional change for this commit.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
5 years agoKconfig: Migrate CONFIG_RTC_M41T62 define to Kconfig
Lukasz Majewski [Thu, 22 Nov 2018 13:54:31 +0000 (14:54 +0100)]
Kconfig: Migrate CONFIG_RTC_M41T62 define to Kconfig

This patch moves the RTC M41T62 config define to Kconfig.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agoeeprom: Add device model based I2C support to eeprom command
Lukasz Majewski [Wed, 21 Nov 2018 22:40:43 +0000 (23:40 +0100)]
eeprom: Add device model based I2C support to eeprom command

After this change the 'eeprom' command can be used with DM aware boards.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
5 years agoarm: baltos: migrate Ethernet PHYs configuration to Kconfig
Yegor Yefremov [Thu, 22 Nov 2018 08:19:33 +0000 (09:19 +0100)]
arm: baltos: migrate Ethernet PHYs configuration to Kconfig

Remove CONFIG_PHY_ATHEROS and CONFIG_PHY_SMSC from defconfig
and select them in Kconfig.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agoarm: baltos: move CONFIG_SYS_NAND_U_BOOT_OFFS to defconfig
Yegor Yefremov [Thu, 22 Nov 2018 08:19:32 +0000 (09:19 +0100)]
arm: baltos: move CONFIG_SYS_NAND_U_BOOT_OFFS to defconfig

Also get rid of CONFIG_SYS_NAND_SPL_KERNEL_OFFS as SPL_OS_BOOT
feature won't be used.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agoarm: baltos: remove unused header
Yegor Yefremov [Thu, 22 Nov 2018 08:19:31 +0000 (09:19 +0100)]
arm: baltos: remove unused header

OnRISC Baltos series uses SoM with tps65910 PMIC, so remove
"power/tps65217.h" header inclusion.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agoarm: baltos: move the board to CONFIG_BLK
Yegor Yefremov [Thu, 22 Nov 2018 08:19:30 +0000 (09:19 +0100)]
arm: baltos: move the board to CONFIG_BLK

Use DM for both MMC and USB subsystems and use dedicated DTS
for U-Boot configuration.

Disable SPL support for GPIO and remove EVMSK leftover for
DDR power control via GPIO.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agonet: zynq_gem: Add check for 64-bit dma support by hardware
Siva Durga Prasad Paladugu [Mon, 26 Nov 2018 10:57:39 +0000 (16:27 +0530)]
net: zynq_gem: Add check for 64-bit dma support by hardware

This patch throws an error if 64-bit support is expected
but DMA hardware is not capable of 64-bit support. It also
prints a debug message if DMA is capable of 64-bit but not
using it.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
5 years agonet: zynq_gem: Added 64-bit addressing support
Vipul Kumar [Mon, 26 Nov 2018 10:57:38 +0000 (16:27 +0530)]
net: zynq_gem: Added 64-bit addressing support

This patch adds 64-bit addressing support for zynq gem.
This means it can perform send and receive operations on
64-bit address buffers.

Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
5 years agoarm64: zynqmp: Add new header file for zcu104 RevC
T Karthik Reddy [Mon, 3 Dec 2018 14:05:09 +0000 (19:35 +0530)]
arm64: zynqmp: Add new header file for zcu104 RevC

Created a new header file for zcu104 RevC board and added below
configurations to use MAC address from EEPROM.
CONFIG_ZYNQ_GEM_EEPROM_ADDR
CONFIG_ZYNQ_EEPROM_BUS
Added CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET=0x20 to
xilinx_zynqmp_zcu104_revC_defconfig

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
5 years agoMerge tag 'u-boot-amlogic-20181203' of git://git.denx.de/u-boot-amlogic
Tom Rini [Mon, 3 Dec 2018 14:21:06 +0000 (09:21 -0500)]
Merge tag 'u-boot-amlogic-20181203' of git://git.denx.de/u-boot-amlogic

ARM: meson: Add regmap support for clock driver and sync DT with 4.19

5 years agoARM: meson: Add regmap support for clock driver
Loic Devulder [Tue, 27 Nov 2018 16:41:18 +0000 (17:41 +0100)]
ARM: meson: Add regmap support for clock driver

This patch modifies the meson clock driver to use syscon/regmap like
the Linux kernel does, as it is needed if we want to share the same
DTS files.

DTS files are synchronized from Linux 4.19.

Signed-off-by: Loic Devulder <ldevulder@suse.de>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
5 years agoMerge tag 'arc-updates-for-2019.01-rc1' of git://git.denx.de/u-boot-arc
Tom Rini [Mon, 3 Dec 2018 12:26:16 +0000 (07:26 -0500)]
Merge tag 'arc-updates-for-2019.01-rc1' of git://git.denx.de/u-boot-arc

We introduce much better automatic identification of ARC cores.

 1. Try to match found HW features to known ARC core templates
 2. Print CPU frequency for all ARC boards
 3. Add more board-specific info

5 years agoARM: rmobile: Enable MMC HS400 on Salvator-X, ULCB, Ebisu
Marek Vasut [Wed, 13 Jun 2018 04:50:31 +0000 (06:50 +0200)]
ARM: rmobile: Enable MMC HS400 on Salvator-X, ULCB, Ebisu

Enable the HS400 support code on H3, M3W, M3N Salvator-X(S)
and ULCB boards as well as E3 Ebisu board.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
5 years agoARM: dts: rmobile: Enable HS400 on Salvator-X, ULCB, Ebisu
Marek Vasut [Wed, 13 Jun 2018 05:11:47 +0000 (07:11 +0200)]
ARM: dts: rmobile: Enable HS400 on Salvator-X, ULCB, Ebisu

Enable the HS400 support in DT on H3, M3W, M3N Salvator-X(S)
and ULCB boards as well as E3 Ebisu board.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
5 years agoARM: dts: rmobile: Enable SDR modes on E3 Ebisu
Marek Vasut [Wed, 31 Oct 2018 19:34:41 +0000 (20:34 +0100)]
ARM: dts: rmobile: Enable SDR modes on E3 Ebisu

Add regulators and pinmuxes for SDHI0 and SDHI1 SD and microSD
slots on E3 Ebisu and mark them as capable of up to SDR104 mode
of operation. With the SDHI fixes in place, it is now possible
to use SDR104.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
5 years agoARM: dts: rmobile: Enable SDR104 on Salvator-X and ULCB
Marek Vasut [Tue, 9 Oct 2018 11:13:57 +0000 (13:13 +0200)]
ARM: dts: rmobile: Enable SDR104 on Salvator-X and ULCB

Enable SDR104 modes on M3W and H3 boards. With the SDHI fixes
in place, it is now possible to use SDR104.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
5 years agoARM: dts: rmobile: Add eMMC DS pinmux
Marek Vasut [Sun, 28 Oct 2018 12:56:56 +0000 (13:56 +0100)]
ARM: dts: rmobile: Add eMMC DS pinmux

Add pinmux entry for the eMMC DS line, as it is connected on these boards.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
5 years agommc: tmio: sdhi: Add HS400 support
Marek Vasut [Wed, 13 Jun 2018 06:02:55 +0000 (08:02 +0200)]
mmc: tmio: sdhi: Add HS400 support

Add support for the HS400 mode to SDHI driver. This uses the up-tune
mechanism from already supported HS200 tuning.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
5 years agommc: tmio: sdhi: Move tap_pos to private data
Marek Vasut [Wed, 13 Jun 2018 06:02:55 +0000 (08:02 +0200)]
mmc: tmio: sdhi: Move tap_pos to private data

Move the tap_pos variable, which is the HS200/HS400/SDR104 calibration
offset, into private data, so it can be passed around. This is done in
preparation for the HS400 mode, which needs to adjust this value.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
5 years agommc: tmio: sdhi: Filter out HS400 on certain SoCs
Marek Vasut [Wed, 13 Jun 2018 06:02:55 +0000 (08:02 +0200)]
mmc: tmio: sdhi: Filter out HS400 on certain SoCs

Filter out HS400 support on SoCs where HS400 is not supported yet.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
5 years agommc: tmio: Reorder TMIO clock handling
Marek Vasut [Thu, 15 Nov 2018 21:01:33 +0000 (22:01 +0100)]
mmc: tmio: Reorder TMIO clock handling

Reorder the tmio_sd_set_clk_rate() function such that it handles all
of the clock requiests correctly. Specifically, before this patch,
clock request with (mmc->clock == 0 && mmc->clk_disable) could leave
the clock enabled, as the function would exit on if (!mmc->clock)
condition on top and will not handle the mmc->clk_disable at all.

Rather than band-aid fixing just that particular problem, reorder
the entire function to make it easier to understand and verify that
all the cases are covered. The function has three sections now:

First, if mmc->clock != 0, we calculate divider for the SD block.
Second, if mmc->clock != 0 and SD block clock are enabled and
           current divider is not equal to the new divider, then
           stop the clock and update the divider.
Third, if mmc->clk_disable is set, disable the clock, otherwise
       enable the clock. This happens independently of divider
       update now.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
5 years agommc: tmio: Keep generating clock when clock are enabled
Marek Vasut [Wed, 13 Jun 2018 06:02:55 +0000 (08:02 +0200)]
mmc: tmio: Keep generating clock when clock are enabled

The TMIO core has a feature where it can automatically disable clock output
when the bus is not in use. While this is useful, it also interferes with
switching the bus to 1.8V and other background tasks of the SD/MMC cards,
which require clock to be enabled.

This patch respects the mmc->clk_disable and only disables the clock when
the MMC core requests it. Otherwise the clock are continuously generated
on the bus.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
5 years agommc: tmio: Do not set divider to 1 in DDR mode
Marek Vasut [Wed, 13 Jun 2018 06:02:55 +0000 (08:02 +0200)]
mmc: tmio: Do not set divider to 1 in DDR mode

The TMIO core has a quirk where divider == 1 must not be set in DDR modes.
Handle this by setting divider to 2, as suggested in the documentation.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
5 years agommc: tmio: Switch to clock framework
Marek Vasut [Wed, 13 Jun 2018 06:02:55 +0000 (08:02 +0200)]
mmc: tmio: Switch to clock framework

Switch the driver to using clk_get_rate()/clk_set_rate() instead of
caching the mclk frequency in it's private data. This is required on
the SDHI variant of the controller, where the upstream mclk need to
be adjusted when using UHS modes.

Platforms which do not support clock framework or do not support it
in eg. SPL default to 100 MHz clock.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
---
V2: - Fix build on certain platforms using SPL without clock framework
V3: - Turn clk_get_rate into a callback and fill it as needed on both
      renesas and socionext platforms

5 years agommc: Parse HS400 DT properties
Marek Vasut [Wed, 13 Jun 2018 04:50:16 +0000 (06:50 +0200)]
mmc: Parse HS400 DT properties

Add HS400 properties parsing support to mmc_of_parse().

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
5 years agoclk: renesas: Allow reconfiguring SDHI clock on Gen3
Marek Vasut [Tue, 30 Oct 2018 16:54:20 +0000 (17:54 +0100)]
clk: renesas: Allow reconfiguring SDHI clock on Gen3

The SDHI clock must be configured differently for HS200/HS400/SDR104
modes. Add support for reconfiguring the SDHI clock settings into the
clock driver.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
5 years agoarc: devboards: Implement checkboard()
Alexey Brodkin [Tue, 27 Nov 2018 06:47:01 +0000 (09:47 +0300)]
arc: devboards: Implement checkboard()

This allows us to print nice board name on boot.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
5 years agoarc: emsdp: Refactor register and bit accesses
Alexey Brodkin [Tue, 27 Nov 2018 06:47:00 +0000 (09:47 +0300)]
arc: emsdp: Refactor register and bit accesses

Instead of "base + offset" define all registers right away
and access them later via direct defines.

Generate bit masks with "BIT" macro.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
5 years agoarc: emsdp: Read real CPU clock value from hardware
Alexey Brodkin [Tue, 27 Nov 2018 06:46:59 +0000 (09:46 +0300)]
arc: emsdp: Read real CPU clock value from hardware

We do real CPU clock measurement with help of built-in
counters. Thus we may accommodate different real clock values
that appear in different FPA images instead of relying on
something hard-coded in the .dtb.

And while at it make make SDIO base address define
look similar to others with casting to "(void *)".

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
5 years agoarc: Get rid of board-specific print_cpuinfo()
Alexey Brodkin [Tue, 27 Nov 2018 06:46:58 +0000 (09:46 +0300)]
arc: Get rid of board-specific print_cpuinfo()

Since we now do advanced CPU identification in
generic ARC code there's no need to have per-board
hardcoded data.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
5 years agoARC: Improve identification of ARC cores
Alexey Brodkin [Tue, 27 Nov 2018 06:46:57 +0000 (09:46 +0300)]
ARC: Improve identification of ARC cores

1. Try to guess a ARC core template that was used
   i.e. not just name a core family but something more
   menaingful like "ARC HS38", "ARC EM11D" etc.

   We do it checking availability of the key differentiation
   features like:
    - Caches (we actually only check for L1 I$ fpr simplicity)
    - XY-memory
    - DSP extensions etc.

2. Identify ARC subsystems

3. Print core clock frequency

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
5 years agoarc: emsdp: Bump RAM size to 16 Mb
Alexey Brodkin [Tue, 27 Nov 2018 06:20:44 +0000 (09:20 +0300)]
arc: emsdp: Bump RAM size to 16 Mb

On v2 boards that will hit real stock we'll have 16 Mb of RAM.

Note on v1 boards (if anybody ever get one out of trash bin)
this leads to U-Boot execution freeze in the middle ofthe relocation
so don't be surprised.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
5 years agoefi_loader: bootmgr: add load option helper functions
AKASHI Takahiro [Mon, 5 Nov 2018 09:06:41 +0000 (18:06 +0900)]
efi_loader: bootmgr: add load option helper functions

In this patch, helper functions for an load option variable (BootXXXX)
are added:
* efi_deserialize_load_option(): parse a string into load_option data
(renamed from parse_load_option and exported)
* efi_serialize_load_option(): convert load_option data into a string

Those functions will be used to implement efishell command.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
5 years agoefi_loader: allow device == NULL in efi_dp_from_name()
AKASHI Takahiro [Mon, 5 Nov 2018 09:06:40 +0000 (18:06 +0900)]
efi_loader: allow device == NULL in efi_dp_from_name()

This is a preparatory patch for use in efi_serialize_load_option()
as a load option's file_path should have both a device path and
a file path.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
5 years agoARM: rpi_*_defconfig: Add support to find UUID for filesystem
Otavio Salvador [Tue, 23 Oct 2018 13:35:52 +0000 (10:35 -0300)]
ARM: rpi_*_defconfig: Add support to find UUID for filesystem

The most generic way of having a stable boot behavior is to rely on
UUID instead of device names for root partition, so the order of
probing does not cause issues with booting.

This enables the `CMD_FS_UUID` for following defconfig files:

 - rpi_0_w_defconfig
 - rpi_2_defconfig
 - rpi_3_32b_defconfig
 - rpi_3_defconfig
 - rpi_defconfig

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br>
Signed-off-by: Alexander Graf <agraf@suse.de>
5 years agorpi: Add mmc 1 as a boot target
Emmanuel Vadot [Mon, 2 Jul 2018 12:34:55 +0000 (14:34 +0200)]
rpi: Add mmc 1 as a boot target

When booting with the rpi-firmware "mmc" overlay that disable
the SDHOST controller and use the SDHCI one for the sd card,
mmc 1 because a viable boot target.
Add it to the list

Signed-off-by: Oleksandr Tymoshenko <gonzo@FreeBSD.org>
Signed-off-by: Emmanuel Vadot <manu@freebsd.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
5 years agodoc: README.iscsi: Open-iSCSI configuration
Heinrich Schuchardt [Sat, 1 Dec 2018 09:07:10 +0000 (10:07 +0100)]
doc: README.iscsi: Open-iSCSI configuration

Provide settings for Open-iSCSI

Reformat headers. h3-headers marked with ^^^ are not recognized in some
markup editors. Use the ### notation instead.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
5 years agoefi_loader: Align runtime section to 64kb
Alexander Graf [Mon, 17 Sep 2018 11:54:33 +0000 (13:54 +0200)]
efi_loader: Align runtime section to 64kb

The UEFI spec mandates that runtime sections are 64kb aligned to enable
support for 64kb page size OSs.

This patch ensures that we extend the runtime section to 64kb to be spec
compliant.

Signed-off-by: Alexander Graf <agraf@suse.de>
5 years agoefi_selftest: rename setup_ok
Heinrich Schuchardt [Mon, 22 Oct 2018 21:15:10 +0000 (23:15 +0200)]
efi_selftest: rename setup_ok

The variable name setup_ok might suggest a boolean with true indicating
OK. Let's avoid the misleading name.

%s/setup_ok/setup_status/g

Suggested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
5 years agoefi_loader: fix simple network protocol
Heinrich Schuchardt [Fri, 30 Nov 2018 23:16:33 +0000 (00:16 +0100)]
efi_loader: fix simple network protocol

We should not call eth_rx() before the network interface is initialized.
The services of the simple network protocol should check the state of
the network adapter.

Add and correct comments.

Without this patch i.mx6 system Wandboard Quad rev B1 fails to execute
bootefi selftest.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
5 years agoefi_loader: correctly aligned transmit buffer
Heinrich Schuchardt [Fri, 30 Nov 2018 23:16:32 +0000 (00:16 +0100)]
efi_loader: correctly aligned transmit buffer

Calling net_send_packet() requires that the buffer is aligned to a multiple
of PKTALIGN (= ARCH_DMA_MINALIGN). The UEFI spec does not require
efi_net_transmit() to be called with a buffer with any special alignment.
So we have to copy to an aligned buffer. The current coding copies to an
aligned buffer only if CONFIG_EFI_LOADER_BOUNCE_BUFFER=y. Many boards
like the Odroid C2 do not use a bounce buffer.

With the patch we copy to a correctly aligned buffer in all cases.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
5 years agoefi_selftest: fix simple network protocol test
Heinrich Schuchardt [Sat, 20 Oct 2018 20:01:08 +0000 (22:01 +0200)]
efi_selftest: fix simple network protocol test

To use the simple network protocol we have to call the start service first
and the initialize service second.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
5 years agoMAINTAINERS: add EFI PAYLOAD reviewer
Heinrich Schuchardt [Fri, 16 Nov 2018 19:17:23 +0000 (20:17 +0100)]
MAINTAINERS: add EFI PAYLOAD reviewer

Alex suggested to add me as a reviewer for the EFI subsystem.
The patch also adds a description for R: entries.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
5 years agoefi_selftest: check fdt is marked as runtime data
Heinrich Schuchardt [Sun, 18 Nov 2018 16:58:54 +0000 (17:58 +0100)]
efi_selftest: check fdt is marked as runtime data

Check that the memory area containing the device tree is marked as runtime
data.

Update the Python test to pass ${fdtcontroladdr} to bootefi.

Update the description of the Python test.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
5 years agoefi_loader: create fdt reservation before copy
Heinrich Schuchardt [Sun, 18 Nov 2018 16:58:53 +0000 (17:58 +0100)]
efi_loader: create fdt reservation before copy

When copying the device we must ensure that the copy does not fall into a
memory area reserved by the same.

So let's change the sequence: first create memory reservations and then
copy the device tree.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
5 years agoefi_loader: fix memory mapping for sandbox
Heinrich Schuchardt [Sun, 18 Nov 2018 16:58:52 +0000 (17:58 +0100)]
efi_loader: fix memory mapping for sandbox

The sandbox is using a virtual address space which is neither the physical
address space of the operating system nor the virtual address space in
which Linux aplications live. The addresses used insided the flattened
device tree use this sandbox virtual address space. The EFI subsystem uses
the virtual address space of the operating system and this is where the fdt
is stored.

Fix all incorrect addresses for the fdt in cmd/bootefi.cmd.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
5 years agofdt_support: fdt reservations on the sandbox
Heinrich Schuchardt [Sun, 18 Nov 2018 16:58:51 +0000 (17:58 +0100)]
fdt_support: fdt reservations on the sandbox

On the sandbox the memory addresses in the device tree refer to the virtual
address space of the sandbox. This implies that the memory reservations for
the fdt also have to be converted to this address space.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
5 years agofdt: sandbox: correct use of ${fdtcontroladdr}
Heinrich Schuchardt [Sun, 18 Nov 2018 16:58:50 +0000 (17:58 +0100)]
fdt: sandbox: correct use of ${fdtcontroladdr}

The sandbox uses a virtual address space that is neither the physical nor
the virtual address space of the operating system. All address used on the
command line live in this address space. So also the environment variable
${fdtcontroladdr} has to be in this address space.

Commands like bootefi and booti receive the fdt address as parameter.
Without the patch ${fdtcontroladdr} cannot be used as parameter value on
the sandbox.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
5 years agoefi_loader: macro efi_size_in_pages()
Heinrich Schuchardt [Sun, 18 Nov 2018 16:58:49 +0000 (17:58 +0100)]
efi_loader: macro efi_size_in_pages()

When allocating EFI memory pages the size in bytes has to be converted to
pages.

Provide a macro efi_size_in_pages() for this conversion.
Use it in the EFI subsystem and correct related comments.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
5 years agoefi_selftest: building sandbox with EFI_SELFTEST
Heinrich Schuchardt [Sun, 18 Nov 2018 16:58:48 +0000 (17:58 +0100)]
efi_selftest: building sandbox with EFI_SELFTEST

Enable building the sandbox with CONFIG_EFI_SELFTEST.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
5 years agoefi_selftest: add test for memory allocation
Heinrich Schuchardt [Sun, 18 Nov 2018 16:58:47 +0000 (17:58 +0100)]
efi_selftest: add test for memory allocation

This unit test checks the following runtime services:
AllocatePages, FreePages, GetMemoryMap

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
5 years agoefi_loader: eliminate sandbox addresses
Heinrich Schuchardt [Sun, 18 Nov 2018 16:58:46 +0000 (17:58 +0100)]
efi_loader: eliminate sandbox addresses

Do not use the sandbox's virtual address space for the internal structures
of the memory map. This way we can eliminate a whole lot of unnecessary
conversions.

The only conversion remaining is the one when adding known memory.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
5 years agoefi: Rename bootefi_test_finish() to bootefi_run_finish()
Simon Glass [Mon, 26 Nov 2018 03:14:39 +0000 (20:14 -0700)]
efi: Rename bootefi_test_finish() to bootefi_run_finish()

This function can be used from do_bootefi_exec() so that we use mostly the
same code for a normal EFI application and an EFI test.

Rename the function and use it in both places.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
5 years agoefi: Create a function to set up for running EFI code
Simon Glass [Mon, 26 Nov 2018 03:14:38 +0000 (20:14 -0700)]
efi: Create a function to set up for running EFI code

There is still duplicated code in efi_loader for tests and normal
operation.

Add a new bootefi_run_prepare() function which holds common code used to
set up U-Boot to run EFI code. Make use of this from the existing
bootefi_test_prepare() function, as well as do_bootefi_exec().

Also shorten a few variable names.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
5 years agoefi: Split out test init/uninit into functions
Simon Glass [Mon, 26 Nov 2018 03:14:37 +0000 (20:14 -0700)]
efi: Split out test init/uninit into functions

The functions in bootefi are very long because they mix high-level code
and control with the low-level implementation. To help with this, create
functions which handle preparing for running the test and cleaning up
afterwards.

Also shorten the awfully long variable names here.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
5 years agoefi: Check for failure to create objects in selftest
Simon Glass [Mon, 26 Nov 2018 03:14:36 +0000 (20:14 -0700)]
efi: Check for failure to create objects in selftest

At present a few error conditions are not checked. Before refactoring
this code, add some basic checks. Note that this code still leaks memory
in the event of error. This will be tackled after the refactor.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
5 years agoefi_loader: Reserve unaccessible memory
Alexander Graf [Fri, 30 Nov 2018 20:24:56 +0000 (21:24 +0100)]
efi_loader: Reserve unaccessible memory

On some systems, not all RAM may be usable within U-Boot. Maybe the
memory maps are incomplete, maybe it's used as workaround for broken
DMA. But whatever the reason may be, a platform can say that it does
not wish to have its RAM accessed above a certain address by defining
board_get_usable_ram_top().

In the efi_loader world, we ignored that hint, mostly because very few
boards actually have real restrictions around this.

So let's honor the board's wish to not access high addresses during
boot time. The best way to do so is by indicating the respective pages
as "allocated by firmware". That way, Operating Systems will still
use the pages after boot, but before boot no allocation will use them.

Reported-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Baruch Siach <baruch@tkos.co.il>
5 years agoefi_selftest: incorrect use of bitwise or
Heinrich Schuchardt [Sun, 25 Nov 2018 14:21:40 +0000 (15:21 +0100)]
efi_selftest: incorrect use of bitwise or

We should use a logical or when combining logical values.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
5 years agosandbox: smbios: Update to support sandbox
Simon Glass [Thu, 22 Nov 2018 20:46:37 +0000 (13:46 -0700)]
sandbox: smbios: Update to support sandbox

At present this code casts addresses to pointers so cannot be used with
sandbox. Update it to use mapmem instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
5 years agoRevert "efi_loader: remove efi_exit_caches()"
Alexander Graf [Thu, 15 Nov 2018 20:23:47 +0000 (21:23 +0100)]
Revert "efi_loader: remove efi_exit_caches()"

This reverts commit 3170db63c41a2eda6ee6573353bb4de8c7c1b9d5.

It reportedly breaks OpenBSD/armv7 booting and I've already received
complaints from people that it breaks some Linux armv7 systems as well.

We'll have to give this whole caching story a good bit more thought.

Reported-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
5 years agoefi_loader: use u16* for UTF16 strings
Heinrich Schuchardt [Mon, 5 Nov 2018 19:22:12 +0000 (20:22 +0100)]
efi_loader: use u16* for UTF16 strings

We should be consistent in the types that we use to store Unicode strings.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
5 years agoefi_loader: SetVirtualAddressMap() should return EFI_UNSUPPORTED
AKASHI Takahiro [Wed, 14 Nov 2018 07:18:07 +0000 (16:18 +0900)]
efi_loader: SetVirtualAddressMap() should return EFI_UNSUPPORTED

See UEFI specification 2.7, section 8.4.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
5 years agoefi_loader: correct a function prototype of QueryCapsuleCapabilities()
AKASHI Takahiro [Wed, 14 Nov 2018 07:18:53 +0000 (16:18 +0900)]
efi_loader: correct a function prototype of QueryCapsuleCapabilities()

See UEFI specification v2.7, section 8.5.3.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>