Phil Edworthy [Fri, 9 Dec 2016 10:46:02 +0000 (10:46 +0000)]
net: phy: ti: Fix dp83867 RGMII_TXID interface path
There is code that is specifically for RGMII_TXID interface, but this
will never get used because the code checks that the RGMII interface
is RGMII_ID to RGMII_RXID; RGMII_TXID is after this.
To fix this and avoid similar problems in the future, use the
phy_interface_is_rgmii helper function.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
oliver@schinagl.nl [Fri, 25 Nov 2016 15:30:32 +0000 (16:30 +0100)]
tools: Add tool to add crc8 to a mac address
This patch adds a little tool that takes a generic MAC address and
generates a CRC byte for it. The output is the full MAC address without
any separators, ready written into an EEPROM.
Signed-off-by: Olliver Schinagl <o.schinagl@ultimaker.com>
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
oliver@schinagl.nl [Fri, 25 Nov 2016 15:30:31 +0000 (16:30 +0100)]
tools: Allow crc8 to be used
This patch enables crc8 to be used from within the tools directory using
u-boot/crc.h.
Signed-off-by: Olliver Schinagl <o.schinagl@ultimaker.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
oliver@schinagl.nl [Fri, 25 Nov 2016 15:30:23 +0000 (16:30 +0100)]
net: core: cosmetic: A MAC address is not limited to SROM
Currently, we print that the MAC from the SROM does not match. It can be
many forms of ROM, so lets drop the S.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
oliver@schinagl.nl [Fri, 25 Nov 2016 15:30:21 +0000 (16:30 +0100)]
net: cosmetic: Define ethernet name length
There are various places where the ethernet device name is defined to
several different sizes. Lets add a define and start using it.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
oliver@schinagl.nl [Fri, 25 Nov 2016 15:30:20 +0000 (16:30 +0100)]
net: cosmetic: Make the MAC address string less magical
In u-boot printf has been extended with the %pM formatter to allow
printing of MAC addresses. However buffers that want to store a MAC
address cannot safely get the size. Add a define for this case so the
string of a MAC address can be reliably obtained.
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
oliver@schinagl.nl [Fri, 25 Nov 2016 15:30:19 +0000 (16:30 +0100)]
net: cosmetic: Do not use magic values for ARP_HLEN
Commit
674bb249825a ("net: cosmetic: Replace magic numbers in arp.c with
constants") introduced a nice define to replace the magic value 6 for
the ethernet hardware address. Replace more hardcoded instances of 6
which really reference the ARP_HLEN (iow the MAC/Hardware/Ethernet
address).
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Wenyou Yang [Wed, 2 Nov 2016 02:06:57 +0000 (10:06 +0800)]
net: macb: Remove redundant #ifdef CONFIG_DM_ETH
Remove the redundant #ifdef CONFIG_DM_ETH/#endif.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Wenyou Yang [Wed, 2 Nov 2016 02:06:56 +0000 (10:06 +0800)]
net: macb: Add the clock support
Due to introducing the at91 clock driver, add the clock support.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Wenyou Yang [Wed, 2 Nov 2016 02:06:55 +0000 (10:06 +0800)]
net: Kconfig: Add CONFIG_MACB option
Add CONFIG_MACB option in KConfig to be used to select the Cadence
MACB Ethernet driver.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Tom Rini [Sat, 4 Feb 2017 01:33:42 +0000 (20:33 -0500)]
Merge git://git.denx.de/u-boot-fsl-qoriq
Signed-off-by: Tom Rini <trini@konsulko.com>
Conflicts:
configs/ls1046aqds_defconfig
configs/ls1046aqds_nand_defconfig
configs/ls1046aqds_qspi_defconfig
configs/ls1046aqds_sdcard_ifc_defconfig
configs/ls1046aqds_sdcard_qspi_defconfig
configs/ls1046ardb_emmc_defconfig
configs/ls1046ardb_qspi_defconfig
configs/ls1046ardb_sdcard_defconfig
Prabhakar Kushwaha [Thu, 2 Feb 2017 09:32:00 +0000 (15:02 +0530)]
arch: powerpc: update the eLBC IP input clock
eLBC IP clock is always a constant divisor of platform clock
pre-defined per SoC. Clock ratio register (LCRR) used in
current implementation governs eLBC IP output cloc.
Update sys_info->freq_localbus to represent eLBC input clock with
value constant divisor of platform clock.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Prabhakar Kushwaha [Thu, 2 Feb 2017 09:31:48 +0000 (15:01 +0530)]
arch: powerpc: Move CONFIG_FSL_ELBC to Kconfig
Enable ELBC from Kconfig.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Prabhakar Kushwaha [Thu, 2 Feb 2017 09:31:37 +0000 (15:01 +0530)]
arch: arm: update the IFC IP input clock
IFC IP clock is always a constant divisor of platform clock
pre-defined per SoC. Clock control register (CCR) used in
current implementation governs IFC IP output clock.
Update sys_info->freq_localbus to represent IFC input clock with
value constant divisor of platform clock.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Prabhakar Kushwaha [Thu, 2 Feb 2017 09:31:26 +0000 (15:01 +0530)]
arch: powerpc: update the IFC IP input clock
IFC IP clock is always a constant divisor of platform clock
pre-defined per SoC. Clock control register (CCR) used in
current implementation governs IFC IP output clock.
Update sys_info->freq_localbus to represent IFC input clock with
value constant divisor of platform clock.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Prabhakar Kushwaha [Thu, 2 Feb 2017 09:31:13 +0000 (15:01 +0530)]
arch: powerpc: Move CONFIG_FSL_IFC to Kconfig
Enable IFC from Kconfig.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Prabhakar Kushwaha [Mon, 30 Jan 2017 11:35:35 +0000 (17:05 +0530)]
armv8: ls1012a: Add support of PPA
The PPA implements PSCI which requires for power managment.
Added support of PPA for LS1012AQDS, LS1012ARDB and LS1012AFRDM.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Prabhakar Kushwaha [Mon, 30 Jan 2017 11:35:22 +0000 (17:05 +0530)]
board: freescale: ls1012a: Enable secure DDR on LS1012A platforms
PPA binary needs to be relocated on secure DDR, hence marking out
a portion of DDR as secure if CONFIG_SYS_MEM_RESERVE_SECURE flag
is set
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Tom Rini [Wed, 1 Feb 2017 21:34:36 +0000 (16:34 -0500)]
Merge git://git.denx.de/u-boot-mpc85xx
Tom Rini [Wed, 1 Feb 2017 21:34:25 +0000 (16:34 -0500)]
Merge branch 'master' of git://denx.de/git/u-boot-imx
Mark Marshall [Tue, 24 Jan 2017 12:47:31 +0000 (13:47 +0100)]
powerpc: mpc5200: Correct return value of memcpy function
The memcpy() function returns a pointer to trg.
Signed-off-by: Mark Marshall <Mark.Marshall@omicron.at>
Reviewed-by: Thomas Graziadei <thomas.graziadei@omicronenergy.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: York Sun <york.sun@nxp.com>
Tom Rini [Wed, 1 Feb 2017 11:57:35 +0000 (06:57 -0500)]
Merge git://www.denx.de/git/u-boot-marvell
Mario Six [Wed, 11 Jan 2017 15:01:00 +0000 (16:01 +0100)]
arm: mvebu: Implement secure boot
The patch implements secure booting for the mvebu architecture.
This includes:
- The addition of secure headers and all needed signatures and keys in
mkimage
- Commands capable of writing the board's efuses to both write the
needed cryptographic data and enable the secure booting mechanism
- The creation of convenience text files containing the necessary
commands to write the efuses
The KAK and CSK keys are expected to reside in the files kwb_kak.key and
kwb_csk.key (OpenSSL 2048 bit private keys) in the top-level directory.
Signed-off-by: Reinhard Pfau <reinhard.pfau@gdsys.cc>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
Mario Six [Wed, 11 Jan 2017 15:00:59 +0000 (16:00 +0100)]
tools: kwbimage: Refactor line parsing and fix error
The function image_create_config_parse_oneline is pretty complex, and
since more parameters will be added to support secure booting, we
refactor the function to make it more readable.
Also, when a line contained just a keyword without any parameters,
strtok_r returned NULL, which was then indiscriminately fed into atoi,
causing a segfault. To correct this, we add a NULL check before feeding
the extracted token to atoi, and print an error message in case the
token is NULL.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Mario Six [Wed, 11 Jan 2017 15:00:58 +0000 (16:00 +0100)]
tools: kwbimage: Factor out add_binary_header_v1
In preparation of adding the creation of secure headers, we factor the
add_binary_header_v1 function out of the image_create_v1 function.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Mario Six [Wed, 11 Jan 2017 15:00:57 +0000 (16:00 +0100)]
tools: kwbimage: Remove unused parameter
The parameter 'params' of the image_headersz_v1 function is never used
by the function.
Hence, remove it.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Mario Six [Wed, 11 Jan 2017 15:00:56 +0000 (16:00 +0100)]
tools: kwbimage: Reduce scope of variables
This patch reduces the scope of some variables.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Mario Six [Wed, 11 Jan 2017 15:00:55 +0000 (16:00 +0100)]
tools: kwbimage: Fix arithmetic with void pointers
Arithmetic with void pointers, e.g. a - b where both a and b are void
pointers, is undefined in the C standard. Since we are operating with
byte data here, we switch the void pointers to uint8_t pointers, and add
the necessary casts.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Mario Six [Wed, 11 Jan 2017 15:00:54 +0000 (16:00 +0100)]
tools: kwbimage: Fix style violations
Fix some style violations:
- nine instances of missing blank lines after declarations
- one overly long line
- one split string (which also rewords an error message more concisely)
- two superfluous else
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Mario Six [Wed, 11 Jan 2017 15:00:53 +0000 (16:00 +0100)]
tools: kwbimage: Fix dest addr
To enable secure boot, we need to jump back into the BootROM to continue
the SoC's boot process instead of letting the SPL load and run the main
U-Boot image.
But, since the u-boot-spl.img (including the 64 byte header) is loaded
by the SoC as the main image, we need to compensate for the header
length to get a correct entry point.
Thus, we subtract the header size from the destination address, so that
the execution address points at the actual entry point of the image.
The current boards ignore both parameters anyway, so this change shouldn't
concern them.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Mario Six [Wed, 11 Jan 2017 15:00:50 +0000 (16:00 +0100)]
lib: tpm: Add command to flush resources
This patch adds a function to the TPM library, which allows U-Boot to
flush resources, e.g. keys, from the TPM.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
Reinhard Pfau [Wed, 11 Jan 2017 15:00:48 +0000 (16:00 +0100)]
arm: mvebu: spl.c: Remove useless gd declaration
ddaa905 ("arm: mvebu: Add DM (driver model) support") removed the
assignment of the gd pointer, but kept the (now superfluous) declaration
of the gd pointer.
Remove this declaration.
Signed-off-by: Reinhard Pfau <pfau@gdsys.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Mario Six [Wed, 11 Jan 2017 15:00:47 +0000 (16:00 +0100)]
mvebu: Add board_pex_config()
Allow boards to do some initialization when PCIe comes up.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Dirk Eibach [Wed, 11 Jan 2017 15:00:46 +0000 (16:00 +0100)]
net: phy: Support Marvell
88E1680
Add support for Marvell
88E1680 Integrated Octal
10/100/1000 Mbps Energy Efficient Ethernet Transceiver.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Dirk Eibach [Wed, 11 Jan 2017 15:00:45 +0000 (16:00 +0100)]
pci: mvebu: Fix Armada 38x support
Armada 38x has four PCI ports, not three.
The optimization in pci_init_board() seems to assume that every port has
three lanes. This is obviously wrong, and breaks support for Armada 38x.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Thu, 12 Jan 2017 15:37:49 +0000 (16:37 +0100)]
phy: comphy_a3700: Change SD/MMC compatible DT node to match the updates
Now that the SD/SDIO/MMC DT properties are updated in the Marvell
A3700 and A7/8k DT files, we need to match the checks for compatible
node in the PHY driver as well.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Mark Marshall [Tue, 24 Jan 2017 14:40:23 +0000 (15:40 +0100)]
powerpc: mpc85xx: Use symbolic names for cache control bits
We should use the symbolic names for the cache control bits.
Signed-off-by: Mark Marshall <Mark.Marshall@omicron.at>
Reviewed-by: Thomas Graziadei <thomas.graziadei@omicronenergy.com>
Reviewed-by: York Sun <york.sun@nxp.com>
mario.six@gdsys.cc [Tue, 17 Jan 2017 07:33:48 +0000 (08:33 +0100)]
powerpc: mpc83xx: Enable pre-relocation malloc
To enable DM on MPC83xx, we need pre-relocation malloc, which is
implemented in this patch.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
[York S: Fixed compiling warning for unused variable 'i']
Reviewed-by: York Sun <york.sun@nxp.com>
mario.six@gdsys.cc [Tue, 17 Jan 2017 07:33:47 +0000 (08:33 +0100)]
powerpc: mpc83xx: Minimize r1 modification
The r1 register is modified several times during the cache-ram setup of
the MPC83xx SoCs.
Since this SP modification confuses debuggers, we use a general purpose
register to compute the new stack pointer value, and only set the SP
once after all computations are done.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Joakim Tjernlund <Joakim.Tjernlund@infinera.com>
Reviewed-by: York Sun <york.sun@nxp.com>
York Sun [Fri, 27 Jan 2017 17:57:31 +0000 (09:57 -0800)]
armv8: ls1046a: Enable workaround for erratum A-008336
Erratum A-008336 applies to LS1046A per latest SoC document.
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Shengzhou Liu <Shengzhou.Liu@nxp.com>
York Sun [Wed, 25 Jan 2017 21:26:50 +0000 (13:26 -0800)]
armv7: ls1021aqds: Set cpo_sample for erratum A-009942
Set cpo_sample as suggested by the driver
"WARN: pls set popts->cpo_sample = 0x58 in <board>/ddr.c to optimize
cpo".
Signed-off-by: York Sun <york.sun@nxp.com>
CC: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Bogdan Purcareata [Wed, 11 Jan 2017 15:58:36 +0000 (15:58 +0000)]
drivers: net: fsl-mc: Fixup MAC addresses in DPC
Fixup port_mac_address property in MC DPC with values from the u-boot
environment. Since u-boot already reads the environment MAC addresses
when probing the PHYs, use these values.
The u-boot environment MAC addresses take precedence over any eventual
ones defined in the DPC, except for the case where they are randomly
assigned (no u-boot env value declared for port).
The patch assumes the "/board_info/ports/" node is present in the DPC.
Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
[York S: Fix several indentations]
Reviewed-by: York Sun <york.sun@nxp.com>
Masahiro Yamada [Mon, 30 Jan 2017 10:46:55 +0000 (19:46 +0900)]
mmc: atmel: rename CONFIG_ATMEL_SDHCI to CONFIG_MMC_SDHCI_ATMEL
Make the naming scheme consistent; all SDHCI-base drivers prefixed
with CONFIG_MMC_SDHCI_.
While we are here, add "depends on ARCH_AT91".
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Mon, 30 Jan 2017 10:46:54 +0000 (19:46 +0900)]
mmc: pic32: rename CONFIG_PIC32_SDHCI to CONFIG_MMC_SDHCI_PIC32
Make the naming scheme consistent; all SDHCI-base drivers prefixed
with CONFIG_MMC_SDHCI_.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Mon, 30 Jan 2017 10:46:53 +0000 (19:46 +0900)]
mmc: msm: rename CONFIG_MSM_SDHCI to CONFIG_MMC_SDHCI_MSM
Make the naming scheme consistent; all SDHCI-base drivers prefixed
with CONFIG_MMC_SDHCI_.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Mon, 30 Jan 2017 10:46:52 +0000 (19:46 +0900)]
mmc: rockchip: rename CONFIG_ROCKCHIP_SDHCI to CONFIG_MMC_SDHCI_ROCKCHIP
Make the naming scheme consistent; all SDHCI-base drivers prefixed
with CONFIG_MMC_SDHCI_.
While we are here, add "depends on ARCH_ROCKCHIP".
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Mon, 30 Jan 2017 10:46:51 +0000 (19:46 +0900)]
mmc: zynq: rename CONFIG_ZYNQ_SDHCI to CONFIG_MMC_SDHCI_ZYNQ
Make the naming scheme consistent; all SDHCI-base drivers prefixed
with CONFIG_MMC_SDHCI_.
While we are here, add "depends on ARCH_ZYNQ || ARCH_ZYNQMP".
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Mon, 30 Jan 2017 10:46:50 +0000 (19:46 +0900)]
mmc: sandbox: rename CONFIG, fix dependency, and use it in Makefile
[1] Rename CONFIG_SANDBOX_MMC to CONFIG_MMC_SANDBOX for consistency
I want all MMC driver options prefixed with CONFIG_MMC_.
[2] Fix dependency
Add necessary depends on to avoid compile error.
Instead "depends on MMC" is unneeded because this config entry
resides inside of "if MMC".
[3] Currently, this config symbol is not referenced at all.
Use it to enable/disable the driver in Makefile.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Mon, 30 Jan 2017 10:46:49 +0000 (19:46 +0900)]
mmc: move CONFIG_GENERIC_MMC to Kconfig
Now, CONFIG_GENERIC_MMC seems equivalent to CONFIG_MMC.
Let's create an entry for "config GENERIC_MMC" with "default MMC",
then convert all macro defines in headers to Kconfig. Almost all
of the defines will go away.
I see only two exceptions:
configs/blanche_defconfig
configs/sandbox_noblk_defconfig
They define CONFIG_GENERIC_MMC, but not CONFIG_MMC. Something
might be wrong with these two boards, so should be checked later.
Anyway, this is the output of the moveconfig tool.
This commit was created as follows:
[1] create a config entry in drivers/mmc/Kconfig
[2] tools/moveconfig.py -r HEAD GENERIC_MMC
[3] manual clean-up of garbage comments in doc/README.* and
include/configs/*.h
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 31 Jan 2017 00:05:23 +0000 (19:05 -0500)]
Prepare v2017.03-rc1
Signed-off-by: Tom Rini <trini@konsulko.com>
Lukasz Majewski [Fri, 27 Jan 2017 22:16:29 +0000 (23:16 +0100)]
BOARD: MCCMON6: Provide support for iMX6q based mccmon6 board
This patch provides u-boot support for Liebherr (LWN) mccmon6 board.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Patrick Bruenn [Mon, 23 Jan 2017 14:11:27 +0000 (15:11 +0100)]
arm: dts: imx53-cx9020: fix packetloss on fec_mxc
The pinmuxing for i.MX53 FEC ethernet copied from
<kernel>/arch/arm/boot/dts/imx53-qsb-common.dtsi (at least until v4.9)
was bad. It is different from the manual pinmuxing in
<u-boot>/board/freescale/mx53loco/mx53loco.c which was used in
cx9020 implementation previously before mainlining into u-boot.
It seems the bug in imx53-qsb kernel device tree is hidden for so long,
because it was never used, by the kernel driver.
Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
Tom Rini [Sun, 29 Jan 2017 13:01:06 +0000 (08:01 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-uniphier
- Fix clk driver
- Optimize DRAM init code for LD20 SoC
- Get DRAM information from more reliable source
- Clean up SoC init code
- Allow to use Image.gz for booting ARM64 Linux
- Tidy up environments to use with ATF
- Clean up I2C drivers
Masahiro Yamada [Fri, 27 Jan 2017 21:53:56 +0000 (06:53 +0900)]
i2c: uniphier-f: use readl_poll_timeout() to poll registers
The readl_poll_timeout() is a useful helper to poll registers
and error out if the condition is not met.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:55 +0000 (06:53 +0900)]
i2c: uniphier(-f): remove unneeded #include <dm/root.h>
This include is unnecessary for low-level drivers.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:54 +0000 (06:53 +0900)]
ARM: uniphier: make update commands more flexible for ATF
Currently, SPL (u-boot-spl.bin) and U-Boot (u-boot.bin) are stored
in non-volatile devices, and some environments are defined to update
the images easily.
When ARM Trusted Firmware is fully used, SPL is not used. U-Boot
proper is contained as BL33 into FIP (Firmware Image Package), which
is standard container used by ATF. Allow to use it.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:53 +0000 (06:53 +0900)]
ARM: uniphier: change CONFIG_SPL_PAD_TO to 128KB
The Boot ROM supports authentication feature to prevent malformed
software from being run on products. The signature is added at the
tail of the second stage loader (= SPL in U-boot terminology).
The size of the second stage loader was 64KB, and it was consistent
across SoCs. The situation changed when LD20 SoC appeared; it loads
80KB second stage loader, and it is the only exception.
Currently, CONFIG_SPL_PAD_TO is set to 64KB and U-Boot proper is
loaded from the 64KB offset of non-volatile devices. This means the
signature of LD20 SoC (located at 80KB offset) corrupts the U-Boot
proper image.
Let's move the U-Boot proper image to 128KB offset. It uses 48KB
for nothing but padding, and we could actually locate the U-Boot
proper at 80KB offset. However, the power of 2 generally seems a
better choice for the offset address.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:52 +0000 (06:53 +0900)]
ARM: uniphier: change the offset to environment storage area
When ARM Trusted Firmware is used, bl1.bin + fip.bin exceeds 512KB,
so the boot image and the current environment area will overlap.
Move the environment storage to 1MB offset.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:51 +0000 (06:53 +0900)]
ARM: uniphier: set initrd_high environment to skip initrd relocation
The boot_ramdisk_high() checks the environment "initrd_high" and,
if it is set to (ulong)-1, skip the initrd relocation. This is
useful for faster booting when we know the initrd is already located
within the reach of the kernel.
Change "norboot" to copy images in order to make it work without
depending on the automatic relocation.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:50 +0000 (06:53 +0900)]
ARM: uniphier: use Image.gz instead Image for booting ARM64 Linux
The ARM64 Linux raw image now amounts to 15MB and it is getting
bigger and bigger. Using Image.gz saves about 8MB. The cost of
unzip is smaller than what we get by saving the kernel loading
from non-volatile devices.
The ARM32 Linux still uses zImage, a self-decompressor image,
so it should not be affected.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:49 +0000 (06:53 +0900)]
ARM: uniphier: collect SPL CONFIG symbols to the bottom of header
For clarification, move CONFIG symbols that affect SPL building
into a single place. Drop #ifdef CONFIG_SPL ... #endif since it is
harmless to define CONFIG_SPL_... during U-Boot proper building.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:48 +0000 (06:53 +0900)]
ARM: uniphier: compile board data only for SPL
Now U-Boot proper need not get the uniphier_boards array. Compile
it only for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:47 +0000 (06:53 +0900)]
ARM: uniphier: refactor cmd_ddrmphy
Make it look like cmd_ddrphy.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:46 +0000 (06:53 +0900)]
ARM: uniphier: clean up UMC init for PXs2 SoC
Just cosmetic changes:
- Rename prefix DMPHY_ to MPHY_ for consistency
- Move UMC parameters below for complete decouple of PHY and UMC
- Remove redundant whitespaces
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:45 +0000 (06:53 +0900)]
ARM: uniphier: refactor cmd_ddrphy
It seems more readable to use arrays to get SoC specific parameters
instead of the crappy switch statement.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:44 +0000 (06:53 +0900)]
ARM: uniphier: use gd->bd->bi_dram for memory reserve on LD20 SoC
For LD20 SoC, the last 64 byte of each DRAM bank is used for the
dynamic training of DRAM PHY. The regions must be reserved in DT to
prevent the kernel from using them. Now gd->bd->bi_dram reflects
the actual memory banks. Just use it instead of getting access to
the board parameters.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:43 +0000 (06:53 +0900)]
ARM: uniphier: detect RAM size by decoding HW register instead of DT
U-Boot needs to set up available memory area(s) in dram_init() and
dram_init_banksize(). It is platform-dependent how to detect the
memory banks. Currently, UniPhier adopts the memory banks _alleged_
by DT. This is based on the assumption that users bind a correct DT
in their build process.
Come to think of it, the DRAM controller has already been set up
before U-Boot is entered (because U-Boot runs on DRAM). So, the
DRAM controller setup register seems a more reliable source of any
information about DRAM stuff. The DRAM banks are initialized by
preliminary firmware (SPL, ARM Trusted Firmware BL2, or whatever),
so this means the source of the reliability is shifted from Device
Tree to such early-stage firmware. However, if the DRAM controller
is wrongly configured, the system will crash. If your system is
running, the DRAM setup register is very likely to provide the
correct DRAM mapping.
Decode the SG_MEMCONF register to get the available DRAM banks.
The dram_init() and dram_init_banksize() need similar decoding.
It would be nice if dram_init_banksize() could reuse the outcome
of dram_init(), but global variables are unavailable at this stage
because the .bss section is available only after the relocation.
As a result, SG_MEMCONF must be checked twice, but a new helper
uniphier_memconf_decode() will help to avoid code duplication.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:42 +0000 (06:53 +0900)]
ARM: uniphier: shrink arrays of DDR-PHY parameters for LD20 SoC
The two arrays ddrphy_{op,ip}_dq_shift_val, occupy more than 3.8 KB
memory footprint, which is significant in SPL.
There are PHY parameters for 5 boards, but they are actually not
board specific, but SoC specific. After all, we just need to have
2 patterns, for LD20 and LD21. Also, the shift values are small
enough to become "short" type instead of "int". This change will
save about 3 KB memory footprint.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 27 Jan 2017 21:53:41 +0000 (06:53 +0900)]
clk: uniphier: fix compatible strings for Pro5, PXs2, LD20 SD clock
I missed to update them when DT files were resynced with Linux.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Scott Wood [Thu, 26 Jan 2017 22:55:44 +0000 (16:55 -0600)]
booti: Set images.os.arch
Commit
ec6617c39741adc6c549 ("armv8: Support loading 32-bit OS in AArch32
execution state") broke SMP boot by assuming that an image is 32-bit if
the arch field in the spin table != IH_ARCH_DEFAULT (i.e.
IH_ARCH_ARM64), even if the arch field also does not match IH_ARCH_ARM,
even though nothing actually set the arch field in the spin table.
Commit
e2c18e40b111470f ("armv8: fsl-layerscape: SMP support for loading
32-bit OS") fixed this for bootm by setting the arch field of the spin
table based on images.os.arch, but booti remaineed broken because it did
not set images.os.arch.
Fixes:
ec6617c39741adc6c549 ("armv8: Support loading 32-bit OS in AArch32 execution state")
Fixes:
e2c18e40b111 ("armv8: fsl-layerscape: SMP support for loading 32-bit OS")
Cc: Alison Wang <alison.wang@nxp.com>
Cc: Chenhui Zhao <chenhui.zhao@nxp.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Stuart Yoder <stuart.yoder@nxp.com>
Signed-off-by: Scott Wood <oss@buserror.net>
Reviewed-by: Tom Rini <trini@konsulko.com>
Stefan Brüns [Thu, 26 Jan 2017 20:22:36 +0000 (20:22 +0000)]
fs/fat: Fix unaligned __u16 reads for FAT12 access
Doing unaligned reads is not supported on all architectures, use
byte sized reads of the little endian buffer.
Rename off16 to off8, as it reflects the buffer offset in byte
granularity (offset is in entry, i.e. 12 bit, granularity).
Fix a regression introduced in
8d48c92b45aea91e2a2be90f2ed93677e85526f1
Reported-by: Oleksandr Tymoshenko <gonzo@bluezbox.com>
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Tested-by: Oleksandr Tymoshenko <gonzo@bluezbox.com>
Alexey Brodkin [Thu, 26 Jan 2017 14:25:59 +0000 (17:25 +0300)]
buildman: Update link to the most recent prebuilt ARC toolachin
To troubleshoot unexpected bhavior during building and what's more
important during execution it is strongly recommended to use recent
ARC toolchain, and so we're now referring to arc-2016.09 which is the
latest as of today.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Michael Kurz [Sun, 22 Jan 2017 15:04:30 +0000 (16:04 +0100)]
ARM: SPI: stm32: add stm32f746 qspi driver
This patch adds support for the QSPI IP found in stm32f7 devices.
Signed-off-by: Michael Kurz <michi.kurz@gmail.com>
Michael Kurz [Sun, 22 Jan 2017 15:04:29 +0000 (16:04 +0100)]
ARM: stm32: enable support for smsc phy on stm32f746-disco board
This patch enables support for the smsc phy on the
stm32f746-disco board.
Signed-off-by: Michael Kurz <michi.kurz@gmail.com>
Acked-by: Vikas MANOCHA <vikas.manocha@st.com>
Series-changes 3:
- Add Acked-by tag to 'enable support for smsc phy on...'
Michael Kurz [Sun, 22 Jan 2017 15:04:28 +0000 (16:04 +0100)]
net: phy: add SMSC LAN8742 phy
This patch adds support for SMSC LAN8742 in phylib
Signed-off-by: Michael Kurz <michi.kurz@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Michael Kurz [Sun, 22 Jan 2017 15:04:27 +0000 (16:04 +0100)]
net: stm32: add designware mac glue code for stm32
This patch adds glue code required for enabling the designware
mac on stm32f7 devices.
Signed-off-by: Michael Kurz <michi.kurz@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Michael Kurz [Sun, 22 Jan 2017 15:04:26 +0000 (16:04 +0100)]
ARM: stm32: use clock setup function defined in clock.c
Use the clock setup function defined in clock.c instead of setting the
clock bits directly in the drivers.
Remove register definitions of RCC in rcc.h as these are already
defined in the struct in stm32.h
Signed-off-by: Michael Kurz <michi.kurz@gmail.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
Michael Kurz [Sun, 22 Jan 2017 15:04:25 +0000 (16:04 +0100)]
ARM: stm32: fix stm32f7 sdram fmc base address
The fmc base address is defined twice, once in fmc.h and once in stm32.h.
Fix wrong definition in stm32.h.
Remove the definiton in fmc.h.
Signed-off-by: Michael Kurz <michi.kurz@gmail.com>
Acked-by: Vikas Manocha <vikas.manocha@st.com>
Michael Kurz [Sun, 22 Jan 2017 15:04:24 +0000 (16:04 +0100)]
ARM: stm32: cleanup stm32f7 files
Cleanup stm32f7 files:
- use BIT macro
- use GENMASK macro
- use rcc struct instead of macro additions
Add missing stm32f7 register in rcc struct
Signed-off-by: Michael Kurz <michi.kurz@gmail.com>
Acked-by: Vikas MANOCHA<vikas.manocha@st.com>
Michael Kurz [Sun, 22 Jan 2017 15:04:23 +0000 (16:04 +0100)]
ARM: DTS: stm32: add stm32f746-disco device tree files
This patch adds the DTS source files needed for stm32f746-disco board
The files are based on the stm32f429/469 files from current linux
kernel.
Source for "arch/arm/dts/armv7-m.dtsi": Linux: "arch/arm/boot/dts/armv7-m.dtsi"
Signed-off-by: Michael Kurz <michi.kurz@gmail.com>
Acked-by: Vikas MANOCHA <vikas.manocha@st.com>
Michael Kurz [Sun, 22 Jan 2017 15:04:22 +0000 (16:04 +0100)]
ARM: DTS: stm32: add stm32f746 device tree pin control files
This patch adds pin control definitions for use in device tree files
The definitions are based on the stm32f746 files from current
linux kernel "include/dt-bindings/pinctrl/stm32f746-pinfunc.h".
Signed-off-by: Michael Kurz <michi.kurz@gmail.com>
Acked-by: Vikas MANOCHA <vikas.manocha@st.com>
Adam Ford [Fri, 20 Jan 2017 13:03:52 +0000 (14:03 +0100)]
arm: omap3: Update cpuinfo for DM3730, DM3725, AM3715, and AM3703
The check for OMAP3630/3730 only checks for 800MHz 3630/3730, but
anything else is lumped into 36XX/37XX with an assumed 1GHz speed.
Based on the DM3730 TRM bit 9 shows the MPU Frequency (800MHz/1GHZ).
This also adds the ability to distinguish between the DM3730, DM3725,
AM3715, and AM3703 and correctly display their maximum speed.
Signed-off-by: Adam Ford <aford173@gmail.com>
Tested-by: Ladislav Michl <ladis@linux-mips.org>
Ladislav Michl [Fri, 20 Jan 2017 13:03:15 +0000 (14:03 +0100)]
arm: omap3: Fix cpuinfo frequency spelling
Frequency is measured in Hz.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Masahiro Yamada [Fri, 20 Jan 2017 09:30:58 +0000 (18:30 +0900)]
Revert "armv8: release slave cores from CPU_RELEASE_ADDR"
This reverts commit
8c36e99f211104fd7dcbf0669a35a47ce5e154f5.
There is misunderstanding in commit
8c36e99f2111 ("armv8: release
slave cores from CPU_RELEASE_ADDR"). How to bring the slave cores
into U-Boot proper is platform-specific. So, it should be cared
in SoC/board files instead of common/spl/spl.c. As you see SPL
is the acronym of Secondary Program Loader, there is generally
something that runs before SPL (the First one is usually Boot ROM).
How to wake up slave cores from the Boot ROM is really SoC specific.
So, the intention for the spin table support is to bring the slave
cores into U-Boot proper in an SoC specific manner. (this must be
done after relocation. see below.)
If you bring the slaves into SPL, it is SoC own code responsibility
to transfer them to U-Boot proper. The Spin Table defines the
interface between a boot-loader and Linux kernel. It is unrelated
to the interface between SPL and U-Boot proper.
One more thing is missing in the commit; spl_image->entry_point
points to the entry address of U-Boot *before* relocation. U-Boot
relocates itself between board_init_f() and board_init_r(). This
means the master CPU sees the different copy of the spin code than
the slave CPUs enter. The spin_table_update_dt() protects the code
*after* relocation. As a result, the slave CPUs spin in unprotected
code, which leads to unstable behavior.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Fri, 20 Jan 2017 09:04:43 +0000 (18:04 +0900)]
arm64: spin-table: add more information in Kconfig help
This feature seems to be sometimes misunderstood. The intention is:
[1] Bring the slaves into the U-Boot proper image, not SPL (unless
you have a special reason to do otherwise).
[2] The operation must be done in a board (SoC) specific manner
since how to wake the slaves from the Boot ROM is SoC specific.
[3] The slaves must enter U-Boot proper after U-Boot relocates
itself because the "cpu-release-addr" property points to the
relocated memory area.
[2] is already explained in the help. We can make [1] even clearer
by mentioning "U-Boot proper" instead of "U-Boot". [3] is missing,
so I am adding it to the list. Instead, "before the master CPU
jumps to the kernel" is a matter of course, so removed.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Marcin Niestroj [Wed, 25 Jan 2017 08:53:08 +0000 (09:53 +0100)]
board/chiliboard: Add support for chiliBoard
chiliBoard is a development board which uses chiliSOM as its base.
Hardware specification:
* chiliSOM (TI AM335x, DRAM, NAND)
* Ethernet PHY (id 0)
* USB host (usb1)
* MicroSD slot (mmc0)
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Marcin Niestroj [Wed, 25 Jan 2017 08:53:07 +0000 (09:53 +0100)]
ARM: am335x: Add support for chiliSOM
chiliSOM is a System On Module (http://http://grinn-global.com/chilisom/).
It can't exists on its own, but will be used as part of other boards.
Hardware specification:
* TI AM335x processor
* 128M, 256M or 512M DDR3 memory
* up to 256M NAND
We place source inside arch/arm/mach-omap2/ directory and make it
possible to reuse initialization code (i.e. DDR, NAND init) for all
boards that use it.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Andrew F. Davis [Fri, 27 Jan 2017 16:39:20 +0000 (10:39 -0600)]
defconfig: Add a config for AM335x High Security EVM
Add a new defconfig file for the AM335x High Security EVM. This config
is specific for the case of memory device booting. Memory device booting
is handled separatly from peripheral booting on HS devices as the load
address changes.
This defconfig is the same as for the non-secure part, except for:
CONFIG_TI_SECURE_DEVICE option set to 'y'
CONFIG_ISW_ENTRY_ADDR updated for secure images.
CONFIG_FIT_IMAGE_POST_PROCESS option set to 'y'
CONFIG_SPL_FIT_IMAGE_POST_PROCESS option set to 'y'
CONFIG_USE_TINY_PRINTF option set to 'y' to reduce SPL size
CONFIG_SPL_SYS_MALLOC_SIMPLE set to 'y' to reduce SPL size
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Andrew F. Davis [Fri, 27 Jan 2017 16:39:19 +0000 (10:39 -0600)]
spl: Remove overwrite of relocated malloc limit
spl_init on some boards is called after stack and heap relocation, on
some platforms spl_relocate_stack_gd is called to handle setting the
limit to its value CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN when simple
SPL malloc is enabled during relocation. spl_init should then not
re-assign the old pre-relocation limit when this is defined.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Andrew F. Davis [Fri, 27 Jan 2017 16:39:18 +0000 (10:39 -0600)]
malloc_simple: Add debug statements to memalign_simple
Add debug statements to memalign_simple to match malloc_simple.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
maxims@google.com [Wed, 18 Jan 2017 21:44:58 +0000 (13:44 -0800)]
aspeed: Support for ast2500 Eval Board
ast2500 Eval Board device tree and board specific configuration.
Reviewed-by: Simon Glass <sjg@chromium.org>
maxims@google.com [Wed, 18 Jan 2017 21:44:57 +0000 (13:44 -0800)]
aspeed: Board init functions and common configs for ast2500 based boards
Add configuration file with parameters that are very likely to be shared by
all ast2500-based boards.
Add ast2500-board.c file with the init code that is very likely to be
shared by all ast2500-based boards.
Reviewed-by: Simon Glass <sjg@chromium.org>
maxims@google.com [Wed, 18 Jan 2017 21:44:56 +0000 (13:44 -0800)]
aspeed: Add basic ast2500-specific drivers and configuration
Clock Driver
This driver is ast2500-specific and is not compatible with earlier
versions of this chip. The differences are not that big, but they are
in somewhat random places, so making it compatible with ast2400 is not
worth the effort at the moment.
SDRAM MC driver
The driver is very ast2500-specific and is completely incompatible
with previous versions of the chip.
The memory controller is very poorly documented by Aspeed in the
datasheet, with any mention of the whole range of registers missing. The
initialization procedure has been basically taken from Aspeed SDK, where
it is implemented in assembly. Here it is rewritten in C, with very limited
understanding of what exactly it is doing.
Reviewed-by: Simon Glass <sjg@chromium.org>
maxims@google.com [Wed, 18 Jan 2017 21:44:55 +0000 (13:44 -0800)]
aspeed: Add drivers common to all Aspeed SoCs
Add support for Watchdog Timer, which is compatible with AST2400 and
AST2500 watchdogs. There is no uclass for Watchdog yet, so the driver
does not follow the driver model. It also uses fixed clock, so no clock
driver is needed.
Add support for timer for Aspeed ast2400/ast2500 devices.
The driver actually controls several devices, but because all devices
share the same Control Register, it is somewhat difficult to completely
decouple them. Since only one timer is needed at the moment, this should
be OK. The timer uses fixed clock, so does not rely on a clock driver.
Add sysreset driver, which uses watchdog timer to do resets and particular
watchdog device to use is hardcoded (0)
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Thu, 26 Jan 2017 01:42:38 +0000 (20:42 -0500)]
arm: Note vendor-required status of certain MACH_TYPE values
In the cases of some boards, a MACH_TYPE number is used which is either
not registered upstream or worse (for functionality) is re-using the
number of a different (or reference) platform instead. Make sure we
have a comment in these cases.
Cc: Albert ARIBAUD <albert.aribaud@3adev.fr>
Cc: Walter Schweizer <swwa@users.sourceforge.net>
Cc: Stefan Roese <sr@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Stefan Roese <sr@denx.de>
Tom Rini [Thu, 26 Jan 2017 01:42:37 +0000 (20:42 -0500)]
am335x_shc: Drop MACH_TYPE usage
This board is using MACH_TYPE values that were clearly picked during
development and not registered. Remove rather than support.
Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 26 Jan 2017 01:42:36 +0000 (20:42 -0500)]
arm: Clean up MACH_TYPE_xxx usage after re-sync of mach-types
With the latest mach-types values we have many instances where we no
longer need to define a value and a few cases where the name (but not
value) have changed slightly.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 26 Jan 2017 01:42:35 +0000 (20:42 -0500)]
Revert "arm: Remove unregister MACH_TYPE_xxx uses"
This reverts commit
70b26cd057f42c7126088b49d4285955c8a00eae.
This is not a strict revert as it is easier to fix
board/atmark-techno/armadillo-800eva/armadillo-800eva.c to now the
correct name (same value) than to revert that change too.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 26 Jan 2017 01:42:34 +0000 (20:42 -0500)]
arm: Re-sync with full list of MACH_TYPE_xxx values
This re-syncs us with the official and full list of MACH_TYPE_xxx values
from http://www.armlinux.org.uk/developer/machines/
Signed-off-by: Tom Rini <trini@konsulko.com>
Patrick Delaunay [Fri, 27 Jan 2017 10:00:43 +0000 (11:00 +0100)]
disk: convert CONFIG_PARTITION_TYPE_GUID to Kconfig
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay73@gmail.com>