oweals/u-boot.git
6 years agoPrepare v2018.07-rc3 v2018.07-rc3
Tom Rini [Tue, 3 Jul 2018 03:23:15 +0000 (23:23 -0400)]
Prepare v2018.07-rc3

Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-net
Tom Rini [Mon, 2 Jul 2018 20:11:09 +0000 (16:11 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-net

6 years agoboard/aries: Remove
Tom Rini [Mon, 2 Jul 2018 19:52:50 +0000 (15:52 -0400)]
board/aries: Remove

The various Aries Embedded boards have been orphaned for a year and no
one has come forward to take care of them.  Remove.

Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agoax25: Switch to CONFIG_BOOTP_PREFER_SERVERIP
Alexander Graf [Fri, 15 Jun 2018 08:29:29 +0000 (10:29 +0200)]
ax25: Switch to CONFIG_BOOTP_PREFER_SERVERIP

The ax25-ae350 target currently uses CONFIG_BOOTP_SERVERIP which means we
ignore the DHCP provided TFTP ip address. This breaks every case where we
do now provide a serverip environment variable.

Instead, let's use the new CONFIG_BOOT_PREFER_SERVERIP option to fall back
to the DHCP provided TFTP IP if no serverip environment variable is set.

Signed-off-by: Alexander Graf <agraf@suse.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Rick Chen <rick@andestech.com>
6 years agonet: Add option to prefer bootp/dhcp serverip
Alexander Graf [Fri, 15 Jun 2018 08:29:28 +0000 (10:29 +0200)]
net: Add option to prefer bootp/dhcp serverip

Currently we can choose between 2 different types of behavior for the
serverip variable:

  1) Always overwrite it with the DHCP server IP address (default)
  2) Ignore what the DHCP server says (CONFIG_BOOTP_SERVERIP)

This patch adds a 3rd option:

  3) Use serverip from DHCP if no serverip is given
     (CONFIG_BOOTP_PREFER_SERVERIP)

With this new option, we can have the default case that a boot file gets
loaded from the DHCP provided TFTP server work while allowing users to
specify their own serverip variable to explicitly use a different tftp
server.

Signed-off-by: Alexander Graf <agraf@suse.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agonet: Prefer command line arguments
Alexander Graf [Fri, 15 Jun 2018 08:29:27 +0000 (10:29 +0200)]
net: Prefer command line arguments

We can call commands like dhcp and bootp without arguments or with
explicit command line arguments that really should tell the code where
to look for files instead.

Unfortunately, the current code simply overwrites command line arguments
in the dhcp case with dhcp values.

This patch allows the code to preserve the command line values if they
were set on the command line. That way the semantics are slightly more
intuitive.

The reason this patch does that by introducing a new variable is that we
can not rely on net_boot_file_name[0] being unset, as today it's
completely legal to call "dhcp" and afterwards run "tftp" and expect the
latter to repeat the same query as before. I would prefer not to break
that behavior in case anyone relies on it.

Signed-off-by: Alexander Graf <agraf@suse.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agonet: Add new wol command - Wake on LAN
Lothar Felten [Fri, 22 Jun 2018 20:29:54 +0000 (22:29 +0200)]
net: Add new wol command - Wake on LAN

Add a new command 'wol': Wait for an incoming Wake-on-LAN packet or
time out if no WoL packed is received.
If the WoL packet contains a password, it is saved in the environment
variable 'wolpassword' using the etherwake format (dot or colon
separated decimals).

Intended use case: a networked device should boot an alternate image.
It's attached to a network on a client site, modifying the DHCP server
configuration or setup of a tftp server is not allowed.
After power on the device waits a few seconds for a WoL packet. If a
packet is received, the device boots the alternate image. Otherwise
it boots the default image.

This method is a simple way to interact with a system via network even
if only the MAC address is known. Tools to send WoL packets are
available on all common platforms.

Some Ethernet drivers seem to pad the incoming packet. The additional
padding bytes might be recognized as Wake-on-LAN password bytes.

By default enabled in pengwyn_defconfig.

Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agonet: mvneta: zero Tx descriptors on init
Rabeeh Khoury [Tue, 19 Jun 2018 18:36:51 +0000 (21:36 +0300)]
net: mvneta: zero Tx descriptors on init

Make the initialization sequence consistent with the Linux kernel
driver.

Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
6 years agonet: mvneta: dcache flush TX descriptors at init
Rabeeh Khoury [Tue, 19 Jun 2018 18:36:50 +0000 (21:36 +0300)]
net: mvneta: dcache flush TX descriptors at init

This fixes sporadic timeout on initial packet Tx (usually ARP), with an
error message like:

  timeout: packet not sent

Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
6 years agonet: fastboot: Fix build when FASTBOOT_FLASH is disabled
Alex Kiernan [Fri, 15 Jun 2018 05:06:00 +0000 (05:06 +0000)]
net: fastboot: Fix build when FASTBOOT_FLASH is disabled

When building without FASTBOOT_FLASH we don't include the intermediate
update callback to keep the client alive, so ensure we don't try setting
it here.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agonet: zynq_gem: Initialize val variable in zynq_gem_miiphy_read()
Michal Simek [Thu, 14 Jun 2018 07:08:44 +0000 (09:08 +0200)]
net: zynq_gem: Initialize val variable in zynq_gem_miiphy_read()

phyread can timeout and val will contain random value. Initialize it to
zero not to report random value in case of error.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-spi
Tom Rini [Mon, 2 Jul 2018 18:40:03 +0000 (14:40 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-spi

6 years agoMerge git://git.denx.de/u-boot-x86
Tom Rini [Mon, 2 Jul 2018 02:13:34 +0000 (22:13 -0400)]
Merge git://git.denx.de/u-boot-x86

6 years agoRevert "fw_printenv: Don't bail out directly after one env read error"
Tom Rini [Mon, 2 Jul 2018 02:10:33 +0000 (22:10 -0400)]
Revert "fw_printenv: Don't bail out directly after one env read error"

As pointed out by Wolfgang Denk, the problem with this fix is that while
interactive users will see that we have found one part of the
environment failed and are using the other, progmatic use will not see
this and can lead to problems.

Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agodoc: vxworks: Mention chain-loading an x86 kernel via 'bootefi'
Bin Meng [Thu, 28 Jun 2018 03:38:06 +0000 (20:38 -0700)]
doc: vxworks: Mention chain-loading an x86 kernel via 'bootefi'

This updates the doc to mention chain-loading an x86 kernel via
'bootefi' command, along with several typos fix.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexander Graf <agraf@suse.de>
6 years agox86: doc: Update EFI loader support
Bin Meng [Thu, 28 Jun 2018 03:38:05 +0000 (20:38 -0700)]
x86: doc: Update EFI loader support

CONFIG_EFI_LOADER is fully supported on x86 now.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexander Graf <agraf@suse.de>
6 years agoefi_loader: helloworld: Output ACPI configuration table
Bin Meng [Thu, 28 Jun 2018 03:38:04 +0000 (20:38 -0700)]
efi_loader: helloworld: Output ACPI configuration table

Output ACPI configuration table if it exists.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
6 years agoefi_loader: Install ACPI configuration tables
Bin Meng [Thu, 28 Jun 2018 03:38:03 +0000 (20:38 -0700)]
efi_loader: Install ACPI configuration tables

ACPI tables can be passed via EFI configuration table to an EFI
application. This is only supported on x86 so far.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agoefi_loader: Increase number of configuration tables to 16
Bin Meng [Thu, 28 Jun 2018 03:38:02 +0000 (20:38 -0700)]
efi_loader: Increase number of configuration tables to 16

At present the number of configuration tables is set to 2. By
looking at which tables the Linux EFI stub or iPXE can process,
it looks 16 is a reasonable number.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
6 years agox86: efi_loader: Build EFI memory map per E820 table
Bin Meng [Thu, 28 Jun 2018 03:38:01 +0000 (20:38 -0700)]
x86: efi_loader: Build EFI memory map per E820 table

On x86 traditional E820 table is used to pass the memory information
to kernel. With EFI loader we can build the EFI memory map from it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agox86: Use microcode update from device tree for all processors
Ivan Gorinov [Fri, 22 Jun 2018 04:16:16 +0000 (21:16 -0700)]
x86: Use microcode update from device tree for all processors

Built without a ROM image with FSP (u-boot.rom), the U-Boot loader applies
the microcode update data block encoded in Device Tree to the bootstrap
processor but not passed to the other CPUs when multiprocessing is enabled.

If the bootstrap processor successfully performs a microcode update
from Device Tree, use the same data block for the other processors.

Signed-off-by: Ivan Gorinov <ivan.gorinov@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed build errors on edison and qemu-x86]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
6 years agox86: Add scsi command to coreboot and qemu
Bin Meng [Tue, 26 Jun 2018 10:58:55 +0000 (03:58 -0700)]
x86: Add scsi command to coreboot and qemu

This adds the scsi command to coreboot and qemu, to be in consistent
with other x86 targets.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agox86: timer: tsc: Allow specifying clock rate from device tree again
Bin Meng [Sat, 23 Jun 2018 10:03:47 +0000 (03:03 -0700)]
x86: timer: tsc: Allow specifying clock rate from device tree again

With the introduction of early timer support in the TSC driver,
the capability of getting clock rate from device tree was lost
unfortunately. Now we bring such functionality back, but with a
limitation that when TSC is used as early timer, specifying clock
rate from device tree does not work.

This fixes random boot failures seen on QEMU targets: printing "TSC
frequency is ZERO" and reset forever.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-usb
Tom Rini [Sat, 30 Jun 2018 12:52:06 +0000 (08:52 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-usb

6 years agomx5: Select ARM_CORTEX_A8_CVE_2017_5715
Fabio Estevam [Wed, 20 Jun 2018 18:08:21 +0000 (15:08 -0300)]
mx5: Select ARM_CORTEX_A8_CVE_2017_5715

On a 4.18-rc1 kernel the following warning is seen on i.MX51 and
i.MX53:

CPU0: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable

Select the ARM_CORTEX_A8_CVE_2017_5715 workaround for i.MX51/i.MX53
to fix the problem.

With this patch applied the kernel reports:

CPU0: Spectre v2: using BPIALL workaround

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
6 years agolib: div64: fix typeo in include/div64.h
Heinrich Schuchardt [Thu, 28 Jun 2018 17:55:46 +0000 (19:55 +0200)]
lib: div64: fix typeo in include/div64.h

%s/reminder/remainder/

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
6 years agoARM: mach-omap2: omap3/am335x: Enable ACR::IBE on Cortex-A8 SoCs for CVE-2017-5715
Nishanth Menon [Tue, 12 Jun 2018 20:24:11 +0000 (15:24 -0500)]
ARM: mach-omap2: omap3/am335x: Enable ACR::IBE on Cortex-A8 SoCs for CVE-2017-5715

Enable CVE-2017-5715 option to set the IBE bit. This enables kernel
workarounds necessary for the said CVE.

With this enabled, Linux reports:
CPU0: Spectre v2: using BPIALL workaround

This workaround may need to be re-applied in OS environment around low
power transition resume states where context of ACR would be lost (off-mode
etc).

Signed-off-by: Nishanth Menon <nm@ti.com>
6 years agoARM: mach-omap2: omap5/dra7: Enable ACTLR[0] (Enable invalidates of BTB) to facilitat...
Nishanth Menon [Tue, 12 Jun 2018 20:24:10 +0000 (15:24 -0500)]
ARM: mach-omap2: omap5/dra7: Enable ACTLR[0] (Enable invalidates of BTB) to facilitate CVE_2017-5715 WA in OS

Enable CVE_2017_5715 and since we have our own v7_arch_cp15_set_acr
function to setup the bits, we are able to override the settings.

Without this enabled, Linux kernel reports:
CPU0: Spectre v2: firmware did not set auxiliary control register IBE bit, system vulnerable

With this enabled, Linux kernel reports:
CPU0: Spectre v2: using ICIALLU workaround

NOTE: This by itself does not enable the workaround for CPU1 (on
OMAP5 and DRA72/AM572 SoCs) and may require additional kernel patches.

Signed-off-by: Nishanth Menon <nm@ti.com>
6 years agoARM: Introduce ability to enable invalidate of BTB with ICIALLU on Cortex-A15 for...
Nishanth Menon [Tue, 12 Jun 2018 20:24:09 +0000 (15:24 -0500)]
ARM: Introduce ability to enable invalidate of BTB with ICIALLU on Cortex-A15 for CVE-2017-5715

As recommended by Arm in [1], ACTLR[0] (Enable invalidates of BTB)
needs to be set[2] for BTB to be invalidated on ICIALLU. This needs to
be done unconditionally for Cortex-A15 processors. Provide a config
option for platforms to enable this option based on impact analysis
for products.

NOTE: This patch in itself is NOT the final solution, this requires:
a) Implementation of v7_arch_cp15_set_acr on SoCs which may not
   provide direct access to ACR register.
b) Operating Systems such as Linux to provide adequate workaround in the
   right locations.
c) This workaround applies to only the boot processor. It is important
   to apply workaround as necessary (context-save-restore) around low
   power context loss OR additional processors as necessary in either
   firmware support OR elsewhere in OS.

[1] https://developer.arm.com/support/security-update
[2] http://infocenter.arm.com/help/topic/com.arm.doc.ddi0438c/BABGHIBG.html

Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Robin Murphy <robin.murphy@arm.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Christoffer Dall <christoffer.dall@linaro.org>
Cc: Andre Przywara <Andre.Przywara@arm.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Michael Nazzareno Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
6 years agoARM: Introduce ability to enable ACR::IBE on Cortex-A8 for CVE-2017-5715
Nishanth Menon [Tue, 12 Jun 2018 20:24:08 +0000 (15:24 -0500)]
ARM: Introduce ability to enable ACR::IBE on Cortex-A8 for CVE-2017-5715

As recommended by Arm in [1], IBE[2] has to be enabled unconditionally
for BPIALL to be functional on Cortex-A8 processors. Provide a config
option for platforms to enable this option based on impact analysis
for products.

NOTE: This patch in itself is NOT the final solution, this requires:
a) Implementation of v7_arch_cp15_set_acr on SoCs which may not
   provide direct access to ACR register.
b) Operating Systems such as Linux to provide adequate workaround in the right
   locations.
c) This workaround applies to only the boot processor. It is important
   to apply workaround as necessary (context-save-restore) around low
   power context loss OR additional processors as necessary in either
   firmware support OR elsewhere in OS.

[1] https://developer.arm.com/support/security-update
[2] http://infocenter.arm.com/help/topic/com.arm.doc.ddi0344k/Bgbffjhh.html

Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Robin Murphy <robin.murphy@arm.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Christoffer Dall <christoffer.dall@linaro.org>
Cc: Andre Przywara <Andre.Przywara@arm.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Michael Nazzareno Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
6 years agousb: sunxi: Use proper reg_mask for clock gate, reset
Jagan Teki [Thu, 28 Jun 2018 14:10:46 +0000 (19:40 +0530)]
usb: sunxi: Use proper reg_mask for clock gate, reset

Masking clock gate, reset register bits based on the
probed controller is proper only due to the assumption
that masking should start with 0 even thought the controller
has separate PHY or shared between OTG.

unfortunately these are fixed due to lack of separate
clock, reset drivers.

Say for example EHCI1 - EHCI3 in the datasheet (EHCI0 is for the OTG)
so we need to start reg_mask 0 - 2.

This patch calculated the mask, based on the register base
so that we can get the proper bits to set with respect to
probed controller.

We even do this masking by using PHY index specifier from dt,
but dev_read_addr_size is failing for 64-bit boards.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agosunxi: Fix USB PHY index for H3
Jagan Teki [Thu, 28 Jun 2018 14:10:45 +0000 (19:40 +0530)]
sunxi: Fix USB PHY index for H3

This patch update the USB PHY index for Allwinner H3.

Same change[1] initially sent, by 'Chen-Yu Tai' but missed
to apply due to recursive version changes on the same series.

[1] https://lists.denx.de/pipermail/u-boot/2018-January/318817.html

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agousb: ohci: change the NUM_EDs from 8 to 32
Zeng Tao [Thu, 28 Jun 2018 17:54:19 +0000 (01:54 +0800)]
usb: ohci: change the NUM_EDs from 8 to 32

For ohci, the maximam supported endpoint number is 32(in and out), and
now we have used (usb_pipeendpoint(pipe) << 1) to index the specified
endpoint descritor, usb_pipeendpoint(pipe) can reach 0xf, so we need
change the NUM_EDs from 8 to 32.

Signed-off-by: Zeng Tao <prime.zeng@hisilicon.com>
6 years agousb: sunxi: ohci: make ohci_t the first member in private data
Vasily Khoruzhick [Sun, 17 Jun 2018 16:13:42 +0000 (09:13 -0700)]
usb: sunxi: ohci: make ohci_t the first member in private data

ohci-hcd casts priv_data pointer to (ohci_t *), thus it must be
the first member in private data struct.

Fixes 831cc98b1 ("usb: sunxi: Simplify ccm reg base code")

Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
6 years agosf: Enable FSR polling on N25Q256(A)
Marek Vasut [Thu, 24 May 2018 19:58:45 +0000 (21:58 +0200)]
sf: Enable FSR polling on N25Q256(A)

The N25Q256(A) datasheet clearly states that this device does have
a Flag Status Register and does update FSR PEC bit 7 during Program
and Erase cycles to indicate the cycle is in progress. Enable the
FSR PEC bit polling on this device to prevent data corruption.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Jagan Teki <jagan@openedev.com>
Cc: Tom Rini <trini@konsulko.com>
6 years agospi: omap3: fix claim/release bus within DM
Hannes Schmelzer [Tue, 26 Jun 2018 14:08:39 +0000 (16:08 +0200)]
spi: omap3: fix claim/release bus within DM

The claim/release bus function must not reset the whole SPI core because
settings regarding wordlen, clock-frequency and so on made by
set_wordlen, set_mode, set_speed get lost with this action. Resulting in
a non-functional SPI.

Without DM the failure didn't came up since after the spi_reset within
claim bus all the setup (wordlen, mode, ...) was called, in DM they are
called by the spi uclass.

We change now the things as following for having a working SPI instance
in DM:

- move the spi_reset(...) to the probe call in DM for having a known
hardware state after probe. Without DM we don't have a probe call, so we
issue the reset as before during the claim_bus call.

- in release bus we just reset the modulctrl to the reset-value (spi-
slave)

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-spi
Tom Rini [Thu, 28 Jun 2018 13:04:41 +0000 (09:04 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-spi

6 years agodwc2 USB controller hangs with lan78xx
Andrew Thomas [Mon, 18 Jun 2018 18:56:06 +0000 (11:56 -0700)]
dwc2 USB controller hangs with lan78xx

This bug is the combination of dwc2 USB controller and lan78xx
USB ethernet controller, which is the combination in use on
the Raspberry Pi Model 3 B+.

When the host attempts to receive a packet, but a packet has not
arrived, the lan78xx controller responds by setting BIR
(Bulk-In Empty Response) to NAK. Unfortunately, this hangs
the USB controller and requires the USB controller to
be reset.

The fix proposed is to have the lan78xx controller respond
by setting BIR to ZLP.

Signed-off-by: Andrew Thomas <andrew.thomas@oracle.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
6 years agoMerge git://git.denx.de/u-boot-imx
Tom Rini [Wed, 27 Jun 2018 17:09:55 +0000 (13:09 -0400)]
Merge git://git.denx.de/u-boot-imx

6 years agofw_printenv: Don't bail out directly after one env read error
Joe Hershberger [Tue, 26 Jun 2018 09:37:59 +0000 (12:37 +0300)]
fw_printenv: Don't bail out directly after one env read error

When using a redundant environment a read error should simply mean to
not use that copy instead of giving up completely. The other copy may
be just fine.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Ioan-Adrian Ratiu <adrian.ratiu@ni.com>
6 years agoimx: bx50v3: fix Maintainers
Stefano Babic [Wed, 27 Jun 2018 11:02:36 +0000 (13:02 +0200)]
imx: bx50v3: fix Maintainers

This fixes the warnings:

WARNING: no status info for 'ge_bx50v3'
WARNING: no maintainers for 'ge_bx50v3

Signed-off-by: Stefano Babic <sbabic@denx.de>
6 years agomtd: nand: mxs_nand_spl: add mxs_flash_full_ident
Jörg Krause [Sun, 14 Jan 2018 18:26:40 +0000 (19:26 +0100)]
mtd: nand: mxs_nand_spl: add mxs_flash_full_ident

For now, the existing SPL MXS NAND driver only supports to identify
ONFi-compliant NAND chips. In order to allow identifying
non-ONFi-compliant chips add `mxs_flash_full_ident()` which uses the
`nand_get_flash_type()` functionality from `nand_base.c` to lookup
for supported NAND chips in the chip ID list.

For compatibility reason the full identification support is only
available if the config option `CONFIG_SPL_NAND_IDENT` is enabled.

The lookup was tested on a custom i.MX6ULL board with a Toshiba
TC58NVG1S3HTAI0 NAND chip.

Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
6 years agomtd: nand: mxs_nand_spl: refactor mxs_flash_ident
Jörg Krause [Sun, 14 Jan 2018 18:26:39 +0000 (19:26 +0100)]
mtd: nand: mxs_nand_spl: refactor mxs_flash_ident

The existing `mxs_flash_ident()` is limited to identify ONFi compliant
NAND chips only. In order to support non-ONFi NAND chips refactor the
function and rename it to `mxs_flash_onfi_ident()`.

A follow-up patch will add `mxs_flash_full_ident()` which allows to use
the chip ID list to lookup for supported NAND flashs.

Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
6 years agospl, nand: add option CONFIG_SPL_NAND_IDENT to lookup for supported NAND chips
Jörg Krause [Sun, 14 Jan 2018 18:26:38 +0000 (19:26 +0100)]
spl, nand: add option CONFIG_SPL_NAND_IDENT to lookup for supported NAND chips

Add the config option `CONFIG_SPL_NAND_IDENT` for using the NAND chip ID list
to identify the NAND flash in SPL.

Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
6 years agomtd: nand: export nand_get_flash_type function
Jörg Krause [Sun, 14 Jan 2018 18:26:37 +0000 (19:26 +0100)]
mtd: nand: export nand_get_flash_type function

`nand_get_flash_type()` allows identification of supported NAND flashs.
The function is useful in SPL (like mxs_nand_spl.c) to lookup for a NAND
flash (which does not support ONFi) instead of using nand_simple.c and
hard-coding all required NAND parameters.

Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
6 years agocl-som-imx7: Remove CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
Fabio Estevam [Mon, 18 Jun 2018 15:57:35 +0000 (12:57 -0300)]
cl-som-imx7: Remove CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y

Since commit 1da1938d57b3 ("spl: Add default values for ARCH_MX7")
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is selected by default on
i.MX7 platforms, so remove it from the board defconfig.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
6 years agoimx6ul: geam: Fix fdt_file mismatch
Jagan Teki [Mon, 18 Jun 2018 05:42:19 +0000 (11:12 +0530)]
imx6ul: geam: Fix fdt_file mismatch

fdt_file is looking for imx6ul-geam-kit.dtb but Linux
has imx6ul-geam.dtb, since Linux skipped -kit on file name
by below commit.
"ARM: dts: imx6ul-geam: Skip suffix -kit from dts name"
(sha1: 182de5ebce71e469cfa686fcdf08c9cbe11ece97)

So, due to this mismatch U-Boot failed to pick the
proper dtb which eventually break the Linux boot.

This patch fixed this mismatch by
- renaming dts files
- update config option to use new dtb file
- update fdt_file to new dtb file name

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
6 years agopower: pmic: Let PFUZE3000 see all 256 registers
Trent Piepho [Wed, 25 Apr 2018 17:06:00 +0000 (10:06 -0700)]
power: pmic: Let PFUZE3000 see all 256 registers

The PFUZE3000 uses registers addresses up to 0xff.

The DM pfuze100 driver supports both pfuze100 and pfuze3000.  Allow it
to use the device type to return the correct number of registers.

Also rename the too generic PMIC_NUM_OF_REGS enumeration value for
pfuze3000 to match the other "PFUZE3000_" prefixed enumerations and the
pfuze100 enumeration value PFUZE100_NUM_OF_REGS.

Cc: Peng Fan <Peng.Fan@freescale.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
6 years agoarm: dts: imx7: colibri: add raw NAND support
Stefan Agner [Fri, 22 Jun 2018 16:06:20 +0000 (18:06 +0200)]
arm: dts: imx7: colibri: add raw NAND support

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
6 years agoarm: dts: imx7: sync with Linux
Stefan Agner [Fri, 22 Jun 2018 16:06:19 +0000 (18:06 +0200)]
arm: dts: imx7: sync with Linux

Sync with Linux commit 60cc43fc8884 ("Linux 4.17-rc1").

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
6 years agomtd: nand: mxs_nand: add support for specific ECC strength
Stefan Agner [Fri, 22 Jun 2018 16:06:18 +0000 (18:06 +0200)]
mtd: nand: mxs_nand: add support for specific ECC strength

Add support for specified ECC strength/size using device tree
properties nand-ecc-strength/nand-ecc-step-size.

This aligns behavior with the mainline driver, such that:
- If fsl,use-minimal-ecc is requested it will use data from
  data sheet/ONFI. If this is not available the driver will fail.
- If nand-ecc-strength/nand-ecc-step-size are specified those
  value will be used.
- By default maximum possible ECC strength is used

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
6 years agomtd: nand: mxs_nand: add device tree support
Stefan Agner [Fri, 22 Jun 2018 16:06:17 +0000 (18:06 +0200)]
mtd: nand: mxs_nand: add device tree support

Support driver data from device tree. Also support fsl,use-minimal-ecc
similar to Linux' GPMI NAND driver.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
6 years agomtd: nand: mxs_nand: move structs into header file
Stefan Agner [Fri, 22 Jun 2018 16:06:16 +0000 (18:06 +0200)]
mtd: nand: mxs_nand: move structs into header file

Move structs into header file so we can use a separate compile
unit for device tree support.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
6 years agomtd: nand: mxs_nand: add use_minimum_ecc to struct
Stefan Agner [Fri, 22 Jun 2018 16:06:15 +0000 (18:06 +0200)]
mtd: nand: mxs_nand: add use_minimum_ecc to struct

Add use_minimum_ecc as struct mxs_nand_info field in preparation
for device tree support.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
6 years agomtd: nand: mxs_nand: separate board/controller init
Stefan Agner [Fri, 22 Jun 2018 16:06:14 +0000 (18:06 +0200)]
mtd: nand: mxs_nand: separate board/controller init

In preparation for device tree support separate board init
from controller init similar to other raw NAND drivers.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
6 years agomtd: nand: mxs_nand: use more precise function name
Stefan Agner [Fri, 22 Jun 2018 16:06:13 +0000 (18:06 +0200)]
mtd: nand: mxs_nand: use more precise function name

This function initializes DMA descriptors so mxs_nand_init_dma is
more precise. It also frees up the rather generic name mxs_nand_init.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
6 years agomtd: nand: mxs_nand: move register structs to driver data
Stefan Agner [Fri, 22 Jun 2018 16:06:12 +0000 (18:06 +0200)]
mtd: nand: mxs_nand: move register structs to driver data

Move GPMI and BCH register structs to the driver struct mxs_nand_info
in prepartion for device tree support.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
6 years agomtd: nand: mxs_nand: add minimal ECC support
Stefan Agner [Fri, 22 Jun 2018 15:19:51 +0000 (17:19 +0200)]
mtd: nand: mxs_nand: add minimal ECC support

Add support for minimum ECC strength supported by the NAND chip.
This aligns with the behavior when using the fsl,use-minimum-ecc
device tree property in Linux.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
6 years agomtd: nand: mxs_nand: report correct ECC parameters
Stefan Agner [Fri, 22 Jun 2018 15:19:50 +0000 (17:19 +0200)]
mtd: nand: mxs_nand: report correct ECC parameters

Report correct ECC parameters back to the stack. Do not report
bytes as we have it not immeaditly available and the Linux version
also does not report it. It seems to have no aversive effect.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
6 years agomtd: nand: mxs_nand: use structure for BCH geometry
Stefan Agner [Fri, 22 Jun 2018 15:19:49 +0000 (17:19 +0200)]
mtd: nand: mxs_nand: use structure for BCH geometry

Calculate BCH geometry at start and store the information in
a structure. This avoids recalculation on every page access
and allows to calculate ECC relevant information in one place.
This patch does not change ECC layout or driver behavior in
any way.

The patch aligns the driver somewhat with the Linux GPMI NAND
driver which drives the same IP.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
6 years agomtd: nand: mxs_nand: allow to enable BBT support
Stefan Agner [Fri, 22 Jun 2018 15:19:48 +0000 (17:19 +0200)]
mtd: nand: mxs_nand: allow to enable BBT support

Add config option which allows to enable on flash bad block table
support. This has the same effect as when using the device tree
property "nand-on-flash-bbt" in Linux.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
6 years agomtd: nand: mxs_nand: use self init
Stefan Agner [Fri, 22 Jun 2018 15:19:47 +0000 (17:19 +0200)]
mtd: nand: mxs_nand: use self init

Instead of completing initialization via scan_bbt callback use
NAND self init to initialize the GPMI (MXS) NAND controller.

Suggested-by: Scott Wood <oss@buserror.net>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
6 years agomtd: nand: mxs_nand: introduce SPL specific init
Stefan Agner [Fri, 22 Jun 2018 15:19:46 +0000 (17:19 +0200)]
mtd: nand: mxs_nand: introduce SPL specific init

In preparation to convert the driver to use NAND self init
provide a new minimal init for SPL builds. As a side effect
this also reduces size of SPL by about 4KiB.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
6 years agoMerge git://git.denx.de/u-boot-dm
Tom Rini [Mon, 25 Jun 2018 14:57:07 +0000 (10:57 -0400)]
Merge git://git.denx.de/u-boot-dm

6 years agomtd: spi: Correct parameters for s25fs512s flash
Ashish Kumar [Mon, 25 Jun 2018 10:15:11 +0000 (15:45 +0530)]
mtd: spi: Correct parameters for s25fs512s flash

Change sector size to 256KiB in table spi_flash_ids.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agospi: omap3: fix set_speed and set_mode dm callbacks
Hannes Schmelzer [Sat, 2 Jun 2018 06:06:48 +0000 (08:06 +0200)]
spi: omap3: fix set_speed and set_mode dm callbacks

commit 84807922874e03895bbf15c4472a2dcee8fbbd03
("spi: omap3: Skip set_mode, set_speed from claim") did break SPI
support on my AM335x board.

The named commit:

- ignored the responsible arguments (speed, mode)
The set speed/mode function must use the supplied function arguments to
work properly. With this commit we take those arguments and transfer
them to the priv-data.

- used wrong udevice pointer for getting priv data
the udevice-pointer within function argument is already the spi-bus
device, so it is wrong looking here for some parent (ocp-bus in this
case) and getting priv-pointer from there.

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agospi: omap3: pre-initialize bus-speed with max. slave-speed
Hannes Schmelzer [Sat, 2 Jun 2018 06:06:47 +0000 (08:06 +0200)]
spi: omap3: pre-initialize bus-speed with max. slave-speed

Otherwise the frequency is zero and the clock divider cannot be setup by
'omap3_spi_set_speed' function.

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agospi: mxc_spi: Fix chipselect on DM_SPI driver uclass
Michael Trimarchi [Wed, 20 Jun 2018 20:51:18 +0000 (22:51 +0200)]
spi: mxc_spi: Fix chipselect on DM_SPI driver uclass

CS GPIO activation low/high is determinated by the device tree
so we don't need to take in accoung in cs_activate and cs_deactivate

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agospi: mxc: Fix compilation problem of DM_SPI class driver
Michael Trimarchi [Wed, 20 Jun 2018 20:51:17 +0000 (22:51 +0200)]
spi: mxc: Fix compilation problem of DM_SPI class driver

drivers/spi/mxc_spi.c:507: undefined reference to `dev_get_addr'
linux-ld.bfd: BFD (GNU Binutils) 2.29.1 assertion fail elf32-arm.c:9509

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agospi: zynq_qspi: Fixed incorrect return value error
Vipul Kumar [Mon, 25 Jun 2018 08:43:57 +0000 (14:13 +0530)]
spi: zynq_qspi: Fixed incorrect return value error

This patch replaced "return 0" with "return status" to fix the
incorrect return value error reported by the coverity.

Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
[jagan: rebased on master]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agoMerge git://git.denx.de/u-boot-x86
Tom Rini [Sun, 24 Jun 2018 01:47:39 +0000 (21:47 -0400)]
Merge git://git.denx.de/u-boot-x86

6 years agocmd: efi: Fix wrong memory descriptor end address
Bin Meng [Fri, 22 Jun 2018 08:38:31 +0000 (01:38 -0700)]
cmd: efi: Fix wrong memory descriptor end address

Each entry of the EFI memory descriptors occupies map->desc_size,
not sizeof(struct efi_mem_desc).

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agox86: efi: payload: Count in conventional memory above 4GB in DRAM bank
Bin Meng [Fri, 22 Jun 2018 08:38:30 +0000 (01:38 -0700)]
x86: efi: payload: Count in conventional memory above 4GB in DRAM bank

At present in dram_init_banksize() it ignores conventional memory
above 4GB. This leads to wrong DRAM size is printed during boot.
Remove such limitation.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agox86: efi-x86_payload: Enable PRE_CONSOLE_BUFFER
Bin Meng [Fri, 22 Jun 2018 08:38:29 +0000 (01:38 -0700)]
x86: efi-x86_payload: Enable PRE_CONSOLE_BUFFER

Enable PRE_CONSOLE_BUFFER so that the full boot output can be viewed
on the video console for the EFI payload.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agoefi: stub: Move the use_uart assignment immediately after exit_boot_services() call
Bin Meng [Fri, 22 Jun 2018 08:38:28 +0000 (01:38 -0700)]
efi: stub: Move the use_uart assignment immediately after exit_boot_services() call

The use_uart assignment should follow immediately after the call to
exit_boot_services(), in case we want some debug output after that.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agox86: Change __kernel_size_t conditionals to use compiler provided defines
Bin Meng [Fri, 22 Jun 2018 08:38:27 +0000 (01:38 -0700)]
x86: Change __kernel_size_t conditionals to use compiler provided defines

Since commit bb0bb91cf0aa ("efi_stub: Use efi_uintn_t"), EFI x86
64-bit payload does not work anymore. The call to GetMemoryMap()
in efi_stub.c fails with return code EFI_INVALID_PARAMETER. Since
the payload itself is still 32-bit U-Boot, efi_uintn_t gets wrongly
interpreted as int, but it should actually be long in a 64-bit EFI
environment.

This changes the x86 __kernel_size_t conditionals to use compiler
provided defines instead. That way we always adhere to the build
environment we're in and the definitions adjust automatically.

Fixes: bb0bb91cf0aa ("efi_stub: Use efi_uintn_t")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agoefi.h: Do not use config options
Alexander Graf [Fri, 22 Jun 2018 08:38:26 +0000 (01:38 -0700)]
efi.h: Do not use config options

Currently efi.h determines a few bits of its environment according to
config options. This falls apart with the efi stub support which may
result in efi.h getting pulled into the stub as well as real U-Boot
code. In that case, one may be 32bit while the other one is 64bit.

This patch changes the conditionals to use compiler provided defines
instead. That way we always adhere to the build environment we're in
and the definitions adjust automatically.

Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: added some comments to describe the __x86_64__ check]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agox86: efi-x86_payload: Enable usb keyboard during boot
Bin Meng [Sun, 17 Jun 2018 12:57:53 +0000 (05:57 -0700)]
x86: efi-x86_payload: Enable usb keyboard during boot

For boards that don't route serial port pins out, it's quite common
to attach a USB keyboard as the input device, along with a monitor.
However USB is not automatically started in the generic efi payload
codes. This uses a payload specific last_stage_init() to start the
USB bus, so that a USB keyboard can be used on the U-Boot shell.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agox86: efi-x86_payload: Enumerate PCI bus during early boot
Bin Meng [Sun, 17 Jun 2018 12:57:52 +0000 (05:57 -0700)]
x86: efi-x86_payload: Enumerate PCI bus during early boot

The generic efi payload currently does not enumerate the PCI bus,
which means peripherals on the PCI bus are not discovered by their
drivers. This uses board_early_init_r() to do the PCI enumeration.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agoboard_r: Do not initialize IDE when DM BLK is on
Bin Meng [Sun, 17 Jun 2018 12:57:50 +0000 (05:57 -0700)]
board_r: Do not initialize IDE when DM BLK is on

With driver model philosophy, we should avoid explicitly calling
driver initialization routine during boot. This updates the ram
init sequence table to exclude the IDE initialization for DM BLK.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agox86: qemu: Change default vesa mode to 1024x768x32
Bin Meng [Sun, 17 Jun 2018 12:57:49 +0000 (05:57 -0700)]
x86: qemu: Change default vesa mode to 1024x768x32

The default vesa mode was changed since commit 55b4e1b7d999
("x86: Change default FRAMEBUFFER_VESA_MODE of some boards") for
better VxWorks compatibility but with the changes QEMU video console
no longer works. This is because QEMU's vgabios implements the VESA
mode 8:8:8 as 24bpp without an alpha channel, which U-Boot's video
console driver currently does not support yet.

We need change to real 32bpp in order to make it work again. QEMU
vgabios implements the custom 32bpp VESA mode starting from 0x140
(320x200x32) to 0x147 (1600x1200x32). Set it to 0x144 (1024x768x32).

Fixes: 55b4e1b7d999 ("x86: Change default FRAMEBUFFER_VESA_MODE of some boards")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agox86: Add 64-bit setjmp/longjmp implementation
Ivan Gorinov [Tue, 19 Jun 2018 18:40:42 +0000 (11:40 -0700)]
x86: Add 64-bit setjmp/longjmp implementation

Add setjmp/longjmp functions for x86_64.

Signed-off-by: Ivan Gorinov <ivan.gorinov@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
6 years agox86: qemu: do not build car.o with start64.o
Heinrich Schuchardt [Tue, 19 Jun 2018 17:12:15 +0000 (19:12 +0200)]
x86: qemu: do not build car.o with start64.o

car.o can only be used with start.o, not with start64.o.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
6 years agox86: efi-x86_app: Update MAINTAINERS
Bin Meng [Tue, 19 Jun 2018 01:43:17 +0000 (18:43 -0700)]
x86: efi-x86_app: Update MAINTAINERS

Previous rename of efi-x86 target missed the MAINTAINERS update,
which caused the buildman warnings:

  WARNING: no status info for 'efi-x86_app'
  WARNING: no maintainers for 'efi-x86_app'

This updates the board MAINTAINERS to reflect the up-to-date info.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agopatman: Support using a particular SMTP server
Simon Glass [Tue, 19 Jun 2018 15:56:07 +0000 (09:56 -0600)]
patman: Support using a particular SMTP server

Some environments require providing the '--smtp-server' argument to
'git send-email'. Add support for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agopatman: add test for SPDX license
Chris Packham [Thu, 7 Jun 2018 08:45:07 +0000 (20:45 +1200)]
patman: add test for SPDX license

Add a test to exercise the check for a valid SPDX license.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agopatman: add option for limiting the Cc list
Chris Packham [Thu, 7 Jun 2018 08:45:06 +0000 (20:45 +1200)]
patman: add option for limiting the Cc list

Many mailing-lists consider a long Cc list a sign of spam and will
either drop the message or mark it for moderation. Because patman
automatically invokes get_maintainer.pl the Cc list can expand
unexpectedly. Allow the user to specify a limit for the Cc list.

This limit is applied after removing any known bouncing addresses. By
default no limit is applied.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-uniphier
Tom Rini [Fri, 22 Jun 2018 17:12:53 +0000 (13:12 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-uniphier

6 years agoARM: dts: uniphier: enable SD card for PXs3 reference board
Masahiro Yamada [Tue, 19 Jun 2018 07:11:47 +0000 (16:11 +0900)]
ARM: dts: uniphier: enable SD card for PXs3 reference board

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agoARM: dts: uniphier: sync DT with Linux 4.18-rc1
Masahiro Yamada [Tue, 19 Jun 2018 07:11:46 +0000 (16:11 +0900)]
ARM: dts: uniphier: sync DT with Linux 4.18-rc1

Now that the clock-frequency information has been moved to the
driver, more DT sync is possible.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agoserial: uniphier: set clock rate without clock-frequency property
Masahiro Yamada [Tue, 19 Jun 2018 07:11:45 +0000 (16:11 +0900)]
serial: uniphier: set clock rate without clock-frequency property

In Linux, the clock rate of the UART is given by the clock driver.

If you try to follow that in U-Boot, you would end up with adding
more u-boot,dm-pre-reloc properties, and also the clock driver would
be too big for SPL, which is used for UniPhier ARMv7 platform.

The current solution is to add 'clock-frequency' property to the
UART nodes, but it does not exist in the DT files in Linux.  I do
not want to let DT diverge for U-Boot.

Check the SoC compatible and set the clock rate according to it.
This will be helpful to sync DT between Linux and U-Boot.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agoserial: uniphier: rename struct uniphier_serial_private_data
Masahiro Yamada [Tue, 19 Jun 2018 07:11:44 +0000 (16:11 +0900)]
serial: uniphier: rename struct uniphier_serial_private_data

Just for making it shorter.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agoreset: uniphier: sync reset data with Linux 4.18-rc1
Masahiro Yamada [Tue, 19 Jun 2018 07:11:43 +0000 (16:11 +0900)]
reset: uniphier: sync reset data with Linux 4.18-rc1

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agoARM: uniphier: enable CONFIG_SNI_AVE and disable CONFIG_SMC911X
Masahiro Yamada [Tue, 19 Jun 2018 07:11:42 +0000 (16:11 +0900)]
ARM: uniphier: enable CONFIG_SNI_AVE and disable CONFIG_SMC911X

Enable the on-chip ethernet driver for uniphier_{v7,v8}_defconfig.
Disable the on-board SMC911x because it has not migrated to the
driver model yet - it is not possible to enable DM and non-DM
drivers at the same time.

The CONFIG_SMC911X for uniphier_ld4_sld8_defconfig is still kept
because the on-chip ethernet driver for LD4, sLD8 is not supported
yet.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agoMerge tag 'signed-efi-2018.07' of git://github.com/agraf/u-boot
Tom Rini [Fri, 22 Jun 2018 12:14:49 +0000 (08:14 -0400)]
Merge tag 'signed-efi-2018.07' of git://github.com/agraf/u-boot

Patch queue for efi - 2018-06-21

A single urgent fix to make sure green and red are not swapped
in OSs that make use of EFI GOP frame buffers to display pictures
(such as efifb in Linux).

6 years agoefi_loader: Fix GOP 32bpp exposure
Alexander Graf [Tue, 19 Jun 2018 11:34:54 +0000 (13:34 +0200)]
efi_loader: Fix GOP 32bpp exposure

We store pixels as BGRA in memory, as can be seen from struct efi_gop_pixel.
So we need to expose the same format to UEFI payloads to actually have them
use the correct colors.

Reported-by: Fabian Vogt <fvogt@suse.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-sh
Tom Rini [Thu, 21 Jun 2018 13:02:35 +0000 (09:02 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-sh

6 years agoMerge tag 'arc-updates-for-2018.07-rc3' of git://git.denx.de/u-boot-arc
Tom Rini [Thu, 21 Jun 2018 13:01:29 +0000 (09:01 -0400)]
Merge tag 'arc-updates-for-2018.07-rc3' of git://git.denx.de/u-boot-arc

Here we only add readme file for EMDK board
support of which was added in this release cycle.

6 years agoMakefile: Ensure we build with -std=gnu11
Tom Rini [Wed, 20 Jun 2018 03:53:54 +0000 (23:53 -0400)]
Makefile: Ensure we build with -std=gnu11

As many targets are now commonly built with gcc-6 or later (which
defaults to a newer C standard than older compilers), certain C
constructs are now being used as they produce more readable code.  And
while all compilers that we support building with support the C11
standard (and GNU11) they do not default to that standard.  Ensure that
we pass along -std=gnu11 when building.

Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agoARC: EMDK: Add readme
Alexey Brodkin [Fri, 15 Jun 2018 15:20:59 +0000 (18:20 +0300)]
ARC: EMDK: Add readme

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>