Simon Glass [Tue, 7 May 2013 06:11:50 +0000 (06:11 +0000)]
libfdt: Add fdt_next_subnode() to permit easy subnode iteration
Iterating through subnodes with libfdt is a little painful to write as we
need something like this:
for (depth = 0, count = 0,
offset = fdt_next_node(fdt, parent_offset, &depth);
(offset >= 0) && (depth > 0);
offset = fdt_next_node(fdt, offset, &depth)) {
if (depth == 1) {
/* code body */
}
}
Using fdt_next_subnode() we can instead write this, which is shorter and
easier to get right:
for (offset = fdt_first_subnode(fdt, parent_offset);
offset >= 0;
offset = fdt_next_subnode(fdt, offset)) {
/* code body */
}
Also, it doesn't require two levels of indentation for the loop body.
Signed-off-by: Simon Glass <sjg@chromium.org>
(Cherry-picked from dtc commit
4e76ec79)
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
Simon Glass [Tue, 7 May 2013 06:11:49 +0000 (06:11 +0000)]
mkimage: Move ARRAY_SIZE to header file
Move this definition from aisimage.c to mkimage.h so that it is available
more widely.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
Simon Glass [Tue, 7 May 2013 06:11:48 +0000 (06:11 +0000)]
bootstage: Don't build for HOSTCC
We don't measure boot timing on the host, or with SPL, so use both
conditions in the bootstage header. This allows us to avoid using
conditional compilation around bootstage_...() calls. (#ifdef)
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 7 May 2013 06:11:47 +0000 (06:11 +0000)]
hash: Add a way to calculate a hash for any algortihm
Rather than needing to call one of many hashing algorithms in U-Boot,
provide a function hash_block() which handles this, and can support all
available hash algorithms.
Once we have md5 supported within hashing, we can use this function in
the FIT image code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 7 May 2013 06:11:46 +0000 (06:11 +0000)]
Add minor updates to README.fdt-control
A few things have changed since this doc was written, so update it to
match the current state of things.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 7 May 2013 06:11:45 +0000 (06:11 +0000)]
env: Fix minor comment typos in cmd_nvedit
This should say 'environmnent'.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tom Rini [Tue, 14 May 2013 15:45:41 +0000 (11:45 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-blackfin into powerpc-eldk53-warning-fixes
Tom Rini [Mon, 13 May 2013 22:17:39 +0000 (18:17 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-x86
Simon Glass [Wed, 17 Apr 2013 16:13:48 +0000 (16:13 +0000)]
x86: Add coreboot timestamps
Add selected coreboot timestamps into bootstage to get a unified view of
the boot timings.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 Apr 2013 16:13:47 +0000 (16:13 +0000)]
x86: Support adding coreboot timestanps to bootstage
Coreboot provides a lot of useful timing information. Provide a facility
to add this to bootstage on start-up.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 Apr 2013 16:13:46 +0000 (16:13 +0000)]
x86: config: Enable LZO for coreboot, remove zlib, gzip
We don't use zlib and gzip but do use lzo, so enable this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 Apr 2013 16:13:45 +0000 (16:13 +0000)]
x86: Fix warning in cmd_ximg.c when CONFIG_GZIP is not defined
This local variable is not used unless CONFIG_GZIP is defined. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 Apr 2013 16:13:44 +0000 (16:13 +0000)]
bootstage: Allow marking a particular line of code
Add a function which allows a (file, function, line number) to be marked
in bootstage.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Che-Liang Chiou <clchiou@chromium.org>
Simon Glass [Wed, 17 Apr 2013 16:13:43 +0000 (16:13 +0000)]
x86: Enable bootstage for coreboot
This is a convenient way of finding out where boottime is going. Enable
it for coreboot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Doug Anderson [Wed, 17 Apr 2013 16:13:42 +0000 (16:13 +0000)]
Call bootstage_relocate() after malloc is initted
In a previous CL we added the bootstage_relocate(), which should be
called after malloc is initted. Now we call it on generic board.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Doug Anderson [Wed, 17 Apr 2013 16:13:41 +0000 (16:13 +0000)]
bootstage: Copy bootstage strings post-relocation
Any pointers to name strings that were passed to bootstage_mark_name()
pre-relocation should be copied post-relocation so that they don't get
trashed as the original location of U-Boot is re-used for other
purposes.
This change introduces a new API call that should be called from
board_init_r() after malloc has been initted on any board that uses
bootstage.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 Apr 2013 16:13:40 +0000 (16:13 +0000)]
bootstage: Add stubs for new bootstage functions
Some functions don't have a stub for when CONFIG_BOOTSTAGE is not defined.
Add one to avoid #ifdefs in the code when this is used in U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Che-Liang Chiou <clchiou@chromium.org>
Reviewed-by: Tom Wai-Hong Tam <waihong@chromium.org>
Simon Glass [Wed, 17 Apr 2013 16:13:39 +0000 (16:13 +0000)]
x86: Re-enable PCAT timer 2 for beeping
While we don't want PCAT timers for timing, we want timer 2 so that we can
still make a beep. Re-purpose the PCAT driver for this, and enable it in
coreboot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 Apr 2013 16:13:38 +0000 (16:13 +0000)]
x86: Remove ISR timer
This is no longer used since we prefer the more accurate TSC timer, so
remove the dead code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Graeme Russ <graeme.russ@gmail.com>
Simon Glass [Wed, 17 Apr 2013 16:13:37 +0000 (16:13 +0000)]
x86: Remove old broken timer implementation
Tidy up some old broken and unneeded implementations. These are not used
by coreboot or anything else now.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Gabe Black <gabeblack@chromium.org>
Reviewed-by: Michael Spang <spang@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Acked-by: Graeme Russ <graeme.russ@gmail.com>
Simon Glass [Wed, 17 Apr 2013 16:13:36 +0000 (16:13 +0000)]
x86: Add TSC timer
This timer runs at a rate that can be calculated, well over 100MHz. It is
ideal for accurate timing and does not need interrupt servicing.
Tidy up some old broken and unneeded implementations at the same time.
To provide a consistent view of boot time, we use the same time
base as coreboot. Use the base timestamp supplied by coreboot
as U-Boot's base time.
Signed-off-by: Simon Glass <sjg@chromium.org>base
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 Apr 2013 16:13:35 +0000 (16:13 +0000)]
x86: Rationalise kernel booting logic and bootstage
The 'Starting linux' message appears twice in the code, but both call
through the same place. Unify these and add calls to bootstage to
mark the occasion.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Michael Spang <spang@chromium.org>
Acked-by: Graeme Russ <graeme.russ@gmail.com>
Simon Glass [Wed, 17 Apr 2013 16:13:34 +0000 (16:13 +0000)]
x86: Implement panic output for coreboot
panic_puts() can be called in early boot to display a message. It might
help with early debugging.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Wai-Hong Tam <waihong@chromium.org>
Simon Glass [Wed, 17 Apr 2013 16:13:33 +0000 (16:13 +0000)]
x86: Declare global_data pointer when it is used
Several files use the global_data pointer without declaring it. This works
because the declaration is currently a NOP. But still it is better to
fix this so that x86 lines up with other archs.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 Apr 2013 16:13:32 +0000 (16:13 +0000)]
x86: Remove legacy board init code
Since we use CONFIG_SYS_GENERIC_BOARD on x86, we don't need this anymore.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Graeme Russ <graeme.russ@gmail.com>
Simon Glass [Wed, 17 Apr 2013 16:13:31 +0000 (16:13 +0000)]
x86: Remove unused portion of link script
Since we don't have real-mode code now, we can remove this chunk of the link
script.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Graeme Russ <graeme.russ@gmail.com>
Simon Glass [Wed, 17 Apr 2013 16:13:30 +0000 (16:13 +0000)]
x86: Remove unused bios/pci code
Graeme Russ pointed out that this code is no longer used. Remove it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Graeme Russ <graeme.russ@gmail.com>
Andreas Bießmann [Tue, 7 May 2013 23:25:17 +0000 (23:25 +0000)]
avr32: fix relocation address calculation
Commit
1865286466a5d0c7f2e3c37632da56556c838e9e (Introduce generic link
section.h symbol files) changed the __bss_end symbol type from char[] to
ulong. This led to wrong relocation parameters which ended up in a not working
u-boot. Unfortunately this is not clear to see cause due to RAM aliasing we
may get a 'half-working' u-boot then.
Fix this by dereferencing the __bss_end symbol where needed.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Sonic Zhang [Thu, 2 May 2013 05:46:21 +0000 (13:46 +0800)]
bfin: Move gpio support for bf54x and bf60x into the generic driver folder.
The gpio spec for bf54x and bf60x differ a lot from the old gpio driver for bf5xx.
A lot of machine macros are used to accomodate both code in one gpio driver.
This patch split the old gpio driver and move new gpio2 support to the generic
gpio driver folder.
- To enable gpio2 driver, macro CONFIG_ADI_GPIO2 should be defined in the board's
config header file.
- The gpio2 driver supports bf54x, bf60x and future ADI processors, while the
older gpio driver supports bf50x, bf51x, bf52x, bf53x and bf561.
- All blackfin specific gpio function names are replaced by the generic gpio APIs.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Marek Vasut [Fri, 19 Apr 2013 04:17:42 +0000 (12:17 +0800)]
blackfin: The buf variable in bfin_mac.c is not used and produces warning,
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Sonic Zhang [Thu, 11 Apr 2013 09:42:38 +0000 (17:42 +0800)]
blackfin: Add comments for watchdog event initialization.
- Add comments for watchdog event initialization.
- Make sure the writting operation to MMRs are finished.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Sonic Zhang [Sun, 7 Apr 2013 11:04:14 +0000 (19:04 +0800)]
blackfin: Move blackfin serial driver out of blackfin arch folder.
- Move blackfin serial driver to the generic driver folder.
- Move blackfin serial headers to blackfin arch head folder.
- Update the include path to blackfin serial header in start up code.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Sonic Zhang [Sun, 7 Apr 2013 10:02:37 +0000 (18:02 +0800)]
blackfin: Move blackfin watchdog driver out of the blackfin arch folder.
- Enable hw_watchdog_init() in watchdog.h if CONFIG_HW_WATCHDOG is defined.
- Move blackfin hw watchdog driver to the generic driver folder.
- Call hw_watchdog_init() from blackfin board init code.
- Reuse macro CONFIG_WATCHDOG_TIMEOUT_MSECS
- Update README.watchdog accordingly
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Scott Jiang [Mon, 1 Apr 2013 19:55:14 +0000 (15:55 -0400)]
bf609: add SPI register base address
- BF609 spi driver depend on this.
Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Sonic Zhang [Thu, 14 Mar 2013 04:47:12 +0000 (12:47 +0800)]
blackfin: Uart divisor should be set after their values are generated.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Sonic Zhang [Thu, 14 Mar 2013 07:13:30 +0000 (15:13 +0800)]
blackfin: Add memory virtual console to blackfin serial driver.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Sonic Zhang [Wed, 13 Mar 2013 11:06:16 +0000 (19:06 +0800)]
blackfin: Enable early print via the generic serial API.
Remove blackfin specific implementation of the generic serial API when
early print macro is defined.
In BFIN_BOOT_BYPASS mode, don't call generic serial_puts, because
early print in bypass mode is running before code binary is relocated
to the link address.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Scott Jiang [Wed, 7 Dec 2011 19:53:30 +0000 (14:53 -0500)]
bfin: discard invalid data and clear RXS in bf5xx spi driver
There may be dirty data in RDBR, so we should discard invalid data.
This operation also clears RXS bit in STAT register.
Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Scott Jiang [Wed, 7 Dec 2011 19:19:55 +0000 (14:19 -0500)]
bfin: Remove spi dma function in bf5xx.
BF5xx rx dma causes spi flash random read error.
Accually spi controller has problems both on tx and rx dma.
So remove spi dma support in u-boot.
Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Sonic Zhang [Wed, 20 Feb 2013 10:05:16 +0000 (18:05 +0800)]
blackfin: Fit u-boot image size into limited nor flash on blackfin.
- Disable NAND driver on bf537-stamp.
- Make MMC_SPI optional.
- Disable LCD driver on bf527-ezkit.
- Enlarge BF609 nor flash reserved size from 256k to 512k bytes.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Sonic Zhang <sonic.adi@gmail.com>
Bob Liu [Tue, 5 Feb 2013 11:05:41 +0000 (19:05 +0800)]
blackfin: bf609: add softswitch config command
Add softswitch_output command for bf609-ezkit to enable softswitches.
Signed-off-by: Bob Liu <lliubbo@gmail.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Sonic Zhang [Tue, 29 Nov 2011 07:05:35 +0000 (15:05 +0800)]
blackfin: bf609: implement soft switch
Set up soft switch pins properly in board init code.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Scott Jiang <scott.jiang@analog.com>
Signed-off-by: Bob Liu <lliubbo@gmail.com>
Sonic Zhang [Fri, 30 Nov 2012 09:39:32 +0000 (17:39 +0800)]
blackfin: Correct early serial mess output in BYPASS boot mode.
The early serial should not be configured again in initcode() for BYPASS
boot mode and in start() for the other LDR boot modes.
In BYPASS boot mode, the start up code is located in Nor flash address other
than the DRAM address defined in link script. The code embedded string can't
be addressed by its compile time symbol. Calculate it according to the flash
offset.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Sonic Zhang [Tue, 5 Feb 2013 11:10:34 +0000 (19:10 +0800)]
blackfin: Set correct early debug serial baudrate.
Calculate the early uart clock from the system clock registers set by
the bootrom other than the predefine uboot clock macros.
Split the early baudrate setting function and the normal baudrate
setting one.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Sonic Zhang [Tue, 5 Feb 2013 10:57:49 +0000 (18:57 +0800)]
blackfin: run core1 from L1 code sram start address in uboot init code on core 0
Define core 1 L1 code sram start address.
Add function to enable core 1 for BF609 and BF561.
Add config macro to allow customer to run core 1 in uboot init code on core 0.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Bob Liu [Mon, 13 Aug 2012 06:22:08 +0000 (14:22 +0800)]
blackfin: add baudrate to bdinfo
Signed-off-by: Bob Liu <lliubbo@gmail.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Mike Frysinger [Tue, 31 Jul 2012 09:38:56 +0000 (05:38 -0400)]
Blackfin: adjust asm constraints with NMI workaround
Newer gcc versions will sometimes use a Preg when "r" constraints, but
that'll fail if we use an Ireg in the assignment. So force the code
to always use a Dreg.
This also fixes early boot crashes for older Blackfin parts when compiled
with gcc-4.5. This version ends up selecting the same register for the
input and output variables which corrupts the output assignment triggering
an exception.
P2 = 0xffe02008; /* EVT2 */
R0 = RETS;
CALL 1f;
RTN;
1: P2 = RETS; <-- BAD
RETS = R0;
[P2] = P2; <-- BAD
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Bob Liu [Tue, 5 Feb 2013 11:22:20 +0000 (19:22 +0800)]
blackfin: reduce size of u-boot.ldr in bf548-ezkit default config.
Enable VIDEO and NAND supports only when the config options is defined.
Signed-off-by: Bob Liu <lliubbo@gmail.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Sonic Zhang [Tue, 11 Dec 2012 08:51:23 +0000 (16:51 +0800)]
blackfin: limit the max memory dma peripheral transfer size to 4 bytes.
Othersize, the bf609 memory dma halts after being enabled.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Sonic Zhang [Fri, 8 Feb 2013 09:04:58 +0000 (17:04 +0800)]
blackfin: Change the member's type in dma structures.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Gerald Van Baren [Sun, 5 May 2013 02:17:49 +0000 (22:17 -0400)]
Move FDT_RAMDISK_OVERHEAD from fdt.h to libfdt_env.h
The define should not have been put in fdt.h originally, libfdt_env.h
is the proper place for target-specific customizations.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
Justin Sobota [Fri, 15 Feb 2013 16:06:10 +0000 (11:06 -0500)]
Added license header to dtc/libfdt/fdt.h and libfdt_env.h
This commit adds a license header to fdt.h and libfdt_env.h
because the license was omitted.
U-Boot note: the u-boot libfdt_env.h header portion was not applied to
the u-boot libfdt_env.h because that file was created by Gerald Van Baren
(with a license header). - gvb
Ref: DTC commit
27cdc1b1
Signed-off-by: Justin Sobota <jsobota@ti.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
François Revol [Sat, 2 Feb 2013 23:52:21 +0000 (00:52 +0100)]
Fix typo
Ref: DTC commit
cc11e522
Signed-off-by: François Revol <revol@free.fr>
Simon Glass [Mon, 21 Jan 2013 20:59:18 +0000 (12:59 -0800)]
Export fdt_stringlist_contains()
This function is useful outside libfdt, so export it.
Ref: DTC commit
b7aa300e
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Tom Rini [Fri, 10 May 2013 01:04:32 +0000 (21:04 -0400)]
Merge branch 'patman' of git://git.denx.de/u-boot-x86
Stefan Kristiansson [Wed, 1 May 2013 09:32:46 +0000 (09:32 +0000)]
openrisc: move board linker script(s) to a common in cpu/
Unifies the openrisc boards linker scripts into a common one.
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Stefan Kristiansson [Wed, 1 May 2013 09:32:45 +0000 (09:32 +0000)]
openrisc: specify a memory region for u_boot_lists
Since there are two memory areas defined, vectors and ram,
the linker will error when neither of them are specified for a
section.
Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
Egbert Eich [Wed, 1 May 2013 01:13:19 +0000 (01:13 +0000)]
fs/ext4: Support device block sizes != 512 bytes
The 512 byte block size was hard coded in the ext4 file systems.
Large harddisks today support bigger block sizes typically 4096
bytes.
This patch removes this limitation.
Signed-off-by: Egbert Eich <eich@suse.com>
Anatolij Gustschin [Tue, 30 Apr 2013 11:15:33 +0000 (11:15 +0000)]
Fix references to the documentation files
Many boot image configuration files refer to the
appropriate documentation file, but these references
contain typos in the directory and file name. Fix
them. Also fix reference to doc/README.SPL file.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Michal Simek [Mon, 6 May 2013 04:11:58 +0000 (04:11 +0000)]
patman: Do not hardcode python path
Patman requires python 2.7.4 to run but it doesn't
need to be placed in /usr/bin/python.
Use env to ensure that the interpreter used is
the first one on environment's $PATH on system
with several versions of Python installed.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@ti.com>
Acked-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 2 May 2013 14:46:02 +0000 (14:46 +0000)]
buildman: Allow conflicting tags to avoid spurious errors
Conflicting tags can prevent buildman from building two series which exist
one after the other in a branch. There is no reason not to allow this sort
of workflow with buildman, so ignore conflicting tags in buildman.
Change-Id: I2231d04d8684fe0f8fe77f8ea107e5899a3da5e8
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@ti.com>
Lucian Cojocar [Sun, 28 Apr 2013 11:31:57 +0000 (11:31 +0000)]
env: throw an error when an empty key is used
If the environment contains an entry like "=value" "\0" we should throw
an error when parsing the environment. Otherwise, U-Boot will enter in
an infinite loop.
Signed-off-by: Lucian Cojocar <cojocar@gmail.com>
Marek Vasut [Sat, 27 Apr 2013 07:50:11 +0000 (07:50 +0000)]
build: Pull -DBUILD_TAG into separate ifdef
Currently the base setting for CFLAGS is split in two possibilities,
one with -DBUILD_TAG appended at the end and one without, the rest of
CFLAGS is the same in both cases. Change this so CFLAGS are always set
and the -DBUILD_TAG is appended in separate ifdef.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Tom Rini <trini@ti.com>
Reviewed-by: Otavio Salvador <otavio@ossystems.com.br>
Michal Simek [Wed, 24 Apr 2013 08:01:20 +0000 (10:01 +0200)]
gpio: Add support for microblaze xilinx GPIO
Microblaze uses gpio which is connected to the system reset.
Currently gpio subsystem wasn't used for it.
Add gpio driver and change Microblaze reset logic to be done
via gpio subsystem.
There are various configurations which Microblaze can have
that's why gpio_alloc/gpio_alloc_dual(for dual channel)
function has been introduced and gpio can be allocated
dynamically.
Adding several gpios IP is also possible and supported.
For listing gpio configuration please use "gpio status" command
This patch also remove one compilation warning:
microblaze-generic.c: In function 'do_reset':
microblaze-generic.c:38:47: warning: operation on '*1073741824u'
may be undefined [-Wsequence-point]
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 2 May 2013 10:49:18 +0000 (12:49 +0200)]
microblaze: bootm: Add support for loading initrd
fdt_initrd add additional information to DTB about initrd
addresses which are later used by kernel.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 2 May 2013 10:51:48 +0000 (12:51 +0200)]
microblaze: bootm: Fix coding style issues
Prepare place for new patch.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Kuan-Yu Kuo [Tue, 23 Apr 2013 07:47:47 +0000 (07:47 +0000)]
nds32: Use sections header to obtain link symbols
Include this header to get access to link symbols, which are otherwise
removed.
Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com>
Cc: Macpaul Lin <macpaul@gmail.com>
Tom Rini [Tue, 7 May 2013 14:09:00 +0000 (10:09 -0400)]
Merge branch 'master' of git://denx.de/git/u-boot-mmc
Fabio Estevam [Thu, 27 Dec 2012 08:51:08 +0000 (08:51 +0000)]
mmc: fsl_esdhc: Use calloc()
A malloc() followed by memset() can be simply replaced by calloc().
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Jaehoon Chung [Thu, 13 Dec 2012 20:07:12 +0000 (20:07 +0000)]
mmc: sdhci: return error when failed add_sdhci().
If failed the add_host(), it is reasonable that return value of
add_sdhci().
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Vipin Kumar [Wed, 5 Dec 2012 20:44:09 +0000 (20:44 +0000)]
sdhci: Add sdhci support for spear devices
Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Davide Bonfanti [Thu, 29 Nov 2012 01:06:53 +0000 (01:06 +0000)]
davinci, mmc: Added a delay reading ext CSD register
Without this additional delay, some eMMC don't negotiate properly bus width
Tested on:
- Toshiba THGBM2G8D8FBAIB
- Toshiba THGBM4G4D1HBAR
- Micron MTFC4GMVEA (the one giving the problem)
- Hynix H26M64002BNR
- SanDisk SDIN5E1-32G
Signed-off-by: Davide Bonfanti <davide.bonfanti@bticino.it>
Acked-by: Tom Rini <trini@ti.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Che-Liang Chiou [Wed, 28 Nov 2012 15:21:13 +0000 (15:21 +0000)]
mmc: Split device init to decouple OCR-polling delay
Most of time that MMC driver spends on initializing a device is polling
OCR (operation conditions register). To decouple this polling loop,
device init is split into two parts: The first part fires the OCR query
command, and the second part polls the result. So the caller is now no
longer bound to the OCR-polling delay; he may fire the query, go
somewhere and then come back later for the result.
To use this, call mmc_set_preinit() on any device which needs this.
This can save significant amounts of time on boot (e.g. 200ms) by
hiding the MMC init time behind other init.
Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Vivek Gautam [Wed, 24 Apr 2013 02:50:13 +0000 (02:50 +0000)]
usb: common: Use a global definition for 'min3'
We can use a common global method for calculating minimum of
3 numbers. Put the same in 'common header' and let 'ehci'
use it.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Acked-by: Tom Rini <trini@ti.com>
Vivek Gautam [Wed, 24 Apr 2013 02:50:12 +0000 (02:50 +0000)]
usb: fix: Fixing Port status and feature number constants
Fix the Port status bit constants and Port feature number
constants as a part of USB 2.0 and USB 3.0 Hub class.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Vivek Gautam [Wed, 24 Apr 2013 02:50:11 +0000 (02:50 +0000)]
usb: hub: Parallelize power-cycling of root-hub ports
Untill now we power-cycle (aka: disable power on a port
and re-enabling again) one port at a time.
Delay of 20ms for Port-power to change multiplies with
number of ports in this case.
So better we parallelize this process:
disable power on all ports, wait for port-power to stabilize
and then re-enable the power subsequently.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Bo Shen [Wed, 17 Apr 2013 00:09:51 +0000 (00:09 +0000)]
USB: ohci-at91: make OHCI work on at91sam9g10 SoC
The at91sam9g10 need to configure HCK0 to make OHCI work
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Vivek Gautam [Fri, 12 Apr 2013 11:04:38 +0000 (16:34 +0530)]
USB: SS: Add support for Super Speed USB interface
This adds usb framework support for super-speed usb, which will
further facilitate to add stack support for xHCI.
Signed-off-by: Vikas C Sajjan <vikas.sajjan@samsung.com>
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Vivek Gautam [Fri, 12 Apr 2013 11:04:37 +0000 (16:34 +0530)]
usb: hub: Fix enumration timeout
Patch
b6d7852c increases timeout for enumeration, taking
worst case to be 10 sec.
get_timer() api returns timestamp in milliseconds, which is
what we are checking in the do-while() loop in usb_hub_configure()
(get_timer(start) < CONFIG_SYS_HZ * 10).
This should give us a required check for 10 seconds, and thereby
we don't need to add additional mdelay of 100 microseconds in
each cycle.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Reviewed-by: Vipin Kumar <vipin.kumar@st.com>
Vivek Gautam [Fri, 12 Apr 2013 11:04:36 +0000 (16:34 +0530)]
usb: Update device class in usb device's descriptor
Fetch the device class into usb device's dwcriptors,
so that the host controller's driver can use this info
to differentiate between HUB and DEVICE.
Signed-off-by: Amar <amarendra.xt@samsung.com>
Vivek Gautam [Fri, 12 Apr 2013 11:04:35 +0000 (16:34 +0530)]
usb: hub: Power-cycle on root-hub ports
XHCI ports are powered on after a H/W reset, however
EHCI ports are not. So disabling and re-enabling power
on all ports invariably.
Signed-off-by: Amar <amarendra.xt@samsung.com>
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Vivek Gautam [Fri, 12 Apr 2013 11:04:34 +0000 (16:34 +0530)]
USB: Some cleanup prior to USB 3.0 interface addition
Some cleanup in usb framework, nothing much on feature side.
Signed-off-by: Vikas C Sajjan <vikas.sajjan@samsung.com>
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Vivek Gautam [Fri, 12 Apr 2013 11:04:33 +0000 (16:34 +0530)]
usb: common: Weed out USB_**_PRINTFs from usb framework
USB_PRINTF, USB_HUB_PRINTF, USB_STOR_PRINTF, USB_KBD_PRINTF
are nothing but conditional debug prints, depending on DEBUG.
So better remove them and use debug() simply.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Julius Werner [Thu, 28 Feb 2013 18:08:40 +0000 (18:08 +0000)]
usb: Add new command to set USB 2.0 port test modes
This patch adds a new 'usb test' command, that will set a port to a USB
2.0 test mode (see USB 2.0 spec 7.1.20). It supports all five test modes
on both downstream hub ports and ordinary device's upstream ports. In
addition, it supports EHCI root hub ports.
Signed-off-by: Julius Werner <jwerner@chromium.org>
Jim Lin [Wed, 27 Mar 2013 00:52:32 +0000 (00:52 +0000)]
USB: EHCI: Add weak functions to support new chip
Add ehci_get_port_speed() and ehci_set_usbmode() weak functions
for platform driver to support new chip.
Signed-off-by: Jim Lin <jilin@nvidia.com>
Tom Rini [Fri, 3 May 2013 13:19:43 +0000 (09:19 -0400)]
P1022DS: Set CONFIG_SPL_MAX_SIZE directly
With the u-boot-with-spl.bin rule calling $(OBJCOPY) with
CONFIG_SPL_PAD_TO, and CONFIG_SPL_PAD_TO defaulting to
CONFIG_SPL_MAX_SIZE we cannot use math here, so set it to 4096 rather
than 4 * 1024.
Signed-off-by: Tom Rini <trini@ti.com>
Tom Rini [Thu, 2 May 2013 23:54:32 +0000 (19:54 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Shaohui Xie [Mon, 25 Mar 2013 07:30:15 +0000 (07:30 +0000)]
powerpc/85xx: set USB2 default mode to 'device' for (super)hydra boards
The Hydra and Superhydra (P3041DS, P5020DS, and P5040DS) boards have a
second USB port that can be configured in either host, peripheral (aka
device), or OTG (on-the-go) mode. When configured in host mode, if
the port is connected to another USB host, damage to the board can
occur.
To avoid this, we change the default setting to peripheral mode. Ideally,
we'd set it to OTG mode, but currently there is no OTG support for
these boards.
Setting the hwconfig variable will also update the device tree, and so
Linux will configure the port for peripheral mode as well.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Timur Tabi <timur@tabi.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Xu Jiucheng [Mon, 25 Mar 2013 07:30:13 +0000 (07:30 +0000)]
powerpc/p1_p2_rdb_pc: Add a pin to reset the DDR chip for P1021RDB-PC
When P1021RDB-PC reboot system, the board will hung at uboot DDR
configuration. For P1021RDB-PC DDR reset pin is multiplex with
QE, so uboot will reserve this pin for QE and skip DDR reset.
Other platforms without QE will do this reset. This patch adds
a slight code to reset DDR chip by QE CE_PB8 pin for NAND and
NOR FLASH boot. For booting from SPI FALSH and SD card, it
seems possible to use the rom on chip to write to the GPIO
pins before configuring the DDR.
Signed-off-by: Xu Jiucheng <B37781@freescale.com>
Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Cristian Sovaiala [Mon, 25 Mar 2013 07:30:12 +0000 (07:30 +0000)]
powerpc/mpc85xx: Changed LIODN offset values
Extending LIODN offset range from 1-5 to 1-10
While using a qman portal with a higher index the LIODN offset
is incorrectly set, thus extending the range of offsets covers
all 10 qman portals
Signed-off-by: Cristian Sovaiala <cristian.sovaiala@freescale.com>
Acked-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
York Sun [Mon, 25 Mar 2013 07:30:11 +0000 (07:30 +0000)]
powerpc/mpc85xx: Extend workaround for erratum DDR_A003 to other SoCs
Erratum DDR_A003 applies to P5020, P3041, P4080, P3060, P2041, P5040.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Shengzhou Liu [Mon, 25 Mar 2013 07:30:10 +0000 (07:30 +0000)]
powerpc/p1010rdb: add readme document for p1010rdb
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Shengzhou Liu [Mon, 25 Mar 2013 07:30:09 +0000 (07:30 +0000)]
powerpc/p1010rdb: Change flexcan compatible string
Change flexcan compatible string from "fsl,flexcan-v1.0"
to "fsl,p1010-flexcan" to match the device tree.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Timur Tabi [Mon, 25 Mar 2013 07:30:08 +0000 (07:30 +0000)]
powerpc/85xx: add SerDes bank 4 lanes
Only some chips have four SerDes banks, so don't define lanes for a bank
that doesn't exist.
Signed-off-by: Timur Tabi <timur@tabi.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Zhicheng Fan [Mon, 25 Mar 2013 07:30:07 +0000 (07:30 +0000)]
qoriq/p1_p2_rdb_pc: USB device-tree fixups for P1020
Resolve P1020 second USB controller multiplexing with eLBC
- mandatory to mention USB2 in hwconfig string to select it
over eLBC, otherwise USB2 node is removed
- works only for SPI and SD boot
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Zhicheng Fan <B32736@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Poonam Aggrwal [Mon, 25 Mar 2013 07:30:06 +0000 (07:30 +0000)]
doc/ramboot.mpc85xx: Documented the RAMBOOT for MPC85xx
There could be scenarios where the user would like to manually(via JTAG)
configure the DDR/L2SRAM and load the bootloader binary onto DDR/L2SRAM.
This document explains thse usecases and the detailed explanation of what needs
to be done to use it.
Most of the code from CONFIG_SYS_RAMBOOT will be used except for small changes
of CCSRBAR etc.
The changes are not very large, but it is good to document them so that user
can get it working at once.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Prabhakar Kushwaha [Wed, 20 Mar 2013 18:36:06 +0000 (18:36 +0000)]
powerpc/mpc85xx:IFC Errata
A003399 is not valid for BSC913x
As per Errata list of BSC9131 and BSC9132, IFC Errata
A003399 is no more
valid. So donot compile its workaround.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Horst Kronstorfer [Wed, 13 Mar 2013 10:14:05 +0000 (10:14 +0000)]
mpc85xx: Fix a compiler warning when CONFIG_WATCHDOG is turned on
cpu.c:288:2:
warning: implicit declaration of function 'reset_85xx_watchdog'
[-Wimplicit-function-declaration]
Signed-off-by: Horst Kronstorfer <hkronsto@frequentis.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Xulei [Mon, 11 Mar 2013 17:56:34 +0000 (17:56 +0000)]
powerpc/85xx: Add workaround for errata USB-14 (enable on P204x/P3041/P50x0)
On P204x/P304x/P50x0 Rev1.0, USB transmit will result in false internal
multi-bit ECC errors, which has impact on performance, so software should
disable all ECC reporting from USB1 and USB2.
In formal release document, the errata number should be USB14 instead of USB138.
Signed-off-by: xulei <Lei.Xu@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: xulei <B33228@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Liu Gang [Thu, 7 Mar 2013 22:41:02 +0000 (22:41 +0000)]
powerpc/b4860qds: Add the tlb entries for SRIO interfaces
Add the tlb entries based on the configuration of the SRIO interfaces.
Every SRIO interface has 256M space:
#define CONFIG_SYS_SRIO1_MEM_VIRT 0xa0000000
#define CONFIG_SYS_SRIO1_MEM_PHYS 0xc20000000ull
#define CONFIG_SYS_SRIO2_MEM_VIRT 0xb0000000
#define CONFIG_SYS_SRIO2_MEM_PHYS 0xc30000000ull
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>