oweals/u-boot.git
5 years agorockchip: rk3188: add board_debug_uart_init()
Kever Yang [Fri, 29 Mar 2019 01:09:01 +0000 (09:09 +0800)]
rockchip: rk3188: add board_debug_uart_init()

Use board_debug_uart_init() for UART iomux init instead of
do it in board_init_f, and move the function to soc file so
that we can find all the soc/board setting in soc file and
use a common board file.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: rk3036: add board_debug_uart_init()
Kever Yang [Fri, 29 Mar 2019 01:09:00 +0000 (09:09 +0800)]
rockchip: rk3036: add board_debug_uart_init()

Use board_debug_uart_init() for UART iomux init instead of
do it in board_init_f, and move the function to soc file so
that we can find all the soc/board setting in soc file and
use a common board file.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[Fixed whitespace error:]
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip; kylin-rk3036: enabl DEBUG UART
Kever Yang [Fri, 29 Mar 2019 01:08:59 +0000 (09:08 +0800)]
rockchip; kylin-rk3036: enabl DEBUG UART

Enable debug uart for kylin board in defconfig.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: enable DEBUG_UART_BOARD_INIT by default
Kever Yang [Fri, 29 Mar 2019 01:08:58 +0000 (09:08 +0800)]
rockchip: enable DEBUG_UART_BOARD_INIT by default

All Rockchip SoCs use DEBUG_UART_BOARD_INIT to init per board
UART IOMUX, enable it by default.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: correct ARCH_SOC name
Kever Yang [Thu, 28 Mar 2019 03:01:24 +0000 (11:01 +0800)]
rockchip: correct ARCH_SOC name

The ARCH_SOC name default as 'rockchip' and we put all the
header file in 'arch/arm/include/asm/arch-rockchip/', but
the 'rockchip' is not the SOC name, let's correct it after
we update all the source file.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsiich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: use 'arch-rockchip' as header file path
Kever Yang [Thu, 28 Mar 2019 03:01:23 +0000 (11:01 +0800)]
rockchip: use 'arch-rockchip' as header file path

Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common
header file path, so that we can get the correct path directly.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: arm: use 'arch-rockchip' for common header
Kever Yang [Thu, 28 Mar 2019 03:01:22 +0000 (11:01 +0800)]
rockchip: arm: use 'arch-rockchip' for common header

rockchip platform header file is in 'arch-rockchip'
instead of arch-$(SOC) for all SoCs.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: add Kever Yang as co-custodian
Kever Yang [Wed, 3 Apr 2019 07:28:16 +0000 (15:28 +0800)]
rockchip: add Kever Yang as co-custodian

This updates MAINTAINERS and git-mailrc to add me as a
co-custodian for rockchip

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Tom Rini <trini@konsulko.com>
5 years agorockchip: arm: remove no use macro
Kever Yang [Thu, 28 Mar 2019 09:36:07 +0000 (17:36 +0800)]
rockchip: arm: remove no use macro

TIMER7_BASE is no used by source code now, remove it.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agork3288-board: remove pinctrl call for debug uart
Urja Rannikko [Fri, 22 Mar 2019 19:14:34 +0000 (19:14 +0000)]
rk3288-board: remove pinctrl call for debug uart

This failed and caused a boot failure on c201, and afaik
the pins should be setup by the new pinctrl driver.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agopinctrl: exit pinconfig_post_bind if there are no subnodes
Urja Rannikko [Fri, 22 Mar 2019 19:14:33 +0000 (19:14 +0000)]
pinctrl: exit pinconfig_post_bind if there are no subnodes

This fixes RK3288 SPL hanging or hitting this assert:
drivers/core/ofnode.c:183: ofnode_first_subnode: Assertion `ofnode_valid(node)' failed.

Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: rk3399: Add Orangepi RK3399 support
Jagan Teki [Mon, 11 Mar 2019 08:20:04 +0000 (13:50 +0530)]
rockchip: rk3399: Add Orangepi RK3399 support

Add initial support for Orangepi RK3399 board.

Specification
- Rockchip RK3399
- 2GB/4GB DDR3
- 16GB eMMC
- SD card slot
- RTL8211E 1Gbps
- AP6356S WiFI/BT
- HDMI In/Out, DP, MIPI DSI/CSI
- Mini PCIe
- Sensors, Keys etc
- DC12V-2A and DC5V-2A

Commit details about Linux DTS sync:
"arm64: dts: rockchip: Add support for the Orange Pi RK3399"
(sha1: d3e71487a790979057c0fdbf32f85033639c16e6)

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: dts: rk3399: Create initial rk3399-u-boot.dtsi
Jagan Teki [Mon, 11 Mar 2019 08:20:03 +0000 (13:50 +0530)]
rockchip: dts: rk3399: Create initial rk3399-u-boot.dtsi

u-boot,dm-pre-reloc is required for SDMMC booted rk3399 boards and
which is U-Boot specific devicetrees binding.

Move it on global rk3399-u-boot.dtsi file and rest of the U-Boot
bindings will move it future based on the requirement.

This would help to sync the devicetrees from Linux whenever required
instead of adding specific nodes.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: dts: rk3399: Sync rk3399-opp from Linux
Jagan Teki [Mon, 11 Mar 2019 08:20:02 +0000 (13:50 +0530)]
rockchip: dts: rk3399: Sync rk3399-opp from Linux

Sync rk3399-opp.dtsi from Linux.

Linux commit details about the rk3399-opp.dtsi sync:
"arm64: dts: rockchip: use SPDX-License-Identifier"
(sha1: 4ee99cebd486238ac433da823b95cc5f8d8a6905)

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: spi: make optimised receive-handler unaligned-safe
Philipp Tomsich [Sun, 3 Feb 2019 15:17:33 +0000 (16:17 +0100)]
rockchip: spi: make optimised receive-handler unaligned-safe

To support unaligned output buffers (i.e. 'in' in the terminology of
the SPI framework), this change splits each 16bit FIFO element after
reading and writes them to memory in two 8bit transactions.  With this
change, we can now always use the optimised mode for receive-only
transcations independent on the alignment of the target buffer.

Given that we'll run with caches on, the impact should be negligible:
as expected, this has no adverse impact on throughput if running with
a 960MHz LPLL configuration.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: spi: add driver-data and a 'rxonly_manages_fifo' flag
Philipp Tomsich [Sun, 3 Feb 2019 15:17:32 +0000 (16:17 +0100)]
rockchip: spi: add driver-data and a 'rxonly_manages_fifo' flag

The SPI controller's documentation (I only had access to the RK3399,
RK3368 and PX30 TRMs) specifies that, when operating in master-mode,
the controller will stop the SCLK to avoid RXFIFO overruns and TXFIFO
underruns.  Looks like my worries that we'd need to support DMA-330
(aka PL330) to make any further progress were unfounded.

This adds a driver-data structure to capture hardware-specific
settings of individual controller instances (after all, we don't know
if all versions are well-behaved) and adds a 'master_manages_fifo'
flag to it.  The first use of said flag is in the optimised
receive-only transfer-handler, which can now request 64Kframe
(i.e. 128KByte) bursts of data on each reprogramming of CTRLR1
(i.e. every time through the loop).

This improves throughput to 46.85MBit/s (a 94.65% bus-utilisation).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: spi: add optimised receive-only implementation
Philipp Tomsich [Sun, 3 Feb 2019 15:17:31 +0000 (16:17 +0100)]
rockchip: spi: add optimised receive-only implementation

For the RK3399-Q7 we recommend storing SPL and u-boot.itb in the
on-module 32MBit (and sometimes even larger, if requested as part of a
configure-to-order configuration) SPI-NOR flash that is clocked for a
bitrate of 49.5MBit/s and connected in a single-IO configuration (the
RK3399 only supports single-IO for SPI).

Unfortunately, the existing SPI driver is excruciatingly slow at
reading out large chunks of data (in fact it is just as slow for small
chunks of data, but the overheads of the driver-framework make it less
noticeable): before this change, the throughput on a 4MB read from
SPI-NOR is 8.47MBit/s which equates a 17.11% bus-utilisation.

To improve on this, this commit adds an optimised receive-only
transfer (i.e.: out == NULL) handler that hooks into the main transfer
function and processes data in 16bit frames (utilising the full with
of each FIFO element).  As of now, the receive-only handler requires
the in-buffer to be 16bit aligned.  Any lingering data (i.e. either if
the in-buffer was not 16-bit aligned or if an odd number of bytes are
to be received) will be handled by the original 8bit reader/wirter.

Given that the SPI controller's documentation does not guarantuee any
interlocking between the RXFIFO and the master SCLK, the transfer loop
will be restarted for each chunk of 32 frames (i.e. 64 bytes).

With this new receive-only transfer handler, the throughput for a 4MB
read increases to 36.28MBit/s (i.e. 73.29% bus-utilisation): this is a
4x improvement over the baseline.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reported-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Series-Cc: Klaus Goger <klaus.goger@theobroma-systems.com>
Series-Cc: Christoph Muellner <christoph.muellner@theobroma-systems.com>

5 years agorockchip: spi: only wait for completion, if transmitting
Philipp Tomsich [Sun, 3 Feb 2019 15:17:30 +0000 (16:17 +0100)]
rockchip: spi: only wait for completion, if transmitting

The logic in the main transmit loop took a bit of reading the TRM to
fully understand (due to silent assumptions based in internal logic):
the "wait until idle" at the end of each iteration through the loop is
required for the transmit-path as each clearing of the ENA register
(to update run-length in the CTRLR1 register) will implicitly flush
the FIFOs... transmisson can therefore not overlap loop iterations.

This change adds a comment to clarify the reason/need for waiting
until the controller becomes idle and wraps the entire check into an
'if (out)' to make it clear that this is required for transfers with a
transmit-component only (for transfers having a receive-component,
completion of the transmit-side is trivially ensured by having
received the correct number of bytes).

The change does not increase execution time measurably in any of my
tests.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: spi: consistently use false/true with rkspi_enable_chip
Philipp Tomsich [Sun, 3 Feb 2019 15:17:29 +0000 (16:17 +0100)]
rockchip: spi: consistently use false/true with rkspi_enable_chip

While rkspi_enable_chip is called with true/false everywhere else in
the file, one call site uses '0' to denot 'false'.
This change this one parameter to 'false' and effects consistency.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: spi: fix off-by-one in chunk size computation
Philipp Tomsich [Sun, 3 Feb 2019 15:17:28 +0000 (16:17 +0100)]
rockchip: spi: fix off-by-one in chunk size computation

The maximum transfer length (in a single transaction) for the Rockchip
SPI controller is 64Kframes (i.e. 0x10000 frames) of 8bit or 16bit
frames and is encoded as (num_frames - 1) in CTRLR1.  The existing
code subtracted the "minus 1" twice for a maximum transfer length of
0xffff (64K - 1) frames.

While this is not strictly an error (the existing code is correct, but
leads to a bit of head-scrating), fix this off-by-one situation.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: spi: remove unused code and fields in priv
Philipp Tomsich [Sun, 3 Feb 2019 15:17:27 +0000 (16:17 +0100)]
rockchip: spi: remove unused code and fields in priv

Even though the priv-structure and the claim-bus function contain
logic for 16bit frames and for unidirectional transfer modes, neither
of these is used anywhere in the driver.

This removes the unused (as in "has no effect") logic and fields.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: spi: add debug message for delay in CS toggle
Philipp Tomsich [Sun, 3 Feb 2019 15:17:26 +0000 (16:17 +0100)]
rockchip: spi: add debug message for delay in CS toggle

In analysing delays introduced for large SPI reads, the absence of any
indication when a delay was inserted (to ensure the CS toggling is
observed by devices) became apparent.

Add an additional debug-only debug message to record the insertion and
duration of any delay (note that the debug-message will cause a delay
on-top of the delay-duration).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
5 years agorockchip: rk3399-puma: support Gigadevice SPI-NOR flash
Philipp Tomsich [Sun, 3 Feb 2019 14:59:23 +0000 (15:59 +0100)]
rockchip: rk3399-puma: support Gigadevice SPI-NOR flash

Over the last quarter, a part of our production has used NOR flash
from Gigadevice in addition to the Winbond parts that we typically
source.  This requires the SPI_FLASH_GIGADEVICE config to be set.

Enable SPI_FLASH_GIGADEVICE in the board's default defconfig.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Klaus Goger <klaus.goger@theobroma-systems.com>
5 years agoPrepare v2019.07-rc1 v2019.07-rc1
Tom Rini [Tue, 30 Apr 2019 01:54:04 +0000 (21:54 -0400)]
Prepare v2019.07-rc1

Signed-off-by: Tom Rini <trini@konsulko.com>
5 years agoconfigs: move CONFIG_SPL_TEXT_BASE to Kconfig
Simon Goldschmidt [Sun, 30 Sep 2018 12:31:53 +0000 (14:31 +0200)]
configs: move CONFIG_SPL_TEXT_BASE to Kconfig

Moved CONFIG_SPL_TEXT_BASE to common/spl/Kconfig and migrate existing
values.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
[trini: Re-run migration]
Signed-off-by: Tom Rini <trini@konsulko.com>
5 years agoconfigs: Resync with savedefconfig
Tom Rini [Mon, 29 Apr 2019 19:54:04 +0000 (15:54 -0400)]
configs: Resync with savedefconfig

Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
5 years agoRevert "fs: btrfs: fix false negatives in ROOT_ITEM search"
Tom Rini [Sat, 27 Apr 2019 15:34:55 +0000 (11:34 -0400)]
Revert "fs: btrfs: fix false negatives in ROOT_ITEM search"

Per Pierre this change shouldn't have been applied as it was superseded
by "fs: btrfs: fix btrfs_search_tree invalid results" which is also
applied now as 1627e5e5985d.

This reverts commit 633967f9818cb6a0e87ffa8cba33148a5bcc6edb.

Signed-off-by: Tom Rini <trini@konsulko.com>
5 years agoMerge branch '2019-04-27-master-imports'
Tom Rini [Sat, 27 Apr 2019 14:42:36 +0000 (10:42 -0400)]
Merge branch '2019-04-27-master-imports'

- Various vexpress, taurus, da850evm, lpc32xx, brxre1 fixes/updates
- btrfs fixes
- Add AM65x HS EVM
- Other small fixes

5 years agoavb: add support for named persistent values
Igor Opaniuk [Tue, 9 Apr 2019 13:38:14 +0000 (15:38 +0200)]
avb: add support for named persistent values

AVB 2.0 spec. revision 1.1 introduces support for named persistent values
that must be tamper evident and allows AVB to store arbitrary key-value
pairs [1].

Introduce implementation of two additional AVB operations
read_persistent_value()/write_persistent_value() for retrieving/storing
named persistent values.

Correspondent pull request in the OP-TEE OS project repo [2].

[1]: https://android.googlesource.com/platform/external/avb/+/android-9.0.0_r22
[2]: https://github.com/OP-TEE/optee_os/pull/2699

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com>
5 years agoarm: dts: add missing vexpress device trees
Heinrich Schuchardt [Sun, 21 Apr 2019 21:54:37 +0000 (23:54 +0200)]
arm: dts: add missing vexpress device trees

Add the device trees for

* vexpress_ca5x2_defconfig
* vexpress_ca9x4_defconfig
* vexpress_ca15_tc2_defconfig

as available in Linux 5.1 rc5.

We are using the vexpress_ca15_tc2_defconfig and vexpress_ca9x4_defconfig
for Travis testing via QEMU.

The UEFI base Embedded Base Boot Requirements Specification (EBBR) requires
that an embedded board either provides a device tree or an ACPI table.

All block devices are meant to be moved to the driver model. On ARM this
requires a device tree.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
5 years agosysreset: syscon: remove POWER reset cause
Patrick Delaunay [Thu, 18 Apr 2019 15:16:21 +0000 (17:16 +0200)]
sysreset: syscon: remove POWER reset cause

The sysreset of 'POWER' type is a PMIC reset defined as
'remove and restore power'.
So normally only COLD/WARN is supported by sysreset_syscon.

This modification allows to use the function sysreset_walk(SYSRESET_POWER)
when it is supported by PMIC driver (see example in stpmic1).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
5 years agodoc: delete long-obsolete README.ARM-memory-map
Robert P. J. Day [Thu, 18 Apr 2019 12:00:48 +0000 (08:00 -0400)]
doc: delete long-obsolete README.ARM-memory-map

As far back as 2011, "_armboot_start" was being described as "no
longer defined":

 commit 297f18ac0fbeef30ba1c17fe131ca75f09a6e7cf
 Author: Greg Ungerer <greg.ungerer@opengear.com>
 Date:   Fri Sep 9 22:23:34 2011 +1000

   CM4000: fix broken flash base for OpenGear boards

   Use _bss_start_ofs as the size of the boot loader code+data that we want
   to protect in the flash. This replaces use of the no longer defined
   _armboot_start.

5 years ago.gitignore: Ignore .log files
Baruch Siach [Thu, 18 Apr 2019 07:46:58 +0000 (10:46 +0300)]
.gitignore: Ignore .log files

The generated flash.log file that mach-imx uses for MKIMAGEOUTPUT is not
covered by any other ignore pattern. Ignore all *.log files.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
5 years agoARM: da850evm: Fix TI boot scripts for MMC
Adam Ford [Wed, 17 Apr 2019 18:24:33 +0000 (13:24 -0500)]
ARM: da850evm: Fix TI boot scripts for MMC

The da850evm include environment/ti/mmc.h and places
DEFAULT_MMC_TI_ARGS, defined int that file, in
CONFIG_EXTRA_ENV_SETTINGS.  This has been broken for some time
since neither CMD_PART nor CMD_UUID are available, so manually
changing the environmental variables was always required before
booting from MMC. With this patch, these scripts should work
again, and by default they point to mmc 0, partition 2, and
the dtb file exists in a /boot directory on partition 2.

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agoARM: da850evm: Fix broken SPI Flash
Adam Ford [Wed, 17 Apr 2019 16:21:56 +0000 (11:21 -0500)]
ARM: da850evm: Fix broken SPI Flash

A previous patch converted a bunch of settings for CONFIG_SF_DEFAULT
but it broke the SPI Flash which now prevents booting.  This patch
now correctly sets CONFIG_SF_DEFAULT_SPEED=30000000 to match what it
was before the conversion.

Fixes: 14453fbfadc2 ("Convert CONFIG_SF_DEFAULT_* to Kconfig")

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agofw_env: Fix double free
Björn Stenberg [Wed, 17 Apr 2019 14:56:54 +0000 (16:56 +0200)]
fw_env: Fix double free

addr0 is being freed twice, leading to segmentation fault

Signed-off-by: Björn Stenberg <bjorn@haxx.se>
5 years agoarm: lpc32xx: Fix timer initialization
Gregory CLEMENT [Wed, 17 Apr 2019 09:48:45 +0000 (11:48 +0200)]
arm: lpc32xx: Fix timer initialization

The match controller register is not cleared during
initialization. However, some bits of this register may reset the TC if
tnMRx match it.

As we can't make any assumption about how U-Boot is launched by the first
stage bootloader (such as S1L) clearing this register ensure that the
timers work as expected.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
5 years agonet: lpc32xx: Use IRAM for transmit buffer
Gregory CLEMENT [Wed, 17 Apr 2019 09:41:42 +0000 (11:41 +0200)]
net: lpc32xx: Use IRAM for transmit buffer

Since the introduction of the driver, some memory in IRAM is reserved for
the TX buffers.

However there are not used but instead of it, it is the buffer provided
by the net stack which is used. As stated in the comment of the driver,
not using the IRAM buffer could cause cache issue and lower the
throughput.

For the second argument it is less the case for transmitting buffers
because the throughput gain in IRAM is mitigated by the time to copy the
data from RAM to IRAM, but the first argument is still valid and indeed
this patch fixes issue seen with Ethernet on some boards

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
5 years agomtd: nand: raw: Fix CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT behavior
Gregory CLEMENT [Wed, 17 Apr 2019 09:22:05 +0000 (11:22 +0200)]
mtd: nand: raw: Fix CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT behavior

The purpose of "mtd: nand: raw: allow to disable unneeded ECC layouts"
was to allow disabling the default ECC layouts if a driver is known to
provide its own ECC layout. However, this commit did the opposite and
disabled the default layout when it was _not_ selected.

It breaks all the NAND drivers not providing their own ECC layout this
patch fix this situation.

It was tested with the lpc32xx_nand_slc driver.

Fixes: a38c3af868 ("mtd: nand: raw: allow to disable unneeded ECC layouts")
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Tested-by: Eugen Hristev <eugen.hristev@microchip.com>
5 years agodtb_platdata.py: prevent define generation of alias
Heiko Schocher [Tue, 16 Apr 2019 11:31:58 +0000 (13:31 +0200)]
dtb_platdata.py: prevent define generation of alias

generate define for an alias only if the struct is not
created already.

This prevents compilerwarning:
  PLAT    spl/dts/dt-platdata.o
spl/dts/dt-platdata.c:11:46: error: missing braces around initializer [-Werror=missing-braces]
 static const struct dtd_simple_bus dtv_ahb = {
                                              ^
spl/dts/dt-platdata.c:20:46: error: missing braces around initializer [-Werror=missing-braces]
 static const struct dtd_simple_bus dtv_apb = {
                                              ^
cc1: all warnings being treated as errors

on the at91 based taurus board. Reason is in at91sam9260.dtsi
is defined:

ahb {
        compatible = "simple-bus";
        ranges;

and later:

pinctrl: pinctrl@fffff400 {
        compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
        ranges = <0xfffff400 0xfffff400 0x600>;

without this patch dtoc generates:

struct dtd_atmel_at91rm9200_pinctrl {
fdt32_t atmel_mux_mask[6];
fdt32_t ranges[3];
fdt32_t reg[6];
};

struct dtd_simple_bus {
        bool            ranges;
};

"#define dtd_simple_bus dtd_atmel_at91rm9200_pinctrl"

and the line with "define dtd_simple_bus..." introduces
the warning. This define is not needed.

Signed-off-by: Heiko Schocher <hs@denx.de>
5 years agofs: btrfs: fix btrfs_search_tree invalid results
Pierre Bourdon [Tue, 16 Apr 2019 00:47:14 +0000 (02:47 +0200)]
fs: btrfs: fix btrfs_search_tree invalid results

btrfs_search_tree should return the first item in the tree that is
greater or equal to the searched item.

The search algorithm did not properly handle the edge case where the
searched item is higher than the last item of the node but lower than
the first item of the next node. Instead of properly returning the first
item of the next node, it was returning an invalid path pointer
(pointing to a non-existent item after the last item of the node + 1).

This fixes two issues in the btrfs driver:
  - Looking for a ROOT_ITEM could fail if it was the first item of its
    leaf node.
  - Iterating through DIR_INDEX entries (for readdir) could fail if the
    first DIR_INDEX entry was the first item of a leaf node.

Signed-off-by: Pierre Bourdon <delroth@gmail.com>
Cc: Marek Behun <marek.behun@nic.cz>
5 years agofs: fat: Build only if CONFIG_FS_FAT=y
Ismael Luceno Cortes [Mon, 15 Apr 2019 11:19:15 +0000 (11:19 +0000)]
fs: fat: Build only if CONFIG_FS_FAT=y

Signed-off-by: Ismael Luceno <ismael.luceno@silicon-gears.com>
5 years agofs: btrfs: fix false negatives in ROOT_ITEM search
Pierre Bourdon [Sat, 13 Apr 2019 21:50:49 +0000 (23:50 +0200)]
fs: btrfs: fix false negatives in ROOT_ITEM search

ROOT_ITEMs in btrfs are referenced without knowing their actual "offset"
value. To perform these searches using only two items from the key, the
btrfs driver uses a special "btrfs_search_tree_key_type" function.

The algorithm used by that function to transform a 3-tuple search into a
2-tuple search was subtly broken, leading to items not being found if
they were the first in their tree node.

This commit fixes btrfs_search_tree_key_type to properly behave in these
situations.

Signed-off-by: Pierre Bourdon <delroth@gmail.com>
Cc: Marek Behun <marek.behun@nic.cz>
5 years agodoc: Update info on using K3 secure devices
Andrew F. Davis [Fri, 12 Apr 2019 16:54:48 +0000 (12:54 -0400)]
doc: Update info on using K3 secure devices

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Andreas Dannenberg <dannenberg@ti.com>
5 years agoconfigs: Add configs for AM65x High Security EVM
Andrew F. Davis [Fri, 12 Apr 2019 16:54:47 +0000 (12:54 -0400)]
configs: Add configs for AM65x High Security EVM

Add new defconfig files for the AM65x High Security EVM.

This defconfigs are the same as for the non-secure part, except for:
    CONFIG_TI_SECURE_DEVICE option set to 'y'
    CONFIG_FIT_IMAGE_POST_PROCESS option set to 'y'
    CONFIG_SPL_FIT_IMAGE_POST_PROCESS option set to 'y'

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Andreas Dannenberg <dannenberg@ti.com>
5 years agoarm: mach-k3: Add secure device build support
Andrew F. Davis [Fri, 12 Apr 2019 16:54:46 +0000 (12:54 -0400)]
arm: mach-k3: Add secure device build support

K3 HS devices require signed binaries for boot, use the SECDEV tools
to sign the boot artifacts during build.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Andreas Dannenberg <dannenberg@ti.com>
5 years agoarm: mach-k3: Add secure device support
Andrew F. Davis [Fri, 12 Apr 2019 16:54:45 +0000 (12:54 -0400)]
arm: mach-k3: Add secure device support

K3 devices have High Security (HS) variants along with the non-HS already
supported. Like the previous generation devices (OMAP/Keystone2) K3
supports boot chain-of-trust by authenticating and optionally decrypting
images as they are unpacked from FIT images. Add support for this here.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Andreas Dannenberg <dannenberg@ti.com>
5 years agofirmware: ti_sci: Modify auth_boot TI-SCI API to match new version
Andrew F. Davis [Fri, 12 Apr 2019 16:54:44 +0000 (12:54 -0400)]
firmware: ti_sci: Modify auth_boot TI-SCI API to match new version

SYSFW version 2019.01 introduces a slightly modified version of this API,
add support for it here.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Andreas Dannenberg <dannenberg@ti.com>
5 years agofirmware: ti_sci: Add support for firewall management
Andrew F. Davis [Fri, 12 Apr 2019 16:54:43 +0000 (12:54 -0400)]
firmware: ti_sci: Add support for firewall management

TI-SCI message protocol provides support for controlling the firewall
configurations available in SoC.

Introduce support for the set of TI-SCI message protocol APIs that
provide us with this capability of controlling firewalls.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Andreas Dannenberg <dannenberg@ti.com>
5 years agoarm: K3: Avoid use of MCU_PSRAM0 before SYSFW is loaded
Andrew F. Davis [Fri, 12 Apr 2019 16:54:42 +0000 (12:54 -0400)]
arm: K3: Avoid use of MCU_PSRAM0 before SYSFW is loaded

On HS devices the 512b region of reset isolated memory called
MCU_PSRAM0 is firewalled by default. Until SYSFW is loaded we
cannot use this memory. It is only used to store a single value
left at the end of SRAM by ROM that will be needed later. Save
that value to a global variable stored in the .data section.
This section is used as .bss will be cleared between saving
this value and using it.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
5 years agomain: add new bootstage ID for entering cli loop
Heiko Schocher [Fri, 12 Apr 2019 10:37:03 +0000 (12:37 +0200)]
main: add new bootstage ID for entering cli loop

adding a new bootstage ID:
BOOTSTAGE_ID_ENTER_CLI_LOOP

Signed-off-by: Heiko Schocher <hs@denx.de>
5 years agocmd: pxe: Display splashscreen from extlinux.conf input
Patrice Chotard [Thu, 11 Apr 2019 09:13:13 +0000 (11:13 +0200)]
cmd: pxe: Display splashscreen from extlinux.conf input

The objective is to provide a simple way to retrieve a BMP file,
and display it as splashscreen, from extlinux.conf file input.

For this, we take example on https://www.syslinux.org/wiki/
index.php?title=Menu#The_advanced_menu_system
and more particularly on MENU BACKGROUND chapter.
For this, add "menu background" support in pxe command.

As example, extlinux.conf content will look like:

# Generic Distro Configuration file generated by OpenEmbedded
menu title Select the boot mode
TIMEOUT 20
menu background ../splash.bmp
DEFAULT stm32mp157c-ev1-sdcard
LABEL stm32mp157c-ev1-sdcard
KERNEL /uImage
FDT /stm32mp157c-ev1.dtb
APPEND root=/dev/mmcblk0p6 rootwait rw earlyprintk console=ttySTM0,115200

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
5 years agotools/Makefile: get openssl CFLAGS from pkg-config
Pierre Bourdon [Wed, 10 Apr 2019 22:58:49 +0000 (00:58 +0200)]
tools/Makefile: get openssl CFLAGS from pkg-config

Fixes building mkimage on systems where OpenSSL header files do not
live in the standard include path.

Signed-off-by: Pierre Bourdon <delroth@gmail.com>
5 years agodisk: part: fix typo
Heinrich Schuchardt [Wed, 10 Apr 2019 16:59:26 +0000 (18:59 +0200)]
disk: part: fix typo

%g/rathen then/rather than/

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
5 years agoboard/BuR/brxre1: use common resetcontroller implementation
Hannes Schmelzer [Wed, 10 Apr 2019 12:13:16 +0000 (14:13 +0200)]
board/BuR/brxre1: use common resetcontroller implementation

The handling of regarding bootmode and early setup has been moved to
central location 'common/br_resetc.c', so use this on brxre1 board.

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
5 years agoboard/BuR/brxre1: cosmetic cleanup
Hannes Schmelzer [Wed, 10 Apr 2019 12:13:15 +0000 (14:13 +0200)]
board/BuR/brxre1: cosmetic cleanup

- fixup coding style
- drop unused 'PUSH_KEY' define

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
5 years agoboard/BuR/common: add br resetcontoller implementation
Hannes Schmelzer [Wed, 10 Apr 2019 12:13:14 +0000 (14:13 +0200)]
board/BuR/common: add br resetcontoller implementation

On many B&R boards we have a reset-controller, responsible for very
early board-bringup (voltages, clocks, ...) and bootmode selection.

To be ready for adding more B&R boards to source tree while avoiding
duplicate code, we add the resetcontroller implementation to the common
part of B&R boards.

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
5 years agoboard/BuR/common: add 'brdefaulip_setup' function
Hannes Schmelzer [Wed, 10 Apr 2019 12:13:13 +0000 (14:13 +0200)]
board/BuR/common: add 'brdefaulip_setup' function

Many B&R boards are equipped with an I2C-EEPROM where various
information can be stored.

Today there is only a single byte for 'board_id' used.

We write this 'board_id' into environment for later use during boot.

If the value != 0xFF, meaning the byte is programmed, we modify the
"brdefaultip" environment variable for setting an IP-Address based on
board_id.

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
5 years agoboard/BuR/common: cosmetic: move 'overwrite_console' up to more related stuff
Hannes Schmelzer [Wed, 10 Apr 2019 12:13:12 +0000 (14:13 +0200)]
board/BuR/common: cosmetic: move 'overwrite_console' up to more related stuff

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
5 years agoboard/BuR/common: prepare for compiling common into non AM33XX boards
Hannes Schmelzer [Wed, 10 Apr 2019 12:13:11 +0000 (14:13 +0200)]
board/BuR/common: prepare for compiling common into non AM33XX boards

Today the BuR common stuff is only used on AM33XX boards. In future we
plan to have many other platforms than AM33XX so we have to move arch-
specific #include(s) to responsible #ifdef sections. By the way we drop
unneeded #include(s).

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
5 years agoMerge git://git.denx.de/u-boot-marvell
Tom Rini [Fri, 26 Apr 2019 17:50:00 +0000 (13:50 -0400)]
Merge git://git.denx.de/u-boot-marvell

- Add DM based generic watchdog start and reset implementation
  and remove all ad-hoc implementations (Stefan)
- Move mv_sdhci to DM (Pierre)
- Misc turris_omnia updates (Pierre)
- Change openrd targets to correctly build again (size changes
  and fixes to the dts targets) and bring it back into Travis
  builds (Stefan)
- Add Kirkwood db-88f6281-bp board (Chris)

5 years agoMerge branch 'master' of git://git.denx.de/u-boot-socfpga
Tom Rini [Fri, 26 Apr 2019 17:49:58 +0000 (13:49 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-socfpga

5 years agoarm: kirkwood: openrd: Mark openrd boards as maintained again
Stefan Roese [Thu, 25 Apr 2019 09:53:18 +0000 (11:53 +0200)]
arm: kirkwood: openrd: Mark openrd boards as maintained again

With the latest size increase of the openrd boards, they all compile
clean again. Let's mark them as maintained again and add the Travis
job.

Please note that I can only compile-test these targets as I don't
have access to one of those boards.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Albert ARIBAUD <albert-u-boot@aribaud.net>
Cc: Vagrant Cascadian <vagrant@debian.org>
Cc: Chris Packham <judge.packham@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
5 years agowatchdog: at91sam9_wdt: Remove now superfluous wdt start and reset
Stefan Roese [Thu, 11 Apr 2019 13:58:47 +0000 (15:58 +0200)]
watchdog: at91sam9_wdt: Remove now superfluous wdt start and reset

With the new generic function, the scattered other functions are now
removed to be replaced by the generic one. The new version also enables
the configuration of the watchdog timeout via the DT "timeout-sec"
property (if enabled via CONFIG_OF_CONTROL).

The watchdog servicing is enabled via CONFIG_WATCHDOG.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
5 years agowatchdog: mpc8xx_wdt: Watchdog driver and macros cleanup
Stefan Roese [Thu, 11 Apr 2019 13:58:46 +0000 (15:58 +0200)]
watchdog: mpc8xx_wdt: Watchdog driver and macros cleanup

With the generic watchdog driver now implemented, this patch removes
some legacy stuff from the MPC8xx watchdog driver and its Kconfig
integration. CONFIG_MPC8xx_WATCHDOG is completely removed and
hw_watchdog_reset() is made static, as the watchdog will now get
serviced via the DM infrastructure if enabled via CONFIG_WATCHDOG.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Christophe Leroy <christophe.leroy@c-s.fr>
5 years agowatchdog: cadence: Remove driver specific "timeout-sec" handling
Stefan Roese [Thu, 11 Apr 2019 13:58:45 +0000 (15:58 +0200)]
watchdog: cadence: Remove driver specific "timeout-sec" handling

Now that we have a generic DT property "timeout-sec" handling, the
driver specific implementation can be dropped.

This patch also changes the timeout restriction to the min and max
values (clipping). Before this patch, the value provided via
"timeout-sec" was used if the parameter was too high or low. Now
the driver specific min and max values are used instead.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Michal Simek <michal.simek@xilinx.com> (on zcu100)
5 years agowatchdog: Implement generic watchdog_reset() version
Stefan Roese [Thu, 11 Apr 2019 13:58:44 +0000 (15:58 +0200)]
watchdog: Implement generic watchdog_reset() version

This patch tries to implement a generic watchdog_reset() function that
can be used by all boards that want to service the watchdog device in
U-Boot. This watchdog servicing is enabled via CONFIG_WATCHDOG.

Without this approach, new boards or platforms needed to implement a
board specific version of this functionality, mostly copy'ing the same
code over and over again into their board or platforms code base.

With this new generic function, the scattered other functions are now
removed to be replaced by the generic one. The new version also enables
the configuration of the watchdog timeout via the DT "timeout-sec"
property (if enabled via CONFIG_OF_CONTROL).

This patch also adds a new flag to the GD flags, to flag that the
watchdog is ready to use and adds the pointer to the watchdog device
to the GD. This enables us to remove the global "watchdog_dev"
variable, which was prone to cause problems because of its potentially
very early use in watchdog_reset(), even before the BSS is cleared.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: "Marek Behún" <marek.behun@nic.cz>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Maxim Sloyko <maxims@google.com>
Cc: Erik van Luijk <evanluijk@interact.nl>
Cc: Ryder Lee <ryder.lee@mediatek.com>
Cc: Weijie Gao <weijie.gao@mediatek.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: "Álvaro Fernández Rojas" <noltari@gmail.com>
Cc: Philippe Reynes <philippe.reynes@softathome.com>
Cc: Christophe Leroy <christophe.leroy@c-s.fr>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Michal Simek <michal.simek@xilinx.com> (on zcu100)
5 years agoarm: mvebu: turris_omnia: Use thumb instructions in SPL to save space
Stefan Roese [Wed, 24 Apr 2019 14:05:06 +0000 (16:05 +0200)]
arm: mvebu: turris_omnia: Use thumb instructions in SPL to save space

With the latest changes to the drivers (SPI_FLASH_SPANSION etc), Travis
reports that the SPL image is too big. Let's use the thumb instructions
in SPL to save some space and make the image fit again.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Baruch Siach <baruch@tkos.co.il>
Cc: Marek Behun <marek.behun@nic.cz>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
5 years agoARM: kirkwood: enable CONFIG_DM_USB on db-88f6281-bp
Chris Packham [Sat, 13 Apr 2019 08:21:19 +0000 (20:21 +1200)]
ARM: kirkwood: enable CONFIG_DM_USB on db-88f6281-bp

Switch to the driver model for USB on the db-88f6281-bp board.
CONFIG_BLK can't be enabled yet because mvebu_mmc.c needs converting.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
5 years agoARM: kirkwood: add db-88f6281-bp board
Chris Packham [Sat, 13 Apr 2019 08:21:18 +0000 (20:21 +1200)]
ARM: kirkwood: add db-88f6281-bp board

This is Marvell's Kirkwood development board. It has the following
features

 - 512M DDR2
 - 2 PCI connectors
 - 1 x1 PCI-e interface
 - 1 Gigabit Ethernet Port
 - 2 SATA Ports
 - USB 2.0 Interface
 - SDIO
 - 128M NAND Flash
 - 16M SPI Flash

It can be strapped to boot from SPI or NAND so there are two defconfigs
(one per boot media).

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
5 years agoarm: kirkwood: lsxl: add note about sata in README
Michael Walle [Thu, 11 Apr 2019 13:36:21 +0000 (15:36 +0200)]
arm: kirkwood: lsxl: add note about sata in README

The boot commands have changed in the environment. Add a note about the
incompatible change and how resolve the issue in the board's README.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
5 years agoarm: kirkwood: openrd: Increase U-Boot size in flash to make it fit
Stefan Roese [Thu, 11 Apr 2019 10:33:36 +0000 (12:33 +0200)]
arm: kirkwood: openrd: Increase U-Boot size in flash to make it fit

We have run now multiple times into size issues with the openrd
board port. To finally fix this, this patch now moves the U-Boot size
from 0x6.0000 to 0x8.0000, giving enough space for the next time.

This also changes the environment location and potentially the
MTD partitioning, but I see no better fix for now. Especially since
this board does not have an active maintainer.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
5 years agoarm: kirkwood: openrd: Remove superfluous CONFIG_ENV_ADDR
Stefan Roese [Thu, 11 Apr 2019 10:33:35 +0000 (12:33 +0200)]
arm: kirkwood: openrd: Remove superfluous CONFIG_ENV_ADDR

Remove the superfluous CONFIG_ENV_ADDR definition. Its not needed
as CONFIG_ENV_OFFSET is also set to the same value.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
5 years agoarm: kirkwood: dts: Add openrd-* dtb makefile build targets
Stefan Roese [Thu, 11 Apr 2019 10:33:34 +0000 (12:33 +0200)]
arm: kirkwood: dts: Add openrd-* dtb makefile build targets

The following Kirkwood dtb build targets are currently missing:

kirkwood-openrd-base.dtb
kirkwood-openrd-client.dtb
kirkwood-openrd-ultimate.dtb

This patch adds them to the Makefile to fix the build error.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
5 years agoarm: mvebu: turris_omnia: use MMC driver model
Pierre Bourdon [Thu, 11 Apr 2019 02:56:59 +0000 (04:56 +0200)]
arm: mvebu: turris_omnia: use MMC driver model

Enable DM_MMC for compliance with the driver model migration.

Signed-off-by: Pierre Bourdon <delroth@gmail.com>
Cc: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
5 years agommc: mv_sdhci: add driver model support
Pierre Bourdon [Thu, 11 Apr 2019 02:56:58 +0000 (04:56 +0200)]
mmc: mv_sdhci: add driver model support

The new DM implementation currently does not support the Sheeva
88SV331xV5 specific quirk present in the legacy implementation. The
legacy code is thus kept for this SoC and others not yet migrated to
DM_MMC.

Signed-off-by: Pierre Bourdon <delroth@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
5 years agoarm: mvebu: turris_omnia: fix eeprom/mcu device names
Pierre Bourdon [Wed, 10 Apr 2019 23:00:23 +0000 (01:00 +0200)]
arm: mvebu: turris_omnia: fix eeprom/mcu device names

Commit c4bd12a7dad4 ("i2c: mux: Generate longer i2c mux name") changed
the naming scheme of i2c devices within a mux. This broke references to
i2c@0 in the Turris Omnia board initialization code.

Signed-off-by: Pierre Bourdon <delroth@gmail.com>
Cc: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
5 years agoarm: socfpga: mailbox: Fix off-by-one error on command length checking
Ley Foon Tan [Wed, 24 Apr 2019 05:21:47 +0000 (13:21 +0800)]
arm: socfpga: mailbox: Fix off-by-one error on command length checking

A mailbox command contains 1-u32 header + arguments. The "len" variable
only contains the length of the arguments, but not the 1-u32 header.
Include the length of header when checking the ring buffer space to
prevent off-by-one error.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
5 years agoarm: socfpga: clean up board config files
Simon Goldschmidt [Tue, 2 Apr 2019 19:29:41 +0000 (21:29 +0200)]
arm: socfpga: clean up board config files

Remove outdated defines (not used any more, outdated due to DM
conversion) from various socfpga files in include/config.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
Series-version: 3
Series-changes: 2
- added (this) patch with further cleanups to the socfpga board config
  files

5 years agoarm: socfpga: remove CONFIG_SYS_BOOTMAPSZ
Simon Goldschmidt [Wed, 9 Jan 2019 19:49:09 +0000 (20:49 +0100)]
arm: socfpga: remove CONFIG_SYS_BOOTMAPSZ

socfpga_common.h defines CONFIG_SYS_BOOTMAPSZ to 64 MiB.

Since having this define overrides the 'bootm_size' env variable for
the whole socfpga platform, let's remove this define from socfpga_common.h
and instead rely on the 'bootm_size' env variable (which is initialized
to 160 MiB in the same file's default env). This gives users the
chance to override it in their own environment.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
Series-to: Marek Vasut <marex@denx.de>
Series-to: u-boot@lists.denx.de
Cover-letter:
arm: socfpga: clean up socfpga_common.h
This series cleans up the include/configs/socfpga_common.h file a bit.

It removes some defines that are used nowhere and cleans up some
leftovers after various subsystems have been converted to use DM.
END

5 years agoarm: socfpga: clean up socfpga_common.h
Simon Goldschmidt [Wed, 9 Jan 2019 19:47:52 +0000 (20:47 +0100)]
arm: socfpga: clean up socfpga_common.h

Remove outdated macros and comments (not used any more, outdated due to
DM conversion) from socfpga_common.h.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Series-changes: 3
- changed commit message: s/defines/macros and comments/

Series-changes: 2
- remove even more outdated things

5 years agoarm: socfpga: move vining_fpga to DM_I2C
Simon Goldschmidt [Thu, 28 Mar 2019 21:09:35 +0000 (22:09 +0100)]
arm: socfpga: move vining_fpga to DM_I2C

All socfpga boards except for vining_fpga use DM_I2C. Enable
DM_I2C for this board and set the EEPROM defines via Kconfig
(enabling CONFIG_I2C_EEPROM from MISC).

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Series-changes: 2
- added (this) patch to move socfpga_vining to DM_I2C

5 years agoarm: socfpga: gen5: reduce SPL pre-reloc malloc
Simon Goldschmidt [Tue, 9 Apr 2019 19:02:06 +0000 (21:02 +0200)]
arm: socfpga: gen5: reduce SPL pre-reloc malloc

By enabling debug prints in malloc_simple, we can see that SPL for socfpga
gen5 does by far not need the 8 KiB malloc pool currently allocated for
SPL in pre-reloc phase.

On socfpga_socrates, 1304 bytes are currently used (and this increases by
~200 bytes only for the sdram/reset fixes in socfpga-next).

To prevent wasting precious SRAM space, let's reduce the initial heap used
for SPL to 2 KiB. This is still some hundred bytes more than currently
used. Also, the gen5 SPL enables stack and heap in DDR memory pretty
early. Only the initial uclass/dm parsing, serial console and DDR
initialization is done in the initial heap, so these 2 KiB should be
enough for all boards.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
5 years agoarm: socfpga: imply/default common config options
Simon Goldschmidt [Tue, 9 Apr 2019 19:02:05 +0000 (21:02 +0200)]
arm: socfpga: imply/default common config options

This commit moves common config options used in all socfpga boards
to select/imply in Kconfig. This both cleans up the defconfig files
as well as makes future changes easier.

Options implied/defaulted for all sub-arches:
- SPL, SPL_DM, USE_TINY_PRINTF, NR_DRAM_BANKS

Options implied/defaulted for implied for A10 & gen5:
- FPGA_SOCFPGA, SYS_MALLOC_F_LEN, SYS_TEXT_BASE

Options implied/defaulted for gen5:
- SPL_STACK_R, SPL_SYS_MALLOC_SIMPLE, SPL_STACK_R_ADDR

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
5 years agoarm: socfpga: put initial U-Boot stack into DDR
Simon Goldschmidt [Tue, 9 Apr 2019 19:02:04 +0000 (21:02 +0200)]
arm: socfpga: put initial U-Boot stack into DDR

If SPL post-reloc stage puts the stack into DDR, U-Boot should be able to
do that, too.

The reason to do so is that this way, U-Boot initial stack can be larger
than SPL initial stack. In situations where we want to save the SPL
in SRAM for next boot without reloading, this prevents overwriting the
SPL DTB in SRAM if U-Boot stack usage gets too high.

To achieve this, the malloc definition for a10 is moved up and sligthly
changed to ensure CONFIG_SYS_INIT_RAM_SIZE is the remaining available size.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
5 years agoarm: socfpga: fix comment about SPL memory layout
Simon Goldschmidt [Tue, 9 Apr 2019 19:02:03 +0000 (21:02 +0200)]
arm: socfpga: fix comment about SPL memory layout

The comment about SPL memory layout for socfpga gen5 is outdated: the
initial malloc memory is now at the end of the SRAM, gd is below it
(see board_init_f_alloc_reserve).

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
5 years agoconfigs: socfpga: socrates: enable rtc support
Simon Goldschmidt [Thu, 28 Mar 2019 20:11:51 +0000 (21:11 +0100)]
configs: socfpga: socrates: enable rtc support

This enables DM_RTC and RTC_M41T62 to enable support for the rtc on the
socrates board.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
5 years agoarm: socfpga: socrates: make rtc work
Simon Goldschmidt [Thu, 28 Mar 2019 20:11:50 +0000 (21:11 +0100)]
arm: socfpga: socrates: make rtc work

This patch makes the on-board RTC work on the socfpga_socrates board.
This rtc is present on the board, but it does not work (fails with a
timeout).

This patch adds a weak pull-up on the I2C0-SCL pin connected to the m41t82
RTC on this board. While the SDA line has a pull-up on the pcb, the pull-up
on the SCL line seems to be missing. To work around this, enable the
weak-pull-up feature on this pin.

After applying this patch, the rtc timeout is gone and the 'date' command
can access the rtc chip.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
5 years agortc: m41t62: add compatible for m41t82
Simon Goldschmidt [Thu, 28 Mar 2019 20:11:49 +0000 (21:11 +0100)]
rtc: m41t62: add compatible for m41t82

This adds a compatible string for m41t82. This ensures that this driver
can be used for m41t82 in DM mode, too (asit was usable for this model in
non-DM mode before).

In addition, the HT bit has to be reset during probe, since the m41t82
chip sets it when entering battery standby mode.

This patch ensures this driver works on socfpga_socrates.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
5 years agoi2c: designware: fix reset handling on socfpga gen5
Simon Goldschmidt [Thu, 28 Mar 2019 20:11:48 +0000 (21:11 +0100)]
i2c: designware: fix reset handling on socfpga gen5

Using this driver on socfpga gen5 with DM_I2C enabled leads to a data abort
as the 'i2c' reset property cannot be found (the gen5 dtsi does not provide
reset-names).

The actual bug was to check 'if (&priv->reset_ctl)', which is never false.

While at it, convert the driver to use 'reset_get_bulk' instead of looking
at a specific named reset and also make it release the reset on driver
remove before starting the OS.

Fixes: 622597dee4f6 ("i2c: designware: add reset ctrl to driver")
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
5 years agoRevert "cmd: Kconfig: Do not include EEPROM if DM_I2C is used without DM_I2C_COMPAT"
Simon Goldschmidt [Tue, 26 Mar 2019 12:38:53 +0000 (13:38 +0100)]
Revert "cmd: Kconfig: Do not include EEPROM if DM_I2C is used without DM_I2C_COMPAT"

This reverts commit 65a97e7fcf54feb7c4ebe1aee8a572830af4cf51.

The 'eeprom' command has been converted to work with DM_I2C in a patch
submitted around the same time as this commit:
commit 0c07a9b4078d ("eeprom: Add device model based I2C support to eeprom command")

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
5 years agoeeprom: fix DM_I2C support without CONFIG_SYS_I2C_EEPROM_BUS
Simon Goldschmidt [Tue, 26 Mar 2019 12:38:52 +0000 (13:38 +0100)]
eeprom: fix DM_I2C support without CONFIG_SYS_I2C_EEPROM_BUS

The current device model enabled eeprom code only works if
CONFIG_SYS_I2C_EEPROM_BUS is set.

This patch makes it work without that define so that the bus
number passed to 'eeprom_init' is used.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
5 years agoMerge tag 'pull-24apr19' of git://git.denx.de/u-boot-dm
Tom Rini [Wed, 24 Apr 2019 16:27:29 +0000 (12:27 -0400)]
Merge tag 'pull-24apr19' of git://git.denx.de/u-boot-dm

Various minor sandbox iumprovements
Fixes for tracing with sandbox
Refactoring for boot_get_fdt()

5 years agoMerge tag 'efi-2019-07-rc1-3' of git://git.denx.de/u-boot-efi
Tom Rini [Wed, 24 Apr 2019 16:26:58 +0000 (12:26 -0400)]
Merge tag 'efi-2019-07-rc1-3' of git://git.denx.de/u-boot-efi

Pull request for UEFI sub-system for v2019.07-rc1 (3)

This patch series reworks the implementation of the `bootefi` command to
remove code duplication by using the LoadImage() boot service to load
binaries.

Missing short texts for UEFI protocols are added for display by the
`efidebug dh` command.

Missing parameter checks for AllocatePages() and CreateDeviceNode() are
implemented.

The constants for protocol GUIDs are changed to match the names in the UEFI
specification.

5 years agoMerge tag 'u-boot-stm32-mcu-20190423' of https://github.com/pchotard/u-boot
Tom Rini [Wed, 24 Apr 2019 16:26:39 +0000 (12:26 -0400)]
Merge tag 'u-boot-stm32-mcu-20190423' of https://github.com/pchotard/u-boot

STM32 MCUs update:
- DT rework and alignment with DT kernel v4.20
- mmc: arm_pl180_mmci: Synchronize compatible with kernel v4.20
- mmc: stm32_sdmmc2: Synchronize properties with kernel v4.20
- configs: update for F746/769 boards

5 years agoMerge tag 'u-boot-amlogic-20190423' of git://git.denx.de/u-boot-amlogic
Tom Rini [Wed, 24 Apr 2019 16:26:25 +0000 (12:26 -0400)]
Merge tag 'u-boot-amlogic-20190423' of git://git.denx.de/u-boot-amlogic

- Add support for Amlogic p200 & p201 Reference Designs
- Add Amlogic SoC information display
- Add support for the Libretech-AC AML-S805X-AC board
- Add Amlogic AXG reset compatible
- Add I2C support for Amlogic AXG
- Fix AXG PIN and BANK pinctrl definitions
- Fix regmap_read_poll_timeout warning about sandbox_timer_add_offset
- Add initial support for Amlogic G12A SoC and U200 board
- Enable PHY_REALTEK for selected boards
- Fix Khadas VIM2 README

5 years agosocfpga: add Simon Goldschmidt as co-custodian
Simon Goldschmidt [Thu, 28 Mar 2019 21:27:53 +0000 (22:27 +0100)]
socfpga: add Simon Goldschmidt as co-custodian

This updates MAINTAINERS and git-mailrc to add me as a
co-custodian for socfpga.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
5 years agoMerge branch '2019-04-22-master-imports'
Tom Rini [Wed, 24 Apr 2019 13:04:23 +0000 (09:04 -0400)]
Merge branch '2019-04-22-master-imports'

- Add and enable brcmnand driver on a number of relevant platforms.
  Also add and enable LED drivers on more bcm platforms.
- Various ARMv8 fixes/improvements, including extending PSCI
  functionality.
- fs_loader improvments
- Various FIT/SPL improvements
- PCI bugfixes
- Poplar platform ethernet support
- MediaTek MMC improvements
- Android boot improvements

5 years agoimage: android: fix 'iminfo' typo
Eugeniu Rosca [Mon, 8 Apr 2019 15:35:28 +0000 (17:35 +0200)]
image: android: fix 'iminfo' typo

Fix below CP warning triggered by the 'iminfo' output in another patch:
WARNING: 'addrress' may be misspelled - perhaps 'address'?

Fixes: 4f1318b29c7a20 ("common: image: minimal android image iminfo support")
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
5 years agoimage: android: allow booting lz4-compressed kernels
Eugeniu Rosca [Mon, 8 Apr 2019 15:35:27 +0000 (17:35 +0200)]
image: android: allow booting lz4-compressed kernels

According to Android image format [1], kernel image resides at 1 page
offset from the boot image address. Grab the magic number from there
and allow U-Boot to handle LZ4-compressed KNL binaries instead of
hardcoding compression type to IH_COMP_NONE. Other compression types,
if needed, can be added later.

Tested on H3ULCB-KF using the image detailed in [2].

[1] Excerpt from include/android_image.h
    +-----------------+
    | boot header     | 1 page
    +-----------------+
    | kernel          | n pages
    +-----------------+
    | ramdisk         | m pages
    +-----------------+
    | second stage    | o pages
    +-----------------+

[2] => iminfo 4c000000
    ## Checking Image at 4c000000 ...
    Android image found
    kernel size:      85b9d1
    kernel address:   48080000
    ramdisk size:     54ddbc
    ramdisk addrress: 4a180000
    second size:      0
    second address:   48000800
    tags address:     48000100
    page size:        800
    os_version:       1200012a (ver: 0.9.0, level: 2018.10)
    name:
    cmdline:          buildvariant=userdebug

Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>