Tom Rini [Thu, 22 Oct 2015 00:47:40 +0000 (20:47 -0400)]
Merge git://git.denx.de/u-boot-x86
George McCollister [Wed, 21 Oct 2015 13:05:33 +0000 (08:05 -0500)]
x86: Add support for Advantech SOM-6896
Advantech SOM-6896 is a Broadwell U based COM Express Compact Module
Type 6. This patch adds support for it as a coreboot payload.
On board SATA and SPI are functional. On board Ethernet isn't functional
but since it's optional and ties up a PCIe x4 that is otherwise brought
out, this isn't a concern at the moment. USB doesn't work since the
xHCI driver appears to be broken.
Signed-off-by: George McCollister <george.mccollister@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Bin Meng [Sun, 18 Oct 2015 21:55:37 +0000 (15:55 -0600)]
x86: ivybridge: Enable the MRC cache
This works correctly now, so enable it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Dropped malloc() and adjusted commit message:
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 18 Oct 2015 21:55:36 +0000 (15:55 -0600)]
x86: ivybridge: Measure the MRC code execution time
This code takes about 450ms without the MRC cache and about 27ms with the
cache. Add a debug timer so that this time can be displayed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 18 Oct 2015 21:55:35 +0000 (15:55 -0600)]
x86: ivybridge: Fix car_uninit() to correctly set run state
At present a missing $ causes this code to hang when using the MRC cache/
Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 18 Oct 2015 21:55:33 +0000 (15:55 -0600)]
x86: ivybridge: Check the RTC return value
The RTC can fail, so check the return value for reads.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 18 Oct 2015 21:55:32 +0000 (15:55 -0600)]
x86: ivybridge: Use 'ret' instead of 'rcode'
For consistency, use 'ret' to handle a return value.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 18 Oct 2015 21:55:31 +0000 (15:55 -0600)]
dm: rtc: Correct rtc_read32() return value
The current check is incorrect and will fail when any non-zero byte is read.
Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Sun, 18 Oct 2015 21:55:30 +0000 (15:55 -0600)]
rtc: mc146818: Use probe() to set up the device
At present this driver uses bind() to set up the device. The bind() method
should not touch the hardware, so move the init code to probe().
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 18 Oct 2015 21:55:29 +0000 (15:55 -0600)]
rtc: mc146818: Add a comment to the #endif
Add a comment to make it clear to which block the #endif relates.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 19 Oct 2015 01:51:27 +0000 (19:51 -0600)]
x86: chromebook_link: Enable the debug UART
Add support for the debug UART on link. This is useful for early debugging.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 19 Oct 2015 01:51:26 +0000 (19:51 -0600)]
x86: Init the debug UART if enabled
If the debug UART is enabled, get it ready for use at the earliest possible
opportunity. This is not actually very early, but until we have a stack it
is difficult to make it work.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 19 Oct 2015 01:51:25 +0000 (19:51 -0600)]
debug_uart: Add an option to announce the debug UART
It is useful to see a message from the debug UART early during boot so that
you know things are working. Add an option to enable this. The message will
be displayed as soon as debug_uart_init() is called.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 19 Oct 2015 01:51:24 +0000 (19:51 -0600)]
debug_uart: Support board-specific UART initialisation
Some boards need to set things up before the debug UART can be used. On
these boards a call to debug_uart_init() is insufficient. When this option
is enabled, the function board_debug_uart_init() will be called when
debug_uart_init() is called. You can put any code here that is needed to
set up the UART ready for use, such as set pin multiplexing or enable
clocks.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Mon, 19 Oct 2015 01:51:23 +0000 (19:51 -0600)]
debug_uart: Adjust the declaration of debug_uart_init()
We want to be able to add other common code to this function. So change the
driver's version to have an underscore before it, just like
_debug_uart_putc(). Define debug_uart_init() to call this version.
Update all drivers to this new method.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
George McCollister [Mon, 12 Oct 2015 21:18:41 +0000 (16:18 -0500)]
x86: spi: Add support for Wildcat Point
Add the Wildcat Point ID so Broadwell U based boards can use SPI.
Signed-off-by: George McCollister <george.mccollister@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
George McCollister [Mon, 12 Oct 2015 21:18:40 +0000 (16:18 -0500)]
x86: pci: Add PCI IDs for Wildcat Point
Add Wildcat Point AHCI and LPC PCI IDs which are present on Broadwell U
based (and possibly other) boards.
Signed-off-by: George McCollister <george.mccollister@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Bin Meng [Wed, 14 Oct 2015 09:01:21 +0000 (02:01 -0700)]
x86: Pass correct cpu_index to ap_init()
In sipi_vector.S, cpu_index (passed as %eax) is wrongly overwritten
by the ap_init() function address. Correct it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 12 Oct 2015 08:30:43 +0000 (01:30 -0700)]
x86: galileo: Enable mrc cache
Now that we have added MRC cache on quark support codes,
enable it on Intel Galileo board.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 12 Oct 2015 08:30:42 +0000 (01:30 -0700)]
x86: quark: Implement mrc cache
Using existing mrccache library to implement mrc cache support
for Intel Quark.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 12 Oct 2015 04:37:47 +0000 (21:37 -0700)]
x86: ivybridge: Correct two typos for MRC
It should be MRC, not MCR.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 12 Oct 2015 04:37:46 +0000 (21:37 -0700)]
x86: Remove unused rw-mrc-cache properties in the link and panther dts files
"type" and "wipe-value" are never used by the mrccache codes.
Remove them to avoid confusion. This also removes the alignment
comment in the panther dts file.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 12 Oct 2015 04:37:45 +0000 (21:37 -0700)]
x86: baytrail: Issue full system reset in reset_cpu()
With MRC cache enabled, when typing 'reset' in the U-Boot shell,
BayTrail FSP initialization hangs at "Configuring Memory Start":
Setting BootMode to 0
Install PPI:
1F4C6F90-B06B-48D8-A201-
BAE5F1CD7D56
Register PPI Notify:
F894643D-C449-42D1-8EA8-
85BDD8C65BDE
About to call MrcInit();
BayleyBay Platform Type
CurrentMrcData.BootMode = 4
Taking Fastboot path!
Configuring Memory Start...
Changing reset_cpu() to do a full system reset fixes this issue.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 12 Oct 2015 04:37:44 +0000 (21:37 -0700)]
x86: Enable mrc cache for bayleybay and minnowmax
Now that we have added MRC cache for Intel FSP and BayTrail codes,
enable it for all BayTrail boards (Bayley Bay and Minnow Max).
Note it turns out that FSP for Intel Atom E6xx does not produce
the HOB for NV storage, so we don't have such functionality on
Intel Crown Bay board.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 12 Oct 2015 04:37:43 +0000 (21:37 -0700)]
x86: baytrail: Save mrc cache to spi flash
Save MRC cache to SPI flash in arch_misc_init().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 12 Oct 2015 04:37:42 +0000 (21:37 -0700)]
x86: fsp: Pass mrc cache to fsp_init() and save it to gd after fsp_init()
fsp_init() call has a parameter nvs_buf which is used by FSP as the
MRC cache but currently is blindly set to NULL. Retreive the MRC
cache from SPI flash and pass it to fsp_init() call. After the call,
save FSP produced MRC cache to SPI flash too.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 12 Oct 2015 04:37:41 +0000 (21:37 -0700)]
x86: Use struct mrc_region to describe a mrc region
Currently struct fmap_entry is used to describe a mrc region.
However this structure contains some other fields that are not
related to mrc cache and causes confusion. Besides, it does not
include a base address field to store SPI flash's base address.
Instead in the mrccache.c it tries to use CONFIG_ROM_SIZE to
calculate the SPI flash base address, which unfortunately is
not 100% correct as CONFIG_ROM_SIZE may not match the whole
SPI flash size.
Define a new struct mrc_region and use it instead.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 12 Oct 2015 04:37:40 +0000 (21:37 -0700)]
x86: ivybridge: Use APIs provided in the mrccache lib
Remove the call to custom mrc cache APIs, and use the ones
provided in the mrccache lib.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 12 Oct 2015 04:37:39 +0000 (21:37 -0700)]
x86: Add more common routines to manipulate mrc cache
This adds mrccache_reserve(), mrccache_get_region() and
mrccache_save() APIs to the mrccache codes. They are ported
from the ivybridge implementation, but with some changes.
For example, in the mrccache_reserve(), ivybridge version
only reserves the pure MRC data, which causes additional
malloc() when saving the cache as the save API needs some
meta data. Now we change it to save the whole MRC date plus
the meta data to elinimate the need for the malloc() later.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 12 Oct 2015 04:37:38 +0000 (21:37 -0700)]
x86: Add various minor tidy-ups in mrccache codes
Fix some nits, improve some comments and reorder some codes
a little bit.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 12 Oct 2015 04:37:37 +0000 (21:37 -0700)]
x86: Do sanity test on the cache record in mrccache_update()
For the cache record to write in mrccache_update(), we should
perform a sanity test to see if it is a valid one.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 12 Oct 2015 04:37:36 +0000 (21:37 -0700)]
x86: Move mrccache.[c|h] to a common place
mrccache implementation can be common for all boards. Move it
from ivybridge cpu directory to the common lib directory.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 12 Oct 2015 04:37:35 +0000 (21:37 -0700)]
x86: Add ENABLE_MRC_CACHE Kconfig option
Create a Kconfig option for enabling MRC cache.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sat, 10 Oct 2015 08:47:59 +0000 (01:47 -0700)]
x86: fsp: Add a hdr sub-command to show header information
It would be helpful to have a command to show FSP header. So far
it only supports FSP header which conforms to FSP spec 1.0.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sat, 10 Oct 2015 08:47:58 +0000 (01:47 -0700)]
x86: fsp: Make hob command a sub-command to fsp
Introduce a new fsp command and make the existing hob command a
sub-command to fsp for future extension. Also move cmd_hob.c to
the dedicated fsp sub-directory in arch/x86/lib.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sat, 10 Oct 2015 08:47:57 +0000 (01:47 -0700)]
x86: fsp: Print GUID whenever applicable in the hob command output
When examining a HOB, it's useful to see which GUID this HOB
belongs to. Add GUID output in the hob command to aid this.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Sat, 10 Oct 2015 08:47:56 +0000 (01:47 -0700)]
x86: fsp: Compact the output of hob command
Compact hob command output, especially by making hob type string a
little bit shorter so that we can leave room for future extension.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 12 Oct 2015 12:23:41 +0000 (05:23 -0700)]
x86: Add SMBIOS table support
System Management BIOS (SMBIOS) is a specification for how
motherboard and system vendors present management information
about their products in a standard format by extending the BIOS
interface on Intel architecture systems. As of today the latest
spec is 3.0 and can be downloaded from DMTF website. This commit
adds a simple and minimum required implementation.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Mon, 12 Oct 2015 12:23:40 +0000 (05:23 -0700)]
Makefile: Generate U_BOOT_DMI_DATE for SMBIOS
Add U_BOOT_DMI_DATE (format mm/dd/yyyy) generation to be used by
SMBIOS tables, as required by SMBIOS spec 3.0 [1]. See chapter 7.1,
BIOS information structure offset 08h for details.
[1] http://www.dmtf.org/sites/default/files/standards/documents/DSP0134_3.0.0.pdf
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 8 Oct 2015 03:19:20 +0000 (20:19 -0700)]
doc: Complement document about booting VxWorks
Current document about how to boot VxWorks is limited.
Add several chapters in README.vxworks to document this.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Bin Meng [Thu, 8 Oct 2015 03:19:19 +0000 (20:19 -0700)]
cmd: bootvx: Add asmlinkage to the VxWorks x86 entry
VxWorks on x86 uses stack to pass parameters.
Reported-by: Jian Luo <jian.luo4@boschrexroth.de>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 8 Oct 2015 03:19:18 +0000 (20:19 -0700)]
cmd: bootvx: Pass E820 information to an x86 VxWorks kernel
E820 is critical to the kernel as it provides system memory map
information. Pass it to an x86 VxWorks kernel.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Jian Luo <jian.luo4@boschrexroth.de>
Bin Meng [Thu, 8 Oct 2015 03:19:17 +0000 (20:19 -0700)]
cmd: bootvx: Always get VxWorks bootline from env
So far VxWorks bootline can be contructed from various environment
variables, but when these variables do not exist we get these from
corresponding config macros. This is not helpful as it requires
rebuilding U-Boot, and to make sure these config macros take effect
we should not have these environment variables. This is a little
bit complex and confusing.
Now we change the logic to always contruct the bootline from
environments (the only single source), by adding two new variables
"bootdev" and "othbootargs", and adding some comments about network
related settings mentioning they are optional. The doc about the
bootline handling is also updated.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Bin Meng [Thu, 8 Oct 2015 03:19:16 +0000 (20:19 -0700)]
cmd: bootvx: Pass netmask and gatewayip to VxWorks bootline
There are fields in VxWorks bootline for netmask and gatewayip.
We can get these from U-Boot environment variables and pass them
to VxWorks, just like ipaddr and serverip.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 8 Oct 2015 03:19:15 +0000 (20:19 -0700)]
cmd: bootvx: Avoid strlen() calls when constructing VxWorks bootline
Remember the position in the VxWorks bootline buffer to avoid the call
to strlen() each time.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 8 Oct 2015 03:19:14 +0000 (20:19 -0700)]
cmd: elf: Reorder load_elf_image_phdr() and load_elf_image_shdr()
Move load_elf_image_phdr() and load_elf_image_shdr() to the beginning
of the cmd_elf.c so that forward declaration is not needed.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Bin Meng [Thu, 8 Oct 2015 03:19:13 +0000 (20:19 -0700)]
cmd: Clean up cmd_elf a little bit
This commit cleans up cmd_elf.c per U-Boot coding convention,
and removes the unnecessary DECLARE_GLOBAL_DATA_PTR and out-of-date
powerpc comments (it actually supports not only powerpc targets).
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Bin Meng [Thu, 8 Oct 2015 03:19:12 +0000 (20:19 -0700)]
cmd: Convert CONFIG_CMD_ELF to Kconfig
Convert CONFIG_CMD_ELF to Kconfig and tidy up affected boards.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Bin Meng [Thu, 8 Oct 2015 03:19:11 +0000 (20:19 -0700)]
x86: Remove quotation mark in CONFIG_HOSTNAME
CONFIG_HOSTNAME is an environment varible, so that quotation mark
is not needed.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 8 Oct 2015 03:19:10 +0000 (20:19 -0700)]
x86: Move install_e820_map() out of zimage.c
install_e820_map() has nothing to do with zimage related codes.
Move it to a dedicated place.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 8 Oct 2015 03:19:09 +0000 (20:19 -0700)]
x86: Initialize GDT entry 1 to be the 32-bit CS as well
Some OS (like VxWorks) requires GDT entry 1 to be the 32-bit CS.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Jian Luo <jian.luo4@boschrexroth.de>
Bin Meng [Thu, 1 Oct 2015 07:36:04 +0000 (00:36 -0700)]
x86: Allow disabling IGD on Intel Queensbay
Add a Kconfig option to disable the Integrated Graphics Device (IGD)
so that it does not show in the PCI configuration space as a VGA
disaplay controller. This gives a chance for U-Boot to run PCI/PCIe
based graphics card's VGA BIOS and use that for the graphics console.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 1 Oct 2015 07:36:03 +0000 (00:36 -0700)]
x86: ivybridge: Remove the dead codes that programs pci bridge
Remove bd82x6x_pci_bus_enable_resources() that is not called anywhere.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 1 Oct 2015 07:36:02 +0000 (00:36 -0700)]
dm: pci: Enable VGA address forwarding on bridges
To support graphics card behind a PCI bridge, the bridge control
register (offset 0x3e) in the configuration space must turn on
VGA address forwarding.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 1 Oct 2015 07:36:01 +0000 (00:36 -0700)]
dm: pci: Fix pci_last_busno() to return the real last bus no
Currently pci_last_busno() only checks the last bridge device
under the first UCLASS_PCI device. This is not the case when
there are multiple bridge devices.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 1 Oct 2015 07:36:00 +0000 (00:36 -0700)]
video: vesa_fb: Fix wrong return value check of pci_find_class()
When pci_find_class() fails to find a device, it returns -ENODEV.
But now we check the return value against -1. Fix it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Bin Meng [Thu, 1 Oct 2015 07:35:59 +0000 (00:35 -0700)]
pci: Set PCI_COMMAND_IO bit for VGA device
PCI_COMMAND_IO bit must be set for VGA device as it needs to respond
to legacy VGA IO address.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Simon Glass [Tue, 8 Sep 2015 23:52:49 +0000 (17:52 -0600)]
dm: pci: Adjust pci_find_and_bind_driver() to return -EPERM
The current code returns 0 even if it failed to find or bind a driver. The
caller then has to check the returned device to see if it is NULL. It is
better to return an error code in this case so that it is clear what
happened.
Adjust the code to return -EPERM, indicating that the device was not bound
because it is not needed for pre-relocation use. Add comments so that the
return value is clear.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Tue, 8 Sep 2015 23:52:48 +0000 (17:52 -0600)]
dm: pci: Correct a few debug() statements
One debug() statement is missing a newline. The other has a repeated word.
Fix these.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Tue, 8 Sep 2015 23:52:47 +0000 (17:52 -0600)]
dm: pci: Tidy up auto-config error handling
When the auto-configuration process fails for a device (generally due to
lack of memory) we should return the error correctly so that we don't
continue to try memory allocations which will fail.
Adjust the code to check for errors and abort if something goes wrong.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Simon Glass [Tue, 8 Sep 2015 23:52:46 +0000 (17:52 -0600)]
malloc_simple: Add debug() information
It's useful to get a a trace of memory allocations in early init. Add a
debug() call to provide that. It can be enabled by adding '#define DEBUG'
to the top of the file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Jagan Teki [Wed, 21 Oct 2015 11:16:51 +0000 (16:46 +0530)]
linux/bitops.h: GENMASK copy from linux
GENMASK is used to create a contiguous bitmask([hi:lo]).
This patch is a copy from Linux, with below commit details
"bitops: Fix shift overflow in GENMASK macros"
(sha1:
00b4d9a14125f1e51874def2b9de6092e007412d)
Cc: Tom Rini <trini@konsulko.com>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Jagan Teki [Wed, 21 Oct 2015 12:00:34 +0000 (17:30 +0530)]
linux/bitops: Move BIT definitions at top
Since it's a copy from Linux, this patch moved all
BIT definitions to top so-that it looks same as Linux file.
Cc: Tom Rini <trini@konsulko.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Tom Rini [Wed, 21 Oct 2015 01:59:40 +0000 (21:59 -0400)]
Merge git://git.denx.de/u-boot-marvell
Stefan Roese [Thu, 1 Oct 2015 15:34:41 +0000 (17:34 +0200)]
mmc: mv_sdhci: Configure the SDHCI MBUS bridge windows
This driver did not yet configure the SDHCI MBUS bridge registers.
Without this and with CONFIG_MMC_SDMA enabled, mmc hangs at random
times. As DMA cannot complete correctly.
Tested on db-
88f6820-gp eval board.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Dirk Eibach <eibach@gdsys.cc>
Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com>
Stefan Roese [Wed, 2 Sep 2015 06:41:41 +0000 (08:41 +0200)]
arm: mvebu: Enable DM_SERIAL on AXP / A38x boards
This patch enables DM_SERIAL for all ARCH_MVEBU boards (AXP & A38x).
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Stefan Roese [Tue, 1 Sep 2015 11:05:09 +0000 (13:05 +0200)]
arm: mvebu: Enable DM_USB on AXP / A38x boards
This patch enables DM_USB on the Marvell AXP / A38x eval boards.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Stefan Roese [Tue, 1 Sep 2015 09:39:44 +0000 (11:39 +0200)]
usb: ehci-marvell.c: Add DM support
This patch adds driver model (DM) support to the Marvell EHCI driver.
This will be used by the MVEBU SoC's, currently Armada XP and 38x.
Tested on Marvell Armada XP and 38x eval boards.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Stefan Roese [Tue, 1 Sep 2015 09:27:52 +0000 (11:27 +0200)]
arm: mvebu: Add DM (driver model) support
This patch adds driver model support for some Marvell MVEBU SoC's. Including
Armada XP and 38x. All 3 currently mainlined boards are converted. DM is now
selected automatically for MVEBU platforms.
With this DM support now available for MVEBU, hardcoding the base addresses
and other information is not necessary any more. Probing should be done
by using the values provided via the device tree now instead. For this
the driver also need to be converted to DM. Patches for some of the drivers
will follow.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Stefan Roese [Mon, 31 Aug 2015 05:33:57 +0000 (07:33 +0200)]
arm: mvebu: Add basic Armada XP / 38x dtsi/dts files
These will be needed by the upcoming DM (driver model) support for
the Armada XP / 38x SoC's. This will provide DT based probing.
The dts files are copied 1:1 from the Linux kernel release v4.2.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Stefan Roese [Mon, 31 Aug 2015 05:20:12 +0000 (07:20 +0200)]
arm: mvebu: Do not call board_init_r() from board_init_f()
Instead of calling board_init_r() directly from board_init_f(), just
return from board_init_f(). This will make the code continue executing
in crt0.S _main(), from which the board_init_r() is called. This patch
aligns the MVEBU SPL with the correct SPL design as well as reduces
the stack utilisation slightly.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Stefan Roese [Tue, 1 Sep 2015 11:46:35 +0000 (13:46 +0200)]
kwbimage: Align payload size to 4 bytes
The MVEBU BootROM does not allow non word aligned payloads.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Stefan Roese [Wed, 2 Sep 2015 05:41:12 +0000 (07:41 +0200)]
dm: core: Enable optional use of fdt_translate_address()
The current "simple" address translation simple_bus_translate() is not
working on some platforms (e.g. MVEBU). As here more complex "ranges"
properties are used in many nodes (multiple tuples etc). This patch
enables the optional use of the common fdt_translate_address() function
which handles this translation correctly.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Stefan Roese [Tue, 25 Aug 2015 12:09:12 +0000 (14:09 +0200)]
arm: mvebu: Only set CONFIG_SKIP_LOWLEVEL_INIT for SPL
When running on the AXP I sometimes noticed a strange behavior. As some
characters are not echoed on the U-Boot prompt. Not disabling the
lowlevel_init code, especially calling cpu_init_cp15() in the main
U-Boot seems to solve this issue.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Tue, 25 Aug 2015 11:49:41 +0000 (13:49 +0200)]
arm: mvebu: Add option to use UART xmodem protocol via kwboot
This patch enables the use of the kwboot tool, to boot mainline U-Boot
on the Marvell Armada XP/38x SoC's. This is done by returning to the
SoC's BootROM after SPL has initialized the SDRAM. We need to make sure
to not reconfigure the internal register space and MBARs. Otherwise
the BootROM will not be able to continue after SPL jumps back to it.
To use this feature, please don't forget to change the BOOT_FROM line
in your board specfic kwbimage.cfg file this way:
BOOT_FROM uart
Tested on these Marvell eval boards:
DB-MV784MP-GP - Armada XP
DB-
88F6820-GP - Armada 38x
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Dirk Eibach <eibach@gdsys.de>
Cc: Kevin Smith <kevin.smith@elecsyscorp.com>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Maxime Ripard [Thu, 15 Oct 2015 20:04:10 +0000 (22:04 +0200)]
sunxi: Add CHIP support
The C.H.I.P. is a small SBC with an Allwinner R8, 8GB of NAND, 512MB of
RAM, USB host and OTG, a wifi / bluetooth combo chip, an audio/video jack
and two connectors to plug additional boards on top of it.
The DT is identical to the DT submitted to the upstream kernel.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Maxime Ripard [Thu, 15 Oct 2015 20:04:09 +0000 (22:04 +0200)]
axp209: Sync the DTSI with the kernel
Linux had a number of changes to the AXP209 DTSI. Sync ours.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Maxime Ripard [Thu, 15 Oct 2015 20:04:08 +0000 (22:04 +0200)]
sun5i: Sync the DTSI with the kernel
Add the latest kernel changes to the sun5i family DTSI.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Maxime Ripard [Thu, 15 Oct 2015 20:04:07 +0000 (22:04 +0200)]
sunxi: Use Kconfig CONFIG_MMC
Not all sunxi boards have an MMC embedded. Switching to the Kconfig option
will allow to enable or disable the support in each boards' defconfig.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Maxime Ripard [Thu, 15 Oct 2015 20:04:06 +0000 (22:04 +0200)]
sunxi: board: Only try to use the MMC related functions if enabled
So far, even if CONFIG_MMC was not enabled the board code was trying to use
the MMC-related functions, resulting in linker errors.
Protect those calls by an ifdef.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Maxime Ripard [Thu, 15 Oct 2015 20:04:05 +0000 (22:04 +0200)]
mmc: Add generic Kconfig option
Add a generic Kconfig option for the CONFIG_MMC option that was used before
in the configuration headers.
Since all the architectures need to be converted to that first, depend on
an non-existent config option that will be extended with architectures that
use that option.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Maxime Ripard [Thu, 15 Oct 2015 20:04:04 +0000 (22:04 +0200)]
fastboot: Implement OEM format only when we have MMC support
The current fastboot support assumes that CONFIG_FASTBOOT_FLASH implies
that we have an MMC in our system, which might not be the case if we have
some other storage device.
Change the configuration option protecting that call to
FASTBOOT_FLASH_MMC_DEV, that makes much more sense.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Maxime Ripard [Thu, 15 Oct 2015 12:34:20 +0000 (14:34 +0200)]
sunxi: Add support for android boot image
When using the fastboot boot command, the image sent to U-Boot will be an
Android boot image. If the support is missing, that obviously won't work,
so we need it in our configuration.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Hans de Goede [Tue, 13 Oct 2015 21:57:03 +0000 (23:57 +0200)]
sunxi: Add defconfig for the Sinovoip BPI-M2 board
The Sinovoip BPI-M2 is a SBC board based on the A31s SoC it features
1G RAM, a microsd slot, Gbit ethernet, 4 usb-a USB-2 ports, ir receiver,
stereo headphone jack and hdmi video output.
The dts changes are identical to the dts files submitted upstream.
A few notes on the use if dldo and aldo regulators. DLDO1 is used
for Vdd for the ethernet phy, ALDO2 is used for AVdd for the ethernet
phy. ALDO1 is used to power the sdio wifi module.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Wed, 14 Oct 2015 14:35:51 +0000 (16:35 +0200)]
sunxi: Fix sorting of boards in MAINTAINERS
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Fri, 9 Oct 2015 16:11:15 +0000 (17:11 +0100)]
sunxi: Add a bootcmd_sunxi_compat to the default environment to boot old kernels
Add a bootcmd_sunxi_compat value to the default environment when building
with CONFIG_OLD_SUNXI_KERNEL_COMPAT, this way people who occasionally want
to boot an old kernel can do so by simply typing "run bootcmd_sunxi_compat"
rather then needing to have 2 separate setups / sdcards for old and
new kernels.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sat, 10 Oct 2015 12:25:10 +0000 (14:25 +0200)]
sunxi: power: Columbus: only enable ELDO3 when necessary
ELDO3 is only necessary when using the lcd-panel, and not when using hdmi,
the display code already takes care of enabling ELDO3 when necessary,
so there is no need to permanently enable it in the deconfig.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sat, 3 Oct 2015 13:29:24 +0000 (15:29 +0200)]
sunxi: power: Change axp209 LDO3 and LDO4 default to disabled
LDO3 and LDO4 are normally either unused, or used to power csi
attached camera sensors, and as such do not need to be enabled at
boot time.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sun, 4 Oct 2015 10:01:17 +0000 (12:01 +0200)]
sunxi: power: Add support for disabling axp209 regulators
Add support for disabling the regulators found on the axp209 pmic.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sat, 3 Oct 2015 14:13:19 +0000 (16:13 +0200)]
sunxi: power: Drop protection against multiple calls from axp221 axp_init()
The only thing axp221.c's axp_init() does which needs protection
against multiple calls is calling pmic_bus_init, and pmic_bus_init()
itself is already protected against being called multiple times.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sat, 3 Oct 2015 14:12:27 +0000 (16:12 +0200)]
sunxi: power: Use pmic_bus functions for axp152 / axp209 driver
Use the generic pmic_bus helpers for the axp152 / axp209 drivers,
rather then having them define their own register read / write
functions.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sat, 3 Oct 2015 13:26:34 +0000 (15:26 +0200)]
sunxi: power: Change A23/A33 aldo1 default voltage to 3.0V
On A23 / A33 boards aldo1 is used for VCC-IO and should be 3.0V, make this
the default.
Note that this does not cause any functional changes since all sun8i
board defconfig-s already contained: CONFIG_AXP_ALDO1_VOLT=3000 .
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sat, 3 Oct 2015 13:21:53 +0000 (15:21 +0200)]
sunxi: power: Change A23/A33 VDD-SYS default from 1.2V to 1.1V
Change the axp223 dcdc2 / VDD-SYS default from 1.2V to 1.1V, 1.1V is the
value recommended by Allwinner and is what most fex files specify.
This has been tested on a number of A23/A33 tablets including on an
A23 Ippo-q8h-v1.2 PCB tablet which has a fex file which specifies 1.2V
(which is where our original 1.2V default comes from).
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sat, 3 Oct 2015 13:18:33 +0000 (15:18 +0200)]
sunxi: power: Unify axp pmic function names
Stop prefixing the axp functions for setting voltages, etc. with the
model number, there ever is only one pmic driver built into u-boot,
this allows simplifying the callers.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Wed, 30 Sep 2015 13:22:42 +0000 (15:22 +0200)]
sunxi: power: Make all voltages configurable through Kconfig
On boards with axp221/223 pmic-s we already allow configuring most
voltages. Make the Kconfig options for these also apply to boards with
axp152 / axp209 pmic-s and extend them to configure all voltages.
The Kconfig defaults are chosen so that this commit does not introduce any
functional changes.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Wed, 30 Sep 2015 13:12:30 +0000 (15:12 +0200)]
sunxi: Kconfig-ify CONFIG_AXP152_POWER and _AXP209_POWER
Kconfig-ify CONFIG_AXP152_POWER and _AXP209_POWER settings, removing
them from CONFIG_SYS_EXTRA_OPTIONS.
Note that sun5i boards can have either an AXP209 or an AXP152 pmic, the
Kconfig default is AXP209, boards with an AXP152 must explicitly select
this. Likewise boards without a pmic must explicitly select SUNXI_NO_PMIC
in their defconfig.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Tue, 29 Sep 2015 13:06:26 +0000 (15:06 +0200)]
sunxi: Remove board defconfig-s for specific Q8 tablet PCB-s
We now have generic q8_a?3_defconfig files for Q8 formfactor tablets with
an A13 / A23 / A33 SoC, there is no need for these PCB variant specific
defconfig-s and they only serve to confuse the user.
Note that in case of the forfun_q88db_defconfig and TZX-Q8-713B7_defconfig
for A13 based Q8 tablets there is not even a dts file for these in the
upstream kernel, which is all the more reason to remove them.
The generic q8_a?3_defconfig files have been tested on an Et_q8_v1_6,
Ippo_q8h_v1_2_a33_1024x600, Ippo_q8h_v1_2 and TZX-Q8-713B7 tablet, and the
forfun_q88db_defconfig is identical to q8_a13_tablet_defconfig.
This leaves only the Ippo_q8h_v5 untested with the new generic defconfigs
but there is no reason to assume that it will not work.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Hans de Goede [Sun, 13 Sep 2015 10:31:24 +0000 (12:31 +0200)]
sunxi: Switch to using malloc_simple for the spl
common/dlmalloc.c is quite big, both in .text and .data usage. E.g. for a
Mele_M9 sun6i board build this reduces .text from 0x4214 to 0x3b94 bytes,
and .data from 0x54c to 0x144 bytes.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Reviewed-by: Tom Rini <trini@konsulko.com>
Hans de Goede [Sun, 13 Sep 2015 11:02:48 +0000 (13:02 +0200)]
sunxi: Enable CONFIG_SPL_STACK_R
Select CONFIG_SPL_STACK_R for sunxi boards, this gives us much more
room on the stack once we've the DRAM running.
Besides being a good change to have on itself, this also paves the
way for switching to using malloc_simple in the SPL which cuts of
close to 4KiB of the SPL size.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Hans de Goede [Sun, 13 Sep 2015 13:04:17 +0000 (15:04 +0200)]
malloc_simple: Add support for switching to DRAM heap
malloc_simple uses a part of the stack as heap, initially it uses
SYS_MALLOC_F_LEN bytes which typically is quite small as the initial
stacks sits in SRAM and we do not have that much SRAM to work with.
When DRAM becomes available we may switch the stack from SRAM to DRAM
to give use more room. This commit adds support for also switching to
a new bigger malloc_simple heap located in the new stack.
Note that this requires spl_init to be called before spl_relocate_stack_gd
which in practice means that spl_init must be called from board_init_f.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Simon Glass <sjg@chromium.org>