Merge git://git.denx.de/u-boot-x86

Merge git://git.denx.de/u-boot-riscv

x86: zImage: Pass working device tree data to the kernel

On x86 platforms, U-Boot does not pass Device Tree data to the kernel.
This prevents the kernel from using FDT loaded by U-Boot.

Read the working FDT address from the "fdtaddr" environment variable
and add a copy of the FDT data to the kernel setup_data list.

Signed-off-by: Ivan Gorinov <ivan.gorinov@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: add #include <linux/libfdt.h> to zimage.c to fix build error]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

x86: mmc: Fix mapping of BAR memory

Use dm_pci_map_bar function for BAR mapping. This has the advantage
of clearing BAR flags and and only accepting mapped memory.

Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Reviewed-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

dm: pci: Avoid setting a PCI region that has 0 size

It makes no sense to set a PCI region that has 0 size.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

dm: pci: Check board information pointer in decode_regions()

PCI enumeration may happen very early on an x86 board. The board
information pointer should have been checked in decode_regions()
as its space may not be allocated yet.

With this commit, Intel Galileo board boots again.

Fixes: 664758c ("pci: Fix decode regions for memory banks")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

efi_stub: Fix GDT_NOTSYS check

The get_codeseg32() wants to know if a passed in descriptor has
flag GDT_NOTSYS set (desc & GDT_NOTSYS), not whether desc and
GDT_NOTSYS are not != 0 (desk && GDT_NOTSYS).

This is an obvious typo. Fix it up.

Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

riscv: ae250: Support DT provided by the board at runtime

Enable CONFIG_OF_BOAD to support delivery dtb to u-boot
at run time instead of embedded.

There are two methods to delivery dtb.
 1 Pass from loader:
   When u-boot boot from RAM, gdb or loader can pass dtb
   via a2 to u-boot dynamically. Of course gdb or loader
   shall be in charge of dtb delivery.

 2 Configure CONFIG_SYS_FDT_BASE:
   It can be configured as RAM or ROM base statically,
   no mater u-boot boot from RAM or ROM.
   If it was configured as ROM base, dtb can be burned
   into ROM(spi flash) by spi driver.

Meanwhile remove CONFIG_SKIP_LOWLEVEL_INIT which is
useless in nx25-ae250 configuration.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>

configs: Drop CONFIG_MMC_NDS32

Remove CONFIG_MMC_NDS32 from the three config
(adp-ae3xx_defconfig, adp-ag101p_defconfig, nx25-ae250_defconfig).

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>

mmc: ftsdc010: Merge nds32_mmc to ftsdc010

nsd32_mmc was created to support ftsdc010 dm.
It is not necessary to separate both, so merge it
to ftsdc010.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>

mmc: ftsdc010: Migrate CONFIG_FTSDC010_SDIO to Kconfig

Convert CONFIG_FTSDC010_SDIO to Kconfig.
So CONFIG_FTSDC010_SDIO can also be
removed from config_whitelist.txt.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>

Drop CONFIG_FTSDC010_NUMBER

CONFIG_FTSDC010_NUMBER was not used anymore,
can be removed now.

So CONFIG_FTSDC010_NUMBER
can also be removed from config_whitelist.txt.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>

Drop CONFIG_FTSDC010_BASE

After drop non-dm code of ftsdc010, the sd register
base definition can be droppped now.

So CONFIG_FTSDC010_BASE and CONFIG_FTSDC010_BASE_LIST both
can be removed from config_whitelist.txt

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>

board: Drop ftsdc010 non-dm code

Remove board_mmc_init() in adp-ag101p, adp-ae3xx
and nx25-ae250 boards.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>

mmc: ftsdc010: Drop non-dm code

Only three defconfig(adp-ag101p_defconfig,
adp-ae3xx_defconfig, nx25-ae250_defconfig)
set CONFIG_FTSDC010=y. And they all also
enable CONFIG_DM_MMC. So the non-dm code
of ftsdc010 can be dropped now.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>

nds32: dts: AG101P support sd High-Speed mode

Enable High-Speed mode with cap-sd-highspeed in dts

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>

riscv: dts: AE250 support sd High-Speed mode

Enable High-Speed mode with cap-sd-highspeed in dts.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>

mmc: ftsdc010: Support High-Speed mode

ftsdc010 dm driver has been disable High-Speed mode
as default to work around Andes AE3XX platform's problem,
because of it does not support High-Speed mode in
commit id 73cd56b2df213c629191139e5c6705e069b6214f.

But other platforms or SoCs maybe support this function.
So High-Speed mode can be enabled from dts with
cap-mmc-highspeed or cap-sd-highspeed property.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>

doc: ae250: Describe riscv-linux booting via u-boot

Simply record riscv-linux booting steps and messages
from bbl via u-boot on QEMU in README.ae250.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>

tools: mkimage: Support RISC-V arch

Add riscv uimage arch to support riscv-linux booting.
It can Convert riscv-linux to image which can be
booted by bootm command.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>

riscv: bootm: Remove ATAGS

ATAGS is not supported and will be replaced
by DT in riscv-linux. So can be removed now.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>

riscv: bootm: Support to boot riscv-linux

riscv-linux should use BBL (Berkeley bootloader) for
loading the Linux kernel.

U-Boot can play as FSBL(first stage bootloader)
to boot BBL and riscv-linux.

In BBL's init_first_hart(), it will pass dtb with a1.
So implement bootm to pass arguments to BBL correctly.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>

riscv: checkpatch: Fix static const char * array declarations

It is reported by checkpatch.pl
WARNING: static const char * array
should probably be static const char * const

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>

riscv: checkpatch: Fix missing a blank line after declarations

It is reported by checkpatch.pl
WARNING: Missing a blank line after declarations.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>

riscv: checkpatch: Fix alignment should match open parenthesis

It is reported by checkpatch.pl.
CHECK: Alignment should match open parenthesis

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>

riscv: checkpatch: Fix use of volatile

It is reported by checkpatch.pl
WARNING: Use of volatile is usually wrong: see
Documentation/process/volatile-considered-harmful.rst

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>

riscv: checkpatch: Fix Macro argument reuse

It is CHECK reported by checkpatch.pl
CHECK: Macro argument reuse 'PTE' - possible side-effects?

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>

Merge git://git.denx.de/u-boot-rockchip

rockchip: sdhci: support 8bit bus-width

The Rockchip-specific SDHCI wrapper does not process the 'bus-width'
property in the SDHCI node. Consequently, the bus is always kept in
4bit mode, even if 8bit wide operation is available, supported and
requested in the DTS.

This change adds processing of the 'bus-width' property and sets the
host capability flag for an 8bit wide bus, if set to 8. As the logic
in sdhci.c does not support clearing the 4bit capability, we assume
that 4bit operation is always supported.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

rockchip: mmc: update MAINTAINERS

The Rockchip-specific wrappers to the DW-MMC and the SDHCI driver
were not covered as part of what's maintained by the architecture
maintainers.  Add them here.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

rockchip: defconfig: puma-rk3399: enable DMA for SDHCI controller

For the RK3399-Q7, we have a fast eMMC connected in an 8 bit wide
configuration to the SDHCI controller (sdhci@fe330000).  Enable DMA
within the SDHCI driver to get the best performance out of it.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

rockchip: rk3399: set fdtfile

Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

rockchip: clk: rk3188: update dpll settings to make EMAC work

The patch set dpll settings for 300MHz to values used by binary
blob[1]. With new values dpll still generate 300MHz clock, but
EMAC work. Probably with new values dpll generate more stable clock.

dpll on rk3188 provide clocks to DDR and EMAC. With current
dpll settings EMAC doesn't work on radxa rock. EMAC sends packets
to network, but it doesn't receive anything. ifconfig shows a lot
of framing errors.

[1] https://github.com/linux-rockchip/u-boot-rockchip/blob/u-boot-rk3288/
    tools/rk_tools/3188_LPDDR2_300MHz_DDR3_300MHz_20130830.bin

Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

video: rk3288_mipi: Combine NULL check into IS_ERR_OR_NULL()

Signed-off-by: Punit Agrawal <punit.agrawal@arm.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

video: rk3288_mipi: check in rk_mipi_ofdata_to_platdata

The error checking should also catch the case that no range has beeen
defined.
syscon_get_first_range() returns NULL if no range is defined.
cf. rk3399_mipi.c

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

video: rk3399_mipi: Combine NULL check into IS_ERR_OR_NULL()

Signed-off-by: Punit Agrawal <punit.agrawal@arm.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

video: rk3399_mipi: correct error checking

Pointers are never negative. Use macro IS_ERR() for checking.
cf. rk3288_mipi.c

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

usb: rockchip: remove duplicate assignement.

Assigning f_rkusb->reboot_flag twice doesn't make sense.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

driver: ram: rockchip: rk3399: missing counter increment

If we want to check the duration we need to increment the counter.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

rockchip: pinctrl: rk3188: Move the iomux definitions into pinctrl-driver

Clean the iomux definitions at grf_rk3188.h, and move them into
pinctrl-driver for resolving the compiling error of redefinition.

Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

rockchip: pinctrl: rk3036: Move the iomux definitions into pinctrl-driver

Clean the iomux definitions at grf_rk3036.h, and move them into
pinctrl-driver for resolving the compiling error of redefinition.

Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

rockchip: pinctrl: rk3399: add support for I2C[123467]

This adds support for the (to date unsupported) I2C controllers 1~4
and 6~7 (i.e. now all controllers except I2C5, which is not accessible
on the RK3399-Q7, are supported by pinctrl).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

rockchip: pinctrl: rk3399: fix GPIO2B1 and GPIO2B2 shift value

The shift values for GPIO2B1 and GPIO2B2 had in fact referred to
GPIO2B0 and GPIO2B1, respectively.  This substitutes the correct
values.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

Merge git://git.denx.de/u-boot-ubi

Merge git://git.denx.de/u-boot-spi

Merge git://git.denx.de/u-boot-i2c

Merge tag 'xilinx-for-v2018.05' of git://git.denx.de/u-boot-microblaze

Xilinx changes for v2018.05

- Fix mkimage recognition
- Update all my fragments

ZynqMP:
- Use clk driver
- Support loading elfs in el1
- Various DTS and defconfig changes
- Enable newer pmufw versions
- Support more clocks
- Remove ep108
- Secure image support
- Fix memtest setup

Zynq:
- Enabling watchdog driver
- Support more clocks
- defconfig changes

fpga:
- Simplify error path

net:
- GMII case update

Convert CONFIG_UBI_SILENCE_MSG to Kconfig

Signed-off-by: Petr Vorel <petr.vorel@gmail.com>

Convert CONFIG_UBIFS_SILENCE_MSG to Kconfig

Introduce another difference from upstream (kernel) source in
fs/ubifs/super.c: adding preprocessor condition as y variable in
mount_ubifs() depends on CONFIG_UBIFS_SILENCE_MSG:
fs/ubifs/super.c:1337:15: error: variable ?y? set but not used [-Werror=unused-but-set-variable]
  long long x, y;

Not setting CONFIG_UBIFS_SILENCE_MSG in am335x_igep003x_defconfig and
igep0032_defconfig. Although it was defined in their config headers, it
depends on CMD_UBIFS which is not set for them.

Signed-off-by: Petr Vorel <petr.vorel@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Heiko Schocher <hs@denx.de>

ubifs: Reintroduce using CONFIG_UBIFS_SILENCE_MSG

Use of CONFIG_UBIFS_SILENCE_MSG was added in
147162dac6 ("ubi: ubifs: Turn off verbose prints")

Then it was removed in
ff94bc40af ("mtd, ubi, ubifs: resync with Linux-3.14")

Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Petr Vorel <petr.vorel@gmail.com>

omap3: spi: Correct ti, pindir-d0-out-d1-in parsing

The ti,pindir-d0-out-d1-in property is not expected to have a value
according to the device-tree binding, so treat it as a boolean not a
uint property.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Jagan Teki <jagan@openedev.com>

Merge git://git.denx.de/u-boot-arc

Alexey:
 1. Significantly rework cache-related functionality.
    In particular that fixes coherency problems in some corner-cases,
    allows us to enable and disable caches in run-time and still
    have properly running system, finally support execution from
    real flash (before we used to run from DDR from the very beginning).

 2. Remove string routines implemented in assembly.
    That allows us to build and run U-Boot on wide range of ARC cores
    with different configurations. I.e. whatever tuning is used on GCC's
    command-line we'll get code for desired flavor of ARC.
    Otherwise for each and every corner-case we would need to add ifdefs
    in assembly code to accommodate missing instructions etc.

 3. Get use of GCC's garbage collector which helps to slim-down resulting image
    quite a bit.

 4. Also now we may disable U-Boot self-relocation for ARC if needed either
    by platform or for debugging purposes.

ARC: bootm: Refactor GO and PREP subcommands implementation

Refactor GO and PREP subcommands implementation for a simpler
override in the boards platform code.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

MAINTAINERS: Fix Zynq/ZynqMP and Microblaze fragments

Fix my fragments to list all files in the repo.

Also fix path to for Xilinx Zynq SoC (mach-zynq)
It should be the part of
"ARM: zynq: move SoC sources to mach-zynq"
(sha1: 0107f2403669f764ab726d0d404e35bb9447bbcc)

And cover dts files in board MAINTAINERS files.

Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

tools: xilinx: Fix zynq/zynqmp image recognition

There is an issue to recognize zynq or zynqmp image because header
checking is just the same. That's why zynqmp images are recognized as
zynq one.
Check unused fields which are initialized to zero in zynq format
(__reserved1 0x38 and __reserved2 0x44) which are initialized for
zynqmp. This should ensure that images are properly recognized by:
./tools/mkimage -l spl/boot.bin

Also show image type as ZynqMP instead of Zynq which is confusing.

Reported-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Alexander Graf <agraf@suse.de>

arm64: zynqmp: Add support for verifying secure images

This patch adds new command "zynqmp" to handle zynqmp
specific commands like "zynqmp secure". This secure command is
used for verifying zynqmp specific secure images. The secure
image can either be authenticated or encrypted or both encrypted
and authenticated. The secure image is prepared using bootgen
and will be in xilinx specific BOOT.BIN format. The optional
key can be used for decryption of encrypted image if user
key was specified while creation BOOT.BIN.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

arm64: zynqmp: Remove ep108 board

ZynqMP Emulation board is no longer tested and there is no reason to
keep maintaining it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

arm64: zynqmp: Correct EG/EV part detection logic

The vcu disable bit in efuse ipdisable register is valid only
if PL powered up so, consider PL powerup status for determing
EG/EV part. If PL is not powered up, ignore EG/EV part of string.
The PL powerup status will be filled by pmufw based on PL PROGB
status in the 9th bit of version field.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

arm64: zynqmp: Print the value of pl clocks and wdt clock using clk dump

This patch print pl clocks (pl0...pl3) and watchdog
clock using clk dump.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

arm64: zynqmp: nand: Fixed NAND erase issue for size 1GiB or more

NAND erase was not happening for size 1GiB or more. Erase
command was executing successfully but in actual, it was not
erasing.
This patch fixed erase issue for 1 GiB or more size nand.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

arm: zynq: Remove OF_EMBED configuration for zc770 xm011 x16

Use appended dtb which is default option for zynq boards.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

arm: zynq: Setup the same bootcommand as for zc770 xm011 x8

The same command should be used for x16 configuration.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

arm64: zynqmp: Changed scratch address used by the alternate memory test

This patch changed CONFIG_SYS_MEMTEST_SCRATCH address to the
accessible DDR address used by alternate memory test.
Before this, 0xfffc0000 address was used, which is the OCM
address and not enabled in MMU table. So, whenever trying
to access 0xfffc0000 address, got Synchronous Abort exception.

After changing CONFIG_SYS_MEMTEST_SCRATCH address, alternate
memory test is working fine.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

arm: zynq: Enable cadence driver on zc706

Enable watchdog with reset-on-timeout feature.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

arm: zynq: Wire watchdog internals

Watchdog is only enabled in full u-boot. Adoption for SPL should be also
done because that's the right place where watchdog should be enabled.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

watchdog: Add Cadence watchdog driver

This IP can be found on Zynq and ZynqMP devices.
The driver was tested with reset-on-timeout; feature.

Also adding WATCHDOG symbol to Kconfig because it is required.

Signed-off-by: Shreenidhi Shedi <imshedi@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

clk: zynq: Show watchdog clock rate properly

watchdog clock is also connected to cpu 1X clocksource.

Zynq> clk dump
...

Before:
      swdt          4294967290
After:
      swdt           111111110

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

arm64: zynqmp: Enable newer pmufw versions

As of now newer pmufw is keeping old interfaces. That's why permit
u-boot to run on newer version. Recommended version will be setup later.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

net: zynq_gem: Dont run any phy detection logic for GMII case

This patch bypasses phy detection logic for GMII interface
and just depend on phy address received from DT. This patch
is required as phy detection logic is different for some phys
like xilinx phy which can be connected over SGMII and GMII
interface.
This fixes the issue of ethernet failures when xilinx phy is
connected over GMII interface.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

arm64: zynqmp: Add support to load an app at EL1

This patch is adding support to switch to EL1 while loading an EL1
application with u-boot running at EL above EL1 in aarch64 mode.

Signed-off-by: Nitin Jain <nitinj@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

arm: zynq: Enable debug uart on Zedboard

It helps with debugging.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

arm64: zynqmp: Enable ethernet driver for zc1751-dc5

Enable missing driver on this board.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

fpga: Simplify error path in fpga_add

Check !desc earlier to simplify code.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Reviewed-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>

xilinx: Sync defconfigs with latest Kconfig updates

Make defconfigs up2date with current location.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

arm64: zynqmp: Convert board to use zynqmp-clk driver

Use zynqmp clock driver instead of fixed clocks.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

i2c: lpi2c: remove superfluous assignments

In

lpi2c_status_t result = A;
result = B;

the first assignment has no effect. Let's remove it.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>

Merge git://git.denx.de/u-boot-net

configs: omapl138: Enable DM and DT

Enable Driver Model and Device-tree support for omapl138 board
in U-Boot. Also enable DM_SERIAL and DM_I2C.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

ARM: dts: da850-lcdk: Sync from Linux 4.16

Sync dts from Linux 4.16 and also add u-boot specific
dtsi for OMAPl138 board.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

davinci: Enable DDR_INIT for DA8XX

Commit 6aa4ad8e3820 ("Convert CONFIG_SOC_DA8XX et al to Kconfig")
converted SOC_DA8XX to Kconfig but missed enabling DDR_INIT for
SOC_DA8XX, which broke OMAPL138 to boot.

Commit 2e87980580d0 ("davinci: Fix omapl138_lcdk builds") disabled
DDR_INIT for all DA850 SoCs. This failed all DA850 boards to boot
as ddr is not being initialized.

Enable SYS_DA850_DDR_INIT for DA8XX so that all DA850 and OMAPL138
will have ddr initialized

Fixes: 2e87980580d0 ("davinci: Fix omapl138_lcdk builds")
Fixes: 6aa4ad8e3820 ("Convert CONFIG_SOC_DA8XX et al to Kconfig")
Reported-by: Sekhar Nori <nsekhar@ti.com>
Tested-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: David Lechner <david@lechnology.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

configs: am335x_evm: Increase SPL_SYS_MALLOC_F_LEN to accomodate gpio_devices

With gpio devices getting created in SPL, the size of the heap is
no longer sufficient. Therefore, increase SPL_SYS_MALLOC_F_LEN
to 0x1000.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

gpio: omap_gpio: Add DM_FLAG_PRE_RELOC flag

With DM enabled in SPL, DM_FLAG_PRE_RELOC is required for
the omap_gpio driver to be bound to the gpio devices.

Therefore, add DM_FLAG_PRE_RELOC flag to the omap_gpio driver.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

scripts/check-config.sh: fix "command not found" error handling

scripts/check-config.sh exits successfully and silently without doing
any checks when the 'comm' command is not found.

The problem triggers from the command around line 39:

  comm -23 ${suspects} ${ok} >${new_adhoc}

This statement fails when 'comm' is not in $PATH, creating an empty
${new_adhoc} file. But the script continues and the following line,
which is supposed to detect an error:

  if [ -s ${new_adhoc} ]; then

will always be false since the file is empty, and the script will exit
successfully as if everything were OK.

The case where 'comm' in not in $PATH is not theoretical. It used to
happen on yocto until a recent fix [0], and still happens on the
current stable branch (rocko).

Fix by setting the errexit flag to exit with error when a statement
fails, so that at least the problem is noticed.

For additional safety also set the nounset flag to detect expansion
errors.

[0] http://git.yoctoproject.org/cgit/cgit.cgi/poky/commit/?id=fe0b4cb5b48580d4a3f3c0eb82bfa6f1b13801e4

Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Reviewed-by: Simon Glass <sjg@chromium.org>

davinci: omapl138_lcdk: fix PLL0 frequency

commit 1601dd97edc6 ("davinci: omapl138_lcdk: increase PLL0 frequency")
changed the PLL0 frequency to 456MHz, which is needed for the LCDC IP
block. However, in doing so, it caused the PLLOUT clock to be outside
of the allowable specifications given in the OMAP-L138 data sheet. (It
says PLLOUT must be 600MHz max). It also uses a PLLM value outside of
the range given in the TRM (it says PLLM must in the range 0 to 0x1f).

So here is what we have currently:

PLLOUT = 24 / (0 + 1) * (37 + 1) = 912MHz (out of spec)
         ^     ^         ^
       CLKIN PREDIV    PLLM (out of spec)

input to PLLDIVn = 912 / (1 + 1) = 456MHz (desired result)
                    ^     ^
                 PLLOUT POSTDIV

This changes the PLLM value to 18 and the POSTDIV value to 0 so that
PLLOUT is now within specification but we still get the desired
result.

PLLOUT = 24 / (0 + 1) * (18 + 1) = 456MHz (within spec)
         ^     ^         ^
       CLKIN PREDIV     PLLM

input to PLLDIVn = 456 / (0 + 1) = 456MHz (desired result)
                    ^     ^
                 PLLOUT POSTDIV

Fixes: 1601dd97edc6 ("davinci: omapl138_lcdk: increase PLL0 frequency")
Signed-off-by: David Lechner <david@lechnology.com>
Reported-by: Sekhar Nori <nsekhar@ti.com>
Tested-by: Sekhar Nori <nsekhar@ti.com>

test/py: add spi_flash tests

Add basic tests for the spi_flash subsystem.

Signed-off-by: Liam Beguin <liambeguin@gmail.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>

net: Drop CONFIG_ENC28J60

Last user of this driver went away in October 2014 in
commit d58a9451e7339ed4 ("ppc/arm: zap EMK boards").

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

net: macb: remove superfluous logical constraint

In

if (a > =0) {...}
else (a < 0) {...}

the second logical constraint is superfluous.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

drivers: net: cpsw: remove superfluous assignment.

In

int ret = A;
ret = B;

the first assignment has not effect.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

lan7xxx: Require phylib

The lan75xx and lan78xx drivers need to drive their phy via the generic
phylib framework. Let's reflect that dependency in Kconfig, so that we
don't get build errors when phylib does not get selected.

Signed-off-by: Alexander Graf <agraf@suse.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

net: Only access network devices after init

In the efi_loader main loop we call eth_rx() occasionally. This rx function
might end up calling into devices that haven't been initialized yet,
potentially resulting in a lot of transfer timeouts.

Instead, let's make sure the ethernet device is actually initialized before
reading from or writing to it.

Signed-off-by: Alexander Graf <agraf@suse.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

net: Fix netretry condition

The "net_try_count" counter starts from "1".
And the "retrycnt" contains requested amount of retries.

With current logic, that means that the actual retry amount
will be one time less then what we set in "netretry" env.
For example setting "netretry" to "once" will make "retrycnt"
equal "1", so no retries will be triggered at all.

Fix the logic by changing the statement of "if" condition.

Signed-off-by: Leonid Iziumtsev <leonid.iziumtsev@se.atlascopco.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

net/phy/cortina: Add No firmware upload option

Current Cortina phy driver assumes that firmware upload
is required during initialization and is dependent
on presence of corresponding macros like CONFIG_CORTINA_FW_ADDR
for compilation.

But Cortina phy has provision to store phy firmware in
attached dedicated EEPROM. And boards designed with such
EEPROM does not require firmware upload.

Add CORTINA_NO_FW_UPLOAD option in cortina.c to support
such boards.

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

net/phy/cortina.c: Update get_phy_id implementation

Update get_phy_id() implementation in cortina.c to check
for Cortina_phy by comparing device phy_id with cortina phy_id
instead of relying on presence of CORTINA macros.

This will allow get_phy_id to work with non-cortina phy devices
which might have same phy address as Cortina device but on
different  bus.

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

configs: ls1012a: add pfe configuration for LS1012A

Add configurations for PFE.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

armv8: layerscape: csu: enable ns access to PFE registers

Enable all types of non-secure access to PFE block registers.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

armv8: fsl-lsch2: configure pfe's DDR and HDBUS interfaces and ECC

1. Set AWCACHE0 attribute of PFE DDR and HDBUS master interfaces
to bufferable.
2. Set RD/WR QoS for PFE DDR and HDBUS AXI master interfaces.
3. Disable ECC detection for PFE.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

armv8: fsl-lsch2: add pfe macros and update ccsr_scfg structure

SoC specific PFE macros are defined and structure ccsr_scfg
is updated with members defined for PFE.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

board: freescale: ls1012a2g5rdb: enable network support on ls1012a2g5rdb

This patch enables ethernet support for ls1012a2g5rdb.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

board: freescale: ls1012ardb: enable network support on ls1012ardb

This patch enables ethernet support for ls1012ardb.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

board: freescale: ls1012afrdm: enable network support on ls1012afrdm

This patch enables ethernet support for ls1012afrdm.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>