Masahiro Yamada [Fri, 3 Oct 2014 10:21:05 +0000 (19:21 +0900)]
serial: add UniPhier serial driver
The driver for on-chip UART used on Panasonic UniPhier platform.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Fri, 3 Oct 2014 10:21:04 +0000 (19:21 +0900)]
mtd: denali: add Denali NAND driver for SPL
The SPL-mode driver for Denali(Cadence) NAND Flash Memory Controller IP.
This driver requires two CONFIG macros:
- CONFIG_SPL_NAND_DENALI
Define to enable this driver.
- CONFIG_SYS_NAND_BAD_BLOCK_POS
Specify bad block mark position in the oob space. Typically 0.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Scott Wood <scottwood@freescale.com>
Masahiro Yamada [Fri, 3 Oct 2014 10:21:03 +0000 (19:21 +0900)]
mtd: denali: add Denali controller configs to Kconfig
Commit
3eb3e72a3f66 (nand/denali: Adding Denali NAND driver support)
introduced some new options, and some of them were documented by
commit
f9860cf081ef (nand/denali: Document CONFIG symbols).
This commit allows users to enable/disable them via Kconfig
with more detailed help docs.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Scott Wood <scottwood@freescale.com>
Tom Rini [Sat, 27 Sep 2014 00:10:48 +0000 (20:10 -0400)]
Merge branch 'for-tom' of git://git.denx.de/u-boot-dm
Simon Glass [Mon, 15 Sep 2014 12:33:23 +0000 (06:33 -0600)]
spi: Add brackets and tidy defines in spi.h
Some of the #defines in spi.h are not bracketed. To avoid future mistakes
add brackets. Also add an explanatory comment for SPI_CONN_DUAL_...
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Simon Glass [Mon, 15 Sep 2014 12:33:22 +0000 (06:33 -0600)]
dm: spi: Move cmd device code into its own function
In preparation for changing the error handling in this code for driver
model, move it into its own function.
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Sep 2014 12:33:20 +0000 (06:33 -0600)]
sandbox: config: Enable all SPI flash chips
Sandbox may as well support everything. This increases the amount of code
that is built/tested by sandbox, and also provides access to all the
supported SPI flash devices.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Simon Glass [Mon, 15 Sep 2014 12:33:19 +0000 (06:33 -0600)]
sandbox: Convert SPI flash emulation to use sf_params
At present sandbox has its own table of supported SPI flash chips. Now that
the SPI flash system is fully consolidated and has its own list, sandbox
should use that.
This enables us to expand the number of chips that sandbox supports.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Tom Rini [Fri, 26 Sep 2014 13:57:52 +0000 (09:57 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
Tom Rini [Fri, 26 Sep 2014 13:51:18 +0000 (09:51 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Scott Wood [Thu, 25 Sep 2014 18:54:29 +0000 (13:54 -0500)]
nand/denali: Document CONFIG symbols
The patch "nand/denali: Adding Denali NAND driver support"
introduced two config symbols without documenting them.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Chin Liang See [Fri, 12 Sep 2014 05:42:17 +0000 (00:42 -0500)]
nand/denali: Adding Denali NAND driver support
To add the Denali NAND driver support into U-Boot.
This driver is leveraged from Linux with commit ID
fdbad98dff8007f2b8bee6698b5d25ebba0471c9. For Denali
controller 64 variance, you need to declare macro
CONFIG_SYS_NAND_DENALI_64BIT.
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Stefan Roese [Fri, 5 Sep 2014 07:57:01 +0000 (09:57 +0200)]
mtd: nand: Fix length bug in ioread16_rep() and iowrite16_rep()
The ioread16_rep() and iowrite16_rep() implementations are U-Boot specific
and have been introduced with the Linux MTD v3.14 sync. While introducing
these functions, the length for the loop has been miscalculated. The ">> 1"
is already present in the caller. So lets remove it in the function.
Tested on omap3_ha.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Scott Wood <scottwood@freescale.com>
Acked-by: Heiko Schocher <hs@denx.de>
Rostislav Lisovy [Tue, 9 Sep 2014 13:54:30 +0000 (15:54 +0200)]
mtd: nand: am335x: Fix 'bit-flip' errors in SPL
OMAP GPMC driver used with some NAND Flash devices
(e.g. Spansion S34ML08G1) causes that U-boot shows
hundreds of 'nand: bit-flip corrected' error messages.
Possible cause was discussed in the mailinglist thread:
http://lists.denx.de/pipermail/u-boot/2014-April/177508.html
The issue was partially fixed with the
cc81a5291910d7a.git
however this has to be done to fix the SPL.
The original author of the code is Belisko Marek
<marek.belisko@gmail.com>
Signed-off-by: Rostislav Lisovy <lisovy@merica.cz>
Chris Packham [Wed, 10 Sep 2014 04:03:10 +0000 (16:03 +1200)]
powerpc: add --bss-plt to LDFLAGS
With some versions of gcc (that we know of 4.6.3 and 4.8.2 are affected)
it is necessary to specify --bss-plt to get the final blrl in the
_GOT2_TABLE_. Without this the last symbol does not get it's address
relocated. For the P2041RDB board this ended up being
NetArpWaitTimerStart which caused the ARP packets to timeout
immediately.
Signed-off-by: Joakim Tjernlund <joakim.tjernlund@transmode.se>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Joakim Tjernlund <joakim.tjernlund@transmode.se>
Acked-by: Scott Wood <scottwood@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
York Sun [Thu, 11 Sep 2014 20:32:07 +0000 (13:32 -0700)]
board/ls1021aqds: Add DDR4 support
LS1021AQDS has a variant with DDR4 slot. This patch adds a new defconfig
for this variant to enable DDR4 support. RAW timing parameters are not
added for DDR4. The board timing parameters are only tuned for single-
rank 1600 and 1800MT/s with Micron DIMM 9ASF51272AZ-2G1A1 due to DIMM
availability.
Signed-off-by: York Sun <yorksun@freescale.com>
CC: Alison Wang <alison.wang@freescale.com>
York Sun [Thu, 11 Sep 2014 20:32:06 +0000 (13:32 -0700)]
driver/ddr/fsl: Fix DDR4 driver
When accumulated ECC is enabled, the DQ_MAP for ECC[4:7] needs to be set
to 0, i.e. 0->0, 1->1, etc., required by controller logic, even these pins
are not actually connected.
Also fix a bug when reading from DDR register to use proper accessor for
correct endianess.
Signed-off-by: York Sun <yorksun@freescale.com>
York Sun [Mon, 8 Sep 2014 19:20:02 +0000 (12:20 -0700)]
ARMv8/ls2085a: Move u-boot location to make room for RCW
When booting with SP, RCW resides at the beginning of IFC NOR flash.
Signed-off-by: York Sun <yorksun@freescale.com>
York Sun [Mon, 8 Sep 2014 19:20:01 +0000 (12:20 -0700)]
ARMv8/ls2085a: Enable secondary cores
Spin table is at the very beginning of boot code. Each core has an individual
release address within the spin table, the ft_cpu_setup fn updates the
"cpu-release-addr" property of each cpu node with the corresponding release
address.
Also fix CPU_RELEASE_ADDR to point to secondary_boot_func.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Arnab Basu <arnab.basu@freescale.com>
York Sun [Mon, 8 Sep 2014 19:20:00 +0000 (12:20 -0700)]
armv8/fsl-lsch3: Release secondary cores from boot hold off with Boot Page
Secondary cores need to be released from holdoff by boot release
registers. With GPP bootrom, they can boot from main memory
directly. Individual spin table is used for each core. Spin table
and the boot page is reserved in device tree so OS won't overwrite.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Arnab Basu <arnab.basu@freescale.com>
Arnab Basu [Mon, 8 Sep 2014 19:19:59 +0000 (12:19 -0700)]
fdt_support: Make of_bus_default_count_cells non static
of_bus_default_count_cells can be used to get the #address-cells
and #size-cells defined by the current node's parent node. This
is required when using of_read_number to read from FDT nodes that
can be 32 or 64 bytes depending on values defined by the parent.
Signed-off-by: Arnab Basu <arnab.basu@freescale.com>
CC: Scott Wood <scottwood@freescale.com>
Arnab Basu [Mon, 8 Sep 2014 19:19:58 +0000 (12:19 -0700)]
fdt_support: Move of_read_number to fdt_support.h
This is being done so that it can be used outside 'fdt_support.c'. Making
life more convenient when reading device node properties that can be 32
or 64 bits long.
Signed-off-by: Arnab Basu <arnab.basu@freescale.com>
Cc: Scott Wood <scottwood@freescale.com>
York Sun [Thu, 21 Aug 2014 23:13:22 +0000 (16:13 -0700)]
driver/ddr/fsl: Fix tXP and tCKE
The driver was written using old DDR3 spec which only covers low speeds.
The value would be suboptimal for higher speeds. Fix both timing according
to latest DDR3 spec, remove tCKE as an config option.
Signed-off-by: York Sun <yorksun@freescale.com>
York Sun [Wed, 13 Aug 2014 17:21:05 +0000 (10:21 -0700)]
ARMv8/ls2085a_emu: Enable DP-DDR as standalone memory block
DP-DDR is used for DPAA, separated from main memory pool for general
use. It has 32-bit bus width and use a standard DDR4 DIMM (64-bit).
Signed-off-by: York Sun <yorksun@freescale.com>
York Sun [Fri, 1 Aug 2014 22:51:00 +0000 (15:51 -0700)]
driver/ddr: Restruct driver to allow standalone memory space
U-boot has been initializing DDR for the main memory. The presumption
is the memory stays as a big continuous block, either linear or
interleaved. This change is to support putting some DDR controllers
to separated space without counting into main memory. The standalone
memory controller could use different number of DIMM slots.
Signed-off-by: York Sun <yorksun@freescale.com>
Prabhakar Kushwaha [Wed, 16 Jul 2014 03:51:12 +0000 (09:21 +0530)]
board/ls2085a: Add support of NOR and NAND flash for simulator
Add support of NOR and NAND flash for simulator target.
Here
IFC - CS0: NOR flash
IFC - CS1: NAND flash
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Prabhakar Kushwaha [Tue, 23 Sep 2014 04:27:47 +0000 (09:57 +0530)]
driver/mtd: Use generic timer API for FSL IFC, eLBC
Freescale's flash control driver is using architecture specific timer API
i.e. usec2ticks
Replace usec2ticks with get_timer() (generic timer API)
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Joe Perches [Tue, 23 Sep 2014 10:41:02 +0000 (12:41 +0200)]
checkpatch: remove unnecessary + after {8,8}
Pick the following commit from Linux kernel:
commit
66cb4ee0e52ca721f609fd5eec16187189ae5fda
Author: Joe Perches <joe@perches.com>
Date: Wed Sep 10 09:40:47 2014 +1000
checkpatch: remove unnecessary + after {8,8}
There's a useless "+" use that needs to be removed as perl 5.20 emits a
"Useless use of greediness modifier '+'" message each time it's hit.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@ti.com>
Masahiro Yamada [Mon, 22 Sep 2014 10:59:06 +0000 (19:59 +0900)]
kconfig: move CONFIG_DEFAULT_DEVICE_TREE to kconfig
This option specifies the default Device Tree used for the run-time
configuration of U-Boot.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Masahiro Yamada [Mon, 22 Sep 2014 10:59:05 +0000 (19:59 +0900)]
kconfig: move CONFIG_OF_* to Kconfig
This commit moves:
CONFIG_OF_CONTROL
CONFIG_OF_SEPARATE
CONFIG_OF_EMBED
CONFIG_OF_HOSTFILE
Because these options are currently not supported for SPL,
the "Device Tree Control" menu does not appear in the SPL
configuration.
Note:
zynq-common.h should be adjusted so as not to change the
default value of CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Masahiro Yamada [Mon, 22 Sep 2014 06:06:15 +0000 (15:06 +0900)]
tools: remove reformat.py
This tools is unnecessary since commit
f6c8f38ec601
(tools/genboardscfg.py: improve performance more with Kconfiglib).
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Jeroen Hofstee [Sun, 21 Sep 2014 08:20:22 +0000 (10:20 +0200)]
README.clang: update FreeBSD instructions
The mentioned binutils port got removed while the patch was
pending. As Ian pointed out there is another port providing
the binutils for arm now. Update the instructions accordingly.
Cc: ian@FreeBSD.org
Cc: Tom Rini <trini@ti.com>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Jeroen Hofstee [Thu, 18 Sep 2014 18:10:27 +0000 (20:10 +0200)]
compiler_gcc: prevent redefining attributes
The libc headers on FreeBSD and likely related projects as well contain an
header file, cdefs.h which provides similiar functionality as linux/compiler.h.
It provides compiler independent defines like __weak __packed, to allow
compiling with multiple compilers which might have a different syntax for such
extension.
Since that header file is included in multiple standard headers, like stddef.h
and stdarg.h, multiple definitions of those defines will be present if both are
included. When compiling u-boot the compiler will warn about it hundreds of
times since e.g. common.h will include both files indirectly.
commit
7ea50d52849fe8ffa5b5b74c979b60b1045d6fc9 "compiler_gcc: do not redefine
__gnu_attributes" prevented such redefinitions, but this was undone by commit
fb8ffd7cfc68b3dc44e182356a207d784cb30b34 "compiler*.h: sync
include/linux/compiler*.h with Linux 3.16".
Add the checks back where necessary to prevent such warnings.
As the original patch this checkpatch warning is ignored:
"WARNING: Adding new packed members is to be done with care"
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Acked-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Thu, 18 Sep 2014 06:43:41 +0000 (15:43 +0900)]
kbuild: refactor some makefiles
[1] Move driver/core/, driver/input/ and drivers/input/ entries
from the top Makefile to drivers/Makefile
[2] Remove the conditional by CONFIG_DM in drivers/core/Makefile
because the whole drivers/core directory is already selected
by CONFIG_DM in the upper level
[3] Likewise for CONFIG_DM_DEMO in drivers/demo/Makefile
[4] Simplify common/Makefile - both CONFIG_DDR_SPD and
CONFIG_SPD_EEPROM are boolean macros so they can directly
select objects
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Marek Vasut <marex@denx.de>
Masahiro Yamada [Thu, 18 Sep 2014 04:28:07 +0000 (13:28 +0900)]
common.h: remove MIN, MAX, MIN3, MAX3 macros
Now MIN, MAX, MIN3, MAX are not used.
Going forward, use min, max, min3, max3.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Thu, 18 Sep 2014 04:28:06 +0000 (13:28 +0900)]
cosmetic: replace MIN, MAX with min, max
The macro MIN, MAX is defined as the aliase of min, max,
respectively.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Jeroen Hofstee [Wed, 17 Sep 2014 18:33:48 +0000 (20:33 +0200)]
compiler.h: remove duplicated uninitialized_var
Since clang has a different definition for uninitialized_var
it will complain that it is redefined in include/compiler.h.
Since these are already defined in linux/compiler.h just remove
this instance.
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Rini <trini@ti.com>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Rostislav Lisovy [Tue, 16 Sep 2014 12:38:52 +0000 (14:38 +0200)]
cmd_nand: Update (nand_info_t*)nand after arg_off(_size) call
The arg_off() and arg_off_size() update the 'current NAND
device' variable (dev). This is then used when assigning the
(nand_info_t*)nand value. Place the assignment after the
arg_off(_size) calls to prevent using incorrect (nand_info_t*)
nand value.
Signed-off-by: Rostislav Lisovy <lisovy@merica.cz>
Masahiro Yamada [Tue, 16 Sep 2014 11:21:15 +0000 (20:21 +0900)]
linker_lists: fix comment
The section name and the C variable name seem to be opposite.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Masahiro Yamada [Tue, 16 Sep 2014 07:33:05 +0000 (16:33 +0900)]
kconfig: remove config_cmd_defaults.h
Now config_cmd_defaults.h is empty so it can be deleted safely.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Tue, 16 Sep 2014 07:33:04 +0000 (16:33 +0900)]
kconfig: move CONFIG_CMD_IMPORTENV to Kconfig
Since CONFIG_CMD_IMPORTENV is defined in config_cmd_defaults.h,
it should be enabled for all the boards except bf506f-ezkit
that undefs it explicitely.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Tue, 16 Sep 2014 07:33:03 +0000 (16:33 +0900)]
kconfig: move CONFIG_CMD_GO to Kconfig
Since CONFIG_CMD_GO is defined in config_cmd_defaults.h
(and no board undefs it its own header), it can be moved to
Kconfig with the default value "y".
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Tue, 16 Sep 2014 07:33:02 +0000 (16:33 +0900)]
kconfig: move CONFIG_CMD_EXPORTENV to Kconfig
Since CONFIG_CMD_EXPORTENV is defined in config_cmd_defaults.h,
it should be enabled for all the boards except bf506f-ezkit
that undefs it explicitely.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Tue, 16 Sep 2014 07:33:01 +0000 (16:33 +0900)]
kconfig: move CONFIG_CMD_CRC32 to Kconfig
Since CONFIG_CMD_CRC32 is defined in config_cmd_defaults.h,
it is enabled for all the boards except the ones undefining it
explicitly:
kwb
tseries_mmc
tseries_nand
tseries_spi
vct_platinum_onenand_small
vct_platinum_small
vct_platinumavc_onenand_small
vct_platinumavc_small
vct_premium_onenand_small
vct_premium_small
The default value of this config option should be "y" and
"# CONFIG_CMD_CRC32 is not set" should be added for those exceptions.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Tue, 16 Sep 2014 07:33:00 +0000 (16:33 +0900)]
kconfig: move CONFIG_CMD_BOOTM to Kconfig
CONFIG_CMD_BOOTM is defined in config_cmd_defaults.h
which is forcebly included from each board.
So, the default value of "config CMD_BOOTM" should be "y".
For some boards undefining it (bf506f-ezkit, controlcenterd_TRAILBLA,
controlcenterd_TRAILBLAZER_DEVELOP, controlcenterd_TRAILBLAZER),
"# CONFIG_CMD_BOOTM is not set" should be added to their defconfig.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Tue, 16 Sep 2014 07:32:59 +0000 (16:32 +0900)]
kconfig: move CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED to Kconfig
If this option is enabled, the objects under lib/ directory
are compiled with speed optimization, not size optimization.
(Currently, only used by some Blackfin boards.)
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Tue, 16 Sep 2014 07:32:58 +0000 (16:32 +0900)]
kconfig: add blank Kconfig files
This would be useful to start moving various config options.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Hans de Goede [Tue, 16 Sep 2014 07:26:23 +0000 (09:26 +0200)]
config_distro_bootcmd: Run 'scsi scan' before trying scsi disks
Scsi disks need to be probed before we try to access them, otherwise all
accesses fail with: ** Bad device size - scsi 0 **.
Reported-by: Karsten Merker <merker@debian.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Karsten Merker <merker@debian.org>
Masahiro Yamada [Tue, 16 Sep 2014 05:11:51 +0000 (14:11 +0900)]
MAINTAINERS: comment out blank M: field
Since commit
ddaf5c8f3030050fcd356a1e49e3ee8f8f52c6d4
(patman: RunPipe() should not pipe stdout/stderr unless asked),
Patman spits lots of "Invalid MAINTAINERS address: '-'"
error messages for patches with global changes.
It takes too long for Patman to process them.
Anyway, "M: -" does not carry any important information.
Rather, it is just like a place holder in case of assigning
a new board maintainer. Let's comment out.
This commit can be reproduced by the following command:
find . -name MAINTAINERS | xargs sed -i -e '/^M:[[:blank:]]*-$/s/^/#/'
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Masahiro Yamada [Tue, 16 Sep 2014 05:11:50 +0000 (14:11 +0900)]
MAINTAINERS: comment out invalid maintainers
The "S: Orphan" in MAINTAINERS means that the maintainer in the
"M:" field is unreachable (i.e. the email address is not working).
(Refer to the definition of "Orphan" adopted in U-Boot
in the log of commit
31f1b654b2f395b69faa5d0d3c1eb0803923bd3b,
"boards.cfg: move boards with invalid emails to Orphan")
For patch files adding global changes, scripts/get_maintainer.pl
adds bunch of such invalid email addresses, which results in
tons of annoying bounce emails.
This commit can be reproduced by the following command:
find . -name MAINTAINERS | xargs sed -i -e '
/^M:[[:blank:]]/ {
N
/S:[[:blank:]]Orphan/s/^/#/
}
'
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Tue, 16 Sep 2014 05:11:49 +0000 (14:11 +0900)]
tools/genboardscfg.py: pick up also commented maitainers
We are still keeping invalid email addressed in MAINTAINERS
because they carry information.
The problem is that scripts/get_maintainer.pl adds emails in the
"M:" field including invalid ones.
We want to comment out invalid email addresses in MAINTAINERS
to prevent scripts/get_maintainer.pl from picking them up.
On the other hand, we want to collect them for boards.cfg
to know the last known maintainer of each board.
This commit adjusts tools/genboardscfg.py to parse also
the commented "M:" fields, which is useful for the next commit.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Simon Glass [Sun, 14 Sep 2014 18:40:17 +0000 (12:40 -0600)]
test: Add a test for command repeat
This performs a command, then repeats it, and checks that the repeat
happens.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 14 Sep 2014 18:40:16 +0000 (12:40 -0600)]
test: Remove tabs from trace test
These cause U-Boot to print a list of available commands. It doesn't break
the test, but it is best to remove them from the output.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 14 Sep 2014 18:40:15 +0000 (12:40 -0600)]
sandbox: Disable Ctrl-C
This is not supported properly on sandbox, and interferes with running
tests, since when a test script is piped in, some commands will call
ctrlc() which will drop characters from the test script.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 14 Sep 2014 18:40:14 +0000 (12:40 -0600)]
Reactivate the tracing feature
This was lost sometime in the Kbuild conversion. Add it back.
Check that the trace test now passes:
$ ./test/trace/test-trace.sh
Simple trace test / sanity check using sandbox
/tmp/filemHKPGw
Build sandbox
O=sandbox FTRACE=1
GEN /home/sjg/c/src/third_party/u-boot/files/sandbox/Makefile
Configuring for sandbox board...
Check results
Test passed
Signed-off-by: Simon Glass <sjg@chromium.org>
Pavel Machek [Tue, 9 Sep 2014 13:19:42 +0000 (15:19 +0200)]
cleanup disk/part.c whitespace
Cleanup disk/part.c
Signed-off-by: Pavel Machek <pavel@denx.de>
Masahiro Yamada [Tue, 9 Sep 2014 06:12:08 +0000 (15:12 +0900)]
mpc8xx: move common linker scripts into the CPU directory
Each CPU of PowerPC has its default linker script under the CPU
directory, except mpc8xx.
Every mpc8xx board has its own linker script under the board
directory, resulting in lots of duplication of linker scripts.
I notice eight mpc8xx boards have the same linker script.
We can decrease the number of linker scripts by putting a single
default linker script, arch/powerpc/cpu/mpc8xx/u-boot.lds.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
Marcel Ziswiler [Sun, 7 Sep 2014 22:02:11 +0000 (00:02 +0200)]
e1000: fix no nvm build
Fix the following build error in case CONFIG_E1000_NO_NVM is enabled:
CC drivers/net/e1000.o
drivers/net/e1000.c: In function ‘e1000_initialize’:
drivers/net/e1000.c:5365:5: error: ‘struct e1000_hw’ has no
member named ‘eeprom_semaphore_present’
make[1]: *** [drivers/net/e1000.o] Error 1
make: *** [drivers/net] Error 2
Acked-by: Marek Vasut <marex@denx.de>
Thomas Petazzoni [Wed, 27 Aug 2014 12:29:00 +0000 (14:29 +0200)]
tools/env: change stripping strategy to allow no-stripping
When building the U-Boot tools for non-ELF platforms (such as Blackfin
FLAT), since commit
79fc0c5f498c3982aa4740c273ab1a9255063d9c
("tools/env: cross-compile fw_printenv without setting HOSTCC"), the
build fails because it tries to strip a FLAT binary, which does not
make sense.
This commit solves this by changing the stripping logic in
tools/env/Makefile to be similar to the one in tools/Makefile. This
logic continues to apply strip to the final binary, but does not abort
the build if it fails, and does the stripping in place on the final
binary. This allows the logic to work fine if stripping doesn't work,
as it leaves the final binary untouched.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Sonic Zhang <sonic.zhang@analog.com>
Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Sonic Zhang <sonic.zhang@analog.com>
Steve Rae [Tue, 26 Aug 2014 18:47:30 +0000 (11:47 -0700)]
usb/gadget: fastboot: implement sparse format
- add capability to "fastboot flash" with sparse format images
Signed-off-by: Steve Rae <srae@broadcom.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Steve Rae [Tue, 26 Aug 2014 18:47:29 +0000 (11:47 -0700)]
usb/gadget: fastboot: minor cleanup
- update static function
- additional debugging statements
- update "fastboot command" information
- add missing include file
- update spelling
Signed-off-by: Steve Rae <srae@broadcom.com>
Steve Rae [Tue, 26 Aug 2014 18:47:28 +0000 (11:47 -0700)]
usb/gadget: fastboot: add support for flash command
- implement 'fastboot flash' for eMMC devices
Signed-off-by: Steve Rae <srae@broadcom.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Steve Rae [Tue, 26 Aug 2014 18:47:27 +0000 (11:47 -0700)]
usb/gadget: fastboot: add eMMC support for flash command
- add support for 'fastboot flash' command for eMMC devices
Signed-off-by: Steve Rae <srae@broadcom.com>
Priyanka Jain [Mon, 8 Sep 2014 07:50:52 +0000 (13:20 +0530)]
board/t1040qds: Add sgmii ports support in 0xA7 protocol
T1042QDS (T1042 is T1040 Personality without L2 switch) supports following
sgmii interfaces with serdes protocol 0xA7
-SGMII-MAC3 on Lane B - slot 7
-SGMII-MAC5 on Lane H - slot 7
-SGMII2.5G-MAC1 on Lane C - slot 6
-SGMII2.5G-MAC2 on Lane D - slot 5
Add support of above sgmii interfaces
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Priyanka Jain [Fri, 5 Sep 2014 09:48:31 +0000 (15:18 +0530)]
powerpc/t104xrdb: Set DDR ODT to 75ohm
DDR-ODT require cfg_dram_type switch set properly as per DDR type.
T1040RDB, T1042RDB boards have DDR3L type DDR, so cfg_dram_type
should be set to OFF for DDR3L
Update t104xrdb/README for switch setting
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Ebony Zhu [Thu, 4 Sep 2014 16:53:00 +0000 (11:53 -0500)]
powerpc/mpc85xx: Serdes protocol "00" is supported
"0x00" is a valid serdes protocol for QorIQ parts, and can not be
used to test whether the serdes is enabled or disabled.
Signed-off-by: Ebony Zhu <b45385@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Shaveta Leekha [Thu, 4 Sep 2014 10:47:09 +0000 (16:17 +0530)]
B4860QDS: Enable mac command support
One of the I2C EEPROM is used to store/save and edit mac
addresses of ports.
this patch add required CONFIG to support the same
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Shaveta Leekha [Thu, 4 Sep 2014 06:13:57 +0000 (11:43 +0530)]
powerpc/b4860: Updated default hwconfig to enable only cpc2
CPC1 is not being enabled by default as powerpc is supposed to
use only CPC2. Though by editing hwconfig en_cpc option,
CPC1 can also be enabled.
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Sandeep Singh <Sandeep@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
ramneek mehresh [Fri, 22 Aug 2014 05:26:05 +0000 (10:56 +0530)]
powerpc/8xxx: Fix in USB device-tree fixup
Fix following issues in USB device-tree fixup:
- returns when either dr_mode or phy_type not defined.
This was terminating fix-up when only either property
was defined in hwconfig string
- updates dr_mode_type or dr_phy_type with junk value when
their index is -1. Now these are updated only when their
respective index is pointing to relevant types
in modes[] and phys[] array
- dr_mode_type and dr_phy_type were not NULL for
each controller
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
vijay rai [Tue, 19 Aug 2014 07:16:53 +0000 (12:46 +0530)]
powerpc/t104xrdb: Add T1042RDB board support
T1042RDB is a Freescale reference board that hosts the T1042 SoC
(and variants). The board is similar to T1040RDB, T1042 is a reduced
personality of T1040 SoC without Integrated 8-port Gigabit(L2 Switch).
T1042RDB is configured with serdes protocol 0x86 which can support
following interfaces
- 2 RGMII's on DTSEC4, DTSEC5
- 1 SGMII on DTSEC3
DTSEC1, DTSEC2 are not connected on board.
This Patch
- add T1042RDB support
- updates README file for T1042RDB details and update commands for switching
to alternate banks from vBank0 to vBank4 and vice versa
This patch also does minor clean ups for fdt defines for T1042RDB and
T1042RDB_PI board
Signed-off-by: Vijay Rai <vijay.rai@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
vijay rai [Wed, 23 Jul 2014 12:55:47 +0000 (18:25 +0530)]
powerpc/t104xrdb: Add Support of rcw for T1042RDB in u-boot
This patch adds support of rcw for T1042RDB, it makes following changes :
- Adds t1042_rcw.cfg file for serdes protocol 0x86 for T1042RDB
- Renames t1042_pi_rcw.cfg file from t1042_rcw.cfg and also updates
comments for valid serdes protocol which is 0x06
- Also updates CONFIG_SYS_FSL_PBL_RCW for T1042RDB
Signed-off-by: Vijay Rai <vijay.rai@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Prabhakar Kushwaha [Mon, 14 Jul 2014 11:45:44 +0000 (17:15 +0530)]
board/ls2085a: Update env_addr after NOR flash relocation
LS2085a has 2 regions in system memory map. Region1 is default map from
where system boots. Once u-boot is moved to DDR, IFC is re-mapped to
Region2.
So, update gd->env_addr to reflect correct address.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Zhiqiang Hou [Wed, 17 Sep 2014 09:37:44 +0000 (17:37 +0800)]
powerpc/t104xrdb: Enable SPI flash Extend address support
Enable the Extend address to support SPI flash more than 16MB.
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Stefan Roese [Tue, 2 Sep 2014 12:02:53 +0000 (14:02 +0200)]
spi: kirkwood_spi.c: cosmetic: Fix minor coding style issues
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Tested-by: Luka Perkov <luka@openwrt.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Stefan Roese [Tue, 2 Sep 2014 12:02:52 +0000 (14:02 +0200)]
spi: kirkwood_spi.c: Make global variable static
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Tested-by: Luka Perkov <luka@openwrt.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Stefan Roese [Tue, 2 Sep 2014 12:02:51 +0000 (14:02 +0200)]
spi: kirkwood_spi.c: Some fixes and cleanup
This patch introduces the clrsetbits_le32() accessor functions in the
kirkwood SPI driver. Note that it also includes a fix:
- writel(~KWSPI_CSN_ACT | KWSPI_SMEMRDY, &spireg->ctrl);
+ writel(KWSPI_SMEMRDY, &spireg->ctrl);
Here the bit KWSPI_CSN_ACT (0x1) should have been cleared. Instead
0xfffffffe is written into this control register. This is the main
reason to use the clrsetbits() functions now. As they make clearing
bits much less error prone.
Additionally KWSPI_IRQUNMASK is not used in spi_cs_activate() and
spi_cs_deactivate() any more. Its the wrong macro but has the same
value as the correct one (KWSPI_CSN_ACT).
This is in preparation for use of this driver on the Marvell Armada XP
platform as well.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Tested-by: Luka Perkov <luka@openwrt.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Stefan Roese [Tue, 2 Sep 2014 12:02:50 +0000 (14:02 +0200)]
arm: kirkwood: spi.h: Add some missing parenthesis
Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Luka Perkov <luka@openwrt.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Stefan Roese [Tue, 2 Sep 2014 12:02:49 +0000 (14:02 +0200)]
sf: Add M25PX64 SPI NOR flash ID
Add ID for this Numonix / STMicro chip.
Tested on Marvell DB-78460-BP board.
Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Luka Perkov <luka@openwrt.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Nikita Kiryanov [Wed, 20 Aug 2014 12:08:48 +0000 (15:08 +0300)]
spl: replace CONFIG_SPL_SPI_* with CONFIG_SF_DEFAULT_*
Currently, CONFIG_SPL_SPI_* #defines are used for controlling SPI boot in
SPL. These #defines do not allow the user to select SPI mode for the SPI flash
(there's no CONFIG_SPL_SPI_MODE, so the SPI mode is hardcoded in
spi_spl_load.c), and duplicate information already provided by
CONFIG_SF_DEFAULT_* #defines.
Kill CONFIG_SPL_SPI_*, and use CONFIG_SF_DEFAULT_* instead.
Cc: Tom Rini <trini@ti.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Vitaly Andrianov <vitalya@ti.com>
Cc: Lars Poeschel <poeschel@lemonage.de>
Cc: Bo Shen <voice.shen@atmel.com>
Cc: Hannes Petermaier <hannes.petermaier@br-automation.com>
Cc: Michal Simek <monstr@monstr.eu>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Nikita Kiryanov [Wed, 20 Aug 2014 12:08:50 +0000 (15:08 +0300)]
spi: mxc: fix sf probe when using mxc_spi
MXC SPI driver has a feature whereas a GPIO line can be used to force CS high
across multiple transactions. This is set up by embedding the GPIO information
in the CS value:
cs = (cs | gpio << 8)
This merge of cs and gpio data into one value breaks the sf probe command:
if the use of gpio is required, invoking "sf probe <cs>" will not work, because
the CS argument doesn't have the GPIO information in it. Instead, the user must
use "sf probe <cs | gpio << 8>". For example, if bank 2 gpio 30 is used to force
cs high on cs 0, bus 0, then instead of typing "sf probe 0" the user now must
type "sf probe 15872".
This is inconsistent with the description of the sf probe command, and forces
the user to be aware of implementaiton details.
Fix this by introducing a new board function: board_spi_cs_gpio(), which will
accept a naked CS value, and provide the driver with the relevant GPIO, if one
is necessary.
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Eric Benard <eric@eukrea.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Nikita Kiryanov [Wed, 20 Aug 2014 12:08:51 +0000 (15:08 +0300)]
mtd: spi: add support for M25PE16 and M25PX16
Add support for M25PE16 and M25PX16
Cc: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Tom Rini [Tue, 23 Sep 2014 19:21:43 +0000 (15:21 -0400)]
Merge git://git.denx.de/u-boot-dm
Robert Baldyga [Thu, 18 Sep 2014 15:13:07 +0000 (17:13 +0200)]
dm: avoid dev->req_seq overflow
Since dev->req_seq value is initialized from "reg" property of fdt node,
there is posibility, that address value contained in fdt is greater than
INT_MAX, and then value in dev->req_seq is negative which led to probe()
fail.
This patch fix this problem by ensuring that req_seq is positive, unless
it's one of errno codes.
Signed-off-by: Robert Baldyga <r.baldyga@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 Sep 2014 15:02:40 +0000 (09:02 -0600)]
dm: serial: Don't require device tree to configure a console
Allow serial_find_console_or_panic() to work without a device tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 17 Sep 2014 15:02:38 +0000 (09:02 -0600)]
dm: core: Allow device_bind() to used without CONFIG_OF_CONTROL
The sequence number support in driver model requires device tree control.
It should be skipped if CONFIG_OF_CONTROL is not defined, and should not
require functions from fdtdec.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Sep 2014 12:33:36 +0000 (06:33 -0600)]
sf: Add an empty entry to the parameter list
The list is supposed to be terminated with a NULL name, but is not. If a
board probes a chip which does not appear in the table, U-Boot will crash
(at least on sandbox).
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Sep 2014 12:33:18 +0000 (06:33 -0600)]
dm: Fix repeated comment in README
A merge error ended up repeating a similar sentence twice. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tom Rini [Tue, 23 Sep 2014 14:52:18 +0000 (10:52 -0400)]
Merge branch 'misc' of git://git.denx.de/u-boot-x86
Simon Glass [Mon, 15 Sep 2014 02:23:17 +0000 (20:23 -0600)]
patman: Add a -m option to avoid copying the maintainers
The get_maintainers script is a useful default, but sometimes is copies
too many people, or takes a long time to run.
Add an option to disable it and update the README.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 15 Sep 2014 02:23:16 +0000 (20:23 -0600)]
buildman: Fix the logic for the bloat command
This check should now be done whatever mode buildman is running in, since
we may be displaying information while building.
Signed-off-by: Simon Glass <sjg@chromium.org>
Jagannadha Sutradharudu Teki [Sun, 31 Aug 2014 15:49:43 +0000 (21:19 +0530)]
sandbox: Update minor documentation changes
- Use _defconfig instead of _config, but still _config is working.
- Corrected README.sandbox path in ./README
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Albert ARIBAUD [Sun, 21 Sep 2014 14:56:44 +0000 (16:56 +0200)]
Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'
Wu, Josh [Tue, 2 Sep 2014 10:14:11 +0000 (18:14 +0800)]
ARM: at91sam9rlek: convert to generic board support
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Wu, Josh [Tue, 2 Sep 2014 10:13:23 +0000 (18:13 +0800)]
ARM: at91sam9n12ek: convert to generic board support
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Boris BREZILLON [Tue, 2 Sep 2014 08:23:09 +0000 (10:23 +0200)]
mtd: atmel_nand: Disable subpage NAND write when using Atmel PMECC
Disable subpage write when using PMECC to prevent buggy partial page write.
This fix has been taken from linux sources (see commit
90445ff6241e2a13445310803e2efa606c61f276)
Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Acked-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Bo Shen [Wed, 6 Aug 2014 09:24:57 +0000 (17:24 +0800)]
USB: ehci-atmel: use pcr to enable or disable clock
If the SoC has pcr, we use pcr (peripheral control register)
to enable or disable clock.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Bo Shen [Wed, 6 Aug 2014 09:24:56 +0000 (17:24 +0800)]
USB: ohci-at91: use pcr to enable or disable clock
If the SoC has pcr, we use pcr (peripheral control register)
to enable or disable clock.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Bo Shen [Wed, 6 Aug 2014 09:24:55 +0000 (17:24 +0800)]
ARM: atmel: add pcr related definition
Using CPU_HAS_PCR micro to present the SoC has pcr
(peripheral control register).
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Bo Shen [Wed, 6 Aug 2014 09:24:54 +0000 (17:24 +0800)]
ARM: atmel: use pcr to enable or disable peripheral clock
When use pcr (peripheral control register), then we won't need
to care about the peripheral ID.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Bo Shen [Fri, 1 Aug 2014 08:37:09 +0000 (16:37 +0800)]
ARM: atmel: sama5d3: add timings register
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>