Marek Vasut [Tue, 22 Jul 2014 00:34:51 +0000 (02:34 +0200)]
arm: s3c: Unify the S3C24xx SDI structure
Unify the register structure so they can be easily used across all
of S3C24xx lineup.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Lubomir Rintel [Tue, 10 Jun 2014 18:46:43 +0000 (20:46 +0200)]
bcm2835_sdhci: Add SDHCI_QUIRK_NO_HISPD_BIT flag
Seems like the controller doesn't support the flag. None of the hi-speed cards
I've tried could be read, while they successfully worked with the quirk enabled.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
DrEagle [Fri, 25 Jul 2014 19:07:30 +0000 (21:07 +0200)]
ARM: kirkwood: add mvsdio driver
This patch add Marvell kirkwood MVSDIO/MMC driver
and enable it for Sheevaplugs and OpenRD boards.
Signed-off-by: Gerald Kerma <drEagle@doukki.net>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Masahiro Yamada [Wed, 30 Jul 2014 05:08:25 +0000 (14:08 +0900)]
include: remove CONFIG_SPL/CONFIG_TPL definition in config headers
Now CONFIG_SPL and CONFIG_TPL are defined in Kconfig.
Remove the redundant definition in config headers.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Wed, 30 Jul 2014 05:08:24 +0000 (14:08 +0900)]
powerpc: remove redundant CPU definition
CONFIG_${CPU} is defined by Kconfig.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Stefan Roese <sr@denx.de>
Masahiro Yamada [Wed, 30 Jul 2014 05:08:23 +0000 (14:08 +0900)]
kconfig: delete redundant CONFIG_${ARCH} definition
CONFIG_${ARCH} is defined by Kconfig.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Wed, 30 Jul 2014 05:08:22 +0000 (14:08 +0900)]
buildman: adjust for Kconfig
Use "make <board>_defconfig" instead of "make <board>_config".
Invoke tools/genboardscfg.py to generate boards.cfg when it is missing.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Wed, 30 Jul 2014 05:08:21 +0000 (14:08 +0900)]
MAKEALL: adjust for Kconfig
- Use "make <board>_defconfig" instead of "make <board>_config".
- Invoke tools/genboardscfg.py to generate boards.cfg when it is
missing.
- Show "Building ${BOARD_NAME} board..." message.
(Prior to Kconfig, instead, mkconfig script displayed
"Configuring for ${BOARD_NAME} board..." but it was removed.)
Without this message, we cannot know which board is currently
being built.
- Do not show "# configuration written to .config".
This message is useless and just annoying for MAKEALL.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Wed, 30 Jul 2014 05:08:20 +0000 (14:08 +0900)]
kconfig: remove mkconfig and boards.cfg
The old configuration script is no longer necessary.
Nor is boards.cfg a primary database.
We can generate it with the genboardscfg.py tool
based on the latest Kconfig, defconfig and MAINTAINERS.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Wed, 30 Jul 2014 05:08:19 +0000 (14:08 +0900)]
tools: add genboardscfg.py
Now the primary data for each board is in Kconfig, defconfig and
MAINTAINERS.
It is true boards.cfg is needed for MAKEALL and buildman and might be
useful to brouse all the supported boards in a single database.
But it would be painful to maintain the boards.cfg in sync.
So, this is the solution.
Add a tool to generate the equivalent boards.cfg file based on
the latest Kconfig, defconfig and MAINTAINERS.
We can keep all the functions of MAKEALL and buildman with it.
The best thing would be to change MAKEALL and buildman for not
depending on boards.cfg in the future, but it would take some time.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Wed, 30 Jul 2014 05:08:18 +0000 (14:08 +0900)]
Add board MAINTAINERS files
We have switched to Kconfig and the boards.cfg file is going to
be removed. We have to retrieve the board status and maintainers
information from it.
The MAINTAINERS format as in Linux Kernel would be nice
because we can crib the scripts/get_maintainer.pl script.
After some discussion, we chose to put a MAINTAINERS file under each
board directory, not the top-level one because we want to collect
relevant information for a board into a single place.
TODO:
Modify get_maintainer.pl to scan multiple MAINTAINERS files.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Suggested-by: Tom Rini <trini@ti.com>
Acked-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Wed, 30 Jul 2014 05:08:17 +0000 (14:08 +0900)]
kconfig: switch to Kconfig
This commit enables Kconfig.
Going forward, we use Kconfig for the board configuration.
mkconfig will never be used. Nor will include/config.mk be generated.
Kconfig must be adjusted for U-Boot because our situation is
a little more complicated than Linux Kernel.
We have to generate multiple boot images (Normal, SPL, TPL)
from one source tree.
Each image needs its own configuration input.
Usage:
Run "make <board>_defconfig" to do the board configuration.
It will create the .config file and additionally spl/.config, tpl/.config
if SPL, TPL is enabled, respectively.
You can use "make config", "make menuconfig" etc. to create
a new .config or modify the existing one.
Use "make spl/config", "make spl/menuconfig" etc. for spl/.config
and do likewise for tpl/.config file.
The generic syntax of configuration targets for SPL, TPL is:
<target_image>/<config_command>
Here, <target_image> is either 'spl' or 'tpl'
<config_command> is 'config', 'menuconfig', 'xconfig', etc.
When the configuration is done, run "make".
(Or "make <board>_defconfig all" will do the configuration and build
in one time.)
For futher information of how Kconfig works in U-Boot,
please read the comment block of scripts/multiconfig.py.
By the way, there is another item worth remarking here:
coexistence of Kconfig and board herder files.
Prior to Kconfig, we used C headers to define a set of configs.
We expect a very long term to migrate from C headers to Kconfig.
Two different infractructure must coexist in the interim.
In our former configuration scheme, include/autoconf.mk was generated
for use in makefiles.
It is still generated under include/, spl/include/, tpl/include/ directory
for the Normal, SPL, TPL image, respectively.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Wed, 30 Jul 2014 05:08:16 +0000 (14:08 +0900)]
include: define CONFIG_SPL and CONFIG_TPL as 1
We are about to switch to Kconfig in the next commit.
But there are something to get done beforehand.
In Kconfig, include/generated/autoconf.h defines boolean
CONFIG macros as 1.
CONFIG_SPL and CONFIG_TPL, if defined, must be set to 1.
Otherwise, when switching to Kconfig, the build log
would be sprinkled with warning messages like this:
warning: "CONFIG_SPL" redefined [enabled by default]
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Wed, 30 Jul 2014 05:08:15 +0000 (14:08 +0900)]
kconfig: add basic Kconfig files
This commit adds more Kconfig files, which were written by hand.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Wed, 30 Jul 2014 05:08:14 +0000 (14:08 +0900)]
kconfig: add board Kconfig and defconfig files
This commit adds:
- arch/${ARCH}/Kconfig
provide a menu to select target boards
- board/${VENDOR}/${BOARD}/Kconfig or board/${BOARD}/Kconfig
set CONFIG macros to the appropriate values for each board
- configs/${TARGET_BOARD}_defconfig
default setting of each board
(This commit was automatically generated by a conversion script
based on boards.cfg)
In Linux Kernel, defconfig files are located under
arch/${ARCH}/configs/ directory.
It works in Linux Kernel since ARCH is always given from the
command line for cross compile.
But in U-Boot, ARCH is not given from the command line.
Which means we cannot know ARCH until the board configuration is done.
That is why all the "*_defconfig" files should be gathered into a
single directory ./configs/.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Wed, 30 Jul 2014 05:08:13 +0000 (14:08 +0900)]
kconfig: import Kconfig files from Linux 3.16-rc7
Import
- scripts/kconfig/*
- include/linux/kconfig.h
from Linux 3.16-rc7.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Łukasz Majewski [Tue, 29 Jul 2014 16:09:49 +0000 (18:09 +0200)]
boards:trats2: New Trats2 board maintainer
Change-Id: I8e72b942b8816726773d5407ce405d68a1594389
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Dinh Nguyen [Thu, 24 Jul 2014 11:45:24 +0000 (06:45 -0500)]
boards.cfg : Add maintainers entries for SOCFPGA
Add back the maintainers entries for Altera's SOCFPGA platform.
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Signed-off-by: Chin Liang See <clsee@altera.com>
Masahiro Yamada [Tue, 22 Jul 2014 03:58:30 +0000 (12:58 +0900)]
cosmetic: boards.cfg: fix some maintainers fields
Add a whitespace between the name and the email address.
When switching to Kconfig, the first version of MAINTAINERS files
will be generated based on the boards.cfg file.
So, the maintainers field should be corrected even if it is a really
minor fix.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Tue, 22 Jul 2014 02:19:09 +0000 (11:19 +0900)]
buildman: make sure to invoke GNU Make
Since the command name 'make' may not be GNU Make on some platforms
such as FreeBSD, buildman should call scripts/show-gnu-make to get
the command name for GNU MAKE (and error out if it is not found).
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Masahiro Yamada [Tue, 22 Jul 2014 02:19:08 +0000 (11:19 +0900)]
MAKEALL: make sure to invoke GNU Make
Since the command name 'make' may not be GNU Make on some platforms
such as FreeBSD, MAKEALL should call scripts/show-gnu-make to get
the command name for GNU MAKE (and error out if it is not found).
The GNU Make should be searched after parsing options because we want
to allow "MAKEALL -h" even if GNU Make is missing on the system.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Masahiro Yamada [Tue, 22 Jul 2014 02:19:07 +0000 (11:19 +0900)]
scripts: add scripts/show-gnu-make to get GNU Make command name
U-Boot is expected to be built on various platforms.
We should keep in mind that the command 'make' is not always GNU Make,
while all the makefiles are written for GNU Make.
For example, on Linux, people generally do:
make <board>_config; make
But FreeBSD folks do
gmake <board>_config; gmake
(The command 'make' on FreeBSD is BSD Make, not GNU Make)
It is not a good idea to hard-code the command name 'make'
in MAKEALL or buildman.
They should call this helper script and get the command name
for GNU Make.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tom Rini [Tue, 29 Jul 2014 13:41:35 +0000 (09:41 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-arm
Tom Rini [Mon, 28 Jul 2014 21:48:48 +0000 (17:48 -0400)]
Merge git://www.denx.de/git/u-boot-ppc4xx
Tom Rini [Mon, 28 Jul 2014 18:54:29 +0000 (14:54 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Marc Zyngier [Sat, 12 Jul 2014 13:24:08 +0000 (14:24 +0100)]
ARM: HYP/non-sec: remove MIDR check to validate CBAR
Having a form of whitelist to check if we know of a CPU core
and and obtain CBAR is a bit silly.
It doesn't scale (how about A12, A17, as well as other I don't know
about?), and is actually a property of the SoC, not the core.
So either it works and everybody is happy, or it doesn't and
the u-boot port to this SoC is providing the real address via
a configuration option.
The result of the above is that this code doesn't need to exist,
is thus forcefully removed.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Marc Zyngier [Sat, 12 Jul 2014 13:24:07 +0000 (14:24 +0100)]
ARM: HYP/non-sec/PSCI: emit DT nodes
Generate the PSCI node in the device tree.
Also add a reserve section for the "secure" code that lives in
in normal RAM, so that the kernel knows it'd better not trip on
it.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Ma Haijun [Sat, 12 Jul 2014 13:24:06 +0000 (14:24 +0100)]
ARM: convert arch_fixup_memory_node to a generic FDT fixup function
Some architecture needs extra device tree setup. Instead of adding
yet another hook, convert arch_fixup_memory_node to be a generic
FDT fixup function.
[maz: collapsed 3 patches into one, rewrote commit message]
Signed-off-by: Ma Haijun <mahaijuns@gmail.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Marc Zyngier [Sat, 12 Jul 2014 13:24:05 +0000 (14:24 +0100)]
ARM: HYP/non-sec: add the option for a second-stage monitor
Allow the switch to a second stage secure monitor just before
switching to non-secure.
This allows a resident piece of firmware to be active once the
kernel has been entered (the u-boot monitor is dead anyway,
its pages being reused).
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Marc Zyngier [Sat, 12 Jul 2014 13:24:04 +0000 (14:24 +0100)]
ARM: HYP/non-sec: add generic ARMv7 PSCI code
Implement core support for PSCI. As this is generic code, it doesn't
implement anything really useful (all the functions are returning
Not Implemented).
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Marc Zyngier [Sat, 12 Jul 2014 13:24:03 +0000 (14:24 +0100)]
ARM: HYP/non-sec: allow relocation to secure RAM
The current non-sec switching code suffers from one major issue:
it cannot run in secure RAM, as a large part of u-boot still needs
to be run while we're switched to non-secure.
This patch reworks the whole HYP/non-secure strategy by:
- making sure the secure code is the *last* thing u-boot executes
before entering the payload
- performing an exception return from secure mode directly into
the payload
- allowing the code to be dynamically relocated to secure RAM
before switching to non-secure.
This involves quite a bit of horrible code, specially as u-boot
relocation is quite primitive.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Marc Zyngier [Sat, 12 Jul 2014 13:24:02 +0000 (14:24 +0100)]
ARM: HYP/non-sec: add separate section for secure code
In anticipation of refactoring the HYP/non-secure code to run
from secure RAM, add a new linker section that will contain that
code.
Nothing is using it just yet.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Marc Zyngier [Sat, 12 Jul 2014 13:24:01 +0000 (14:24 +0100)]
ARM: add missing HYP mode constant
In order to be able to use the various mode constants (far more
readable than random hex values), add the missing HYP and A
values.
Also update arm/lib/interrupts.c to display HYP instead of an
unknown value.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Marc Zyngier [Sat, 12 Jul 2014 13:24:00 +0000 (14:24 +0100)]
ARM: non-sec: reset CNTVOFF to zero
Before switching to non-secure, make sure that CNTVOFF is set
to zero on all CPUs. Otherwise, kernel running in non-secure
without HYP enabled (hence using virtual timers) may observe
timers that are not synchronized, effectively seeing time
going backward...
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Marc Zyngier [Sat, 12 Jul 2014 13:23:59 +0000 (14:23 +0100)]
ARM: HYP/non-sec: add a barrier after setting SCR.NS==1
A CP15 instruction execution can be reordered, requiring an
isb to be sure it is executed in program order.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Marc Zyngier [Sat, 12 Jul 2014 13:23:58 +0000 (14:23 +0100)]
ARM: HYP/non-sec: move switch to non-sec to the last boot phase
Having the switch to non-secure in the "prep" phase is causing
all kind of troubles, as that stage can be called multiple times.
Instead, move the switch to non-secure to the last possible phase,
when there is no turning back anymore.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Albert ARIBAUD [Mon, 28 Jul 2014 10:26:21 +0000 (12:26 +0200)]
Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'
Albert ARIBAUD [Mon, 28 Jul 2014 08:54:54 +0000 (10:54 +0200)]
Merge branch 'u-boot-sh/rmobile' into 'u-boot-arm/master'
Albert ARIBAUD [Mon, 28 Jul 2014 08:12:45 +0000 (10:12 +0200)]
Merge branch 'u-boot-sunxi/master' into 'u-boot-arm/master'
Masahiro Yamada [Fri, 18 Jul 2014 05:23:20 +0000 (14:23 +0900)]
patman: make "No recipient" checking more tolerant
If Series-to tag is missing, Patman exits with a message
"No recipient".
This is just annoying for those who had already added
sendemail.to configuration.
I guess many developers have
[sendemail]
to = u-boot@lists.denx.de
in their .git/config because the 'To: u-boot@lists.denx.de' field
should always be added when sending patches.
That seems more reasonable rather than adding
'Series-to: u-boot@lists.denx.de' to every patch series.
Patman should exit only when both Series-to tag and sendemail.to
configuration are mising.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 14 Jul 2014 23:51:03 +0000 (17:51 -0600)]
buildman: Support in-tree builds
At present buildman always builds out-of-tree, that is it uses a separate
output directory from the source directory. Normally this is what you want,
but it is important that in-tree builds work also. Some Makefile changes may
break this.
Add a -i option to tell buildman to use in-tree builds, so that it is easy
to test this feature.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 14 Jul 2014 23:51:02 +0000 (17:51 -0600)]
buildman: Add -C option to force a reconfigure for each commit
Normally buildman wil try to configure U-Boot for a particular board on the
first commit that it builds in a series. Subsequent commits are built
without reconfiguring which normally works. Where it doesn't, buildman
automatically reconfigures and retries.
To fully emulate the way MAKEALL works, we should have an option to disable
this optimisation.
Add a -C option to cause buildman to always reconfigure on each commit.
Signed-off-by: Simon Glass <sjg@chromium.org>
Albert ARIBAUD [Sat, 26 Jul 2014 12:08:36 +0000 (14:08 +0200)]
Merge branch 'u-boot-microblaze/zynq' into 'u-boot-arm/master'
pekon gupta [Fri, 18 Jul 2014 12:29:42 +0000 (17:59 +0530)]
ARM: omap: move board specific NAND configs out from ti_armv7_common.h
This patch moves some board specific NAND configs:
- FROM: generic config file 'ti_armv7_common.h'
- TO: individual board config files using these configs.
So that each board can independently set the value as per its design.
Following configs are affected in this patch:
CONFIG_SYS_NAND_U_BOOT_OFFS: <refer doc/README.nand>
CONFIG_CMD_SPL_NAND_OFS: <refer doc/README.falcon>
CONFIG_SYS_NAND_SPL_KERNEL_OFFS: <refer doc/README.falcon>
CONFIG_CMD_SPL_WRITE_SIZE: <refer doc/README.falcon>
This patch also updates documentation for few of above NAND configs.
Signed-off-by: Pekon Gupta <pekon@ti.com>
pekon gupta [Fri, 18 Jul 2014 12:29:41 +0000 (17:59 +0530)]
ARM: omap: clean redundant PISMO_xx macros used in OMAP3
PISMO_xx macros were used to define 'Platform Independent Storage MOdule'
related GPMC configurations. This patch
- Replaces these OMAP3 specific macros with generic CONFIG_xx macros as provided
by current u-boot infrastructure.
- Removes unused redundant macros, which are no longer required after
merging of common platform code in following commit
commit
a0a37183bd75e74608bc78c8d0e2a34454f95a91
ARM: omap: merge GPMC initialization code for all platform
+-----------------+-----------------------------------------------------------+
| Macro | Reason for removal |
+-----------------+-----------------------------------------------------------+
| PISMO1_NOR_BASE | duplicate of CONFIG_SYS_FLASH_BASE |
+-----------------+-----------------------------------------------------------+
| PISMO1_NAND_BASE| duplicate of CONFIG_SYS_NAND_BASE |
+-----------------+-----------------------------------------------------------+
| PISMO1_ONEN_BASE| duplicate of CONFIG_SYS_ONENAND_BASE |
+-----------------+-----------------------------------------------------------+
| PISMO1_NAND_SIZE| GPMC accesses NAND device via I/O mapped registers so |
| | configuring GPMC chip-select for smallest allowable |
| | segment (GPMC_SIZE_16M) is enough. |
+-----------------+-----------------------------------------------------------+
| PISMO1_ONEN_SIZE| OneNAND uses a fixed GPMC chip-select address-space of |
| | 128MB (GPMC_SIZE_128M) |
+-----------------+-----------------------------------------------------------+
+-----------------+-----------------------------------------------------------+
| PISMO1_NOR | Unused Macros |
| PISMO1_NAND | |
| PISMO2_CS0 | |
| PISMO2_CS1 | |
| PISMO1_ONENAND | |
| PISMO2_NAND_CS0 | |
| PISMO2_NAND_CS1 | |
| PISMO1_NOR_BASE | |
| PISMO1_NAND_BASE| |
| PISMO2_CS0_BASE | |
+-----------------+-----------------------------------------------------------+
Signed-off-by: Pekon Gupta <pekon@ti.com>
pekon gupta [Fri, 18 Jul 2014 12:29:40 +0000 (17:59 +0530)]
ARM: omap: fix GPMC address-map size for NAND and NOR devices
Fixes commit
a0a37183bd75e74608bc78c8d0e2a34454f95a91
ARM: omap: merge GPMC initialization code for all platform
1) NAND device are not directly memory-mapped to CPU address-space, they are
indirectly accessed via following GPMC registers:
- GPMC_NAND_COMMAND_x
- GPMC_NAND_ADDRESS_x
- GPMC_NAND_DATA_x
Therefore from CPU's point of view, NAND address-map can be limited to just
above register addresses. But GPMC chip-select address-map can be configured
in granularity of 16MB only.
So this patch uses GPMC_SIZE_16M for all NAND devices.
2) NOR device are directly memory-mapped to CPU address-space, so its
address-map size depends on actual addressable region in NOR FLASH device.
So this patch uses CONFIG_SYS_FLASH_SIZE to derive GPMC chip-select address-map
size configuration.
Signed-off-by: Pekon Gupta <pekon@ti.com>
Rajendra Nayak [Fri, 18 Jul 2014 05:48:48 +0000 (11:18 +0530)]
ARM: OMAP: Fix handling of errata i727
The errata is applicable on all OMAP4 (4430 and 4460/4470) and OMAP5
ES 1.0 devices. The current revision check erroneously implements this
on all DRA7 varients and with DRA722 device (which has only 1 EMIF instance)
infact causes an asynchronous abort and ends up masking it in CPSR,
only to be uncovered once the kernel switches to userspace.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Sricharan R <r.sricharan@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Hao Zhang [Tue, 15 Jul 2014 21:59:27 +0000 (00:59 +0300)]
board: k2e-evm: add board support
This patch adds Keystone2 k2e_evm evaluation board support.
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Khoronzhuk, Ivan [Tue, 15 Jul 2014 21:59:26 +0000 (00:59 +0300)]
ARM: keystone2: spl: add K2E SoC support
Keystone2 K2E SoC has slightly different spl pll settings then
K2HK, so correct this.
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Khoronzhuk, Ivan [Tue, 15 Jul 2014 21:59:25 +0000 (00:59 +0300)]
keystone2: use CONFIG_SOC_KEYSTONE in common places
Use CONFIG_SOC_KEYSTONE in common places instead of defining
a lot of "if def .. || if def " for different Keystone2 SoC types.
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Hao Zhang [Tue, 15 Jul 2014 21:59:24 +0000 (00:59 +0300)]
ARM: keystone2: add MSMC cache coherency support for K2E SOC
This patch adds Keystone2 K2E SOC specific code to support
MSMC cache coherency. Also create header file for msmc to hold
its API.
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Hao Zhang [Tue, 15 Jul 2014 21:59:23 +0000 (00:59 +0300)]
ARM: keystone2: clock: add K2E clock support
This patch adds clock definitions and commands to support Keystone2
K2E SOC.
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Hao Zhang [Tue, 15 Jul 2014 21:59:22 +0000 (00:59 +0300)]
ARM: keystone2: add K2E SoC hardware definitions
This patch adds hardware definitions specific to Keystone II
K2E device. It has a lot common definitions with k2hk SoC, so
move them to common hardware.h. This is preparation patch for
adding K2E SoC support.
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Hao Zhang [Wed, 9 Jul 2014 20:44:49 +0000 (23:44 +0300)]
keystone: ddr3: move K2HK DDR3 configuration to a common file
It's convenient to hold configurations for DDR3 PHY and EMIF in
separate common place. This patch moves K2HK DDR3 PHY and EMIF
configuration data with different rates and memory size to a common
ddr3_cfg.c file.
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Hao Zhang [Wed, 9 Jul 2014 20:44:48 +0000 (23:44 +0300)]
configs: k2hk_evm: config: add common EVM configuration header
This patch adds a common config header file for all the Keystone II
EVM platforms. It combines a lot of general definitions in one file.
The common header included in the EVM should be specific configuration
header.
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Khoronzhuk, Ivan [Wed, 9 Jul 2014 20:44:47 +0000 (23:44 +0300)]
ARM: keystone: clock: move K2HK SoC dependent code in separate file
This patch in general spit SoC type clock dependent code and general
clock code. Before adding keystone II Edison k2e SoC which has
slightly different dpll set, move k2hk dependent clock code to
separate clock-k2hk.c file.
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Hao Zhang [Wed, 9 Jul 2014 20:44:46 +0000 (23:44 +0300)]
ARM: keystone2: move K2HK board files to common KS2 board directory
This patch moves K2HK board directory to a common Keystone II board
directory. The Board related common functions are moved to a common
keystone board file.
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Murali Karicheri [Wed, 9 Jul 2014 20:44:45 +0000 (23:44 +0300)]
keystone2: add env option to do unitrd dt fixup
With latest v3.13 kernel, unitrd dt fixup is not needed. However for
older kernel versions such as v3.8/v3.10, it is needed. So to work
with both, add a u-boot env variable that can be set to do dt fixup
for older kernels.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Khoronzhuk, Ivan [Wed, 9 Jul 2014 20:44:44 +0000 (23:44 +0300)]
k2hk: use common KS2_ prefix for all hardware definitions
Use KS2_ prefix in all definitions, for that replace K2HK_ prefix and
add KS2_ prefix where it's needed. It requires to change names also
in places where they're used. Align lines and remove redundant
definitions in kardware-k2hk.h at the same time.
Using common KS2_ prefix helps resolve redundant redefinitions and
adds opportunity to use KS2_ definition across a project not thinking about
what SoC should be used. It's more convenient and we don't need to worry
about the SoC type in common files, hardware.h will think about that.
The hardware.h decides definitions of what SoC to use.
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Hao Zhang [Wed, 9 Jul 2014 16:48:44 +0000 (19:48 +0300)]
keystone2: add possibility to turn off all dsps
By default all DSPs are turned off, for another case option
to turn off them is added in this commit.
Also add command to turn off itself.
Acked-by: Murali Karicheri <m-maricheri2@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Hao Zhang [Wed, 9 Jul 2014 16:48:43 +0000 (19:48 +0300)]
keystone2: move cpu_to_bus() to keystone.c
The SoC related common functions in board.c should be placed to
a common keystone.c arch file.
Acked-by: Murali Karicheri <m-maricheri2@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Khoronzhuk, Ivan [Wed, 9 Jul 2014 16:48:42 +0000 (19:48 +0300)]
ARM: keystone2: keystone_nav: make it dependent on keystone driver
This driver is needed in case if keystone driver is used.
Currently only keystone_net driver uses it. So to avoid
redundant code compilation make the keystone_nav dependent
on keystone net driver. It also leads to compilation errors
for boards that does't use it.
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Hao Zhang [Wed, 9 Jul 2014 16:48:41 +0000 (19:48 +0300)]
keystone2: ddr: add DDR3 PHY configs updated for PG 2.0
Add DDR3 PHY configs updated for PG 2.0
Also add DDR3A PHY reset before init for PG2.0 SoCs.
Acked-by: Murali Karicheri <m-maricheri2@ti.com>
Signed-off-by: Hao Zhang <hzhang@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Khoronzhuk, Ivan [Wed, 9 Jul 2014 16:48:40 +0000 (19:48 +0300)]
keystone: ddr3: add ddr3.h to hold ddr3 API
It's convinient to hold ddr3 function definitions in separate file
such as ddr3.h. So move this from hardware.h to ddr3.h.
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Khoronzhuk, Ivan [Wed, 9 Jul 2014 16:48:39 +0000 (19:48 +0300)]
ARM: keystone2: psc: use common PSC base
Use common keystone2 Power Sleep controller base address instead of
directly deciding which keystone2 SoC is used in psc module.
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Stefan Roese [Wed, 9 Jul 2014 15:18:11 +0000 (17:18 +0200)]
ARM: omap: tao3530: Convert to generic board
Use generic board setup functions by defining
CONFIG_SYS_GENERIC_BOARD.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@ti.com>
Stefan Roese [Wed, 9 Jul 2014 15:18:10 +0000 (17:18 +0200)]
ARM: omap: Remove unused arch/arm/cpu/armv7/omap3/mem.c
These functions have been merged into the common GPMC init code
with this commit
a0a37183 (ARM: omap: merge GPMC initialization code
for all platform). The file is not compiled any more. So remove it
as well.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Pekon Gupta <pekon@ti.com>
Cc: Tom Rini <trini@ti.com>
Acked-by: Pekon Gupta <pekon@ti.com>
Stefan Roese [Wed, 9 Jul 2014 15:18:09 +0000 (17:18 +0200)]
ARM: omap: Fix GPMC init for OMAP3 platforms
Commit
a0a37183 (ARM: omap: merge GPMC initialization code for all
platform) broke NAND on OMAP3 based platforms. I noticed this while
testing the latest 2014.07-rc version on the TAO3530 board. NAND
detection did not work with this error message:
NAND: nand: error: Unable to find NAND settings in GPMC Configuration - quitting
As OMAP3 configs don't set CONFIG_NAND but CONFIG_NAND_CMD. the GPMC
was not initialized for NAND at all. This patch now fixes this issue.
Tested on TAO3530 board.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Pekon Gupta <pekon@ti.com>
Cc: Tom Rini <trini@ti.com>
Acked-by: Pekon Gupta <pekon@ti.com>
Andreas Bießmann [Wed, 9 Jul 2014 15:10:34 +0000 (17:10 +0200)]
tricorder: convert to generic board
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Thomas Weber <thomas.weber@corscience.de>
Tom Rini [Tue, 8 Jul 2014 01:40:16 +0000 (21:40 -0400)]
am335x_evm / gumstix pepper: Correct DDR settings
As noted by clang, we have been shifting certain values out of 32bit
range when setting some DDR registers. Upon further inspection these
had been touching reserved fields (and having no impact). These came in
from historical bring-up code and can be discarded. Similarly, we had
been declaring some fields as 0 when they will be initialized that way.
Tested on Beaglebone White.
Reported-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Cc: Ash Charles <ash@gumstix.com>
Signed-off-by: Tom Rini <trini@ti.com>
Tested-By: Ash Charles <ashcharles@gmail.com>
Khoronzhuk, Ivan [Fri, 4 Jul 2014 12:03:27 +0000 (15:03 +0300)]
k2hk_evm: add script to automate NAND flash process
Add script to automate NAND flash process. As for now the board has
two burn scripts - burn to boot from SPI NOR flash and burn to boot
from AEMIF NAND flash, rename burn_uboot script to burn_uboot_spi.
Also update README to contain NAND burn U-boot process description.
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Khoronzhuk, Ivan [Fri, 4 Jul 2014 12:03:26 +0000 (15:03 +0300)]
keystone: add support for NAND gpheader image
Add support for NAND gpheader image. TI Keystone2 ROM bootloader
expects 8 bytes of trailing zeroes in the nand u-boot image.
So add zeros at the end of the nand gph image.
Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Khoronzhuk, Ivan [Fri, 4 Jul 2014 12:03:25 +0000 (15:03 +0300)]
mtd: nand: davinci: add opportunity to write keystone U-boot image
The Keystone SoCs use the same NAND driver as Davinci.
This patch adds opportunity to write Keystone U-boot image to NAND
device using appropriate RBL ECC layout. This is needed only if RBL
boots U-boot from NAND device and that's supposed that raw u-boot
partition is used only for writing image.
The main problem is that default Davinci ECC layout is different from
Keystone RBL layout. To read U-boot image the RBL needs that image was
written using RBL ECC layout.
The BBT table is written using default Davinci layout and has to
be updated using one. The BBT can be updated only while erasing
chip or by forced bad block assigning, so erase function has to
use native ecc layout in order to be able to write BBT correctly.
So if we're writing to NAND U-boot address we use RBL layout for
others we use default ECC layout.
Also remove definition for CONFIG_CMD_NAND_ECCLAYOUT as there is no
reasons to use ECC layout commands. It was added by mistake.
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Tom Rini [Mon, 23 Jun 2014 20:06:29 +0000 (16:06 -0400)]
tps65218/am43xx_evm: Add power framework support to TPS65218
Add in an init function for the drivers/power framework so we can dump
and read the registers via i2c.
Cc: Łukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Tom Rini <trini@ti.com>
Tom Rini [Mon, 23 Jun 2014 20:06:28 +0000 (16:06 -0400)]
power/pmic.h: Add prototype for power_init_board.
As this is a weak function that we may override, provide a prototype for
it.
Cc: Łukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Tom Rini <trini@ti.com>
Mugunthan V N [Thu, 22 May 2014 09:07:12 +0000 (14:37 +0530)]
ARM: dra7_evm: Add Ethernet support for dra72x platform
Set the active_slave to 1 as slave 1 is pinned out in dra72x base board
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Mugunthan V N [Thu, 22 May 2014 09:07:11 +0000 (14:37 +0530)]
ARM: DRA7xx: Add cpsw second port pinmux
Add cpsw second slave port pinmux to use it as primary ethernet port
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Mugunthan V N [Thu, 22 May 2014 09:07:10 +0000 (14:37 +0530)]
drivers: net: cpsw: add support for using second port as ethernet
Add support for using the second slave port of cpsw
to be used as primary ethernet.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Tom Rini [Fri, 25 Jul 2014 19:05:09 +0000 (15:05 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-sh
Dirk Eibach [Fri, 25 Jul 2014 08:10:24 +0000 (10:10 +0200)]
board: Add CONFIG_SYS_GENERIC_BOARD to all gdsys boards
Add the generic board infrastructure to all gdsys boards.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
Dirk Eibach [Fri, 25 Jul 2014 08:10:23 +0000 (10:10 +0200)]
ppc: Make ppc4xx ready for CONFIG_SYS_GENERIC_BOARD
The generic board infrastructure assumes that gd is set by
arch code.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
Nobuhiro Iwamatsu [Thu, 26 Jun 2014 01:23:30 +0000 (10:23 +0900)]
arm: rmobile: Add support Alt board
The alt board has R8A7794, 1GB DDR3-SDRAM, USB, Ethernet, QSPI,
MMC, SDHI and more.
This commit supports the following functions:
- DDR3-SDRAM
- SCIF
- I2C
- Ethernet
- QSPI
Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Nobuhiro Iwamatsu [Tue, 24 Jun 2014 08:10:02 +0000 (17:10 +0900)]
arm: rmobile: Add support R8A7794
Renesas R8A7794 is CPU with Cortex-A15. This supports the basic register
definition and GPIO and framework of PFC.
Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Nobuhiro Iwamatsu [Tue, 24 Jun 2014 08:03:20 +0000 (17:03 +0900)]
serial: sh: Add support R8A7794
This adds the preset value to register for R8A7794.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Nobuhiro Iwamatsu [Tue, 24 Jun 2014 08:01:08 +0000 (17:01 +0900)]
net: sh-eth: Add support R8A7794
R8A7794 has the same sh-ether IP core as other SH/rmobile.
This patch adds support of R8A7794.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Masahiro Yamada [Fri, 20 Jun 2014 07:40:14 +0000 (16:40 +0900)]
sh: unify sh2/sh3/sh4 linker scripts
The linker scripts of sh2/sh3/sh4 are almost the same.
The difference among them is essentially only one line.
They can be consolidated into a single file, arch/sh/cpu/u-boot.lds
by re-writing the diffrent line as follows:
KEEP(*/start.o (.text))
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Shengzhou Liu [Wed, 23 Jul 2014 07:54:16 +0000 (15:54 +0800)]
board/freescale: use generic board architecture for t2080qds and t2080rdb
Tested with NOR boot and NAND boot on T2080QDS and T2080RDB.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Simon Glass [Sun, 13 Jul 2014 20:03:41 +0000 (14:03 -0600)]
buildman: Avoid retrying a build if it definitely failed
After a build fails buildman will reconfigure and try again, if it did not
reconfigure before the build. However it doesn't actually keep track of
whether it did reconfigure on the previous attempt.
Fix that logic to avoid a pointless rebuild. This speeds things up quite a
bit for failing builds. Previously they would always be built twice.
Change-Id: Ib37f21320baa7c60bed98f4042c0b7ed7c0dc85e
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 13 Jul 2014 18:22:31 +0000 (12:22 -0600)]
buildman: Add -F flag to retry failed builds
Generally a build failure with a particular commit cannot be fixed except
by changing that commit. Changing the commit will automatically cause
buildman to retry when you run it again: buildman sees that the commit
hash is different and that it has no previous build result for the new
commit hash.
However sometimes the build failure is due to a toolchain issue or some
other environment problem. In that case, retrying failed builds may yield
a different result.
Add a flag to retry failed builds. This differs from the force rebuild
flag (-f) in that it will not rebuild commits which are already marked as
succeeded.
Series-to: u-boot
Change-Id: Iac4306df499d65ff0888b1c60f06fc162a6faad8
Masahiro Yamada [Thu, 29 May 2014 05:46:13 +0000 (14:46 +0900)]
zynq: disable -Wstrict-prototypes option for ps7_init.c
The files ps7_init.c and ps7_init.h are supposed to be generated by
hw projects such as Vivado, PlanAhead and then to be copied into
board/xilinx/zynq directory.
But some prototypes in them cause annoying warning messages:
CC spl/board/xilinx/zynq/ps7_init.o
In file included from board/xilinx/zynq/ps7_init.c:50:0:
board/xilinx/zynq/ps7_init.h:137:1: warning: function declaration isn't a prototype [-Wstrict-prototypes]
board/xilinx/zynq/ps7_init.h:138:1: warning: function declaration isn't a prototype [-Wstrict-prototypes]
board/xilinx/zynq/ps7_init.h:139:1: warning: function declaration isn't a prototype [-Wstrict-prototypes]
board/xilinx/zynq/ps7_init.h:145:1: warning: function declaration isn't a prototype [-Wstrict-prototypes]
board/xilinx/zynq/ps7_init.c:12602:1: warning: function declaration isn't a prototype [-Wstrict-prototypes]
board/xilinx/zynq/ps7_init.c:12723:1: warning: function declaration isn't a prototype [-Wstrict-prototypes]
board/xilinx/zynq/ps7_init.c:12742:1: warning: function declaration isn't a prototype [-Wstrict-prototypes]
board/xilinx/zynq/ps7_init.c:12761:1: warning: function declaration isn't a prototype [-Wstrict-prototypes]
board/xilinx/zynq/ps7_init.c:12854:6: warning: function declaration isn't a prototype [-Wstrict-prototypes]
The prototypes should be
int ps7_init(void);
int ps7_post_config(void);
int ps7_debug(void);
rather than
int ps7_init();
int ps7_post_config();
int ps7_debug();
We do not want to be bothered because of automatically generated files.
But we cannot touch the external projects for now.
What we can do is to disable -Wstrict-prototypes for ps7_init.c
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 15 May 2014 07:40:14 +0000 (09:40 +0200)]
ARM: zynq: Show ECC status on the same line as DRAM size
Without this patch is DRAM size one line below DRAM:
which is not nice
Origin:
I2C: ready
DRAM: Memory: ECC disabled
1 GiB
MMC: zynq_sdhci: 0
Fixed by this patch:
I2C: ready
DRAM: ECC disabled 1 GiB
MMC: zynq_sdhci: 0
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Michal Simek [Thu, 8 May 2014 13:10:48 +0000 (15:10 +0200)]
ARM: zynq: Enable generic board for Xilinx Zynq
Enable CONFIG_SYS_GENERIC_BOARD for all Zynq boards.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Masahiro Yamada <yamada.m@jp.panasonic.com> [on ZC706 board]
Simon Glass [Wed, 23 Jul 2014 12:55:24 +0000 (06:55 -0600)]
dm: Give the demo uclass a name
Uclasses should be named, so add a name for the demo uclass.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 23 Jul 2014 12:55:23 +0000 (06:55 -0600)]
dm: Add dm_scan_other() to locate board-specific devices
Some boards will have devices which are not in the device tree and do not
have platform data. They may be programnatically created, for example.
Add a hook which boards can use to bind those devices early in boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 23 Jul 2014 12:55:22 +0000 (06:55 -0600)]
dm: Improve errors and warnings in lists_bind_fdt()
Add a debug message for when a device tree node has no driver. Also reword
the warning when a device fails to bind, which was misleading.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 23 Jul 2014 12:55:21 +0000 (06:55 -0600)]
dm: Add child_pre_probe() and child_post_remove() methods
Some devices (particularly bus devices) must track their children, knowing
when a new child is added so that it can be set up for communication on the
bus.
Add a child_pre_probe() method to provide this feature, and a corresponding
child_post_remove() method.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 23 Jul 2014 12:55:20 +0000 (06:55 -0600)]
dm: Introduce per-child data for devices
Some device types can have child devices and want to store information
about them. For example a USB flash stick attached to a USB host
controller would likely use this space. The controller can hold
information about the USB state of each of its children.
The data is stored attached to the child device in the 'parent_priv'
member. It can be auto-allocated by dm when the child is probed. To
do this, add a per_child_auto_alloc_size value to the parent driver.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 23 Jul 2014 12:55:19 +0000 (06:55 -0600)]
dm: Add functions to access a device's children
Devices can have childen that can be addressed by a simple index, the
sequence number or a device tree offset. Add functions to access a child
in each of these ways.
The index is typically used as a fallback when the sequence number is not
available. For example we may use a serial UART with sequence number 0 as
the console, but if no UART has sequence number 0, then we can fall back
to just using the first UART (index 0).
The device tree offset function is useful for buses, where they want to
locate one of their children. The device tree can be scanned to find the
offset of each child, and that offset can then find the device.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 23 Jul 2014 12:55:18 +0000 (06:55 -0600)]
dm: Provide a function to scan child FDT nodes
At present only root nodes in the device tree are scanned for devices.
But some devices can have children. For example a SPI bus may have
several children for each of its chip selects.
Add a function which scans subnodes and binds devices for each one. This
can be used for the root node scan also, so change it.
A device can call this function in its bind() or probe() methods to bind
its children.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Wed, 23 Jul 2014 12:55:17 +0000 (06:55 -0600)]
dm: Tidy up some header file comments
Fix up the style of a few comments and add/clarify a few others.
Signed-off-by: Simon Glass <sjg@chromium.org>