Tom Rini [Mon, 26 Aug 2019 13:50:46 +0000 (09:50 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv
- Support SPL and OpenSBI (FW_DYNAMIC firmware) boot.
- Fix qemu kconfig build warning.
Tom Rini [Mon, 26 Aug 2019 13:37:37 +0000 (09:37 -0400)]
Merge branch '2019-08-24-master-imports'
- Migrate SYS_SPI_U_BOOT_OFFS, SYS_NAND_USE_FLASH_BBT and ARCH_CPU_INIT
to Kconfig
Bin Meng [Thu, 8 Aug 2019 06:04:41 +0000 (23:04 -0700)]
riscv: qemu: Fix kconfig build warning
When 'make qemu-riscv64_defconfig', there is a build warning:
board/emulation/qemu-riscv/Kconfig:24:
warning: config symbol defined without type
Fix it by specifying the config symbol type to 'hex'.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Lukas Auer [Wed, 21 Aug 2019 19:14:50 +0000 (21:14 +0200)]
doc: update QEMU RISC-V documentation
The available defconfigs for RISC-V QEMU have changed. We now have
configurations to compile U-Boot to run in supervisor mode and for
U-Boot SPL. Update the QEMU RISC-V documentation to reflect these
changes.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Lukas Auer [Wed, 21 Aug 2019 19:14:49 +0000 (21:14 +0200)]
riscv: qemu: add SPL configuration
Add two new configurations (qemu-riscv{32,64}_spl_defconfig) with SPL
enabled for RISC-V QEMU. QEMU does not require SPL to run U-Boot. The
configurations are meant to help the development of SPL on RISC-V.
The configurations enable RAM as the only SPL boot device. Images must
be loaded at address 0x80200000. In the default boot flow, U-Boot SPL
starts in machine mode, loads the OpenSBI FW_DYNAMIC firmware and U-Boot
proper from the supplied FIT image, and starts OpenSBI. U-Boot proper is
then started in supervisor mode by OpenSBI.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Lukas Auer [Wed, 21 Aug 2019 19:14:48 +0000 (21:14 +0200)]
riscv: set default FIT generator script and build target for SPL builds
Now that we have a generic FIT generator script for RISC-V, set it as
the default. To also build the FIT image by default, set the default
build target to "u-boot.itb" if CONFIG_SPL_LOAD_FIT is enabled.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Lukas Auer [Wed, 21 Aug 2019 19:14:47 +0000 (21:14 +0200)]
riscv: add a generic FIT generator script
Add a generic FIT generator script for RISC-V to generate images
containing U-Boot, OpenSBI FW_DYNAMIC firmware, and optionally one or
more device trees. The location of the OpenSBI firmware binary can be
specified with the OPENSBI environment variable. By default, it is
assumed to be "fw_dynamic.bin", located in the U-Boot top-level. Device
trees are passed as arguments to the generator script. A separate
configuration entry is created for each device tree.
The load addresses of U-Boot and OpenSBI are parsed from the U-Boot
configuration. They can be overwritten with the UBOOT_LOAD_ADDR and
OPENSBI_LOAD_ADDR environment variables.
The script is based on the i.MX (arch/arm/mach-imx/mkimage_fit_atf.sh)
and Allwinner sunxi (board/sunxi/mksunxi_fit_atf.sh) FIT generator
scripts.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Lukas Auer [Wed, 21 Aug 2019 19:14:46 +0000 (21:14 +0200)]
riscv: support SPL stack and global data relocation
To support relocation of the stack and global data on RISC-V, the
secondary harts must be notified of the change using IPIs. We can reuse
the hart relocation code for this purpose. It uses global data to store
the new stack pointer and global data pointer for the secondary harts.
This means that we cannot update the global data pointer of the main
hart in spl_relocate_stack_gd(), because the secondary harts have not
yet been relocated at this point. It is updated after the secondary
harts have been notified.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Lukas Auer [Wed, 21 Aug 2019 19:14:45 +0000 (21:14 +0200)]
riscv: add SPL support
U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.
To be able to use SPL, boards have to provide a supported SPL boot
device.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Lukas Auer [Wed, 21 Aug 2019 19:14:44 +0000 (21:14 +0200)]
spl: support booting via RISC-V OpenSBI
RISC-V OpenSBI is an open-source implementation of the RISC-V Supervisor
Binary Interface (SBI) specification. It is required by Linux and U-Boot
running in supervisor mode. This patch adds support for booting via the
OpenSBI FW_DYNAMIC firmware. It supports OpenSBI version 0.4 and higher.
In this configuration, U-Boot SPL starts in machine mode. After loading
OpenSBI and U-Boot proper, it will start OpenSBI. All necessary
parameters are generated by U-Boot SPL and are passed to OpenSBI. U-Boot
proper is started in supervisor mode by OpenSBI. Support for OpenSBI is
enabled with CONFIG_SPL_OPENSBI. An additional configuration entry,
CONFIG_SPL_OPENSBI_LOAD_ADDR, is used to specify the load address of the
OpenSBI firmware binary. It is not used directly in U-Boot and instead
is intended to make the value available to scripts such as FIT
configuration generators.
The header file include/opensbi.h is based on header files from the
OpenSBI project. They are recent, as of commit
bae54f764570 ("firmware:
Add fw_dynamic firmware").
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Lukas Auer [Wed, 21 Aug 2019 19:14:43 +0000 (21:14 +0200)]
riscv: add run mode configuration for SPL
U-Boot SPL can be run in a different privilege mode from U-Boot proper.
Add new configuration entries for SPL to allow the run mode to be
configured independently of U-Boot proper.
Extend all uses of the CONFIG_RISCV_SMODE and CONFIG_RISCV_MMODE
configuration symbols to also cover the SPL equivalents. Ensure that
files compatible with only one privilege mode are not included in builds
targeting an incompatible privilege mode.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Lukas Auer [Wed, 21 Aug 2019 19:14:42 +0000 (21:14 +0200)]
spl: fit: use U-Boot device tree when FIT image has no device tree
As part of the SPL FIT boot flow, the device tree is appended to U-Boot
proper. The device tree is used to record information on the loadables
to make them available to the SPL framework and U-Boot proper. Depending
on the U-Boot device tree provider, the FIT image might not include a
device tree. Information on the loadables is missing in this case.
When booting via firmware bundled with the FIT image, U-Boot SPL loads
the firmware binary and U-Boot proper before starting the firmware. The
firmware, in turn, is responsible for starting U-Boot proper.
Information on the memory location of the U-Boot proper loadable must be
available to the SPL framework so that it can be passed to the firmware
binary. To support this use case when no device tree is found in the FIT
image, fall back to the U-Boot device tree in this situation.
At the same time, update the comment to remove the note that the
destination address must be aligned to ARCH_DMA_MINALIGN. Alignment is
only required as an intermediate step when reading external data. This
is automatically handled by spl_fit_append_fdt(). After reading the
external data, it is copied to the specified address, which does not
have to be aligned to ARCH_DMA_MINALIGN.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Lukas Auer [Wed, 21 Aug 2019 19:14:41 +0000 (21:14 +0200)]
Makefile: support building SPL FIT images without device trees
When building a U-Boot FIT image, the device trees specified by the
board are unconditionally built for inclusion in the FIT image. However,
not all device tree providers, such as CONFIG_OF_PRIOR_STAGE, require a
device tree to be built and bundled with the U-Boot binary. They rely on
other mechanisms to provide the device tree to U-Boot. Compilation on
boards with these device tree providers fails, because they do not
specify a device tree.
Change the makefile rules to conditionally build the device trees if
CONFIG_OF_SEPARATE, CONFIG_OF_EMBED, or CONFIG_OF_HOSTFILE is selected
as device tree provider.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Lukas Auer [Wed, 21 Aug 2019 19:14:40 +0000 (21:14 +0200)]
fdtdec: make CONFIG_OF_PRIOR_STAGE available in SPL
The current preprocessor logic prevents CONFIG_OF_PRIOR_STAGE from being
used in U-Boot SPL. Change the logic to also make it available in U-Boot
SPL.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Hannes Schmelzer [Thu, 22 Aug 2019 13:41:46 +0000 (15:41 +0200)]
Convert CONFIG_SYS_SPI_U_BOOT_OFFS to Kconfig
This converts the following to Kconfig:
CONFIG_SYS_SPI_U_BOOT_OFFS
Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
[trini: Expose this for SPL_SPI_SUNXI for now]
Signed-off-by: Tom Rini <trini@konsulko.com>
Hannes Schmelzer [Thu, 22 Aug 2019 13:41:45 +0000 (15:41 +0200)]
moveconfig: prepare moving CONFIG_SYS_SPI_U_BOOT_OFFS to Kconfig step 4
the x530 board needs conversion of SPL_SPI_LOAD to Kconfig first
Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Hannes Schmelzer [Thu, 22 Aug 2019 13:41:44 +0000 (15:41 +0200)]
moveconfig: prepare moving CONFIG_SYS_SPI_U_BOOT_OFFS to Kconfig step 3
Exact two boards are referencing CONFIG_SYS_SPI_U_BOOT_OFFS to another
define, we replace this manually with the value for having a clean run
of moveconfig.py afterwards.
Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Hannes Schmelzer [Thu, 22 Aug 2019 13:41:43 +0000 (15:41 +0200)]
moveconfig: prepare moving CONFIG_SYS_SPI_U_BOOT_OFFS to Kconfig step 2
some boards have common headers for several individual build-targets
where CONFIG_SYS_SPI_U_BOOT_OFFS is defined even it is not needed (only
needed if CONFIG_SPL_SPI_LOAD is defined also). Take this define here
under '#ifdef CONFIG_SPL_SPI_LOAD' for having a clean run of
moveconfig.py
Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Hannes Schmelzer [Thu, 22 Aug 2019 13:41:42 +0000 (15:41 +0200)]
moveconfig: prepare moving CONFIG_SYS_SPI_U_BOOT_OFFS to Kconfig step 1
Some boards have coded this offset with formula or bitshifts in their
board-config. Manually convert these things into hex-values to be able
using moveconfig.py afterwards.
Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Stefan Roese [Thu, 22 Aug 2019 10:28:04 +0000 (12:28 +0200)]
mtd: nand: raw: Move CONFIG_SYS_NAND_USE_FLASH_BBT to Kconfig
Convert CONFIG_SYS_NAND_USE_FLASH_BBT to Kconfig, update defconfigs,
headers and whitelist.
Please note that this symbol already was used in Kconfig
(imply in CONFIG_NAND_ATMEL) which did not work, since this symbol was
not available in Kconfig. This changes now with this patch and all
boards with CONFIG_NAND_ATMEL will have BBT enabled. Which is what
I also need on my GARDENA AT91SAM based board.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Gregory CLEMENT <gregory.clement@bootlin.com>
[trini: Rework such that the configs are unchanged to start with]
Signed-off-by: Tom Rini <trini@konsulko.com>
Adam Ford [Wed, 14 Aug 2019 13:29:25 +0000 (08:29 -0500)]
Convert CONFIG_ARCH_CPU_INIT to Kconfig
This converts the following to Kconfig:
CONFIG_ARCH_CPU_INIT
Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Tested-by: Felix Brack <fb@ltec.ch>
Tom Rini [Sun, 25 Aug 2019 16:03:24 +0000 (12:03 -0400)]
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 24 Aug 2019 12:33:27 +0000 (08:33 -0400)]
Merge tag 'u-boot-rockchip-
20190823' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- remove rk3288 fennec board
- remove SPL raw image support for Rockchip SoCs
- add common misc_init_r() for ethaddr from cpuid
- enable USB HOST support for rk3328
- unify code for finding a valid gpt in part driver
Tom Rini [Sat, 24 Aug 2019 12:32:22 +0000 (08:32 -0400)]
Merge branch '2019-08-23-master-imports'
- Migrate CONFIG_MX_CYCLIC, CONFIG_FSL_USDHC and CONFIG_MXS_GPIO to
Kconfig
- Fix some SPL/TPL and ARM64 dependencies
Adam Ford [Wed, 14 Aug 2019 12:54:34 +0000 (07:54 -0500)]
Convert CONFIG_MX_CYCLIC to Kconfig
This converts the following to Kconfig:
CONFIG_MX_CYCLIC
Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: David Lechner <david@lechnology.com>
Adam Ford [Wed, 14 Aug 2019 12:23:43 +0000 (07:23 -0500)]
Convert CONFIG_FSL_USDHC to Kconfig
This converts the following to Kconfig:
CONFIG_FSL_USDHC
Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Add IMX8M, TARGET_S32V234EVB to FSL_USDHC list]
Signed-off-by: Tom Rini <trini@konsulko.com>
Adam Ford [Tue, 13 Aug 2019 19:32:30 +0000 (14:32 -0500)]
Kconfigs: Various: Fix some SPL, TPL and ARM64 dependencies
Several options are presenting themselves on a various boards
where the options are clearly not used. (ie, arm64 options on
arm9, or SPL/TPL options when SPL or TPL are not defined)
This patch is not attempting to be a complete list of items, but
more like low hanging fruit.
This patch attempts to reduce some of the menuconfig noise
by defining dependencies so they don't appear when not used.
Signed-off-by: Adam Ford <aford173@gmail.com>
Lukasz Majewski [Tue, 13 Aug 2019 16:10:39 +0000 (18:10 +0200)]
kconfig: Convert CONFIG_MXS_GPIO to Kconfig
This converts the following to Kconfig:
CONFIG_MXS_GPIO
Travis-CI: https://travis-ci.org/lmajewski/u-boot-dfu/builds/
571260789
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Tom Rini [Fri, 23 Aug 2019 14:03:13 +0000 (10:03 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-clk
Max Kellermann [Tue, 4 Dec 2018 11:00:48 +0000 (12:00 +0100)]
evb_rk3399: revert CONFIG_SYS_MMC_ENV_DEV to 0
This was changed to 1 in commit
0717dde057e, but a few months later,
commit
5f9411af37b swapped the order of eMMC and SD card by assigning
indexed aliases to `&sdhci` and `&sdmmc`.
Signed-off-by: Max Kellermann <max.kellermann@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(Add signature)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Urja Rannikko [Thu, 11 Apr 2019 20:27:51 +0000 (20:27 +0000)]
disk: efi: ignore 'IGNOREME' GPT header found on cros eMMCs
Some ChromeOS devices (atleast veyron speedy) have the first 8MiB of
the eMMC write protected and equipped with a dummy 'IGNOREME' GPT
header - instead of spewing error messages about it, just silently
try the backup GPT.
Note: this does not touch the gpt cmd writing/verifying functions,
those will still complain.
Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Urja Rannikko [Thu, 11 Apr 2019 20:27:50 +0000 (20:27 +0000)]
disk: efi: unify code for finding a valid gpt
There were 3 copies of the same sequence, make it into a function.
Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Rohan Garg [Mon, 12 Aug 2019 15:04:36 +0000 (17:04 +0200)]
board: puma: Use rockchip_* helpers to setup cpuid and macaddr
We should use the shared helpers to setup the necessary parts
Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Rohan Garg [Mon, 12 Aug 2019 15:04:35 +0000 (17:04 +0200)]
rockchip: rk3399: Enable CONFIG_MISC_INIT_R for the Rock PI 4
This enables us to set a static MAC address
Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Rohan Garg [Mon, 12 Aug 2019 15:04:34 +0000 (17:04 +0200)]
rockchip: rk3399: derive ethaddr from cpuid
Generate a MAC address based on the cpuid available in the efuse
block: Use the first 6 byte of the cpuid's SHA256 hash and set the
locally administered bits. Also ensure that the multicast bit is
cleared.
The MAC address is only generated and set if there is no ethaddr
present in the saved environment.
This is based off of Klaus Goger's work in 8adc9d
Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 20 Aug 2019 10:01:44 +0000 (18:01 +0800)]
rockchip: rk3288: remove fennec board support
Since there is no one using this board, remove it.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 20 Aug 2019 03:47:02 +0000 (11:47 +0800)]
rockchip: rk3399: defconfig: remove SPL raw image support
RK3399 SPL only support FIT image for ATF bl31.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 20 Aug 2019 03:47:01 +0000 (11:47 +0800)]
rockchip: rk3368: defconfig: remove SPL raw image support
RK3368 SPL only support FIT image for ATF bl31.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Tue, 20 Aug 2019 03:47:00 +0000 (11:47 +0800)]
rockchip: rk3328: defconfig: remove SPL raw image support
RK3328 SPL only support FIT image for ATF bl31.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Mon, 19 Aug 2019 07:01:24 +0000 (15:01 +0800)]
rockchip: Move config SYS_MALLOC_LEN to Kconfig
Use Kconfig for option SYS_MALLOC_LEN and default to 0x2000000.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Thu, 15 Aug 2019 03:13:28 +0000 (11:13 +0800)]
rockchip: dts: rk3328-rock64: fix usb power supply
According to rock64 schemetic, both VCC_HOST1_5V and VCC_HOST_5V are
controlled by USB20_HOST_DRV(GPIO0A2), fix it so that we can get correct
power supply for USB HOST ports.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Thu, 15 Aug 2019 03:40:56 +0000 (11:40 +0800)]
rockchip: rk3328: migrate u-boot node to -u-boot.dtsi
Move all the nodes only shown in u-boot to -u-boot.dtsi to make
rk3328.dtsi clean.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Thu, 15 Aug 2019 03:28:31 +0000 (11:28 +0800)]
rockchip: dts: rk3328-rock64: enable usb3 xhci controller
Rock64 has a USB3.0 port, enable the controller so that we can use it.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Thu, 15 Aug 2019 07:37:31 +0000 (15:37 +0800)]
rockchip: clk: rk3328: add clk_enable ops for HCLK_HOST0
Required to successfully probe the ehci generic driver
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Kever Yang [Mon, 12 Aug 2019 12:02:29 +0000 (20:02 +0800)]
ram: rk3399: update cap and ddrconfig for each channel after init
We need to store all the ram related cap/map info back to register
for each channel after all the init has been done in case some of register
was reset during the process.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Tom Rini [Thu, 22 Aug 2019 11:29:54 +0000 (07:29 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- i2c dm model support of lx2160a, ls1088a, lx2088a, ls1028a
- icid setup for ls1028a, ls1088a
- other small fixes
Laurentiu Tudor [Tue, 30 Jul 2019 14:29:59 +0000 (17:29 +0300)]
armv8: ls1028a: add icid setup for platform devices
Add ICID setup for the platform devices contained on this chip: usb,
sata, sdhc, edma, qdma, gpu, display and sec.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Laurentiu Tudor [Tue, 30 Jul 2019 14:29:58 +0000 (17:29 +0300)]
armv8: ls1088a: add icid setup for platform devices
Add ICID setup for the platform devices contained on this chip: usb,
sata, sdhc, sec. The ICID macros for SEC needed to be adapted because
the format of the registers is different.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Laurentiu Tudor [Tue, 30 Jul 2019 14:29:57 +0000 (17:29 +0300)]
armv8: fsl-layerscape: make icid setup endianness aware
The current implementation assumes that the registers holding the ICIDs
are universally big endian. That's no longer the case on newer
platforms so update the code to take into account the endianness of
each register.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Laurentiu Tudor [Tue, 30 Jul 2019 14:29:56 +0000 (17:29 +0300)]
armv8: fsl-layerscape: add base addresses for several devices
Add CCSR base addresses for ESDHC2, EDMA QDMA, DISPLAY and GPU devices.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Laurentiu Tudor [Tue, 30 Jul 2019 14:29:55 +0000 (17:29 +0300)]
armv8: fsl-layerscape: add missing sec jr base address defines
Add defines for all the SEC job rings base addresses.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Chuanhua Han [Fri, 2 Aug 2019 08:53:53 +0000 (16:53 +0800)]
armv8: kconfig: Fix some platforms incorrect I2C clock divider
By default, i2c input clock is platform clk / 2, but some of the
platform of i2c clock divider does not meet this kind of circumstance,
so alone to set default values for these platforms.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Chuanhua Han [Thu, 1 Aug 2019 08:36:57 +0000 (16:36 +0800)]
armv8: ls1088aqds: support DSPI mode by hwconfig
BRDCFG4[USBOSC] and BRDCFG5[SPR] register field of Qixis device is used
to control SPI and other IP signal routing.
USBOSC:
0= SPI_CLK used as external USB REFCLK input driven with 24.000 MHz.
SPI devices are unusable in this mode.
1= SPI_CLK used as SPI clock.
SPI devices are usable in this mode. USB block is clocked from
internal sources
SPR[3:2]:
SPI_CS / SDHC_DAT4:7 Routing (schematic net CFG_SPI_ROUTE[3:2]):
00= SDHC/eMMC 8-bit
01= SD Card Rev 2.0/3.0
10= SPI on-board memory
11= TDM Riser / SPI off-board connector.
The default value is 00 if an SDCard/eMMC card is selected as the boot
device.
SPR[1:0]:
SPI_SIN/SOUT/SCK Routing (schematic net CFG_SPI_ROUTE[1:0]):
00= SDHC Sync loop
01= TDM Riser / SPI off-board connector.
10= SPI on-board memory.
11= SPI off-board connector.
By default, the SPI feature is not available, so we need to configure
the above register fields to select the route to the SPI feature.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Pankaj Bansal [Tue, 23 Jul 2019 07:22:05 +0000 (07:22 +0000)]
armv8: ls1028aqds: define ARCH_MISC_INIT to handle mux
Define ARCH_MISC_INIT for LS1028AQDS platform to handle board
related mux.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Alison Wang [Mon, 22 Jul 2019 07:17:21 +0000 (07:17 +0000)]
armv8: ls1046afrwy: Define CONFIG_ENV_ADDR for QSPI Boot
Defines CONFIG_ENV_ADDR for QSPI Boot which specifies the start
address of the flash sector containing the environment. It fixes
the issue that bootcmd is always set as default at bootup.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Pankaj Bansal [Wed, 17 Jul 2019 09:34:34 +0000 (09:34 +0000)]
boards: fsl: lx2160ardb: enable flexcan
Flexcan in LX2160ARDB is controlled by FPGA register boardcfg4
bit 5. enable this bit so that flexcan is enabled in LX2160ARDB.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Chuanhua Han [Fri, 26 Jul 2019 12:25:37 +0000 (20:25 +0800)]
configs: ls1088a: Enable DM support for pcf2127 rtc
Enable related configs on all ls1088aqds boards to support pcf2127
rtc DM function.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Chuanhua Han [Fri, 26 Jul 2019 12:25:36 +0000 (20:25 +0800)]
armv8: dts: ls1088aqds : Add pcf2127 node
Add the pcf2127-rtc node under the i2c0->i2c-mux@77->i2c@3 for ls1088aqds boards.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Chuanhua Han [Fri, 26 Jul 2019 12:25:35 +0000 (20:25 +0800)]
armv8: ls1088aqds: Add support of I2C driver model.
Udate ls1088aqds board init code to support DM_I2C.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Chuanhua Han [Tue, 23 Jul 2019 10:43:15 +0000 (18:43 +0800)]
armv8: dts: ls1088ardb: Add slave nodes under the i2c0 controller
This patch adds some slave nodes to support the i2c dm on the device
side under the i2c0 controller.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Chuanhua Han [Tue, 23 Jul 2019 10:43:14 +0000 (18:43 +0800)]
armv8: dts: ls1088a: add I2C node support
One ls1088a, there are four I2C controllers. So add all I2C node
for ls1088a in device tree.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Chuanhua Han [Tue, 23 Jul 2019 10:43:12 +0000 (18:43 +0800)]
gpio: do not include <asm/arch/gpio.h> on ARCH_LS1088A
As no gpio.h is defined for this architecture, to avoid
compilation failure, do not include <asm/arch/gpio.h> for
arch ls1088a.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Chuanhua Han [Tue, 23 Jul 2019 10:43:11 +0000 (18:43 +0800)]
boards: ls1088a: Add support of I2C driver model
DM_I2C_COMPAT is a compatibility layer that allows using the non-DM
I2C API when DM_I2C is used.When DM_I2C_COMPAT is not enabled for
compilation, a compilation error will be generated. This patch
solves the problem that the i2c-related api of the ls1088a platform
does not support dm.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Chuanhua Han [Fri, 26 Jul 2019 11:24:03 +0000 (19:24 +0800)]
configs: ls2088a: Enable DM support for ds3231 rtc
Enable related configs on all ls2088aqds boards to support ds3231
rtc DM function.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Chuanhua Han [Fri, 26 Jul 2019 11:24:02 +0000 (19:24 +0800)]
armv8: dts: ls2088aqds : Add ds3232 node
Add the ds3232-rtc node under the i2c0->i2c-mux@77->i2c@0 for ls2088aqds
boards.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Chuanhua Han [Fri, 26 Jul 2019 11:24:01 +0000 (19:24 +0800)]
boards: ls2088aqds: Add support of I2C driver model.
Update ls2088aqds board init code to support DM_I2C.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Chuanhua Han [Fri, 26 Jul 2019 11:24:00 +0000 (19:24 +0800)]
rtc: ds3232/ds3231: Add support to generate 32KHz output for driver module
Add an implementation of the rtc_enable_32khz_output() that uses the
driver model i2c APIs.
Also put code related to rtc_enable_32khz_output
under CONFIG_RTC_ENABLE_32KHZ_OUTPUT.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Chuanhua Han [Mon, 22 Jul 2019 08:36:46 +0000 (16:36 +0800)]
armv8: dts: ls2088ardb: Add slave nodes under the i2c0
Add some slave nodes to support the i2c dm on the device side under the i2c0.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
chuanhua han [Mon, 22 Jul 2019 08:36:45 +0000 (16:36 +0800)]
armv8: dts: fsl-ls2088a: add i2c node support
One ls2088a, there are four I2C controllers. So add I2C nodes in dts
for ls2088a.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Chuanhua Han [Mon, 22 Jul 2019 08:36:43 +0000 (16:36 +0800)]
gpio: do not include <asm/arch/gpio.h> on ARCH_LS2080A
As no gpio.h is defined for this architecture, to avoid
compilation failure, do not include <asm/arch/gpio.h> for
arch ls2080a.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Chuanhua Han [Mon, 22 Jul 2019 08:36:42 +0000 (16:36 +0800)]
boards: ls2088a: Add support of I2C driver model.
DM_I2C_COMPAT is a compatibility layer that allows using the non-DM
I2C API when DM_I2C is used.When DM_I2C_COMPAT is not enabled for
compilation, a compilation error will be generated. This patch
solves the problem that the i2c-related api of the ls2088a platform
does not support dm.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Chuanhua Han [Wed, 10 Jul 2019 07:48:40 +0000 (15:48 +0800)]
armv8: dts: ls1028aqds: Add pcf2127 node under i2c1
Add the pcf2127-rtc node under the i2c1 in dts for ls1028aqds boards.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Chuanhua Han [Wed, 10 Jul 2019 07:48:39 +0000 (15:48 +0800)]
armv8: dts: ls1028aqds: Add pca9547 node under the i2c0 controller
Add pca9547 node to support i2c multiplexer under the i2c0 controller
in dts for ls1028aqds boards.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Chuanhua Han [Wed, 10 Jul 2019 07:48:38 +0000 (15:48 +0800)]
configs: ls1028a: Enable DM support for pcf2127 rtc
Enable related configs on all ls1028aqds boards to support pcf2127
rtc DM function.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Alex Marginean <alexm.osslist@gmail.com>
Tested-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Chuanhua Han [Wed, 10 Jul 2019 07:48:37 +0000 (15:48 +0800)]
armv8: ls1028aqds: Remove the definition of CONFIG_SYS_I2C_EARLY_INIT
Since i2c uses dm mode, i2c controller will be initialized when reading
and writing devices on i2c bus. So there is no need for the original
non-dm mode i2c early initialization function call, this patch removed
the definition of CONFIG_SYS_I2C_EARLY_INIT.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Chuanhua Han [Wed, 10 Jul 2019 13:16:52 +0000 (21:16 +0800)]
armv8: dts: ls1028ardb: Add slave nodes under the i2c0 controller
Add some slave nodes to support the i2c dm on the device side under the i2c0.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Chuanhua Han [Wed, 10 Jul 2019 13:16:50 +0000 (21:16 +0800)]
gpio: do not include <asm/arch/gpio.h> on ARCH_LS1028A
As no gpio.h is defined for this architecture, to avoid
compilation failure, do not include <asm/arch/gpio.h> for
arch ls1028a.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Chuanhua Han [Wed, 10 Jul 2019 13:16:49 +0000 (21:16 +0800)]
boards: ls1028a: Add support of I2C driver model
DM_I2C_COMPAT is a compatibility layer that allows using the non-DM
I2C API when DM_I2C is used.When DM_I2C_COMPAT is not enabled for
compilation, a compilation error will be generated. This patch
solves the problem that the i2c-related api of the ls1028a platform
does not support dm.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Chuanhua Han [Wed, 10 Jul 2019 13:00:21 +0000 (21:00 +0800)]
configs: lx2160: enable DM support for pcf2127 rtc
Enable related configs on all lx2160ardb boards to support pcf2127
rtc DM feature.
Also remove SYS_I2C_MXC_I2Cx, where x is from 1 to 8 from
Kconfig.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Chuanhua Han [Wed, 10 Jul 2019 13:05:13 +0000 (21:05 +0800)]
armv8: dts: lx2160aqds : Add pcf2127 node
Add the pcf2127-rtc node under the i2c0->i2c-mux@77->i2c@3 in dts for
lx2160aqds boards.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Chuanhua Han [Wed, 10 Jul 2019 13:00:26 +0000 (21:00 +0800)]
armv8: dts: lx2160ardb : Add the "u-boot, dm-pre-reloc" for i2c0
Lx2160ardb need to use i2c0 before relocation, so we also need to set
u-boot, dm-pre-reloc to initialize node before relocation.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Chuanhua Han [Wed, 10 Jul 2019 13:00:25 +0000 (21:00 +0800)]
armv8: dts: Add pcf2127 node for lx2160ardb
Adds the pcf2127-rtc node under the i2c4 node dts of lx2160ardb boards.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Chuanhua Han [Wed, 10 Jul 2019 13:00:24 +0000 (21:00 +0800)]
armv8: dts: fsl-lx2160a: add i2c controller and gpio DT nodes
In lx2160a soc, there are eight i2c controllers, this patch adds i2c
nodes for lx2160a, and the gpio2 nodes on which the i2c4 controller
depends.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Chuanhua Han [Wed, 10 Jul 2019 13:00:23 +0000 (21:00 +0800)]
gpio: do not include <asm/arch/gpio.h> on ARCH_LX2160A
As no gpio.h is defined for this architecture, to avoid
compilation failure, do not include <asm/arch/gpio.h> for
arch ls2160a.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Chuanhua Han [Wed, 10 Jul 2019 13:00:22 +0000 (21:00 +0800)]
drivers: i2c: mxc: Fix compiler error when using i2c dm mode
I2C dm mode enablemenet causes below compilation errors:
In file included from include/config.h:8:0,
from include/common.h:20:
include/config_fallbacks.h:51:4: error: #error "Cannot define
CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
# error "Cannot define CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
^~~~~
In file included from include/config.h:8:0,
from include/common.h:20:
include/config_fallbacks.h:51:4: error: #error "Cannot define
CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
# error "Cannot define CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
^~~~~
board/freescale/lx2160a/lx2160a.c: In function 'board_early_init_f':
board/freescale/lx2160a/lx2160a.c:108:2: warning: implicit declaration
of function 'i2c_early_init_f'; did you mean 'arch_early_init_r'?
[-Wimplicit-function-declaration]
i2c_early_init_f();
^~~~~~~~~~~~~~~~
arch_early_init_r
drivers/i2c/mxc_i2c.c: In function 'mxc_i2c_probe':
drivers/i2c/mxc_i2c.c:824:8: warning: implicit declaration of function
'enable_i2c_clk';
did you mean 'enable_irq_wake'? [-Wimplicit-function-declaration]
ret = enable_i2c_clk(1, bus->seq);
^~~~~~~~~~~~~~
enable_irq_wake
So fix these compilation errors.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Chuanhua Han [Wed, 10 Jul 2019 13:00:20 +0000 (21:00 +0800)]
boards: lx2160a: Add support of I2C driver model
DM_I2C_COMPAT is a compatibility layer that allows using the non-DM I2C
API when DM_I2C is used. When DM_I2C_COMPAT is not enabled for
compilation, a compilation error will be generated. This patch solves
the problem that the i2c-related api of the lx2160a platform does not
support dm.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Ashish Kumar [Tue, 9 Jul 2019 09:20:15 +0000 (14:50 +0530)]
configs: ls1043aqds: Move CONFIG_FSL_QSPI to defconfig
Move CONFIG_FSL_QSPI from header file to defconfigs,
consequently unset imply config(CONFIG_SPI_FLASH_BAR) which
is not valid for LS series.
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Yuantian Tang [Tue, 2 Jul 2019 08:16:22 +0000 (16:16 +0800)]
armv8: ls1028a: select BOARD_LATE_INIT config
Select BOARD_LATE_INIT for ls1028ardb and ls1028aqds targets
so that late init work can be done.
Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Yuantian Tang [Wed, 19 Jun 2019 06:39:28 +0000 (14:39 +0800)]
common: qixis: make the qixis compatible with new soc
This driver needs modification to work with new soc,
like ls1028, since bitmap of RCFG is changed to
RESV[7:5] LIVE[4] WDEN[3] RESV[2:1] GO[0]
000 1 0 00 0
Also the RCW location is moved to only dutcfg0.
RESV[7:4] RCWSRC[3:0]
1111 configurable
Following commands are functional now
qixis_reset
qixis_reset sd
qixis_reset qspi
qixis_reset emmc
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Meenakshi Aggarwal [Thu, 23 May 2019 09:43:43 +0000 (15:13 +0530)]
drivers: net: mc: Report extra memory to Linux
MC firmware need to be aligned to 512M, so minimum 512MB DDR is reserved.
But MC support to work with 128MB or 256MB DDR memory also, in this
case, rest of the memory is not usable.
So reporting this extra memory to Linux through dtb memory fixup.
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Peng Fan [Mon, 19 Aug 2019 07:54:04 +0000 (07:54 +0000)]
clk: imx: add i.MX8MM clk driver
Add i.MX8MM clk driver support.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 19 Aug 2019 07:54:01 +0000 (07:54 +0000)]
clk: imx: add i.MX8M composite clk support
Import i.MX8M composite clk from Linux Kernel 5.3.0-rc2
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 19 Aug 2019 07:53:58 +0000 (07:53 +0000)]
clk: imx: add pll14xx driver
Add pll14xx driver for i.MX8MM usage, modifed
from Linux Kernel 5.3.0-rc1
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 19 Aug 2019 07:53:55 +0000 (07:53 +0000)]
clk: imx: expose CCF entry for all
Expose CCF entry, then we could avoid expand the SoC support list
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Wed, 21 Aug 2019 13:35:19 +0000 (13:35 +0000)]
sandbox: clk: add clk enable/disable test code
Since we added clk enable_count and prograte clk child enabling
operation to clk parent, so add a new function sandbox_clk_enable_count
to get enable_count for test usage.
And add test code to get the enable_count after we enable/disable
the device clk.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Wed, 21 Aug 2019 13:35:14 +0000 (13:35 +0000)]
clk: support clk tree dump
The previous code only dump the clk list. This patch is
to support clk tree dump, and also dump the enable_cnt.
The code used in patch is similar to dm_dump_all, but
the code here only filter out the UCLASS_CLK devices.
On i.MX8MM, Partial output:
u-boot=> clk dump
Rate Usecnt Name
------------------------------------------
24000000 0 |-- clock-osc-24m
24000000 0 | |-- dram_pll_ref_sel
750000000 0 | | `-- dram_pll
750000000 0 | | `-- dram_pll_bypass
750000000 0 | | `-- dram_pll_out
24000000 0 | |-- arm_pll_ref_sel
1200000000 0 | | `-- arm_pll
1200000000 0 | | `-- arm_pll_bypass
1200000000 0 | | `-- arm_pll_out
1200000000 0 | | `-- arm_a53_src
1200000000 0 | | `-- arm_a53_cg
1200000000 0 | | `-- arm_a53_div
24000000 4 | |-- sys_pll1_ref_sel
800000000 4 | | `-- sys_pll1
800000000 4 | | `-- sys_pll1_bypass
800000000 4 | | `-- sys_pll1_out
40000000 0 | | |-- sys_pll1_40m
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Wed, 21 Aug 2019 13:35:09 +0000 (13:35 +0000)]
clk: prograte clk enable/disable to parent
On i.MX8MM, thinking such as clk path
OSC->PLL->PLL GATE->CCM ROOT->CCGR GATE->Device
Only enabling CCGR GATE is not enough, we also need to enable PLL GATE
to make sure the clk path work. So when enabling CCGR GATE,
we could prograte to enabling PLL GATE to make life easier.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Wed, 21 Aug 2019 13:35:03 +0000 (13:35 +0000)]
clk: introduce enable_count
As what Linux Kernel 5.3.0 provides when enable/disable clk,
there is an enable_count in clk_core_disable/enable. Introduce
enable_count to track the clk enable/disable count when
clk_enable/disable for CCF. And Initialize enable_count to 0 when
register the clk.
And clk tree dump with enable_count will be supported, it will
be easy for us to check the clk status with enable_count
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Michal Simek [Mon, 19 Aug 2019 09:06:13 +0000 (11:06 +0200)]
test/py: Add cmd_memory dependency back to test_mmc_wr
Based on discussion with Stephen Warren there was recommendation to list
both memory and random command dependencies just in case that dependency is
not properly handled by Kconfig.
Fixes:
a09c1f7e1c1b ("test/py: Fix MMC/SD block write test dependency")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Heinrich Schuchardt [Thu, 15 Aug 2019 21:54:15 +0000 (23:54 +0200)]
easylogo: avoid buffer overrun
Building easylogo with `HOST_TOOLS_ALL=y make tools` results in a build
warning due to a possible buffer overrun:
tools/easylogo/easylogo.c:453:4: note: ‘sprintf’ output between 7 and
262 bytes into a destination of size 256
sprintf (str, "%s, 0x%02x", app, *dataptr++);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Truncate the output to fit into the destination buffer.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>