oweals/u-boot.git
7 years agoserial: 16550: Add port type as driver data
Marek Vasut [Thu, 1 Dec 2016 01:06:30 +0000 (02:06 +0100)]
serial: 16550: Add port type as driver data

Add driver data to each compatible string to identify the type of
the port. Since all the ports in the driver are entirely compatible
with 16550 for now, all are marked with PORT_NS16550. But, there
are ports which have specific quirks, like the JZ4780 UART, which
do not have any DT property to denote the quirks. Instead, Linux
uses the compatible string to discern such ports and enable the
necessary quirks.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
7 years agoserial: 16550: Add getfcr accessor
Marek Vasut [Thu, 1 Dec 2016 01:06:29 +0000 (02:06 +0100)]
serial: 16550: Add getfcr accessor

Add function which allows fetching the default FCR register setting
from platform data for DM , while retaining old behavior for non-DM
by returning UART_FCRVAL.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoMerge branch 'master' of git://www.denx.de/git/u-boot-imx
Tom Rini [Sun, 18 Dec 2016 18:54:25 +0000 (13:54 -0500)]
Merge branch 'master' of git://denx.de/git/u-boot-imx

Migrate CONFIG_ARCH_USE_MEMSET/MEMCPY with this merge.

Signed-off-by: Tom Rini <trini@konsulko.com>
7 years agoMerge branch 'master' of git://git.denx.de/u-boot-spi
Tom Rini [Fri, 16 Dec 2016 23:32:43 +0000 (18:32 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-spi

7 years agoMerge git://git.denx.de/u-boot-fsl-qoriq
Tom Rini [Fri, 16 Dec 2016 17:46:36 +0000 (12:46 -0500)]
Merge git://git.denx.de/u-boot-fsl-qoriq

7 years agoimx6: icorem6_rqs: Add FEC support
Jagan Teki [Tue, 13 Dec 2016 16:57:06 +0000 (17:57 +0100)]
imx6: icorem6_rqs: Add FEC support

Add FEC support for Engicam i.CoreM6 RQS modules.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
7 years agoarm: dts: imx6qdl-icore-rqs: Add FEC node
Jagan Teki [Tue, 13 Dec 2016 16:57:05 +0000 (17:57 +0100)]
arm: dts: imx6qdl-icore-rqs: Add FEC node

Add FEC node for Engicam i.CoreM6 RQS modules.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
7 years agoimx6: geam6ul: Add FEC support
Jagan Teki [Tue, 13 Dec 2016 16:57:04 +0000 (17:57 +0100)]
imx6: geam6ul: Add FEC support

Add FEC support for Engicam GEAM6UL module.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
7 years agoarm: dts: imx6ul-geam: Add FEC node
Jagan Teki [Tue, 13 Dec 2016 16:57:03 +0000 (17:57 +0100)]
arm: dts: imx6ul-geam: Add FEC node

Add FEC node for Engicam GEAM6UL module.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
7 years agoimx6: icorem6_rqs: Add I2C support
Jagan Teki [Tue, 13 Dec 2016 16:57:02 +0000 (17:57 +0100)]
imx6: icorem6_rqs: Add I2C support

Add I2C support for Engicam i.CoreM6 RQS modules.

icorem6qdl-rqs> i2c bus
Bus 0:  i2c@021a0000
Bus 1:  i2c@021a4000
Bus 2:  i2c@021a8000
icorem6qdl-rqs> i2c dev 0
Setting bus to 0
icorem6qdl-rqs> i2c speed 100000
Setting bus speed to 100000 Hz
icorem6qdl-rqs> i2c probe
Valid chip addresses: 4F
icorem6qdl-rqs> i2c md 4F 0xff
00ff: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff    ................
icorem6qdl-rqs> i2c bus
Bus 0:  i2c@021a0000  (active 0)
   4f: generic_4f, offset len 1, flags 0
Bus 1:  i2c@021a4000
Bus 2:  i2c@021a8000

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
7 years agoarm: dts: imx6qdl-icore-rqs: Add I2C node's
Jagan Teki [Tue, 13 Dec 2016 16:57:01 +0000 (17:57 +0100)]
arm: dts: imx6qdl-icore-rqs: Add I2C node's

Add I2C nodes for Engicam i.CoreM6 RQS modules.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
7 years agoimx6: icorem6: Rename engicam icorem6 defconfig files
Jagan Teki [Tue, 13 Dec 2016 16:57:00 +0000 (17:57 +0100)]
imx6: icorem6: Rename engicam icorem6 defconfig files

Rename defconfig files for better compatible with
respective board names and dts files.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
7 years agoarm: imx6q: Add Engicam i.CoreM6 Solo/Duallite RQS Starter Kit initial support
Jagan Teki [Tue, 13 Dec 2016 16:56:59 +0000 (17:56 +0100)]
arm: imx6q: Add Engicam i.CoreM6 Solo/Duallite RQS Starter Kit initial support

Boot from MMC:
-------------
U-Boot SPL 2016.11-rc2-g217bd8e-dirty (Nov 08 2016 - 22:56:07)
Trying to boot from MMC1

U-Boot 2016.11-rc2-g217bd8e-dirty (Nov 08 2016 - 22:56:07 +0530)

CPU:   Freescale i.MX6DL rev1.3 at 792 MHz
Reset cause: POR
Model: Engicam i.CoreM6 DualLite/Solo RQS Starter Kit
DRAM:  512 MiB
MMC:   FSL_SDHC: 0
*** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Net:   CPU Net Initialization Failed
No ethernet found.
Hit any key to stop autoboot:  0
icorem6qdl-rqs>

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
7 years agoarm: imx6q: Add Engicam i.CoreM6 Quad/Dual RQS Starter Kit initial support
Jagan Teki [Tue, 13 Dec 2016 16:56:58 +0000 (17:56 +0100)]
arm: imx6q: Add Engicam i.CoreM6 Quad/Dual RQS Starter Kit initial support

Boot from MMC:
-------------
U-Boot SPL 2016.11-rc2-g217bd8e-dirty (Nov 08 2016 - 22:59:44)
Trying to boot from MMC1

U-Boot 2016.11-rc2-g217bd8e-dirty (Nov 08 2016 - 22:59:44 +0530)

CPU:   Freescale i.MX6D rev1.2 at 792 MHz
Reset cause: POR
Model: Engicam i.CoreM6 Quad/Dual RQS Starter Kit
DRAM:  512 MiB
MMC:   FSL_SDHC: 0
*** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Net:   CPU Net Initialization Failed
No ethernet found.
Hit any key to stop autoboot:  0
icorem6qdl-rqs>

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
7 years agoimx6: geam6ul: Add default mtd nand partition table
Jagan Teki [Tue, 13 Dec 2016 16:56:57 +0000 (17:56 +0100)]
imx6: geam6ul: Add default mtd nand partition table

geam6ul> mtdparts

device nand0 <nand>, # parts = 6
0: spl                 0x00200000      0x00000000      0
1: uboot               0x00200000      0x00200000      0
2: env                 0x00100000      0x00400000      0
3: kernel              0x00400000      0x00500000      0
4: dtb                 0x00100000      0x00900000      0
5: rootfs              0x1f600000      0x00a00000      0

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
7 years agoimx6: geam6ul: Enable MTD device support
Jagan Teki [Tue, 13 Dec 2016 16:56:56 +0000 (17:56 +0100)]
imx6: geam6ul: Enable MTD device support

Enable MTD device, partition and command support.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
7 years agoimx6: geam6ul: Add NAND support
Jagan Teki [Tue, 13 Dec 2016 16:56:55 +0000 (17:56 +0100)]
imx6: geam6ul: Add NAND support

Add NAND support for Engicam GEAM6UL board.

Boot Log:
--------
U-Boot SPL 2016.11-g537fa5f (Nov 28 2016 - 11:42:28)
Trying to boot from NAND
NAND : 256 MiB

U-Boot 2016.11-g537fa5f (Nov 28 2016 - 11:20:06 +0100)

CPU:   Freescale i.MX6UL rev1.1 69 MHz (running at 396 MHz)
CPU:   Automotive temperature grade (-40C to 125C) at 42C
Reset cause: WDOG
Model: Engicam GEAM6UL
DRAM:  128 MiB
NAND:  256 MiB
MMC:   FSL_SDHC: 0
* Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Net:   No ethernet found.
Hit any key to stop autoboot:  0

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
7 years agoimx6: geam6ul: Add I2C support
Jagan Teki [Tue, 13 Dec 2016 16:56:54 +0000 (17:56 +0100)]
imx6: geam6ul: Add I2C support

Add I2C support for Engicam GEAM6UL module.

geam6ul> i2c bus
Bus 0:  i2c@021a0000
Bus 1:  i2c@021a4000
geam6ul> i2c dev 0
Setting bus to 0
geam6ul> i2c dev
Current bus is 0
geam6ul> i2c speed 100000
Setting bus speed to 100000 Hz
geam6ul> i2c probe
Valid chip addresses: 2C
geam6ul> i2c md 2C 0xff
00ff: 00 00 00 00 0f f0 01 64 ff ff 00 00 00 00 00 00    .......d........

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
7 years agoarm: dts: imx6ul-geam: Add I2C nodes
Jagan Teki [Tue, 13 Dec 2016 16:56:53 +0000 (17:56 +0100)]
arm: dts: imx6ul-geam: Add I2C nodes

Add I2C nodes for Engicam GEAM6UL module.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
7 years agoarm: imx6ul: Add Engicam GEAM6UL Starter Kit initial support
Jagan Teki [Tue, 13 Dec 2016 16:56:52 +0000 (17:56 +0100)]
arm: imx6ul: Add Engicam GEAM6UL Starter Kit initial support

Boot Log:
--------
U-Boot SPL 2016.11-rc2-00144-g922adaa-dirty (Oct 28 2016 - 18:55:30)
Trying to boot from MMC1

U-Boot 2016.11-rc2-00144-g922adaa-dirty (Oct 28 2016 - 18:55:30 +0530)

CPU:   Freescale i.MX6UL rev1.1 528 MHz (running at 396 MHz)
CPU:   Industrial temperature grade (-40C to 105C) at 43C
Reset cause: POR
Model: Engicam GEAM6UL
DRAM:  128 MiB
MMC:   FSL_SDHC: 0
*** Warning - bad CRC, using default environment

In:    serial
Out:   serial
Err:   serial
Net:   CPU Net Initialization Failed
No ethernet found.
Hit any key to stop autoboot:  0
geam6ul>

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
7 years agoarm: dts: Add devicetree for i.MX6UL
Jagan Teki [Tue, 13 Dec 2016 16:56:51 +0000 (17:56 +0100)]
arm: dts: Add devicetree for i.MX6UL

Add i.MX6UL dtsi support from Linux.

Here is the last commit:
"ARM: dts: add gpio-ranges property to iMX GPIO controllers"
(sha1: bb728d662bed0fe91b152550e640cb3f6caa972c)

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
7 years agoimx6: icorem6: Add I2C support
Jagan Teki [Mon, 5 Dec 2016 23:01:00 +0000 (00:01 +0100)]
imx6: icorem6: Add I2C support

Add I2C support for Engicam i.CoreM6 qdl board.

icorem6qdl> i2c bus
Bus 0:  i2c@021a0000
Bus 1:  i2c@021a4000
Bus 2:  i2c@021a8000
icorem6qdl> i2c dev 2
Setting bus to 2
icorem6qdl> i2c speed 100000
Setting bus speed to 100000 Hz
icorem6qdl> i2c probe
Valid chip addresses: 2C
icorem6qdl> i2c md 2C 0xff
00ff: 00 00 00 00 0f f0 01 64 ff ff 00 00 00 00 00 00    .......d........

Cc: Stefano Babic <sbabic@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Heiko Schocher <hs@denx.de>
7 years agoi2c: mxc: Make 'no gpio pinctrl state' print as debug
Jagan Teki [Mon, 5 Dec 2016 23:00:59 +0000 (00:00 +0100)]
i2c: mxc: Make 'no gpio pinctrl state' print as debug

Some I2C bus devicetree nodes, doesn't require to have
gpio pinctrl so replace the dev_info to debug so the
print never comes on the console and for bus that uses
gpio pinctrl anyway have dev_err.

Before:
------
U-Boot> i2c dev 1
Setting bus to 1
i2c bus 1 at 0x21a4000, no gpio pinctrl state.

After:
------
U-Boot> i2c dev 1
Setting bus to 1

Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Heiko Schocher <hs@denx.de>
7 years agoi2c: mxc: Print hex instead of decimal for bus address
Jagan Teki [Mon, 5 Dec 2016 23:00:58 +0000 (00:00 +0100)]
i2c: mxc: Print hex instead of decimal for bus address

Better to print the hex value for bus address instead of
decimal, for more readbility on bus addressing.

Before:
------
U-Boot> i2c dev 1
Setting bus to 1
i2c bus 1 at 35274752, no gpio pinctrl state.

After:
------
U-Boot> i2c dev 1
Setting bus to 1
i2c bus 1 at 0x21a4000, no gpio pinctrl state.

Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Heiko Schocher <hs@denx.de>
7 years agoi2c: Kconfig: Add SYS_I2C_MXC entry
Jagan Teki [Mon, 5 Dec 2016 23:00:57 +0000 (00:00 +0100)]
i2c: Kconfig: Add SYS_I2C_MXC entry

Added kconfig for SYS_I2C_MXC driver.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
7 years agoimx6: icorem6: Add custom splashscreen support
Jagan Teki [Mon, 5 Dec 2016 23:00:56 +0000 (00:00 +0100)]
imx6: icorem6: Add custom splashscreen support

Add custom splashscreen, engicam.bmp support for
Engicam i.CoreM6 qdl board.

Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
7 years agoimx6: icorem6: Add framebuffer support
Jagan Teki [Mon, 5 Dec 2016 23:00:55 +0000 (00:00 +0100)]
imx6: icorem6: Add framebuffer support

Add IPUv3 framebuffer support for Engicam i.CoreM6 qdl board.

Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
7 years agovideo: Kconfig: Add VIDEO_IPV3 entry
Jagan Teki [Mon, 5 Dec 2016 23:00:54 +0000 (00:00 +0100)]
video: Kconfig: Add VIDEO_IPV3 entry

Added kconfig entry for CONFIG_VIDEO_IPV3 driver.

Cc: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
7 years agoicorem6: Use CONFIG_DM_ETH support
Jagan Teki [Mon, 5 Dec 2016 23:00:53 +0000 (00:00 +0100)]
icorem6: Use CONFIG_DM_ETH support

Use CONFIG_DM_ETH and remove board_eth_init code
from board files.

Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
7 years agoARM: dts: imx6qdl-icore: Add FEC support
Jagan Teki [Mon, 5 Dec 2016 23:00:52 +0000 (00:00 +0100)]
ARM: dts: imx6qdl-icore: Add FEC support

Add FEC dts support for Engicam i.CoreM6 dql modules.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
7 years agodm: net: fec: Add .read_rom_hwaddr
Jagan Teki [Mon, 5 Dec 2016 23:00:51 +0000 (00:00 +0100)]
dm: net: fec: Add .read_rom_hwaddr

Add .read_rom_hwaddr on dm eth_ops.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Matteo Lisi <matteo.lisi@engicam.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
7 years agonet: fec_mxc: Driver cleanups
Jagan Teki [Mon, 5 Dec 2016 23:00:50 +0000 (00:00 +0100)]
net: fec_mxc: Driver cleanups

- Remove exctra space
- Add space
- Add tab space
- Fix single line comments quotes
- Fix 'CHECK: Avoid CamelCase'
- Fix 'CHECK: Alignment should match open parenthesis'
- Fix 'WARNING: line over 80 characters'
- Re-arrage header include files

Cc: Simon Glass <sjg@chromium.org>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
7 years agonet: fec_mxc: Convert into driver model
Jagan Teki [Mon, 5 Dec 2016 23:00:49 +0000 (00:00 +0100)]
net: fec_mxc: Convert into driver model

This patch add driver model support for fec_mxc driver.

Cc: Simon Glass <sjg@chromium.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
7 years agonet: fec_mxc: Remove unneeded eth_device arg from fec_get_hwaddr
Jagan Teki [Mon, 5 Dec 2016 23:00:48 +0000 (00:00 +0100)]
net: fec_mxc: Remove unneeded eth_device arg from fec_get_hwaddr

fec_get_hwaddr never used eth_device argument, hence removed.

Cc: Simon Glass <sjg@chromium.org>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
7 years agoKconfig: Move USE_ARCH_MEMCPY/MEMSET to Kconfig
Fabio Estevam [Thu, 15 Dec 2016 21:30:40 +0000 (19:30 -0200)]
Kconfig: Move USE_ARCH_MEMCPY/MEMSET to Kconfig

Move USE_ARCH_MEMCPY/MEMSET options to Kconfig.

Make it "default y" for the ARMv7 architecture and make it
depend on !ARM64 && !SPL.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
7 years agoarm: imx: add i.MX53 Beckhoff CX9020 Embedded PC
Patrick Bruenn [Fri, 4 Nov 2016 10:57:02 +0000 (11:57 +0100)]
arm: imx: add i.MX53 Beckhoff CX9020 Embedded PC

Add CX9020 board based on mx53loco.
Add simplified imx53 base device tree from kernel v4.8-rc8, to reuse
serial_mxc with DTE and prepare for device tree migration of other
functions and imx53 devices.

The CX9020 differs from i.MX53 Quick Start Board by:
- use uart2 instead of uart1
- DVI-D connector instead of VGA
- no audio
- CCAT FPGA connected to emi
- enable rtc

Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
7 years agoimx: mx6sllevk: add plugin support
Peng Fan [Sun, 11 Dec 2016 11:24:38 +0000 (19:24 +0800)]
imx: mx6sllevk: add plugin support

Add plugin support for mx6sllevk board.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
7 years agoarm: imx: add i.MX6SLL EVK board support
Peng Fan [Sun, 11 Dec 2016 11:24:37 +0000 (19:24 +0800)]
arm: imx: add i.MX6SLL EVK board support

Add i.MX6SLL EVK board support.
1. Add imx6sll-evk device tree.
2. Enable SDHC/I2C/UART.
3. Enable REGULATOR/PMIC/I2C/GPIO/SDHC/PINCTRL driver.

Boot Log:
U-Boot 2016.11-00127-gc635871-dirty (Nov 24 2016 - 13:28:19 +0800)

CPU:   Freescale i.MX6SLL rev1.0 at 792MHz
CPU:   Commercial temperature grade (0C to 95C)Reset cause: POR
Model: Freescale i.MX6SLL EVK Board
Board: MX6SLL EVK
DRAM:  2 GiB
i2c bus 0 at 35258368, no gpio pinctrl state.
PMIC: PFUZE100! DEV_ID=0x10 REV_ID=0x21
MMC:   FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
In:    serial
Out:   serial
Err:   serial
Net:   CPU Net Initialization Failed
No ethernet found.
Hit any key to stop autoboot:  0

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
7 years agoarm: dts: add i.MX6SLL device tree
Peng Fan [Sun, 11 Dec 2016 11:24:36 +0000 (19:24 +0800)]
arm: dts: add i.MX6SLL device tree

Add i.MX6SLL device tree.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
7 years agopinctrl: imx6: support i.MX6SLL
Peng Fan [Sun, 11 Dec 2016 11:24:35 +0000 (19:24 +0800)]
pinctrl: imx6: support i.MX6SLL

There two iomuxc for i.MX6SLL. One is normal IOMUXC, the other
is for IOMUXC_SNVS.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
7 years agoimx-common: lcdif: update lcdif regs for i.MX6SL/SLL
Peng Fan [Sun, 11 Dec 2016 11:24:34 +0000 (19:24 +0800)]
imx-common: lcdif: update lcdif regs for i.MX6SL/SLL

Update lcdif regs for i.MX6SL/SLL

Signed-off-by: Ye.Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
7 years agoOCOTP: Update OCOTP driver to support i.MX6SLL
Peng Fan [Sun, 11 Dec 2016 11:24:33 +0000 (19:24 +0800)]
OCOTP: Update OCOTP driver to support i.MX6SLL

Add the i.MX6SLL support to OCOTP driver.

The i.MX6SLL reuses the i.MX6ULL fuse, bank 7 and bank8 have 4 words
each, and there is a hole between bank 5 and bank 6.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
7 years agomx6_common: correct loadaddr and text base for i.MX6SLL
Peng Fan [Sun, 11 Dec 2016 11:24:32 +0000 (19:24 +0800)]
mx6_common: correct loadaddr and text base for i.MX6SLL

Correct loadaddr and text base for i.MX6SLL

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
7 years agoimx: mx6sll: add Kconfig entry for i.MX6SLL
Peng Fan [Sun, 11 Dec 2016 11:24:31 +0000 (19:24 +0800)]
imx: mx6sll: add Kconfig entry for i.MX6SLL

add Kconfig entry for i.MX6SLL

Signed-off-by: Peng Fan <peng.fan@nxp.com>
7 years agoimx-common: cache: configure L2 Cache for i.MX6SLL
Peng Fan [Sun, 11 Dec 2016 11:24:30 +0000 (19:24 +0800)]
imx-common: cache: configure L2 Cache for i.MX6SLL

If L2 cache configured as OCRAM, reset it.
Switch to use runtime check.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
7 years agoimx: mx6sll: add clock support
Peng Fan [Sun, 11 Dec 2016 11:24:29 +0000 (19:24 +0800)]
imx: mx6sll: add clock support

Add clock support for i.MX6SLL.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
7 years agoimx: clock: gate clk before changing pix clk mux
Peng Fan [Sun, 11 Dec 2016 11:24:28 +0000 (19:24 +0800)]
imx: clock: gate clk before changing pix clk mux

The LCDIF Pixel clock mux is not glitchless, so need
to gate before changing mux.

Also change enable_lcdif_clock prototype with a new input
parameter to indicate disable or enable.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
7 years agoimx: mx6sl: add lcdif clock support
Peng Fan [Sun, 11 Dec 2016 11:24:27 +0000 (19:24 +0800)]
imx: mx6sl: add lcdif clock support

Add lcdif clock support for i.MX6SL.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
7 years agoimx: mx6: lcdif: gate clock before changing mux
Peng Fan [Sun, 11 Dec 2016 11:24:26 +0000 (19:24 +0800)]
imx: mx6: lcdif: gate clock before changing mux

The mux for the lcd clock is not glitchless,
so need to first gate the clock before changing the mux.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
7 years agoimx: mx6: fix mmdc ch0 clk for 6SL
Peng Fan [Sun, 11 Dec 2016 11:24:25 +0000 (19:24 +0800)]
imx: mx6: fix mmdc ch0 clk for 6SL

>From RM, per_periph2_clk_sel option3 is:
"derive clock from 198MHz clock (divided 392MHz PLL2 PFD)."

So fix it.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
7 years agoimx: mx6sll: add iomux settings
Peng Fan [Sun, 11 Dec 2016 11:24:24 +0000 (19:24 +0800)]
imx: mx6sll: add iomux settings

Add iomux settings for i.MX6 SLL

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye.Li <ye.li@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
7 years agoimx-common: timer: add i.MX6SLL support
Peng Fan [Sun, 11 Dec 2016 11:24:23 +0000 (19:24 +0800)]
imx-common: timer: add i.MX6SLL support

Add i.MX6 SLL GPT timer support.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
7 years agoimx: mx6sll: update register address
Peng Fan [Sun, 11 Dec 2016 11:24:22 +0000 (19:24 +0800)]
imx: mx6sll: update register address

Update register address for i.MX6 SLL

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
7 years agoimx: mx6sll: add pinmux header files
Peng Fan [Sun, 11 Dec 2016 11:24:21 +0000 (19:24 +0800)]
imx: mx6sll: add pinmux header files

Add i.MX6SLL pinmux header files

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
7 years agoimx: add i.MX 6SLL CPU type
Peng Fan [Sun, 11 Dec 2016 11:24:20 +0000 (19:24 +0800)]
imx: add i.MX 6SLL CPU type

Add i.MX6SLL cpu type.
MXC_CPU_MX6D is not a real value in chip, so change it to 0x6A.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
7 years agoconfigs: colibri_vf: Add fdt_fixup environment variable
Sanchayan Maity [Fri, 2 Dec 2016 08:58:27 +0000 (14:28 +0530)]
configs: colibri_vf: Add fdt_fixup environment variable

u-boot allows modifying a device tree after it is loaded into
memory. Add fdt_fixup hook in u-boot environment which can
facilitate such modifications.

Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
7 years agoboard/liteboard: Add support for liteBoard
Marcin Niestroj [Wed, 7 Dec 2016 15:46:33 +0000 (16:46 +0100)]
board/liteboard: Add support for liteBoard

liteBoard is a development board which uses liteSOM as its base.

Hardware specification:
 * liteSOM (i.MX6UL, DRAM, eMMC)
 * Ethernet PHY (id 0)
 * USB host (usb_otg1)
 * MicroSD slot (uSDHC1)

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
7 years agoARM: imx6ul: Add support for liteSOM
Marcin Niestroj [Wed, 7 Dec 2016 15:46:32 +0000 (16:46 +0100)]
ARM: imx6ul: Add support for liteSOM

liteSOM is a System On Module (http://grinn-global.com/litesom/). It
can't exists on its own, but will be used as part of other boards.

Hardware specification:
 * NXP i.MX6UL processor
 * 256M or 512M DDR3 memory
 * optional eMMC (uSDHC2)

Here we treat SOM similar to SOC, so we place it inside arch/arm/mach-*
directory and make it possible to reuse initialization code (i.e. DDR,
eMMC init) for all boards that use it.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
7 years agoudoo_neo: Add Ethernet support
Breno Lima [Tue, 6 Dec 2016 17:38:26 +0000 (15:38 -0200)]
udoo_neo: Add Ethernet support

UDOO Neo boards has one FEC port connected to KSZ8091, add support for it.

Tested on a UDOO Neo Full with "dhcp zImage" command.

Signed-off-by: Breno Lima <breno.lima@nxp.com>
7 years agoudoo_neo: Add PFUZE300 PMIC support
Breno Lima [Tue, 6 Dec 2016 17:38:25 +0000 (15:38 -0200)]
udoo_neo: Add PFUZE300 PMIC support

UDOO Neo boards has a PFUZE300 connected to I2C1 bus.

Tested on a UDOO Neo Full with "pmic PFUZE3000 dump" command.

Signed-off-by: Breno Lima <breno.lima@nxp.com>
7 years agopower: pmic: Add Voltage configuration macro
Breno Lima [Tue, 6 Dec 2016 17:38:24 +0000 (15:38 -0200)]
power: pmic: Add Voltage configuration macro

Add pfuze3000 voltage configuration macro for SW1AB, SW3 and VLDO1/2 according
to tables 53, 57 and 62 on PF3000 datasheet.

Signed-off-by: Breno Lima <breno.lima@nxp.com>
7 years agoudoo_neo: Add thermal support
Breno Lima [Thu, 1 Dec 2016 18:37:41 +0000 (16:37 -0200)]
udoo_neo: Add thermal support

Add thermal support on the Kconfig file.

Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
7 years agoudoo_neo: Remove console option
Breno Lima [Thu, 1 Dec 2016 18:37:40 +0000 (16:37 -0200)]
udoo_neo: Remove console option

It's not necessary to define the console option as we use the distro config.

Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
7 years agoudoo_neo: Remove mmcautodetect option
Breno Lima [Thu, 1 Dec 2016 18:37:39 +0000 (16:37 -0200)]
udoo_neo: Remove mmcautodetect option

It's not necessary to define the mmcautodetect as it is not used anywhere.

Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
7 years agoudoo_neo: Staticize board_string()
Breno Lima [Thu, 1 Dec 2016 18:37:38 +0000 (16:37 -0200)]
udoo_neo: Staticize board_string()

Change board_string() function to static because it's being used locally.

Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
7 years agoudoo_neo: Move MX6SX configuration to Kconfig
Breno Lima [Thu, 1 Dec 2016 18:37:37 +0000 (16:37 -0200)]
udoo_neo: Move MX6SX configuration to Kconfig

It's not necessary to define the processor in the defconfig file.

The preferred method to select the SoC is via Kconfig file.

Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
7 years agoudoo_neo: Remove USDHC3 support
Breno Lima [Thu, 1 Dec 2016 18:37:36 +0000 (16:37 -0200)]
udoo_neo: Remove USDHC3 support

It's not necessary to support USDHC3 in U-Boot as it's being used for
the WLAN.

Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
7 years agoarm: imx: initial support for colibri imx6
Max Krummenacher [Wed, 30 Nov 2016 18:43:09 +0000 (19:43 +0100)]
arm: imx: initial support for colibri imx6

This adds board support for the Toradex module family Colibri iMX6.
The familiy consists of a module with i.MX6 DualLite, i.MX6 Solo, both
with a version for commercial and industrial temperature range.

Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
7 years agoarm: imx: initial support for apalis imx6
Max Krummenacher [Wed, 30 Nov 2016 18:43:08 +0000 (19:43 +0100)]
arm: imx: initial support for apalis imx6

This adds board support for the Toradex module family Apalis iMX6.
The familiy consists of a module with i.MX6 Dual, i.MX6 Quad with
commercial and industrial temperature range.

Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
7 years agoARM: dts: vf: Fix warning about missing reg property
Stefan Agner [Wed, 30 Nov 2016 21:41:57 +0000 (13:41 -0800)]
ARM: dts: vf: Fix warning about missing reg property

Add proper reg values for the two AIPS bus nodes. This avoids this
two warnings:
Node /soc/aips-bus@40000000 has a unit name, but no reg property
Node /soc/aips-bus@40080000 has a unit name, but no reg property

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
7 years agocolibri_vf: use same NAND clock as Linux uses
Stefan Agner [Wed, 30 Nov 2016 21:41:56 +0000 (13:41 -0800)]
colibri_vf: use same NAND clock as Linux uses

Currently a divider of 6 has been used, leading to following NAND
Flash Controller (NFC) clocks:
VF61: 27.7 MHz (166.7MHz bus clock)
VF50: 22 MHz (132MHz bus clock)

The NAND Flash Memory used on VF50 allows to use clock speed of
up to 33MHz, while the Flash Memory of VF61 allows 50MHz. We can
use the same divider of 4 on both modules to configure the maximal
possible clock speeds:
VF61: 41.7 MHz
VF50: 33 MHz

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
7 years agocolibri_vf: cleanup USB clock initialization
Stefan Agner [Wed, 30 Nov 2016 21:41:55 +0000 (13:41 -0800)]
colibri_vf: cleanup USB clock initialization

Use the same preprocessor define to enable clocks as we use to
enable the driver. Make sure that the necessary PLL's are on
(they get enabled by boot ROM by default, so this is more for
completness).

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
7 years agocolibri_vf: use device-tree for MTD partitions
Stefan Agner [Wed, 30 Nov 2016 21:41:54 +0000 (13:41 -0800)]
colibri_vf: use device-tree for MTD partitions

Use device-tree fixup to communicate the MTD partitions to the
kernel. U-Boot's mtdparts environment variable will be used as
partition source for the device-tree based partition table too.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
7 years agotoradex: allow custom fdt board setup in board file
Stefan Agner [Wed, 30 Nov 2016 21:41:53 +0000 (13:41 -0800)]
toradex: allow custom fdt board setup in board file

The config block support currently uses the ft_board_setup function
to patch the device tree with config block information. However, this
does not allow to patch the device tree with board specific information.
Rename the common setup function to ft_common_board_setup and use the
call it from the board files directly.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
7 years agotoradex: fix USB Download gadget fixup callback
Stefan Agner [Wed, 30 Nov 2016 21:41:52 +0000 (13:41 -0800)]
toradex: fix USB Download gadget fixup callback

Use the proper config option to guard the USB Download Function
fixup callback.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
7 years agoMerge branch 'master' of git://git.denx.de/u-boot
Stefano Babic [Fri, 16 Dec 2016 08:53:52 +0000 (09:53 +0100)]
Merge branch 'master' of git://git.denx.de/u-boot

7 years agoARMv8: LS1043A: Enable LS1043A default PSCI support
macro.wave.z@gmail.com [Thu, 8 Dec 2016 03:58:26 +0000 (11:58 +0800)]
ARMv8: LS1043A: Enable LS1043A default PSCI support

A most basic PSCI implementation with only one psci_version is added for
LS1043A, this can verify the generic PSCI framework, and more platform specific
implementation will be added later.

Signed-off-by: Hongbo Zhang <hongbo.zhang@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoARMv8: Setup PSCI memory and device tree
macro.wave.z@gmail.com [Thu, 8 Dec 2016 03:58:25 +0000 (11:58 +0800)]
ARMv8: Setup PSCI memory and device tree

Newly add ARMv8 PSCI needs to be initialized, be copied or reserved in right
place, this patch does all the setup steps.

Signed-off-by: Hongbo Zhang <hongbo.zhang@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoARMv8: Add basic PSCI framework
macro.wave.z@gmail.com [Thu, 8 Dec 2016 03:58:24 +0000 (11:58 +0800)]
ARMv8: Add basic PSCI framework

This patch introduces a generic ARMv8 PSCI framework, with all functions
returning a dummy ARM_PSCI_RET_NI (Not Implemented), then it is up to each
platform to implement their own functions based on this framework.

Signed-off-by: Hongbo Zhang <hongbo.zhang@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoARMv8: Enable SMC instruction
macro.wave.z@gmail.com [Thu, 8 Dec 2016 03:58:23 +0000 (11:58 +0800)]
ARMv8: Enable SMC instruction

PSCI implementation needs the SMC instruction to be enabled.

Signed-off-by: Hongbo Zhang <hongbo.zhang@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoARMv8: Add secure sections for PSCI text and data
macro.wave.z@gmail.com [Thu, 8 Dec 2016 03:58:22 +0000 (11:58 +0800)]
ARMv8: Add secure sections for PSCI text and data

This patch adds secure_text, secure_data and secure_stack sections for ARMv8 to
hold PSCI text and data, and it is based on the legacy implementation of ARMv7.

ARMV8_SECURE_BASE defines the address for PSCI secure sections, ARMV8_PSCI and
ARMV8_PSCI_NR_CPUS are firstly used in this patch, so they are introduce here
in Kconfig too.

Signed-off-by: Hongbo Zhang <hongbo.zhang@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoARMv8: LS1043A: change macro CONFIG_ARMV8_PSCI definition
macro.wave.z@gmail.com [Thu, 8 Dec 2016 03:58:21 +0000 (11:58 +0800)]
ARMv8: LS1043A: change macro CONFIG_ARMV8_PSCI definition

NXP/Freescale uses macro CONFIG_ARMV8_PSCI to enable their private PSCI
implementation in PPA firmware, but this macro naming too generic, so this
patch replaces it with a specic one CONFIG_FSL_PPA_ARMV8_PSCI.
And this macro CONFIG_ARMV8_PSCI will be used for a generic PSCI for ARMv8
which will be added in following patchs.

Signed-off-by: Hongbo Zhang <hongbo.zhang@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agodriver: fsl-mc: qbman: Add QBMAN 4.1 support
Priyanka Jain [Wed, 7 Dec 2016 06:34:05 +0000 (12:04 +0530)]
driver: fsl-mc: qbman: Add QBMAN 4.1 support

LS2080A SoC family has QBMAN ver 4.0 whereas newer
SoCs like LS2088A, LS1088A has QBMAN ver 4.1
QBMAN ver 4.0 and ver 4.1 supports dqrr size as 4 and 8 respectively.

Add support of
to check QBMAN version based on SoC SVR
update dqrr_size accordingly
update code to support larger dqrr_size

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: ls1043a: dts: Fix the ranges table of IFC node
Hou Zhiqiang [Tue, 6 Dec 2016 07:27:49 +0000 (15:27 +0800)]
armv8: ls1043a: dts: Fix the ranges table of IFC node

Corrected the ranges table of the IFC node.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoarmv8: ls1043ardb: dts: Fix the unit-address of some I2C device nodes
Hou Zhiqiang [Tue, 6 Dec 2016 07:27:48 +0000 (15:27 +0800)]
armv8: ls1043ardb: dts: Fix the unit-address of some I2C device nodes

The unit-address should be the same as the I2C address of the device.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agofsl/board/ddr: optimize board-specific cpo for erratum A-009942
Shengzhou Liu [Tue, 15 Nov 2016 09:15:21 +0000 (17:15 +0800)]
fsl/board/ddr: optimize board-specific cpo for erratum A-009942

Optimize board-specific cpo for erratum A-009942 on b4860qds,
ls1043aqds, ls1043ardb, ls1046aqds, ls1046ardb, ls2080ardb,
t102xqds, t102xrdb, t1040qds, t104xrdb, t208xqds, t208xrdb,
t4qds, t4rdb boards.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agofsl/ddr: Enable erratum-a009942 workaround for B/T-series
Shengzhou Liu [Tue, 15 Nov 2016 09:15:20 +0000 (17:15 +0800)]
fsl/ddr: Enable erratum-a009942 workaround for B/T-series

Enable ERRATUM_A009942 workaround for B-series and T-series platforms.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
7 years agoRevert "sf: Fix quad bit set for micron devices"
Cyrille Pitchen [Thu, 15 Dec 2016 16:45:39 +0000 (17:45 +0100)]
Revert "sf: Fix quad bit set for micron devices"

This reverts commit c56ae7519f141523ba1248b22b5b5169b21772fe.

Once the 'Quad Enable' bit is cleared in their Enhanced Volatile
Configuration Register (EVCR), Micron memories expect ALL commands to use
the SPI 4-4-4 protocol. Commands using SPI 1-y-z protocols are no longer
accepted.

Within the reverted commit, the write_evcr() function is implemented using
the spi_flash_write_common(), which is a shortcut for the
[ spi_flash_cmd_write_enable(), spi_flash_cmd_write(),
spi_flash_cmd_wait_ready() ] sequence.

Since the internal state of the Micron memory has been changed when the
spi_flash_cmd_write() function completes, the later call of the
spi_flash_cmd_wait_ready() function fails.

Indeed the SPI controller driver is not aware of the SPI protocol switch.

Further patches will fix the support of Micron QSPI memories.

Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
[Rebase on master, use JEDEC_MFR(info) in place of idcode0]
Signed-off-by: Jagan Teki <jagan@openedev.com>
7 years agosf: Do not force the DT memory map size to exactly match the device
Phil Edworthy [Fri, 9 Dec 2016 15:03:39 +0000 (15:03 +0000)]
sf: Do not force the DT memory map size to exactly match the device

As long as the memory mapped size specifeid in the DT is the same or
bigger than the device size, it will work. So do not force the sizes
to be identical.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agomtd: spi: don't return -1 when scan succeed
Fabien Parent [Mon, 5 Dec 2016 18:09:10 +0000 (19:09 +0100)]
mtd: spi: don't return -1 when scan succeed

In spi_flash_scan, 'ret' is initialled to -1, but 'ret' is not always
used to store a return value, in that case, even when the function
succeed, an error (-1) will be returned.
Lets just return 0 if we hit the end of the function.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agospi: cadence_qspi: Move DT prop code to match layout
Phil Edworthy [Tue, 29 Nov 2016 12:58:34 +0000 (12:58 +0000)]
spi: cadence_qspi: Move DT prop code to match layout

Move the code to read the "sram-size" property into the other code
that reads properties from the node, rather than the SF subnode.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agospi: cadence_qspi: Fix CS timings
Phil Edworthy [Tue, 29 Nov 2016 12:58:33 +0000 (12:58 +0000)]
spi: cadence_qspi: Fix CS timings

The Cadence QSPI controller has specified overheads for the various CS
times that are in addition to those programmed in to the Device Delay
register. The overheads are different for the delays.

In addition, the existing code does not handle the case when the delay
is less than a SCLK period.

This change accurately calculates the additional delays in Ref clocks.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agospi: cadence_qspi: Remove returns from end of void functions
Phil Edworthy [Tue, 29 Nov 2016 12:58:32 +0000 (12:58 +0000)]
spi: cadence_qspi: Remove returns from end of void functions

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agospi: cadence_qspi: Use spi mode at the point it is needed
Phil Edworthy [Tue, 29 Nov 2016 12:58:31 +0000 (12:58 +0000)]
spi: cadence_qspi: Use spi mode at the point it is needed

Instead of extracting mode settings and passing them as separate
args to another function, just pass the SPI mode as an arg.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agospi: cadence_qspi: Clean up the #define names
Phil Edworthy [Tue, 29 Nov 2016 12:58:30 +0000 (12:58 +0000)]
spi: cadence_qspi: Clean up the #define names

A lot of the #defines are for single bits in a register, where the
name has _MASK on the end. Since this can be used for both a mask
and the value, remove _MASK from them.

Whilst doing so, also remove the unnecessary brackets around the
constants.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agospi: cadence_qspi: Use #define for bits instead of bit shifts
Phil Edworthy [Tue, 29 Nov 2016 12:58:29 +0000 (12:58 +0000)]
spi: cadence_qspi: Use #define for bits instead of bit shifts

Most of the code already uses #defines for the bit value, rather
than the shift required to get the value. This changes the remaining
code over.

Whislt at it, fix the names of the "Rd Data Capture" register defs.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agospi: cadence_qspi: Better debug information on the SPI clock rate
Phil Edworthy [Tue, 29 Nov 2016 12:58:28 +0000 (12:58 +0000)]
spi: cadence_qspi: Better debug information on the SPI clock rate

Show what the output clock rate actually is.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agospi: cadence_qspi: Fix baud rate calculation
Phil Edworthy [Tue, 29 Nov 2016 12:58:27 +0000 (12:58 +0000)]
spi: cadence_qspi: Fix baud rate calculation

With the existing code, when the requested SPI clock rate is near
to the lowest that can be achieved by the hardware (max divider
of the ref clock is 32), the generated clock rate is wrong.
For example, with a 50MHz ref clock, when asked for anything less
than a 1.5MHz SPI clock, the code sets up the divider to generate
25MHz.

This change fixes the calculation.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agospi: cadence_qspi: Fix clearing of pol/pha bits
Phil Edworthy [Tue, 29 Nov 2016 12:58:26 +0000 (12:58 +0000)]
spi: cadence_qspi: Fix clearing of pol/pha bits

Or'ing together bit positions is clearly wrong.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
7 years agospi: Add error checking for invalid bus widths
Simon Glass [Wed, 30 Nov 2016 03:00:13 +0000 (20:00 -0700)]
spi: Add error checking for invalid bus widths

At present an invalid bus width prints a message but does not return an
error. This is the opposite of the correct behaviour. Adjust it to avoid
code bloat in the common case, and avoid hard-to-debug failure in the
uncommon case.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>