Rick Chen [Tue, 29 May 2018 03:05:54 +0000 (11:05 +0800)]
riscv: dts: Support cfi flash
Add nor node for cfi-flash driver and smc node
for smc(aftsmc020) controller.
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
Rick Chen [Tue, 29 May 2018 03:04:23 +0000 (11:04 +0800)]
configs: ax25-ae350: Support cfi flash
Enable cfi flash driver and setup flash
parameters to support parallel nor flash
which type is JS28F00A-M29EWH.
Verification:
Size detection, data read, erase and write are all ok.
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
Rick Chen [Tue, 29 May 2018 03:00:28 +0000 (11:00 +0800)]
mmc: ftsdc010_mci: Sync compatible with DT mmc node
The compatible string of ftsdc010_mci.c is different from
the mmc driver in Linux Kernel. Modify it for consistency.
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
Rick Chen [Tue, 29 May 2018 02:53:41 +0000 (10:53 +0800)]
riscv: dts: Sync DT with Linux Kernel
Use same dts to boot U-Boot and RISC-V
Linux Kernel v4.16-rc2 in ax25-ae350 platform.
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
Rick Chen [Tue, 29 May 2018 02:42:19 +0000 (10:42 +0800)]
net: ftmac100: Fix compiler warning
Fix warnings as below when compile in 64-bit.
warning: cast from pointer to integer
of different size [-Wpointer-to-int-cast]
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
Rick Chen [Tue, 29 May 2018 02:40:03 +0000 (10:40 +0800)]
spi: atcspi200: Fix compiler warning
Fix warning as below when compile in 64-bit.
warning: format '%u' expects argument of type
'unsigned int', but argument 6 has type 'size_t
{aka long unsigned int}
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
Rick Chen [Tue, 29 May 2018 02:38:16 +0000 (10:38 +0800)]
configs: ax25-ae350: Set 64-bit as default configuration
Set 64-bit as default configuration for ax25-ae350.
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
Rick Chen [Tue, 29 May 2018 02:29:20 +0000 (10:29 +0800)]
doc: ae250: Rename as ae350
Rename
nx25 as ax25
ae250 as ae350
nx25-ae250 as ax25-ae350
including filename, variable, string and definition.
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
Rick Chen [Tue, 29 May 2018 02:20:39 +0000 (10:20 +0800)]
configs: nx25-ae250:Rename as ax25-ae350
Rename
nx25 as ax25
ae250 as ae350
nx25-ae250 as ax25-ae350
including filename, variable, string and definition.
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
Rick Chen [Tue, 29 May 2018 02:06:42 +0000 (10:06 +0800)]
board: nx25-ae250: Rename as ax25-ae350
Rename
nx25 as ax25
ae250 as ae350
nx25-ae250 as ax25-ae350
including filename, variable, string and definition.
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
Rick Chen [Tue, 29 May 2018 01:54:40 +0000 (09:54 +0800)]
riscv: cpu: nx25: Rename as ax25
Andes has rearranged the product combinations.
nx25 and ax25 both are RISC-V architecture cpu core.
But ax25 has MMU unit inside, and nx25 is not.
Cpu nx25 and platform ae250 are arranged in pairs.
Cpu ax25 and platform ae350 are arranged in pairs.
This patch will rename
nx25 as ax25
ae250 as ae350
nx25-ae250 as ax25-ae350
including filename, variable, string and definition.
Then u-boot can boot linux kernel in ae350
platform reasonably.
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
Rick Chen [Tue, 29 May 2018 06:10:06 +0000 (14:10 +0800)]
SPDX: Convert single license tags to Linux Kernel style
Fix license tags problem after apply patchs about
riscv: Enable efi_loader support.
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Cc: Greentime Hu <green.hu@gmail.com>
Rick Chen [Mon, 28 May 2018 11:06:37 +0000 (19:06 +0800)]
efi_loader: Enable RISC-V support
We have almost all pieces needed to support RISC-V UEFI binaries in place already.
The only missing piece are ELF relocations for runtime code and
data.
This patch adds respective support in the linker script and the runtime
relocation code. It also allows users to enable the EFI_LOADER configuration
switch on RISC-V platforms.
Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Mon, 23 Apr 2018 05:59:49 +0000 (07:59 +0200)]
riscv: nx25: Enable distro boot
Distro boot allows for a common boot path on systems that allow distributions
to easily boot from a default configuration.
This patch enables distro boot for the nx25-ae250. Hopefully this can serve
as a good example for new boards, so they enable it as well.
Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Mon, 23 Apr 2018 05:59:48 +0000 (07:59 +0200)]
distro: Extend with RISC-V defines
While we don't have UEFI naming conventions for RISC-V file paths yet,
we need to search for something. So let's copy the removable file paths
from the RISC-V edk2 port.
Also add the official VCI strings that contain the standardized RISC-V
architecture ID fields.
Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Mon, 23 Apr 2018 05:59:47 +0000 (07:59 +0200)]
efi_loader: Use EFI_CACHELINE_SIZE in the image loader too
We were using our EFI_CACHELINE_SIZE define only in the runtime service
code, but left the image loader to use plain CONFIG_SYS_CACHELINE_SIZE.
This patch moves EFI_CACHELINE_SIZE into efi_loader.h and converts
the image loader to use it.
Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Mon, 23 Apr 2018 05:59:46 +0000 (07:59 +0200)]
riscv: Add board_quiesce_devices stub
This patch adds an empty stub for board_quiesce_devices() which allows boards
to quiesce their devices before we boot into an OS in a platform agnostic way.
Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Mon, 23 Apr 2018 05:59:45 +0000 (07:59 +0200)]
riscv: Add EFI application infrastructure
The hello world binary and a few selftests require to build EFI target
binaries, not just the EFI host environment.
This patch adds all required files to generate an EFI binary for
RISC-V.
Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Mon, 23 Apr 2018 05:59:44 +0000 (07:59 +0200)]
riscv: Enable function sections
The linker can remove sections that are never addressed, so it makes a lot
of sense to declare every function as an individual section.
This reduces the output U-Boot code size by ~30kb for me.
Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Mon, 23 Apr 2018 05:59:43 +0000 (07:59 +0200)]
riscv: Add setjmp/longjmp code
To support efi_loader we need to have platform support for setjmp/longjmp.
Add it here.
Signed-off-by: Alexander Graf <agraf@suse.de>
Kelvin Cheung [Sat, 19 May 2018 10:21:37 +0000 (18:21 +0800)]
add FIT data-position & data-offset property support
Add FIT data-position & data-offset property support for bootm,
which were already supported in SPL.
Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com>
Ley Foon Tan [Fri, 18 May 2018 10:03:12 +0000 (18:03 +0800)]
malloc: Use malloc simple before malloc is fully initialized in memalign()
Follow implementation in mALLOc(). Check GD_FLG_FULL_MALLOC_INIT flag and use
malloc_simple if GD_FLG_FULL_MALLOC_INIT is unset. Adjust the malloc bytes
to align with the requested alignment.
The original memalign() function will access mchunkptr struct to adjust the
alignment if there is misalignment happen, but mchunkptr struct is not being
initialized before full malloc is initialized. This cause the system crash.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
Patrice Chotard [Thu, 17 May 2018 14:53:57 +0000 (16:53 +0200)]
mmc: stm32_sdmmc2: Fix stm32_sdmmc2_start_cmd()
SDMMC_CMD_CPSMEN bit is wrongly check and set in
SDMMC_ARG register instead of SDMMC_CMD register.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Thu, 17 May 2018 13:24:07 +0000 (15:24 +0200)]
stm32mp1: use OTP to configure MAC address and serial number
Use OTP57 and 58 for MAC address
- OTP57 = MAC address bits [31:0]
- OTP58 = MAC address bit [47:32] stored in OTP LSB's
Use manufacture information in OTP13 to OTP15 to build unique
chip id saved in env variable "serial#"
(used for USB device enumeration)
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Thu, 17 May 2018 13:24:06 +0000 (15:24 +0200)]
stm32mp1: add FUSE command support
Add support of fuse command (read/write/program/sense)
on bank 0 to access to BSEC SAFMEM (4096 OTP bits).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Thu, 17 May 2018 13:24:05 +0000 (15:24 +0200)]
stm32mp1: add bsec driver
Add a MISC driver with read and write access to BSEC IP
(Boot and Security and OTP control)
- offset 0: shadowed values
- offset 0x80000000: OTP fuse box values (SAFMEM)
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Thu, 17 May 2018 13:24:04 +0000 (15:24 +0200)]
stm32mp1: remove the second TAMP_BOOT_CONTEXT update
The register TAMP_BOOT_CONTEXT is already updated in
get_bootmode() in cpu.c and no need to be done
twice.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Thu, 17 May 2018 12:50:46 +0000 (14:50 +0200)]
stm32mp1: Allow to activate CONFIG_DEBUG_UART
Add the needed information to enable the debug uart
to have printf before the serial driver probe
(so before probe for clock, pincontrol and reset drivers)
To enable the debug on uart 4 (default console):
+ CONFIG_DEBUG_UART=y
+ CONFIG_DEBUG_UART_STM32=y
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Thu, 17 May 2018 12:50:45 +0000 (14:50 +0200)]
serial: stm32: Add setparity support
Add possibility to update the serial parity used.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrick Delaunay [Thu, 17 May 2018 12:50:44 +0000 (14:50 +0200)]
dm: serial: Add setparity
Implements serial setparity ops to allow uart parity change.
It allows to select ODD, EVEN or NONE parity.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Patrice Chotard [Thu, 17 May 2018 12:50:43 +0000 (14:50 +0200)]
serial: stm32: Fix bits defines name
Rename USART_ISR_FLAG_xxx bits to USART_ISR_xxx bits and
USART_ICR_OREF to USART_ICR_ORECF in order to match datasheets.
Sort defines by descendant order.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrick Delaunay [Thu, 17 May 2018 12:50:42 +0000 (14:50 +0200)]
serial: stm32: Add debug uart support
Add support for early debug printf, before the availability of
driver model and device tree support.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Radoslaw Pietrzyk [Wed, 16 May 2018 15:27:11 +0000 (17:27 +0200)]
ram: stm32_sdram: Adds stm32f429-disco fixes for HardFault at booting
- adds reading FMC swap setting from DTB to SDRAM driver
- sets FMC swap for stm32f429-disco board
- changes ram start address to 0x90000000
Signed-off-by: Radoslaw Pietrzyk <radoslaw.pietrzyk@gmail.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Ramon Fried [Wed, 16 May 2018 09:13:42 +0000 (12:13 +0300)]
serial: serial_msm: added pinmux & config
Serial port configuration was missing from previous implementation.
It only worked because it was preconfigured by LK.
This patch configures the uart for 115200 8N1.
It also configures the pin mux for uart pins using DT bindings.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Ramon Fried [Wed, 16 May 2018 09:13:41 +0000 (12:13 +0300)]
db410: added pinctrl node and serial bindings
Added TLMM pinctrl node for pin muxing & config.
Additionally, added a serial node for uart.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Ramon Fried [Wed, 16 May 2018 09:13:40 +0000 (12:13 +0300)]
mach-snapdragon: Introduce pinctrl driver
This patch adds pinmux and pinctrl driver for TLMM
subsystem in snapdragon chipsets.
Currently, supporting only 8016, but implementation is
generic and 8096 can be added easily.
Driver is using the generic dt-bindings and doesn't
introduce any new bindings (yet).
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Ramon Fried [Wed, 16 May 2018 09:13:39 +0000 (12:13 +0300)]
mach-snapdragon: Fix UART clock flow
UART clock enabling flow was wrong.
Changed the flow according to downstream implementation in LK.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Ramon Fried [Wed, 16 May 2018 09:13:38 +0000 (12:13 +0300)]
serial: serial_msm: initialize uart only before relocation
The uart is already initialized prior to relocation,
reinitialization after relocation is unnecessary.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Ramon Fried [Wed, 16 May 2018 09:13:37 +0000 (12:13 +0300)]
serial: serial_msm: fail probe if settings clocks fails
Failure to set the clocks will causes data abort exception when
trying to write to AHB uart registers.
This patch ensures that we don't touch these registers if clock
setting failed.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Ramon Fried [Wed, 16 May 2018 09:13:36 +0000 (12:13 +0300)]
db820c: set clk node to be probed before relocation
The clock and serial nodes are needed before relocation.
This patch ensures that the msm-serial driver will probe
and provide uart output before relocation.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Chris Packham [Wed, 16 May 2018 08:34:14 +0000 (20:34 +1200)]
Remove CONFIG_MVGBE from config_whitelist.txt
Now that there are more boards defining this it can be removed from the
whitelist.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tuomas Tynkkynen [Mon, 14 May 2018 20:50:05 +0000 (23:50 +0300)]
PCI: Document pciauto_region_allocate()
Add a doc comment for pciauto_region_allocate().
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tuomas Tynkkynen [Mon, 14 May 2018 16:38:13 +0000 (19:38 +0300)]
PCI: autoconfig: Don't allocate 64-bit addresses to 32-bit only resources
Currently, if we happen to allocate an address requiring 64 bits to a
device only supporting 32-bit BARs, the address eventually gets silently
truncated to 32 bits. Avoid this by adding a new flag to
pciauto_region_allocate() to bail out in such situations.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tuomas Tynkkynen [Mon, 14 May 2018 16:38:12 +0000 (19:38 +0300)]
PCI: Add newlines to debug prints in pci_auto_common.c
All of the debug output from this file is squished to one line. Fix
it.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tuomas Tynkkynen [Mon, 14 May 2018 15:47:52 +0000 (18:47 +0300)]
doc: qemu-arm: Drop highmem=off references
Now that U-Boot works fine with highmem enabled, there is no need to
tell users to disable highmem.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tuomas Tynkkynen [Mon, 14 May 2018 15:47:51 +0000 (18:47 +0300)]
ARM: qemu-arm: Bump RAM size in AArch64 MMU table
Now that PCI devices work with highmem-enabled QEMU emulation, bump up
the RAM size in the MMU tables to gain access to the full 255 GB of RAM
potential instead of the puny 3 GB.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tuomas Tynkkynen [Mon, 14 May 2018 15:47:50 +0000 (18:47 +0300)]
PCI: dm: Ignore 64-bit memory regions if CONFIG_SYS_PCI_64BIT not set
Currently, qemu_arm_defconfig and qemu_arm64_defconfig only work with
the 'highmem=off' parameter passed to QEMU's virt machine. The reason is
that when 'highmem' is not disabled, QEMU appends 64-bit a memory
resource to the PCI controller's regions property in DT in addition to
the 32-bit PCI memory window in low memory. And the current DT parsing
code picks the last (thus the 64-bit one) memory resource, whose address
eventually gets silently truncated to 32 bits because
CONFIG_SYS_PCI_64BIT is not set, which obviously causes PCI to break.
Avoid this problem by ignoring memory regions whose addresses are above
the 32-bit boundary when CONFIG_SYS_PCI_64BIT is not set.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Simon Glass <sjg@chromium.org>
Miquel Raynal [Tue, 15 May 2018 09:57:28 +0000 (11:57 +0200)]
configs: add TPMv2.x support in Sandbox
Enable the Sandbox TPMv2 driver in all possible configurations.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Miquel Raynal [Tue, 15 May 2018 09:57:27 +0000 (11:57 +0200)]
sandbox: dts: add Sandbox TPMv2.x node
This node declares the presence of the Sandbox TPMv2.x emulated chip,
available for testing.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Miquel Raynal [Tue, 15 May 2018 09:57:26 +0000 (11:57 +0200)]
doc: device-tree-bindings: add Sandbox TPMv2.0 module info
Add Sandbox TPMv2.0 module bindings.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Miquel Raynal [Tue, 15 May 2018 09:57:25 +0000 (11:57 +0200)]
tpm: add a Sandbox TPMv2.x driver
This driver can emulate all the basic functionalities of a TPMv2.x
chip and should behave like them during regular testing.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Miquel Raynal [Tue, 15 May 2018 09:57:24 +0000 (11:57 +0200)]
test/py: add TPMv2.x test suite
Add tests for the TPMv2.x commands.
These commands may run both on a physical TPM and with the sandbox
driver.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Miquel Raynal [Tue, 15 May 2018 09:57:23 +0000 (11:57 +0200)]
doc: device-tree-bindings: add TIS TPMv2.0 SPI module info
Add TIS TPMv2.0 SPI module bindings.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Miquel Raynal [Wed, 16 May 2018 06:59:16 +0000 (08:59 +0200)]
tpm2: tis_spi: add the possibility to reset the chip with a gpio
On some designs, the reset line could not be connected to the SoC reset
line, in this case, request the GPIO and ensure the chip gets reset.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Miquel Raynal [Tue, 15 May 2018 09:57:21 +0000 (11:57 +0200)]
tpm: add support for TPMv2.x SPI modules
Add the tpm2_tis_spi driver that should support any TPMv2 compliant
(SPI) module.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Miquel Raynal [Tue, 15 May 2018 09:57:20 +0000 (11:57 +0200)]
tpm: add PCR authentication commands support
Add support for the TPM2_PCR_SetAuthPolicy and
TPM2_PCR_SetAuthValue commands.
Change the command file and the help accordingly.
Note: These commands could not be tested because the TPMs available
do not support them, however they could be useful for someone else.
The user is warned by the command help.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Miquel Raynal [Tue, 15 May 2018 09:57:19 +0000 (11:57 +0200)]
tpm: add TPM2_HierarchyChangeAuth command support
Add support for the TPM2_HierarchyChangeAuth command.
Change the command file and the help accordingly.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Miquel Raynal [Tue, 15 May 2018 09:57:18 +0000 (11:57 +0200)]
tpm: add dictionary attack mitigation commands support
Add support for the TPM2_DictionaryAttackParameters and
TPM2_DictionaryAttackLockReset commands.
Change the command file and the help accordingly.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Miquel Raynal [Tue, 15 May 2018 09:57:17 +0000 (11:57 +0200)]
tpm: add TPM2_GetCapability command support
Add support for the TPM2_GetCapability command.
Change the command file and the help accordingly.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Miquel Raynal [Tue, 15 May 2018 09:57:16 +0000 (11:57 +0200)]
tpm: add TPM2_PCR_Read command support
Add support for the TPM2_PCR_Read command.
Change the command file and the help accordingly.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Miquel Raynal [Tue, 15 May 2018 09:57:15 +0000 (11:57 +0200)]
tpm: add TPM2_PCR_Extend command support
Add support for the TPM2_PCR_Extend command.
Change the command file and the help accordingly.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Miquel Raynal [Tue, 15 May 2018 09:57:14 +0000 (11:57 +0200)]
tpm: add TPM2_Clear command support
Add support for the TPM2_Clear command.
Change the command file and the help accordingly.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Miquel Raynal [Tue, 15 May 2018 09:57:13 +0000 (11:57 +0200)]
tpm: add TPM2_SelfTest command support
Add support for the TPM2_Selftest command.
Change the command file and the help accordingly.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Miquel Raynal [Tue, 15 May 2018 09:57:12 +0000 (11:57 +0200)]
tpm: add TPM2_Startup command support
Add support for the TPM2_Startup command.
Change the command file and the help accordingly.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Miquel Raynal [Tue, 15 May 2018 09:57:11 +0000 (11:57 +0200)]
tpm: report driver error code to upper layer
Instead of returning a generic 'library' error, report back the actual
error code so it can be displayed to the user by the regular error path.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Miquel Raynal [Tue, 15 May 2018 09:57:10 +0000 (11:57 +0200)]
tpm: add possible traces to analyze buffers returned by the TPM
When debugging, it is welcome to get more information about what the TPM
returns. Add the possibility to print the packets received to show their
exact content.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Miquel Raynal [Tue, 15 May 2018 09:57:09 +0000 (11:57 +0200)]
tpm: add macros to enhance TPM commands readability
TPM commands are much easier to read/write with these macros that will
transform words or integers into byte strings. This way, there is no
need to call pack_byte_string() while all variable length in a command
are known (and at must 4 bytes, which is a lot of them).
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Miquel Raynal [Tue, 15 May 2018 09:57:08 +0000 (11:57 +0200)]
tpm: prepare support for TPMv2.x commands
Choice between v1 and v2 compliant functions is done with the
configuration.
Create the various files that will receive TPMv2-only code on the same
scheme as for the TPMv1 code.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Miquel Raynal [Tue, 15 May 2018 09:57:07 +0000 (11:57 +0200)]
tpm: add missing parameter in private data structure description
Both parameters 'duration_ms' and 'retry_time_ms' of the tpm_chip_priv
structure are documented is the comment above the declaration but 'buf'
was forgotten. Add the missing description.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Miquel Raynal [Tue, 15 May 2018 09:57:06 +0000 (11:57 +0200)]
tpm: disociate TPMv1.x specific and generic code
There are no changes in this commit but a new organization of the code
as follow.
* cmd/ directory:
> move existing code from cmd/tpm.c in cmd/tpm-common.c
> move specific code in cmd/tpm-v1.c
> create a specific header file with generic definitions for
commands only called cmd/tpm-user-utils.h
* lib/ directory:
> move existing code from lib/tpm.c in lib/tpm-common.c
> move specific code in lib/tpm-v1.c
> create a specific header file with generic definitions for
the library itself called lib/tpm-utils.h
* include/ directory:
> move existing code from include/tpm.h in include/tpm-common.h
> move specific code in include/tpm-v1.h
Code designated as 'common' is compiled if TPM are used. Code designated
as 'specific' is compiled only if the right specification has been
selected.
All files include tpm-common.h.
Files in cmd/ include tpm-user-utils.h.
Files in lib/ include tpm-utils.h.
Depending on the specification, files may include either (not both)
tpm-v1.h or tpm-v2.h.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Fix a few more cases of tpm.h -> tpm-v1.h, some Kconfig logic]
Signed-off-by: Tom Rini <trini@konsulko.com>
Miquel Raynal [Tue, 15 May 2018 09:57:05 +0000 (11:57 +0200)]
tpm: prepare introduction of TPMv2.x support in Kconfig
Because both major revisions are not compatible at all, let's make them
mutually exclusive in Kconfig. This way we will be sure, when using a
command or a library function that it is supported by the right
revision.
Current drivers are currently prefixed by "tpm_", we will prefix TPMv2.x
files by "tpm2_" to make the distinction without moving everything.
The Kconfig menu about TPM drivers is now divided into two sections, one
for each specification. Compliant drivers with one specification will
only show up if this specification _only_ has been selected, otherwise a
comment is displayed.
Once a driver is selected by the user, it selects automatically a
boolean value, that is needed in order to activate the TPM commands.
Selecting the TPM commands will automatically select the right
command/library files.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework deps as TPM_V1 and TPM_V2 depend on TPM,
drop TPM_DRIVER_SELECTED]
Signed-off-by: Tom Rini <trini@konsulko.com>
Miquel Raynal [Tue, 15 May 2018 09:57:04 +0000 (11:57 +0200)]
tpm: add Revision ID field in the chip structure
TPM are shipped with a few read-only register from which we can retrieve
for instance:
- vendor ID
- product ID
- revision ID
Product and vendor ID share the same register and are already referenced
in the tpm_chip structure. Add the revision ID entry which is missing.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Miquel Raynal [Tue, 15 May 2018 09:57:03 +0000 (11:57 +0200)]
tpm: add extra blank lines between declarations and code
Fix following checkpatch.pl issue in TPM-related code:
WARNING: Missing a blank line after declarations
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Miquel Raynal [Tue, 15 May 2018 09:57:02 +0000 (11:57 +0200)]
tpm: fix spelling
Fix following checkpatch.pl issues in TPM-related code:
CHECK: '<x>' may be misspelled - perhaps '<y>'?
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Miquel Raynal [Tue, 15 May 2018 09:57:01 +0000 (11:57 +0200)]
tpm: use the BIT() macro where applicable
Fix following checkpatch.pl issue in TPM-related code:
CHECK: Prefer using the BIT macro
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Miquel Raynal [Tue, 15 May 2018 09:57:00 +0000 (11:57 +0200)]
tpm: align arguments with open parenthesis
Fix following checkpatch.pl issue in TPM-related code:
CHECK: Alignment should match open parenthesis
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Miquel Raynal [Tue, 15 May 2018 09:56:59 +0000 (11:56 +0200)]
tpm: substitute deprecated uint<x>_t types with their u<x> equivalent
Fix following checkpatch.pl issues in TPM-related code:
CHECK: Prefer kernel type 'u8' over 'uint8_t'
CHECK: Prefer kernel type 'u16' over 'uint16_t'
CHECK: Prefer kernel type 'u32' over 'uint32_t'
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Miquel Raynal [Tue, 15 May 2018 09:56:58 +0000 (11:56 +0200)]
tpm: remove extra spaces between a function and its opening bracket
Fix following checkpatch.pl issue in TPM-related code:
WARNING: space prohibited between function name and open
parenthesis '('
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Miquel Raynal [Tue, 15 May 2018 09:56:57 +0000 (11:56 +0200)]
tpm: remove redundant blank line
Fix following checkpatch.pl issue in TPM-related code:
CHECK: Please don't use multiple blank lines
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Thu, 24 May 2018 13:54:25 +0000 (09:54 -0400)]
Merge tag 'arc-uart-updates-for-2018.07-rc1' of git://git.denx.de/u-boot-arc
Add support for DEBUG_UART on ARC devboards
This required us to do 2 things:
1) Insert a call to debug_uart_init() in early boot code
2) Convert serial_arc to Kconfig
Once both items above are done we just patched defconfigs.
Tom Rini [Thu, 24 May 2018 13:54:14 +0000 (09:54 -0400)]
Merge tag 'signed-rpi-next' of git://github.com/agraf/u-boot
Patch queue for rpi - 2018-05-24
Some minor fixes for the Raspberry Pi:
- Fix SD writes on new sdhost controller
- Sanitize default load addresses, allowing for better payload placement
Alexey Brodkin [Mon, 21 May 2018 13:55:20 +0000 (16:55 +0300)]
ARC: Enable debug UART on nSIM boards
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Alexey Brodkin [Mon, 21 May 2018 13:42:07 +0000 (16:42 +0300)]
serial/serial_arc: Implement debug serial
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Alexey Brodkin [Mon, 21 May 2018 13:40:05 +0000 (16:40 +0300)]
serial: Convert ARC_SERIAL to Kconfig
One step closer to completely Kconfig-driven target configuration in
U-Boot :)
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Eugeniy Paltsev [Thu, 3 May 2018 12:01:59 +0000 (15:01 +0300)]
ARC: enable debug uart for HSDK and AXS10x boards
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Eugeniy Paltsev [Thu, 3 May 2018 12:01:58 +0000 (15:01 +0300)]
ARC: init debug uart in early common arc code
The debug UART is intended for use very early in U-Boot to debug
problems before serial drivers are up.
Call debug_uart_init right before board_init_f.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Tuomas Tynkkynen [Fri, 20 Apr 2018 10:03:49 +0000 (13:03 +0300)]
rpi: Change load addresses to make more room for the kernel & DTB
As of Linux 4.16, a multiplatform AArch64 kernel with our distro config
takes 26M. The current space reservation leaves only 17M for the kernel
and if it goes over it, the initrd gets overwritten when loading the
kernel from the filesystem.
A similar problem happens on ARMv7 with the DTBs taken from the
downstream Raspberry Pi foundation kernel. I guess they compile them
with DT overlay support enabled which grows them just enough.
Fix both of these problems by rewriting the memory map, which now allows
kernels to be up to 36M and DTBs up to 1M. Also the comment block was
kind of obsolete ever since the introduction of AArch64 support and the
firmware-loaded DTB doesn't get placed at 0x100 anymore either, so that
is fixed as well.
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Marek Vasut [Sat, 12 May 2018 22:23:17 +0000 (00:23 +0200)]
spl: Add full fitImage support
Add support for loading U-Boot and optionally FDT from a fitImage
in SPL by using the full fitImage support from U-Boot. While we do
have limited SPL loading support in SPL with a small footprint, it
is missing a lot of important features, like checking signatures.
This support has all the fitImage features, while the footprint is
obviously larger.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Fri, 18 May 2018 07:56:53 +0000 (09:56 +0200)]
pylibfdt: Add missing CC and LD to Makefile
Add missing CC and LDSHARED variables to the Makefile to pass the
correct C compiler and linker path to the build of _libfdt.so .
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Heinrich Schuchardt [Tue, 15 May 2018 17:42:24 +0000 (19:42 +0200)]
scripts: add decodecode from Linux
The script decodecode can be used to disassemble the 'Code:' line written
when an exception occurs.
The script is copied from Linux v4.16.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Tue, 15 May 2018 17:42:23 +0000 (19:42 +0200)]
arm: print instructions pointed to by pc
If an exception occurs in a loaded image and the relocation offset is
unknown, it is helful to know the instructions pointed to by the
program counter. This patch adds the missing output.
A possible output is:
Code:
e1c560d0 e12fff1e e120077b e12fff1e (
e7f7defb)
The parentheses indicate the instruction causing the exception.
The output can be disassembled using the decodecode script provided
by the Linux kernel project.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Michal Simek [Tue, 15 May 2018 14:47:02 +0000 (16:47 +0200)]
arm64: timer: Create timer_get_bootus for bootstage support
Implement timer_get_boot_us() based on available functions to support
bootstage command.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Philipp Tomsich [Mon, 14 May 2018 13:22:06 +0000 (15:22 +0200)]
Makefile: adopt --std=gnu11 for HOSTCFLAGS on Linux
Following the conversion of the SPDX license tags, a number of files
compiled with -pedantic now generate warnings similar to the following
for using C99-style '//' comments in ISO C90 code:
tools/gen_eth_addr.c:1:1: warning: C++ style comments are not allowed in ISO C90
// SPDX-License-Identifier: GPL-2.0+
^
The SPDX comment-style change means that these files have adopted C99,
so need to change the language-standard to --std=gnu99 or --std=gnu11
to let the compiler know this.
As we now require GCC 6 or newer for the cross-compiler, the project has
implicitly moved the project to GNU11: let older GCC versions on various
Linux distros know to treat our host tools as GNU11 as well.
References: commit
83d290c56fab ("SPDX: Convert all of our single license tags to Linux Kernel style")
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Ladislav Michl [Mon, 14 May 2018 07:17:45 +0000 (09:17 +0200)]
twister: Let SPL load U-Boot from MMC
MMC is not initialized in SPL, so it cannot load u-boot.img
preventing boot from MMC.
Also driver specific functions are guarded with generic
configuration options which leads to build failures when device
driver is not enabled in config. Fix that by using driver
specific defines.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Acked-by: Stefano Babic <sbabic@denx.de>
Marek Vasut [Sat, 12 May 2018 22:22:54 +0000 (00:22 +0200)]
fit: Add standalone image type handling
Just add IH_TYPE_STANDALONE to fit_get_image_type_property().
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Sat, 12 May 2018 22:22:53 +0000 (00:22 +0200)]
fit: Add empty fit_print_contents() and fit_image_print()
These functions may be needed in SPL, so add empty variants of them
if CONFIG_SPL_FIT_PRINT is disabled.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Sat, 12 May 2018 22:22:52 +0000 (00:22 +0200)]
fit: Fix CONFIG_FIT_SPL_PRINT
Rename CONFIG_FIT_SPL_PRINT to CONFIG_SPL_FIT_PRINT and add Kconfig
entry for it.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marek Vasut [Sat, 12 May 2018 20:25:28 +0000 (22:25 +0200)]
spl: fit: Add support for loading FPGA bitstream
Add support for loading FPGA into the SPL fitImage support. The
mechanism is flexible and allows user to override the actual
function for loading the FPGA itself. This is because on some
systems, the FPGA must be programmed to allow DRAM access, so
loading the full fitImage may not be possible if it contains
the bitstream. Instead, the spl_load_fpga_image() provides all
the tools to load the bitstream in parts while programming it
into the FPGA.
Signed-off-by: Marek Vasut <marex@denx.de>
[trini: Don't always have a branch to print out type]
Signed-off-by: Tom Rini <trini@konsulko.com>
Alex Kiernan [Sat, 12 May 2018 05:49:47 +0000 (05:49 +0000)]
bootcount: Add bootcount command
Add a command to manipulate the bootcounter. This is useful if you can
run device recovery from inside U-Boot and need to reset the bootcounter
after executing that process as part of altbootcmd.
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Eugen Hristev [Fri, 11 May 2018 08:14:32 +0000 (11:14 +0300)]
configs: sama5d2_xplained: fix bootcmd/args for spi+emmc demo
For sama5d2_xplained_spiflash_defconfig, we have the demo layout
as presented on this link:
http://www.at91.com/linux4sam/bin/view/Linux4SAM/Sama5d2XplainedMainPage#SPI_eMMC_Flash_demo_Memory_map
on SPI Flash (4 Mbyte) we have Bootstrap (second level bootloader), U-boot + env
and kernel+dtb we keep on eMMC on single partition in /boot directory, formatted
with ext4.
Thus, changing the boot command to reflect this demo for the spiflash config,
and fixing up bootargs. Sama5d2_xplained does not have NAND flash, so the
bootargs were completely wrong.
Fixes: "
5abc1a45": common: Move CONFIG_BOOTARGS to Kconfig
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>