Mike Frysinger [Sun, 1 Jun 2008 05:23:48 +0000 (01:23 -0400)]
Blackfin: enable support for nested interrupts
During cpu init, make sure we initialize the CEC properly so that
interrupts can fire and be handled while U-Boot is running.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Mon, 6 Oct 2008 07:55:25 +0000 (03:55 -0400)]
Blackfin: init NAND before relocating env
If booting out of NAND, we need to make sure we initialize it properly
before attempting to relocate the environment.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Thu, 7 Aug 2008 22:40:13 +0000 (18:40 -0400)]
Blackfin: check cache bits, not cplb bits
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Thu, 7 Aug 2008 21:52:59 +0000 (17:52 -0400)]
Blackfin: drop unused cache flush code
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Thu, 7 Aug 2008 19:21:47 +0000 (15:21 -0400)]
Blackfin: unify cache handling code
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Mon, 6 Oct 2008 07:39:07 +0000 (03:39 -0400)]
Blackfin: only initialize the RTC when actually used
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Mon, 6 Oct 2008 07:44:33 +0000 (03:44 -0400)]
Blackfin: fix SWRST register definition
The SWRST register is a 16bit, not 32bit, register.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Thu, 7 Aug 2008 22:54:57 +0000 (18:54 -0400)]
Blackfin: build with -fomit-frame-pointer
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Thu, 7 Aug 2008 21:50:26 +0000 (17:50 -0400)]
Blackfin: document some of the blackfin directories
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Thu, 7 Aug 2008 19:16:56 +0000 (15:16 -0400)]
Blackfin: only enable hardware error irq by default
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Thu, 7 Aug 2008 17:36:43 +0000 (13:36 -0400)]
Blackfin: punt old unused mem_init.h header
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Thu, 7 Aug 2008 17:18:55 +0000 (13:18 -0400)]
Blackfin: delete unused page_descriptor_table_size define
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Thu, 7 Aug 2008 17:17:03 +0000 (13:17 -0400)]
Blackfin: fix typo in boot mode comment and add NAND define
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Ben Maan [Thu, 7 Aug 2008 17:14:21 +0000 (13:14 -0400)]
Blackfin: fix port mux defines for BF54x
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Thu, 7 Aug 2008 17:09:50 +0000 (13:09 -0400)]
Blackfin: update anomaly lists
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Thu, 7 Aug 2008 17:08:54 +0000 (13:08 -0400)]
Blackfin: unify DSPID/DBGSTAT MMR definitions
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Wolfgang Denk [Tue, 21 Oct 2008 13:53:51 +0000 (15:53 +0200)]
Fix strmhz(): avoid printing negative fractions
Signed-off-by: Wolfgang Denk <wd@denx.de>
Richard Retanubun [Fri, 17 Oct 2008 12:55:51 +0000 (08:55 -0400)]
mpc83xx: Removed #ifdef CONFIG_MPC834X dependency on upmconfig function
This is done to allow other 83XX based platforms which also have UPM
(e.g. 8360) to configure and use their UPM in u-boot.
Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Anton Vorontsov [Tue, 14 Oct 2008 18:58:53 +0000 (22:58 +0400)]
mpc83xx: add support for switching between USB Host/Function for MPC837XEMDS
With this patch u-boot can fixup the dr_mode and phy_type properties
for the Dual-Role USB controller.
While at it, also remove #ifdefs around includes, they are not needed.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Anton Vorontsov [Wed, 8 Oct 2008 16:52:54 +0000 (20:52 +0400)]
mpc83xx: add ELBC NAND support for the MPC837XEMDS boards
Though NAND chip is replaceable on the MPC837XE-MDS boards, the
current settings don't work with the default chip on the board.
Nevertheless Freescale's U-Boot sets the option register correctly,
so I just dumped the register from the working u-boot. My guess is
that the old settings were applicable for some pilot boards, not
found in the production.
This patch also enables FSL ELBC driver so that we could access
the NAND storage in the u-boot.
The NAND support costs about 45KB, so the u-boot no longer fits
into two 128KB NOR flash sectors, thus we also have to adjust
environment location: add another 128KB to the monitor length.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
It is due to hardware design and logic defect, that is the
I/O[0:7] of NAND chip is connected to LAD[7:0], so when
the NAND chip connected to nLCS3, you have to set up the
OR3[BCTLD] = '1' for normal operation, otherwise it will have
bus contention due to the pin 48/25 of U60 is enabled.
Setup the OR3[BCTLD] = '1' , that meaning the LBCTL is not
asserted upon access to the NAND chip, keep the default state.
Acked-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Anton Vorontsov [Thu, 2 Oct 2008 15:17:33 +0000 (19:17 +0400)]
mpc83xx: fix PCI scan hang on the standalone MPC837xE-MDS boards
The MPC837xE-MDS board's CPLD can auto-detect if the board is on the PIB,
standalone or acting as a PCI agent. User's Guide says:
- When the CPLD recognizes its location on the PIB it automatically
configures RCW to the PCI Host.
- If the CPLD fails to recognize its location then it is automatically
configured as an Agent and the PCI is configured to an external arbiter.
This sounds good. Though in the standalone setup the CPLD sets PCI_HOST
flag (it's ok, we can't act as PCI agents since we receive CLKIN, not
PCICLK), but the CPLD doesn't set the ARBITER_ENABLE flag, and without
any arbiter bad things will happen (here the board hangs during any config
space reads).
In this situation we must disable the PCI. And in case of anybody really
want to use an external arbiter, we provide "pci_external_aribter"
environment variable.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Anton Vorontsov [Thu, 2 Oct 2008 14:32:25 +0000 (18:32 +0400)]
mpc83xx: add SGMII riser module support for the MPC8378E-MDS boards
This involves configuring the SerDes and fixing up the flags and
PHY addresses for the TSECs.
For Linux we also fix up the device tree.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Anton Vorontsov [Thu, 2 Oct 2008 14:31:59 +0000 (18:31 +0400)]
mpc83xx: add TSECs' HRCWH masks for MPC837x processors
We'll use these masks to parse TSEC modes out of HRCWH.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Anton Vorontsov [Thu, 2 Oct 2008 14:31:56 +0000 (18:31 +0400)]
mpc83xx: serdes: add forgotten shifts for rfcks
The rfcks should be shifted by 28 bits left. We didn't notice the bug
because we were using only 100MHz clocks (for which rfcks == 0).
Though, for SGMII we'll need 125MHz clocks.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Anton Vorontsov [Thu, 2 Oct 2008 14:31:53 +0000 (18:31 +0400)]
mpc83xx: fix serdes setup for the MPC8378E boards
MPC837xE specs says that SerDes1 has:
— Two lanes running x1 SGMII at 1.25 Gbps;
— Two lanes running x1 SATA at 1.5 or 3.0 Gbps.
And for SerDes2:
— Two lanes running x1 PCI Express at 2.5 Gbps;
— One lane running x2 PCI Express at 2.5 Gbps;
— Two lanes running x1 SATA at 1.5 or 3.0 Gbps.
The spec also explicitly states that PEX options are not valid for
the SD1.
Nevertheless MPC8378 RDB and MDS boards configure the SD1 for PEX,
which is wrong to do.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Anton Vorontsov [Wed, 10 Sep 2008 14:12:37 +0000 (18:12 +0400)]
mpc83xx: mpc8360emds: rework LBC SDRAM setup
Currently 64M of LBC SDRAM are mapped at 0xF0000000 which makes
it difficult to use (b/c then the memory is discontinuous and
there is quite big memory hole between the DDR/SDRAM regions).
This patch reworks LBC SDRAM setup so that now we dynamically
place the LBC SDRAM near the DDR (or at 0x0 if there isn't any
DDR memory).
With this patch we're able to:
- Boot without external DDR memory;
- Use most "DDR + SDRAM" setups without need to support for
sparse/discontinuous memory model in the software.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Wolfgang Denk [Tue, 21 Oct 2008 09:23:56 +0000 (11:23 +0200)]
FDT: don't use private kernel header files
On some systems (for example Fedora Core 4) U-Boot builds with the
following wanrings only:
...
In file included from /home/wd/git/u-boot/include/libfdt_env.h:33,
from fdt.c:51:
/usr/include/asm/byteorder.h:6:2: warning: #warning using private kernel header; include <endian.h> instead!
This patch fixes this problem.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Wolfgang Denk [Tue, 21 Oct 2008 19:19:35 +0000 (21:19 +0200)]
Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx
Stefan Roese [Mon, 13 Oct 2008 13:15:31 +0000 (15:15 +0200)]
ppc4xx: Add 1.0 & 1.066 GHz to canyonlands bootstrap command for PLL setup
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 13 Oct 2008 08:45:14 +0000 (10:45 +0200)]
ppc4xx: Correctly setup ranges property in ebc node
Previously only the NOR flash mapping was written into the ranges
property of the ebc node. This patch now writes all enabled chip
select areas into the ranges property.
Signed-off-by: Stefan Roese <sr@denx.de>
Dirk Eibach [Wed, 8 Oct 2008 13:37:50 +0000 (15:37 +0200)]
ppc4xx: Add GDSys neo 405EP board support
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Niklaus Giger [Wed, 1 Oct 2008 12:46:13 +0000 (14:46 +0200)]
ppc4xx: Update configs for Netstal boards
I reorganized my config files, putting the common stuff into netstal-common.h
(got the idea by looking a amcc-common.h from Stefan).
Added stuff to boot the new powerpc linux via NFS (only tested with HCU4).
Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Adam Graham [Wed, 8 Oct 2008 17:13:19 +0000 (10:13 -0700)]
ppc4xx: Add routine to retrieve CPU number
Provide a weak defined routine to retrieve the CPU number for
reference boards that have multiple CPU's. Default behavior
is the existing single CPU print output. Reference boards with
multiple CPU's need to provide a board specific routine.
See board/amcc/arches/arches.c for an example.
Signed-off-by: Adam Graham <agraham@amcc.com>
Signed-off-by: Victor Gallardo <vgallardo@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Adam Graham [Wed, 8 Oct 2008 17:13:14 +0000 (10:13 -0700)]
ppc4xx: Add static support for 44x IBM SDRAM Controller
This patch add the capability to configure a PPC440 based IBM SDRAM
Controller with static, compiled-in, values. PPC440 memory subsystem
includes a Memory Queue core.
Signed-off-by: Adam Graham <agraham@amcc.com>
Signed-off-by: Victor Gallardo <vgallardo@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Adam Graham [Wed, 8 Oct 2008 17:12:53 +0000 (10:12 -0700)]
ppc4xx: Add AMCC Arches board support (dual 460GT)
The Arches Evaluation board is based on the AMCC 460GT SoC chip.
This board is a dual processor board with each processor providing
independent resources for Rapid IO, Gigabit Ethernet, and serial
communications. Each 460GT has it's own 512MB DDR2 memory, 32MB NOR
FLASH, UART, EEPROM and temperature sensor, along with a shared debug
port. The two 460GT's will communicate with each other via shared
memory, Gigabit Ethernet and x1 PCI-Express.
Signed-off-by: Adam Graham <agraham@amcc.com>
Signed-off-by: Victor Gallardo <vgallardo@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Tue, 21 Oct 2008 09:43:08 +0000 (11:43 +0200)]
Merge branch 'master' of /home/stefan/git/u-boot/u-boot
Wolfgang Denk [Sun, 19 Oct 2008 19:54:30 +0000 (21:54 +0200)]
TQM8260: environment in flash instead EEPROM, baudrate 115k
Several customers have reported problems with the environment in
EEPROM, including corrupted content after board reset. Probably the
code to prevent I2C Enge Conditions is not working sufficiently.
We move the environment to flash now, which allows to have a backup
copy plus gives much faster boot times.
Also, change the default console initialization to 115200 bps as used
on most other boards.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Kumar Gala [Sun, 19 Oct 2008 17:49:19 +0000 (12:49 -0500)]
85xx: Fix compile warning in mpc8536ds.c
mpc8536ds.c: In function 'is_sata_supported':
mpc8536ds.c:615: warning: unused variable 'devdisr'
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Wolfgang Denk [Sun, 19 Oct 2008 00:35:50 +0000 (02:35 +0200)]
Cleanup: fix "MHz" spelling
Signed-off-by: Wolfgang Denk <wd@denx.de>
Wolfgang Denk [Sun, 19 Oct 2008 00:35:49 +0000 (02:35 +0200)]
Use strmhz() to format clock frequencies
Signed-off-by: Wolfgang Denk <wd@denx.de>
Wolfgang Denk [Sun, 19 Oct 2008 00:35:48 +0000 (02:35 +0200)]
strmhz(): Round numbers when printing clock frequencies
Round clock frequencies for printing.
Many boards printed off clock frequencies like 399 MHz instead of the
exact 400 MHz because numberes were not rounded. This is fixed now.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Timur Tabi [Mon, 20 Oct 2008 20:16:47 +0000 (15:16 -0500)]
85xx: properly document MPC85xx_PORDEVSR2_SEC_CFG
Commit
f7d190b1 corrected the value of MPC85xx_PORDEVSR2_SEC_CFG, but forgot
to add a comment that the correct value disagrees with the 8544 reference
manual. The changelog for that commit is also wrong, as it says "bit 28"
when it should be "bit 24".
Signed-off-by: Timur Tabi <timur@freescale.com>
Markus Klotzbuecher [Tue, 21 Oct 2008 07:18:01 +0000 (09:18 +0200)]
Merge git://git.denx.de/u-boot into x1
Conflicts:
drivers/usb/usb_ohci.c
Wolfgang Denk [Sat, 18 Oct 2008 19:59:44 +0000 (21:59 +0200)]
Merge 'next' branch
Conflicts:
board/freescale/mpc8536ds/mpc8536ds.c
include/configs/mgcoge.h
Signed-off-by: Wolfgang Denk <wd@denx.de>
Heiko Schocher [Fri, 17 Oct 2008 16:24:06 +0000 (18:24 +0200)]
mgcoge: add redundant environment sector
Signed-off-by: Heiko Schocher <hs@denx.de>
Heiko Schocher [Fri, 17 Oct 2008 16:23:27 +0000 (18:23 +0200)]
mgsuvd: update size of environment
Signed-off-by: Heiko Schocher <hs@denx.de>
Jason Jin [Fri, 10 Oct 2008 03:41:00 +0000 (11:41 +0800)]
Enabled the Freescale SGMII riser card on 8536DS
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Liu Yu [Fri, 10 Oct 2008 03:40:59 +0000 (11:40 +0800)]
Enabled the Freescale SGMII riser card on 8572DS
This patch based on Andy's work.
Including command 'pixis_set_sgmii' support.
Signed-off-by: Liu Yu <yu.liu@freescale.com>
Liu Yu [Fri, 10 Oct 2008 03:40:58 +0000 (11:40 +0800)]
Make pixis_set_sgmii more general to support MPC85xx boards.
The pixis sgmii command depend on the FPGA support on the board, some 85xx
boards support SGMII riser card but did not support this command, define
CONFIG_PIXIS_SGMII_CMD for those boards which support the sgmii command.
Not like 8544, 8572 has 4 eTsec so that the other two's pixis bits
are not supported by 8544. Therefor, define PIXIS_VSPEED2_MASK and
PIXIS_VCFGEN1_MASK in header file for both boards.
Signed-off-by: Liu Yu <yu.liu@freescale.com>
Ed Swarthout [Thu, 9 Oct 2008 04:38:02 +0000 (23:38 -0500)]
Add cpu/8xxx to TAGS_SUBDIRS
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Ed Swarthout [Thu, 9 Oct 2008 06:25:55 +0000 (01:25 -0500)]
fsl_law clear enable before changing.
Debug sessions may have left enabled laws.
Changing lawbar with an unkown enabled tgtid could cause problems.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Ed Swarthout [Thu, 9 Oct 2008 05:29:27 +0000 (00:29 -0500)]
mpc8572 additional end-point mode
mpc8572 supports all pcie controllers as end-points with cfg_host_agent=0.
Include host_agent == 0 decode for end-point determination.
This is not needed for the ds reference board since pcie3 will be a host
in order to connect to the uli chip. Include it here as a reference for
other mpc8572 boards.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Ed Swarthout [Thu, 9 Oct 2008 04:37:59 +0000 (23:37 -0500)]
85xx if NUM_CPUS>1, print cpu number
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Ed Swarthout [Thu, 9 Oct 2008 04:38:01 +0000 (23:38 -0500)]
pixis do not print long help if not configured
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Andy Fleming [Tue, 7 Oct 2008 13:09:50 +0000 (08:09 -0500)]
Have u-boot pass stashing parameters into device tree
Some cores don't support ethernet stashing at all, and some
instances have errata. Adds 3 properties to gianfar nodes
which support stashing. For now, just add this support to
85xx SoCs.
Signed-off-by: Andy Fleming <afleming@freescale.com>
Haiying Wang [Fri, 3 Oct 2008 16:37:57 +0000 (12:37 -0400)]
Add DDR options setting on MPC8641HPCN board
* Add board specific parameter table to choose correct cpo, clk_adjust,
write_data_delay based on board ddr frequency and n_ranks.
* Set odt_rd_cfg and odt_wr_cfg based on the dimm# and CS#.
Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Haiying Wang [Fri, 3 Oct 2008 16:37:41 +0000 (12:37 -0400)]
Add ddr interleaving suppport for MPC8572DS board
* Add board specific parameter table to choose correct cpo, clk_adjust,
write_data_delay, 2T based on board ddr frequency and n_ranks.
* Set odt_rd_cfg and odt_wr_cfg based on the dimm# and CS#.
* Set memory controller interleaving mode to bank interleaving, and disable
bank(chip select) interleaving mode by default, because the default on-board
DDR DIMMs are 2x512MB single-rank.
* Change CONFIG_ICS307_REFCLK_HZ from
33333333 to
33333000.
Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Haiying Wang [Fri, 3 Oct 2008 16:37:26 +0000 (12:37 -0400)]
Add debug information for DDR controller registers
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Haiying Wang [Fri, 3 Oct 2008 16:37:10 +0000 (12:37 -0400)]
Check DDR interleaving mode
* Check DDR interleaving mode from environment by reading memctl_intlv_ctl and
ba_intlv_ctl.
* Print DDR interleaving mode information
* Add doc/README.fsl-ddr to describe the interleaving setting
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Haiying Wang [Fri, 3 Oct 2008 16:36:55 +0000 (12:36 -0400)]
Pass dimm parameters to populate populate controller options
Because some dimm parameters like n_ranks needs to be used with the board
frequency to choose the board parameters like clk_adjust etc. in the
board_specific_paramesters table of the board ddr file, we need to pass
the dimm parameters to the board file.
* move ddr dimm parameters header file from /cpu to /include directory.
* add ddr dimm parameters to populate board specific options.
* Fix fsl_ddr_board_options() for all the 8xxx boards which call this function.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Haiying Wang [Fri, 3 Oct 2008 16:36:39 +0000 (12:36 -0400)]
Make DDR interleaving mode work correctly
Fix some bugs:
1. Correctly set intlv_ctl in cs_config.
2. Correctly set sa, ea in cs_bnds when bank interleaving mode is enabled.
3. Set base_address and total memory for each ddr controller in memory
controller interleaving mode.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Kumar Gala [Tue, 23 Sep 2008 04:40:42 +0000 (23:40 -0500)]
85xx: Enable interrupt and setexpr commands on Freescale 85xx boards
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Mon, 22 Sep 2008 19:11:11 +0000 (14:11 -0500)]
85xx: Improve flash remapping on MPC8572DS & MPC8536DS
Changing the flash from cacheable to cache-inhibited was taking a significant
amount of time due to the fact that we were iterating over the full 256M of
flash. Instead we can just flush the L1 d-cache and invalidate the i-cache.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Mon, 22 Sep 2008 19:11:10 +0000 (14:11 -0500)]
85xx: Export invalidate_{i,d}cache and add flush_dcache
Added the ability for C code to invalidate the i/d-cache's and
to flush the d-cache. This allows us to more efficient change mappings
from cache-able to cache-inhibited.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Heiko Schocher [Fri, 17 Oct 2008 14:11:52 +0000 (16:11 +0200)]
mgcoge, mgsuvd: extract more common code
in ft_blob_update () for both boards was an unneccessary
repetition of code, which this patch moves in a common
function for this boards.
Signed-off-by: Heiko Schocher <hs@denx.de>
Heiko Schocher [Fri, 17 Oct 2008 10:15:55 +0000 (12:15 +0200)]
mgcoge, mgsuvd: use in_*/out_* accesors
Signed-off-by: Heiko Schocher <hs@denx.de>
Heiko Schocher [Fri, 17 Oct 2008 11:52:51 +0000 (13:52 +0200)]
mgsuvd: fix compiler warning when using soft_i2c driver
Signed-off-by: Heiko Schocher <hs@denx.de>
Heiko Schocher [Fri, 17 Oct 2008 10:15:05 +0000 (12:15 +0200)]
mgsuvd: fix coding style
Signed-off-by: Heiko Schocher <hs@denx.de>
Heiko Schocher [Fri, 17 Oct 2008 10:13:30 +0000 (12:13 +0200)]
mgcoge: Second Flash on CS5 not on CS1
Signed-off-by: Heiko Schocher <hs@denx.de>
Kumar Gala [Fri, 17 Oct 2008 02:52:08 +0000 (21:52 -0500)]
Added arch_lmb_reserve to allow arch specific memory regions protection
Each architecture has different ways of determine what regions of memory
might not be valid to get overwritten when we boot. This provides a
hook to allow them to reserve any regions they care about. Currently
only ppc, m68k and sparc need/use this.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Heiko Schocher [Thu, 16 Oct 2008 14:32:35 +0000 (16:32 +0200)]
mgcoge: added CONFIG_FIT to support the new u-boot image format
Signed-off-by: Heiko Schocher <hs@denx.de>
Jean-Christophe PLAGNIOL-VILLARD [Thu, 16 Oct 2008 13:01:15 +0000 (15:01 +0200)]
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Kumar Gala [Mon, 13 Oct 2008 19:12:55 +0000 (14:12 -0500)]
74xx/7xx/86xx: Rename flush_data_cache to flush_dcache to match 85xx version
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Kumar Gala [Tue, 23 Sep 2008 15:05:02 +0000 (10:05 -0500)]
Expose command table search for sub-commands
Sub-command can benefit from using the same table and search functions
that top level commands have. Expose this functionality by refactoring
find_cmd() and introducing find_cmd_tbl() that sub-command processing
can call.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Heiko Schocher [Wed, 15 Oct 2008 07:41:33 +0000 (09:41 +0200)]
mgsuvd, mgcoge: added BOOTCOUNT feature.
Signed-off-by: Heiko Schocher <hs@denx.de>
Heiko Schocher [Wed, 15 Oct 2008 07:41:00 +0000 (09:41 +0200)]
mgcoge, mgsuvd: added support for the IVM EEprom.
The EEprom contains some Manufacturerinformation,
which are read from u-boot at boot time, and saved
in same hush shell variables.
Signed-off-by: Heiko Schocher <hs@denx.de>
Heiko Schocher [Wed, 15 Oct 2008 07:40:28 +0000 (09:40 +0200)]
hush: add showvar command for hush shell.
This new command shows the local variables defined in
the hush shell:
=> help showvar
showvar
- print values of all hushshell variables
showvar name ...
- print value of hushshell variable 'name'
Also make the set_local_var() and unset_local_var ()
no longer static, so it is possible to define local
hush shell variables at boot time. If CONFIG_HUSH_INIT_VAR
is defined, u-boot calls hush_init_var (), where
boardspecific code can define local hush shell
variables at boottime.
Signed-off-by: Heiko Schocher <hs@denx.de>
Heiko Schocher [Wed, 15 Oct 2008 07:39:47 +0000 (09:39 +0200)]
I2C: adding new "i2c bus" Command to the I2C Subsystem.
With this Command it is possible to add new I2C Busses,
which are behind 1 .. n I2C Muxes. Details see README.
Signed-off-by: Heiko Schocher <hs@denx.de>
Heiko Schocher [Wed, 15 Oct 2008 07:39:08 +0000 (09:39 +0200)]
mgcoge, mgsuvd: add board specific I2C deblocking mechanism.
As documented in doc/I2C_Edge_Conditions, adding a
board specific deblocking mechanism via CFG_I2C_INIT_BOARD
for the mgcoge and mgsuvd board.
This code was originally written by Keymile in association
with Anatech and Atmel in 1998. The Code toggels the SCL
until the SCA line goes to HIGH (max. 16 times).
And after this, a start condition is sent.
This is another approach to deblock the I2C Bus. The
soft I2C driver actually sends 9 clocks with SDA High,
and then a stop at the end, to deblock the I2C Bus.
Maybe we should use the approach from Keymile as
the new standard?
Signed-off-by: Heiko Schocher <hs@denx.de>
Heiko Schocher [Wed, 15 Oct 2008 07:38:38 +0000 (09:38 +0200)]
soft_i2c: Add CFG_I2C_INIT_BOARD option
This patch adds the option for a boardspecific
I2C deblocking mechanism for the soft i2c driver.
Signed-off-by: Heiko Schocher <hs@denx.de>
Heiko Schocher [Wed, 15 Oct 2008 07:38:07 +0000 (09:38 +0200)]
mgcoge, mgsuvd: add DTT (LM75) support.
Signed-off-by: Heiko Schocher <hs@denx.de>
Heiko Schocher [Wed, 15 Oct 2008 07:37:34 +0000 (09:37 +0200)]
lm75: Make the LM75 MULTI_BUS compatible.
Signed-off-by: Heiko Schocher <hs@denx.de>
Heiko Schocher [Wed, 15 Oct 2008 07:37:04 +0000 (09:37 +0200)]
lm75: fix Codingstyle issues.
Signed-off-by: Heiko Schocher <hs@denx.de>
Heiko Schocher [Wed, 15 Oct 2008 07:36:33 +0000 (09:36 +0200)]
mgcoge, mgsuvd: added EEprom support.
Signed-off-by: Heiko Schocher <hs@denx.de>
Heiko Schocher [Wed, 15 Oct 2008 07:36:03 +0000 (09:36 +0200)]
mgcoge, mgsuvd: add I2C support.
Signed-off-by: Heiko Schocher <hs@denx.de>
Heiko Schocher [Wed, 15 Oct 2008 07:35:26 +0000 (09:35 +0200)]
soft_i2c: prevent compiler warnings if driver does not use CPU Pins.
This patch fixes the following warnings, when using
the soft_i2c driver using no CPU pins on MPC82xx or MPC8xx
systems:
soft_i2c.c: In function 'send_reset':
soft_i2c.c:93: warning: unused variable 'immr'
soft_i2c.c: In function 'send_start':
soft_i2c.c:124: warning: unused variable 'immr'
soft_i2c.c: In function 'send_stop':
soft_i2c.c:146: warning: unused variable 'immr'
soft_i2c.c: In function 'send_ack':
soft_i2c.c:171: warning: unused variable 'immr'
soft_i2c.c: In function 'write_byte':
soft_i2c.c:196: warning: unused variable 'immr'
soft_i2c.c: In function 'read_byte':
soft_i2c.c:244: warning: unused variable 'immr'
Signed-off-by: Heiko Schocher <hs@denx.de>
Heiko Schocher [Wed, 15 Oct 2008 07:34:45 +0000 (09:34 +0200)]
i2c: add CONFIG_I2C_MULTI_BUS for soft_i2c and mpc8260 i2c driver.
Signed-off-by: Heiko Schocher <hs@denx.de>
Heiko Schocher [Wed, 15 Oct 2008 07:34:05 +0000 (09:34 +0200)]
mgcoge: fix Coding Style issues.
Signed-off-by: Heiko Schocher <hs@denx.de>
Heiko Schocher [Wed, 15 Oct 2008 07:33:30 +0000 (09:33 +0200)]
I2C: add new command i2c reset.
If I2C Bus is blocked (see doc/I2C_Edge_Conditions),
it is not possible to get out of this, until the
complete Hardware gets a reset. This new commando
calls again i2c_init (and that calls i2c_init_board
if defined), which will deblock the I2C Bus.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Heiko Schocher [Wed, 15 Oct 2008 07:32:25 +0000 (09:32 +0200)]
mgsuvd, mgcoge: move this 2 boards in one dir.
There are some more extensions, which are for both boards
and some more boards from this manufacturer will follow soon.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Dirk Eibach [Wed, 8 Oct 2008 11:44:27 +0000 (13:44 +0200)]
hwmon: Add LM63 support
This patch adds support for the National LM63 temperature
sensor with integrated fan control. It's used on the GDSys
Neo board (405EP) which will be submitted later.
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Acked-by: Stefan Roese <sr@denx.de>
Kyungmin Park [Wed, 8 Oct 2008 02:01:17 +0000 (11:01 +0900)]
Add Red Black Tree support
Now it's used at UBI module. Of course other modules can use it.
If you want to use it, please define CONFIG_RBTREE
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
richardretanubun [Mon, 6 Oct 2008 20:10:53 +0000 (16:10 -0400)]
CONFIG_EFI_PARTITION: Added support for EFI partition in cmd_ext2fs.c
Added support for CONFIG_EFI_PARTITION to ext2 commands.
Signed-off-by: Richard Retanubun <RichardRetanubun@RugggedCom.com>
richardretanubun [Fri, 26 Sep 2008 15:13:22 +0000 (11:13 -0400)]
Add support for CONFIG_EFI_PARTITION (GUID Partition Table)
The GUID (Globally Unique Identifier) Partition Table (GPT) is a part
of EFI. See http://en.wikipedia.org/wiki/GUID_Partition_Table
Based on linux/fs/partitions/efi.[ch]
Signed-off-by: Richard Retanubun <RichardRetanubun@RugggedCom.com>
Bartlomiej Sieka [Wed, 1 Oct 2008 13:26:32 +0000 (15:26 +0200)]
FIT: output image load address for type 'firmware', fix message while there
Now that the auto-update feature uses the 'firmware' type for updates, it is
useful to inspect the load address of such images.
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Bartlomiej Sieka [Wed, 1 Oct 2008 13:26:31 +0000 (15:26 +0200)]
Automatic software update from TFTP server
The auto-update feature allows to automatically download software updates
from a TFTP server and store them in Flash memory during boot. Updates are
contained in a FIT file and protected with SHA-1 checksum.
More detailed description can be found in doc/README.update.
Signed-off-by: Rafal Czubak <rcz@semihalf.com>
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Bartlomiej Sieka [Wed, 1 Oct 2008 13:26:27 +0000 (15:26 +0200)]
flash: factor out adjusting of Flash address to the end of sector
The upcoming automatic update feature needs the ability to adjust an
address within Flash to the end of its respective sector. Factor out
this functionality to a new function flash_sect_roundb().
Signed-off-by: Rafal Czubak <rcz@semihalf.com>
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Bartlomiej Sieka [Wed, 1 Oct 2008 13:26:29 +0000 (15:26 +0200)]
net: Make TFTP server timeout configurable
There are two aspects of a TFTP transfer involving timeouts:
1. timeout waiting for initial server reply after sending RRQ
2. timeouts while transferring actual data from the server
Since the upcoming auto-update feature attempts a TFTP download during each
boot, it is undesirable to have a long delay when the TFTP server is not
available. Thus, this commit makes the server timeout (1.) configurable by two
global variables:
TftpRRQTimeoutMSecs
TftpRRQTimeoutCountMax
TftpRRQTimeoutMSecs overrides default timeout when trying to connect to a TFTP
server, TftpRRQTimeoutCountMax overrides default number of connection retries.
The total delay when trying to download a file from a non-existing TFTP server
is TftpRRQTimeoutMSecs x TftpRRQTimeoutCountMax milliseconds.
Timeouts during file transfers (2.) are unaffected.
Signed-off-by: Rafal Czubak <rcz@semihalf.com>
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Bartlomiej Sieka [Wed, 1 Oct 2008 13:26:28 +0000 (15:26 +0200)]
net: express the first argument to NetSetTimeout() in milliseconds
Enforce millisecond semantics of the first argument to NetSetTimeout() --
the change is transparent for well-behaving boards (CFG_HZ == 1000 and
get_timer() countiing in milliseconds).
Rationale for this patch is to enable millisecond granularity for
network-related timeouts, which is needed for the upcoming automatic
software update feature.
Summary of changes:
- do not scale the first argument to NetSetTimeout() by CFG_HZ
- change timeout values used in the networking code to milliseconds
Signed-off-by: Rafal Czubak <rcz@semihalf.com>
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
richardretanubun [Mon, 29 Sep 2008 22:28:23 +0000 (18:28 -0400)]
Adds two more ethernet interface to 83xx
Added as a convenience for other platforms that uses MPC8360 (has 8 UCC).
Six eth interface is chosen because the platform I am using combines
UCC1&2 and UCC3&4 as 1000 Eth and the other four UCCs as 10/100 Eth.
Signed-off-by: Richard Retanubun <RichardRetanubun@RugggedCom.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>