oweals/u-boot.git
6 years agodm: pci: Use a 1:1 mapping for bus <-> phy addresses
Christian Gmeiner [Sun, 10 Jun 2018 13:25:06 +0000 (06:25 -0700)]
dm: pci: Use a 1:1 mapping for bus <-> phy addresses

If U-Boot gets used as coreboot payload all pci resources got
assigned by coreboot. If a dts without any pci ranges gets used
the dm is not able to access pci device memory. To get things
working make use of a 1:1 mapping for bus <-> phy addresses.

This change makes it possible to get the e1000 U-Boot driver
working on a sandybridge device where U-Boot is used as coreboot
payload.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed 'u-boot' in the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agodm: pci: Make ranges dt property optional
Christian Gmeiner [Sun, 10 Jun 2018 13:25:05 +0000 (06:25 -0700)]
dm: pci: Make ranges dt property optional

If we use U-Boot as coreboot payload with a generic dts without
any ranges specified we fail in pci pre_probe and our pci bus
is not usable.

So convert decode_regions(..) into a void function and do the simple
error handling there.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed 'u-boot' in the commit message and checkpatch warning]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agox86: efi: payload: Enforce toolchain to generate 64-bit EFI payload stub codes
Bin Meng [Sun, 10 Jun 2018 13:25:03 +0000 (06:25 -0700)]
x86: efi: payload: Enforce toolchain to generate 64-bit EFI payload stub codes

Attempting to use a toolchain that is preconfigured to generate code
for the 32-bit architecture (i386), for example, the i386-linux-gcc
toolchain on kernel.org, to compile the 64-bit EFI payload does not
build. This updates the makefile fragments to ensure '-m64' is passed
to toolchain when building the 64-bit EFI payload stub codes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agox86: efi: app: Fix broken EFI application
Bin Meng [Sun, 10 Jun 2018 13:25:02 +0000 (06:25 -0700)]
x86: efi: app: Fix broken EFI application

The EFI application does not boot currently. It's due to the call
to syscon_get_by_driver_data() in cpu_init_r() maps to nowhere as
CONFIG_SYSCON is not included in the configuration.

EFI application is built as a shared library, so GCC won't complain
during the build process if some symbols are not found. GCC will
simply put these symbols into the .plt section and expect dynamic
loader to fix these up.

While we are here, remove some commands and drivers that are not
needed at present.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agox86: Conditionally build the pinctrl_ich6 driver
Bin Meng [Sun, 10 Jun 2018 13:25:01 +0000 (06:25 -0700)]
x86: Conditionally build the pinctrl_ich6 driver

The pinctrl_ich6 driver is currently unconditionally built for all
x86 boards. Let's use a Kconfig option to control the build.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agox86: irq: Change LINK_V2N and LINK_N2V to inline functions
Bin Meng [Mon, 4 Jun 2018 02:04:23 +0000 (19:04 -0700)]
x86: irq: Change LINK_V2N and LINK_N2V to inline functions

LINK_V2N and LINK_N2V are currently defines, so they cannot handle
complex logics. Change to inline functions for future extension.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agox86: irq: Remove chipset specific irq router drivers
Bin Meng [Mon, 4 Jun 2018 02:04:22 +0000 (19:04 -0700)]
x86: irq: Remove chipset specific irq router drivers

At present there are 3 irq router drivers. One is the common one
and the other two are chipset specific for queensbay and quark.
However these are really the same drivers as the core logic is
the same. The two chipset specific drivers configure some registers
that are outside the irq router block which should really be part
of the chipset initialization.

Now we remove these specific drivers and make all x86 boards use
the common one.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agox86: cougarcanyon2: Enable CPU driver and SMP support
Bin Meng [Mon, 4 Jun 2018 02:04:21 +0000 (19:04 -0700)]
x86: cougarcanyon2: Enable CPU driver and SMP support

This enables the 206ax cpu driver on Intel Cougar Canyon 2 board,
so that SMP can be supported too.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agox86: chromebook_link: Remove dm-pre-reloc property in the cpu nodes
Bin Meng [Mon, 4 Jun 2018 02:04:20 +0000 (19:04 -0700)]
x86: chromebook_link: Remove dm-pre-reloc property in the cpu nodes

The 206ax cpu driver does not require pre-relocation flag to work.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agox86: ivybridge: Drop CONFIG_USBDEBUG
Bin Meng [Mon, 4 Jun 2018 02:04:19 +0000 (19:04 -0700)]
x86: ivybridge: Drop CONFIG_USBDEBUG

This is not used anywhere. Clean this up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agox86: ivybridge: Enable 206ax cpu driver for FSP build
Bin Meng [Mon, 4 Jun 2018 02:04:18 +0000 (19:04 -0700)]
x86: ivybridge: Enable 206ax cpu driver for FSP build

At present this 206ax cpu driver is only built when FSP is not used.
This updates the Makefile to enable the build for both cases.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agox86: cougarcanyon2: Remove CONFIG_HAVE_INTEL_ME
Bin Meng [Mon, 4 Jun 2018 02:04:17 +0000 (19:04 -0700)]
x86: cougarcanyon2: Remove CONFIG_HAVE_INTEL_ME

As README.x86 already mentions, there are two SPI flashes mounted
on Intel Cougar Canyon 2 board, called SPI-0 and SPI-1 respectively.
SPI-0 stores the flash descriptor and the ME firmware. SPI-1 stores
the actual BIOS image which is U-Boot. Building a single image with
both ME firmware and U-Boot does not make sense.

This also describes the exact flash location where the u-boot.rom
should be programmed in the documentation.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agox86: cougarcanyon2: Update dts for SPI lock down
Bin Meng [Mon, 4 Jun 2018 02:04:16 +0000 (19:04 -0700)]
x86: cougarcanyon2: Update dts for SPI lock down

It turns out that like Braswell, Intel FSP for IvyBridge requires
SPI controller settings to be locked down, as the U-Boot ICH SPI
driver fails with the following message on Cougar Canyon 2 board:

  "ICH SPI: Opcode 9f not found"

Update the SPI node property to indicate this fact.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agox86: ivybridge: Imply USB_XHCI_HCD
Bin Meng [Mon, 4 Jun 2018 02:04:15 +0000 (19:04 -0700)]
x86: ivybridge: Imply USB_XHCI_HCD

The Panther Point chipset connected to Ivybridge has xHC integrated,
imply it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agousb: xhci-pci: Fix compiler warning
Bin Meng [Mon, 4 Jun 2018 02:04:14 +0000 (19:04 -0700)]
usb: xhci-pci: Fix compiler warning

This fixes the following compiler warning:

  "warning: cast from pointer to integer of different size
  [-Wpointer-to-int-cast]"

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agox86: baytrail: Correct the comment of IACORE_VIDS bit ranges
Bin Meng [Thu, 24 May 2018 10:05:59 +0000 (03:05 -0700)]
x86: baytrail: Correct the comment of IACORE_VIDS bit ranges

The guaranteed vid bit ranges in IACORE_VIDS MSR is actually
[22:16]. This corrects the comment for it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agox86: acpi: Adopt new version of iASL compiler
Andy Shevchenko [Wed, 23 May 2018 09:38:02 +0000 (12:38 +0300)]
x86: acpi: Adopt new version of iASL compiler

The commit

  f9a88a4c1cd0 ("iASL: Enhance the -tc option (create AML hex file in C)")

in ACPICA project changed a template of the variable that is used
in the generated C-file. Now, instead of hard coded "AmlCode" the
"%s_aml_code" is in use, where the prefix is a lowered case base
name of the output file. In our case it will be "dsdt" producing
a name as "dsdt_aml_code".

The quick solution is to call sed which replaces new name by the
old one to keep compatibility with old version of iASL.

The long term solution would be to modify code to use the new name
because it is more scalable.

Cc: Robert Moore <robert.moore@intel.com>
Cc: Sami Mujawar <sami.mujawar@arm.com>
Cc: Evan Lloyd <evan.lloyd@arm.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed two sentences in the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
6 years agox86: tsc: add support for reading CPU freq from cpuid
Christian Gmeiner [Mon, 14 May 2018 09:32:17 +0000 (11:32 +0200)]
x86: tsc: add support for reading CPU freq from cpuid

Starting with cpuid level 0x16 (Skylake-based processors)
it is possible to get CPU base freq via cpuid.

This fixes booting on a skylake based system.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed wrong indention of labels]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
6 years agoMerge git://git.denx.de/u-boot-fsl-qoriq
Tom Rini [Tue, 12 Jun 2018 17:25:24 +0000 (13:25 -0400)]
Merge git://git.denx.de/u-boot-fsl-qoriq

6 years agoMerge git://git.denx.de/u-boot-marvell
Tom Rini [Tue, 12 Jun 2018 11:26:15 +0000 (07:26 -0400)]
Merge git://git.denx.de/u-boot-marvell

6 years agoarm: mvebu: Add Helios4 Armada 38x initial support
Dennis Gilmore [Tue, 12 Jun 2018 00:39:53 +0000 (19:39 -0500)]
arm: mvebu: Add Helios4 Armada 38x initial support

The helios4 is built on the SolidRun Armada 38x SOM.
The port os based on the ClearFog board, using information from
https://github.com/helios-4/u-boot-marvell as well as dtb input
from https://github.com/helios-4/linux-marvell

Signed-off-by: Dennis Gilmore <dennis@ausil.us>
Signed-off-by: Dennis Gilmore <dgilmore@redhat.com>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoLS1012AFRWY: Add Secure Boot support
Vinitha V Pillai [Wed, 23 May 2018 05:33:31 +0000 (11:03 +0530)]
LS1012AFRWY: Add Secure Boot support

Added the following:
1. defconfig for LS1012AFRWY Secure boot
2. PfE Validation support

Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoboard: ls1012a: FRWY-LS1012A board support
Bhaskar Upadhaya [Wed, 23 May 2018 05:33:30 +0000 (11:03 +0530)]
board: ls1012a: FRWY-LS1012A board support

FRWY-LS1012A belongs to LS1012A family with features 2 1G SGMII PFE
MAC, Micro SD, USB 3.0, DDR, QuadSPI, Audio, UART.

Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
[yorks: rebase and fix SPDX tag]
[yorks: fix board/freescale/ls1012afrdm/Kconfig]
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoboard: Kconfig: Re-Arrangement of PPA firmware and header addresses
Bhaskar Upadhaya [Wed, 23 May 2018 05:33:29 +0000 (11:03 +0530)]
board: Kconfig: Re-Arrangement of PPA firmware and header addresses

PPA firmware and header address may vary depending upon different
boards, configure ppa firmware and header address in board specific
Kconfig.

Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoarm: ls1021aqds: config: enable CONFIG_ID_EEPROM for mac command
Jagdish Gediya [Wed, 9 May 2018 22:34:29 +0000 (04:04 +0530)]
arm: ls1021aqds: config: enable CONFIG_ID_EEPROM for mac command

Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoboard/freescale,lsch3: Add entry for 0.9v
Priyanka Jain [Wed, 9 May 2018 07:24:38 +0000 (12:54 +0530)]
board/freescale,lsch3: Add entry for 0.9v

As per updated hardware documentation for
lsch3 based chips like LS2088A, 0.9v support
has been added in possible supported SoC volatges

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoarmv8: ls1088a: Enable USB in ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
Ran Wang [Wed, 2 May 2018 07:08:14 +0000 (15:08 +0800)]
armv8: ls1088a: Enable USB in ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-ubi
Tom Rini [Fri, 8 Jun 2018 14:08:20 +0000 (10:08 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-ubi

6 years agoMerge branch 'master' of git://git.denx.de/u-boot-i2c
Tom Rini [Fri, 8 Jun 2018 14:00:46 +0000 (10:00 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-i2c

6 years agoMerge git://git.denx.de/u-boot-dm
Tom Rini [Fri, 8 Jun 2018 11:20:08 +0000 (07:20 -0400)]
Merge git://git.denx.de/u-boot-dm

6 years agocmd: add missing line breaks for pr_err()
Seung-Woo Kim [Mon, 4 Jun 2018 07:04:51 +0000 (16:04 +0900)]
cmd: add missing line breaks for pr_err()

After the commit 9b643e312d52 ("treewide: replace with error() with
pr_err()"), there are some pr_err() with no line break. Add missing
line breaks.

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
6 years agoboard: samsung: add missing line breaks for pr_err()
Seung-Woo Kim [Mon, 4 Jun 2018 07:03:05 +0000 (16:03 +0900)]
board: samsung: add missing line breaks for pr_err()

After the commit 9b643e312d52 ("treewide: replace with error() with
pr_err()"), there are some pr_err() with no line break. Add missing
line breaks.

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
6 years agoscript: Make get_default_envs.sh script exclude tools/env
Seung-Woo Kim [Mon, 4 Jun 2018 04:25:04 +0000 (13:25 +0900)]
script: Make get_default_envs.sh script exclude tools/env

If building envtools, there is env directory in tools directory.
Mafe the get_default_envs.sh script exclude tools/env directory.

Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
6 years agocommon: iotrace: add timestamp to iotrace records
Ramon Fried [Wed, 30 May 2018 20:09:59 +0000 (23:09 +0300)]
common: iotrace: add timestamp to iotrace records

Add timestamp to each iotrace record to aid in debugging
of IO timing access bugs.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agoiotrace: add IO region limit
Ramon Fried [Wed, 30 May 2018 20:09:58 +0000 (23:09 +0300)]
iotrace: add IO region limit

When dealing with a lot of IO regions, sometimes
it makes sense only to trace a specific one.
This patch adds support for region limits.
If region is not set, the iotrace works the same as it was.
If region is set, the iotrace only logs io operation that falls
in the defined region.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agocmd: iotrace: add set region command
Ramon Fried [Wed, 30 May 2018 20:09:57 +0000 (23:09 +0300)]
cmd: iotrace: add set region command

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agobug.h: introduce WARN_ONCE
Ramon Fried [Tue, 5 Jun 2018 21:38:59 +0000 (00:38 +0300)]
bug.h: introduce WARN_ONCE

Add WARN_ONCE definition to allow single time notification
of warnings to the user.
Taken from Linux kernel (4.17) with slight changes
(Removed __section(.data.once))

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
[trini: Drop the musb and dwc3 compat versions]
Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agobinman: Mark 'align-end' as implemented
Simon Glass [Fri, 1 Jun 2018 15:38:22 +0000 (09:38 -0600)]
binman: Mark 'align-end' as implemented

The documentation says this is not implemented, but it is. Update the
documentation, and clarify its operation.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agobinman: Add support for adding a name prefix to entries
Simon Glass [Fri, 1 Jun 2018 15:38:21 +0000 (09:38 -0600)]
binman: Add support for adding a name prefix to entries

Sometimes we have several sections which repeat the same entries (e.g. for
a read-only and read-write version of the same section). It is useful to
be able to tell these entries apart by name.

Add a new 'name-prefix' property for sections, which causes all entries
within that section to have a given name prefix.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agobinman: Add support for outputing a map file
Simon Glass [Fri, 1 Jun 2018 15:38:20 +0000 (09:38 -0600)]
binman: Add support for outputing a map file

It is useful to be able to see a list of regions in each image produced by
binman. Add a -m option to output this information in a '.map' file
alongside the image file.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agobinman: Tidy up some docs and comments
Simon Glass [Fri, 1 Jun 2018 15:38:19 +0000 (09:38 -0600)]
binman: Tidy up some docs and comments

Fix a few missing comments and tidy up some existing ones.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agobinman: Allow a single test to be executed
Simon Glass [Fri, 1 Jun 2018 15:38:18 +0000 (09:38 -0600)]
binman: Allow a single test to be executed

Provide an easy way to execute a single binman test by specifying it on
the command line.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agobinman: Add documentation for pos-unset property
Simon Glass [Fri, 1 Jun 2018 15:38:17 +0000 (09:38 -0600)]
binman: Add documentation for pos-unset property

This property is not documented. Add a note to the README.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agobinman: Add support for sections
Simon Glass [Fri, 1 Jun 2018 15:38:16 +0000 (09:38 -0600)]
binman: Add support for sections

It is useful to be able to split an image into multiple sections,
each with its own size and position, for cases where a flash device has
read-only and read-write portions.

Add support for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agobinman: Avoid setting sys.path globally
Simon Glass [Fri, 1 Jun 2018 15:38:15 +0000 (09:38 -0600)]
binman: Avoid setting sys.path globally

At present we set the Python path at the start of binman so we can read
modules in the 'etype' directory. This is a bit messy since it affects
'import' statements through binman.

Adjust the code to set the path locally, just where it is needed. Move
the 'entry' module in with the other base modules to help with this. It
makes more sense here anyway since it does not implement an entry type.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agobinman: Rename Entry property to 'section'
Simon Glass [Fri, 1 Jun 2018 15:38:14 +0000 (09:38 -0600)]
binman: Rename Entry property to 'section'

Entries are now passed a Section object rather than an Image. Rename this
property to avoid confusion.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agobinman: Rename ELF parameters to 'section'
Simon Glass [Fri, 1 Jun 2018 15:38:13 +0000 (09:38 -0600)]
binman: Rename ELF parameters to 'section'

We now pass a Section object to these functions rather than an Image.
Rename the parameters to avoid confusion.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agobinman: Refactor much of the image code into 'section'
Simon Glass [Fri, 1 Jun 2018 15:38:12 +0000 (09:38 -0600)]
binman: Refactor much of the image code into 'section'

We want to support multiple sections within a single image. To do this,
move most of the Image class implementation into a new Section class. An
Image contains only a single Section, but at some point we will support
a new 'section' entry, thus allowing Sections within Sections.

Use the name 'bsection' for the module so we can use 'section' for the
etype module.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agobinman: Allow unit addresses for binaries
Simon Glass [Fri, 1 Jun 2018 15:38:11 +0000 (09:38 -0600)]
binman: Allow unit addresses for binaries

Allow the same binary to appear multiple times in an image by using the
device-tree unit-address feature (u-boot@0, u-boot@1).

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agobuildman: Add support for environment delta in summary
Alex Kiernan [Thu, 31 May 2018 04:48:34 +0000 (04:48 +0000)]
buildman: Add support for environment delta in summary

When summarising the builds, add the -U option to emit delta lines for
the default environment built into U-Boot at each commit.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agobuildman: Extract environment as part of each build
Alex Kiernan [Thu, 31 May 2018 04:48:33 +0000 (04:48 +0000)]
buildman: Extract environment as part of each build

As we're building the boards, extract the default U-Boot environment to
uboot.env so we can interrogate it later.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agotest: Fix sandbox_spl test filter
Simon Glass [Wed, 16 May 2018 07:10:24 +0000 (01:10 -0600)]
test: Fix sandbox_spl test filter

This filter does not match the test it is intended to anymore. Update it
so that it works again.

Signed-off-by: Simon Glass <sjg@chromium.org>
6 years agopatman: Fix unit tests for SPDX
Simon Glass [Wed, 16 May 2018 06:48:16 +0000 (00:48 -0600)]
patman: Fix unit tests for SPDX

The format of this line has changed. Update the patman test to suit.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Alex Kiernan <alex.kiernan@gmail.com>
6 years agoblock: Have BLOCK_CACHE default to y in some cases
Tom Rini [Tue, 22 May 2018 16:24:16 +0000 (12:24 -0400)]
block: Have BLOCK_CACHE default to y in some cases

When dealing with filesystems that come from block devices we can get a
noticeable performance gain in some use cases from having the block
cache enabled.  The code paths are valid in other cases when we have BLK
set and may provide wins in raw reads in some use cases, so have this be
default when BLK is enabled.

Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agoARM: orion5x: fix use of callee-saved registers in lowloevel_init
Mans Rullgard [Mon, 7 May 2018 10:10:47 +0000 (11:10 +0100)]
ARM: orion5x: fix use of callee-saved registers in lowloevel_init

The lowlevel_init function uses r4 and r6 without preserving their
values as required by the AAPCS.  Use r0 and r2 instead as these
are call-clobbered.

Signed-off-by: Mans Rullgard <mans@mansr.com>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
6 years agomvebu: turris_omnia: add note about i2c slave disable
Baruch Siach [Thu, 7 Jun 2018 09:38:11 +0000 (12:38 +0300)]
mvebu: turris_omnia: add note about i2c slave disable

Code that disables the i2c slave is now in the mvtwsi i2c driver.
Platform must enable DM_I2C to use that code. Add a comment in the code
as a reminder for the planned DM_I2C migration of Turris Omnia.

Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
6 years agoi2c: mvtwsi: disable i2c slave on Armada 38x
Baruch Siach [Thu, 7 Jun 2018 09:38:10 +0000 (12:38 +0300)]
i2c: mvtwsi: disable i2c slave on Armada 38x

Equivalent code that disables the hidden i2c0 slave already exists in
the Turris Omnia platform specific code. But this hidden i2c0 slave that
interferes the i2c bus is not board specific. Armada 38x SoCs and at
least some Kirkwood variants are affected as well. Add code to disable
this slave to the i2c bus driver to make it work on all affected
hardware.

Use the bind callback because we want this to always run at boot,
regardless of whether U-Boot uses the i2c bus.

Cc: Rabeeh Khoury <rabeeh@solid-run.com>
Cc: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-samsung
Tom Rini [Wed, 6 Jun 2018 13:08:16 +0000 (09:08 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-samsung

6 years agoMerge branch 'master' of git://git.denx.de/u-boot-spi
Tom Rini [Wed, 6 Jun 2018 11:16:43 +0000 (07:16 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-spi

6 years agomtd: ubi: Add missing newlines in ubi_init()
Stefan Roese [Tue, 29 May 2018 13:28:54 +0000 (15:28 +0200)]
mtd: ubi: Add missing newlines in ubi_init()

I just stumbled over some cluttered UBI messages. It seems some newline
chars are missing in the current U-Boot UBI source. Lets fix this
in U-Boot as well (Linux has those fixes already).

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
6 years agomach-stm32: Enable SPL_RESET_SUPPORT flag
Patrice Chotard [Thu, 31 May 2018 07:00:43 +0000 (09:00 +0200)]
mach-stm32: Enable SPL_RESET_SUPPORT flag

Since commit 0e373c0ade8c ("spl: add SPL_RESET_SUPPORT"),
reset is supported in SPL, enable this flag for STM32F SoCs family.

This allows to remove a specific case in RCC mfd driver.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
6 years agodrivers/rtc: convert mvrtc to DM
Chris Packham [Mon, 28 May 2018 11:39:58 +0000 (23:39 +1200)]
drivers/rtc: convert mvrtc to DM

Add DM support for the Marvell RTC driver.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
6 years agodrivers/rtc: prepare mvrtc for DM conversion
Chris Packham [Mon, 28 May 2018 11:39:57 +0000 (23:39 +1200)]
drivers/rtc: prepare mvrtc for DM conversion

Split the rtc_{get,set,reset} functions so that the bodies can be used
in a DM driver.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
6 years agoboard_f: Only reserve memory for U-Boot if we're going to relocate
Alexey Brodkin [Fri, 25 May 2018 13:08:14 +0000 (16:08 +0300)]
board_f: Only reserve memory for U-Boot if we're going to relocate

In case of no relocation we'll just waste some space at the very end
of usable memory area. If target device has very limited amount of memory
(for example 256 kB) this loss will be pretty inconvenient.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefan Roese <sr@denx.de>
6 years agoboard: STiH410-B2260: Add pxefile_addr_r variable
Riku Voipio [Thu, 24 May 2018 14:15:26 +0000 (17:15 +0300)]
board: STiH410-B2260: Add pxefile_addr_r variable

Reading doc/README.distro , we see platform needs to set
pxefile_addr_r to support distro boot.

Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
6 years agomenu: fix timeout duration
Masahiro Yamada [Thu, 24 May 2018 08:04:57 +0000 (17:04 +0900)]
menu: fix timeout duration

For distro-boot, the TIMEOUT directive in the boot script specifies
how long to pause in units of 1/10 sec. [1]

Commit 8594753ba0a7 ("menu: only timeout when menu is displayed")
corrected this by simply dividing the timeout value by 10 in
menu_interactive_choice().

I see two problems:

 - For example, "TIMEOUT 5" should wait for 0.5 sec, but the current
   implementation cannot handle the granularity of 1/10 sec.
   In fact, it never breaks because "m->timeout / 10" is zero,
   which means no timeout.

 - The menu API is used not only by cmd/pxe.c but also by
   common/autoboot.c .  For the latter case, the unit of the
   timeout value is _second_ because its default is associated
   with CONFIG_BOOTDELAY.

To fix the first issue, use DIV_ROUND_UP() so that the timeout value
is rounded up to the closest integer.

For the second issue, move the division to the boundary between
cmd/pxe.c and common/menu.c .  This is a more desirable place because
the comment of struct pxe_menu says:

 * timeout - time in tenths of a second to wait for a user key-press before
 *           booting the default label.

Then, the comment of menu_create() says:

 * timeout - A delay in seconds to wait for user input. If 0, timeout is
 * disabled, and the default choice will be returned unless prompt is 1.

[1] https://www.syslinux.org/wiki/index.php?title=SYSLINUX#TIMEOUT_timeout

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
6 years agodisk: efi: Correct backing up the MBR boot code
Sam Protsenko [Mon, 21 May 2018 23:04:21 +0000 (02:04 +0300)]
disk: efi: Correct backing up the MBR boot code

In commit e163a931af34 ("cmd: gpt: backup boot code before writing MBR")
there was added the procedure for storing old boot code when doing "gpt
write". But instead of storing just backup code, the whole MBR was
stored, and only specific fields were replaced further, keeping
everything else intact. That's obviously not what we want.

Fix the code to actually store only old boot code and zero out
everything else. This fixes next testing case:

    => mmc write $loadaddr 0x0 0x7b
    => gpt write mmc 1 $partitions

In case when $loadaddr address and further memory contains 0xff, the
board was bricked (ROM-code probably didn't like partition entries that
were clobbered with 0xff). With this patch applied, commands above don't
brick the board.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Cc: Alejandro Hernandez <ajhernandez@ti.com>
Tested-by: Andy Shevchenko <andy.shevchenko@gmail.com>
6 years agoARM: legoev3: update boot script to load uEnv.txt and .dtb
David Lechner [Sun, 20 May 2018 04:25:07 +0000 (23:25 -0500)]
ARM: legoev3: update boot script to load uEnv.txt and .dtb

This updates the LEGO MINDSTORMS EV3 boot script to try loading a
uEnv.txt file and a da850-lego-ev3.dtb device tree during boot.

Signed-off-by: David Lechner <david@lechnology.com>
6 years agoARM: legoev3: remove unused configuration options
David Lechner [Sun, 20 May 2018 04:25:06 +0000 (23:25 -0500)]
ARM: legoev3: remove unused configuration options

This removes the unused clock and RAM config options that were cargo-
culted when this board was copied from the DA850 EVM.

Signed-off-by: David Lechner <david@lechnology.com>
6 years agoARM: legoev3: disable networking
David Lechner [Sun, 20 May 2018 04:25:05 +0000 (23:25 -0500)]
ARM: legoev3: disable networking

This disables networking related items in the config. The EV3 does not have
any networking hardware, so this is wasted space.

Signed-off-by: David Lechner <david@lechnology.com>
6 years agoARM: legoev3: Move UART enable to early init
David Lechner [Sun, 20 May 2018 04:25:04 +0000 (23:25 -0500)]
ARM: legoev3: Move UART enable to early init

This moves the UART init for LEGO MINDSTORMS EV3 to board_early_init_f().
Some console messages were not being printed because the UART was not
enabled until later in the init process.

Signed-off-by: David Lechner <david@lechnology.com>
6 years agoARM: legoev3: increase flash image sizes
David Lechner [Sun, 20 May 2018 04:25:03 +0000 (23:25 -0500)]
ARM: legoev3: increase flash image sizes

This increases the kernel image to 4M and the rootfs image to 10M.

It is getting hard to get a kernel image to fit in 3M.

Signed-off-by: David Lechner <david@lechnology.com>
6 years agoMerge git://git.denx.de/u-boot-marvell
Tom Rini [Tue, 5 Jun 2018 11:13:42 +0000 (07:13 -0400)]
Merge git://git.denx.de/u-boot-marvell

6 years agoARM: kirkwood: Enforce size limit for guruplug
Chris Packham [Mon, 4 Jun 2018 07:51:50 +0000 (19:51 +1200)]
ARM: kirkwood: Enforce size limit for guruplug

The u-boot binary sits in flash immediately before the environment.
Don't allow the binary size to grow into the environment space.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoARM: kirkwood: Enforce size limit for sheevaplug
Chris Packham [Mon, 4 Jun 2018 07:51:49 +0000 (19:51 +1200)]
ARM: kirkwood: Enforce size limit for sheevaplug

The u-boot binary sits in flash immediately before the environment.
Don't allow the binary size to grow into the environment space.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoEnable thumb build to reduce build size of u-boot.kwb.
Vagrant Cascadian [Sun, 3 Jun 2018 19:38:37 +0000 (12:38 -0700)]
Enable thumb build to reduce build size of u-boot.kwb.

Without this, u-boot.kwb overlaps where the u-boot environment is
stored, and updating the environment can break u-boot and vice versa.

  https://bugs.debian.org/897671
  https://lists.denx.de/pipermail/u-boot/2018-May/327497.html

Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoARM: kirkwood: SBx81LIFKW: Enable network hardware
Chris Packham [Sun, 3 Jun 2018 04:21:27 +0000 (16:21 +1200)]
ARM: kirkwood: SBx81LIFKW: Enable network hardware

The SBx81LIFKW boards connect to the internal chassis management network
via a Marvell 88e6097 L2 switch. The chassis connections are direct
serdes on ports 8 and 9 with a RGMII interface on port 10 connected to
the CPU MAC.

For debugging purposes ports 0 and 1 are also taken out to headers on
the board. Because the debug interfaces are sometimes connected to with
straight ribbon cables we need to run them at 10Mbps.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoARM: add SBx81LIFKW board
Chris Packham [Wed, 30 May 2018 08:14:35 +0000 (20:14 +1200)]
ARM: add SBx81LIFKW board

This is a series of line cards for Allied Telesis's SBx8100 chassis
switch. The CPU block is common to the SBx81GS24a, SBx81XS6, SBx81XS16
and SBx81GT40 cards collectively referred to as SBx81LIFKW in u-boot.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoARM: kirkwood: remove automatic I2C config if DM_I2C is enabled
Chris Packham [Wed, 30 May 2018 08:14:34 +0000 (20:14 +1200)]
ARM: kirkwood: remove automatic I2C config if DM_I2C is enabled

The mach/config.h file would helpfully define CONFIG_SYS_I2C and
CONFIG_SYS_I2C_MVTWSI if CONFIG_CMD_I2C was defined by the board. This
conflicts with the way DM_I2C works. As a transitional measure don't
automatically define these if CONFIG_DM_I2C is defined. It should be
possible to remove this once all kirkwood boards are migrated to DM.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoarm: kirkwood: lsxl: Add SPI driver model support
Michael Walle [Tue, 29 May 2018 21:13:20 +0000 (23:13 +0200)]
arm: kirkwood: lsxl: Add SPI driver model support

This patch shows how to enable driver model support for the LS-CHLv2 and
LS-XHL boards.

There are a couple of open questions:
 - do I need the u-boot,dm-pre-reloc tags in the device tree?
 - should mach/config.h define CONFIG_DM_SEQ_ALIAS?
 - how can we split this patch or are there any other pending patches
   which does the same and I didn't catch these.

This patch is based on the http://git.denx.de/u-boot-marvell.git (master
branch) and needs the following patches, which are still pending:
  https://patchwork.ozlabs.org/patch/909618/
  https://patchwork.ozlabs.org/patch/909617/
  https://patchwork.ozlabs.org/patch/909973/

Signed-off-by: Michael Walle <michael@walle.cc>
Tested-by: Michael Walle <michael@walle.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoenable CONFIG_DISTRO_DEFAULTS for LS-CHLv2 board
Michael Walle [Tue, 29 May 2018 21:13:19 +0000 (23:13 +0200)]
enable CONFIG_DISTRO_DEFAULTS for LS-CHLv2 board

Synchronize it with the LS-XHL board.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoarm: mvebu: switch clearfog to use device-tree i2c and gpio
Jon Nettleton [Mon, 28 May 2018 16:10:30 +0000 (19:10 +0300)]
arm: mvebu: switch clearfog to use device-tree i2c and gpio

This switches the clearfog boards to use DM based gpio and i2c
drivers.  The io expanders are configured via their device-tree
entries.

Signed-off-by: Jon Nettleton <jon@solid-run.com>
[baruch: add DT i2c aliases]
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoarm: mvebu: enable sata support for clearfog
Jon Nettleton [Mon, 28 May 2018 10:35:15 +0000 (13:35 +0300)]
arm: mvebu: enable sata support for clearfog

The a38x sata interfaces run in ahci mode and can
be accessed via the scsi command.

Signed-off-by: Jon Nettleton <jon@solid-run.com>
[baruch: rebase on current upstream]
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agomvebu: a38x: Force receiver detected on PCIe lanes
Rabeeh Khoury [Sun, 27 May 2018 15:34:08 +0000 (18:34 +0300)]
mvebu: a38x: Force receiver detected on PCIe lanes

Some QCA988x based modules presence is not detected by the SERDES lanes,
so force this detection which will trigger the LTSSM state machine to
negotiate link.

An example of such a card is WLE900VX.

Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Tested-by: Chris Packham <judge.packham@gmail.com>
Tested-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
6 years agoPrepare v2018.07-rc1 v2018.07-rc1
Tom Rini [Mon, 4 Jun 2018 22:08:45 +0000 (18:08 -0400)]
Prepare v2018.07-rc1

Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agosf: Add support for gd25q32b gigadevice flash
Carlo Caione [Sat, 2 Jun 2018 13:06:17 +0000 (14:06 +0100)]
sf: Add support for gd25q32b gigadevice flash

This flash IC is used in some chromebook models
manufactured by Bitland.

Signed-off-by: Carlo Caione <carlo@endlessm.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agosf: Set current flash bank to 0 in clean_bar()
Marek Vasut [Thu, 24 May 2018 19:58:40 +0000 (21:58 +0200)]
sf: Set current flash bank to 0 in clean_bar()

The clean_bar() function resets the SPI NOR BAR register to 0, but
does not set the flash->curr_bar to 0 , therefore those two can get
out of sync, which could ultimatelly result in corrupted flash content.

The simplest test case is this:

  => mw 0x10000000 0x1234abcd 0x4000
  => sf probe
  => sf erase 0x1000000 0x10000
  => sf write 0x10000000 0x1000000 0x10000

  => sf probe ; sf read 0x12000000 0 0x10000 ; md 0x12000000

That is, erase a sector above the 16 MiB boundary and write it with
random pre-configured data. What will actually happen without this
patch is the sector will be erased, but the data will be written to
BAR 0 offset 0x0 in the flash.

This is because the erase command will call write_bar()+clean_bar(),
which will leave flash->bank_curr = 1 while the hardware BAR registers
will be set to 0 through clean_bar(). The subsequent write will also
trigger write_bar()+clean_bar(), but write_bar checks if the target
bank == flash->bank_curr and if so, does NOT reconfigure the BAR in
the SPI NOR. Since flash->bank_curr is still 1 and out of sync with
the HW, the condition matches, BAR programming is skipped and write
ends up at address 0x0, thus corrupting flash content.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agospi: cadence_qspi: Change to use devfdt_get_addr_index()
Ley Foon Tan [Mon, 7 May 2018 09:42:55 +0000 (17:42 +0800)]
spi: cadence_qspi: Change to use devfdt_get_addr_index()

Change to use devfdt_get_addr_index() function to get fdt address.

Original code has compilation warning below:

drivers/spi/cadence_qspi.c: In function ‘cadence_spi_ofdata_to_platdata’:
drivers/spi/cadence_qspi.c:297:18: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
  plat->regbase = (void *)data[0];
                  ^
drivers/spi/cadence_qspi.c:298:18: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
  plat->ahbbase = (void *)data[2];
                  ^
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agoconfigs: Resync with savedefconfig
Tom Rini [Mon, 4 Jun 2018 15:57:37 +0000 (11:57 -0400)]
configs: Resync with savedefconfig

Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agoMAINTAINERS: Take over DB410c maintainership
Ramon Fried [Thu, 31 May 2018 18:24:05 +0000 (21:24 +0300)]
MAINTAINERS: Take over DB410c maintainership

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
6 years agodb410c: Added pre-relocation attribute to pinctrl
Ramon Fried [Thu, 31 May 2018 16:17:00 +0000 (19:17 +0300)]
db410c: Added pre-relocation attribute to pinctrl

u-boot,dm-pre-reloc was missing from pinctrl and it's
children node. causing failure to configure pin mux
before relocation.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
6 years agoscripts: mailmapper: SPDX license identifier
Heinrich Schuchardt [Sun, 3 Jun 2018 16:59:13 +0000 (18:59 +0200)]
scripts: mailmapper: SPDX license identifier

If the SPDX license identifier is in the first line the shell does not
recognize which interpreter shall be used to execute the script.

Cf. https://www.kernel.org/doc/html/v4.16/process/license-rules.html
for scripts which require the '#!PATH_TO_INTERPRETER' in the first line
(...) the SPDX identifier goes into the second line.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
6 years agoInherit default value for bootdelay from distro_bootcmd on odroid-xu3.
Vagrant Cascadian [Sun, 3 Jun 2018 18:56:05 +0000 (11:56 -0700)]
Inherit default value for bootdelay from distro_bootcmd on odroid-xu3.

The default value with distro_bootcmd is 2 seconds, which is
reasonably fast, and provides a consistent experience across platforms
supporting distro_bootcmd.

The current bootdelay value of 0 seconds is a bit challenging to
interrupt when desired.

Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Marek Vasut <marex@denx.de>
6 years agoSet time and umask on multi-dtb fit images to ensure reproducibile builds.
Vagrant Cascadian [Sun, 3 Jun 2018 19:26:57 +0000 (12:26 -0700)]
Set time and umask on multi-dtb fit images to ensure reproducibile builds.

When building compressed (lzop, gzip) multi-dtb fit images, the
compression tool may embed the time or umask in the image.

Work around this by manually setting the time of the source file using
SOURCE_DATE_EPOCH and a hard-coded 0600 umask.

With gzip, this could be accomplished by using -n/--no-name, but lzop
has no current workaround:

  https://bugs.debian.org/896520

Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
6 years agoxilinx: Sync symbols location in defconfigs
Michal Simek [Mon, 4 Jun 2018 06:33:30 +0000 (08:33 +0200)]
xilinx: Sync symbols location in defconfigs

CONFIG_DEBUG_UART_BASE and CONFIG_DEBUG_UART_CLOCK have changed that's
why this sync.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-sunxi
Tom Rini [Mon, 4 Jun 2018 12:55:00 +0000 (08:55 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-sunxi

6 years agoboard: sun50i: Add Amarula A64-Relic initial support
Jagan Teki [Mon, 28 May 2018 11:04:43 +0000 (16:34 +0530)]
board: sun50i: Add Amarula A64-Relic initial support

Amarula A64-Relic is A64 based IoT device, which support
- Allwinner A64 Cortex-A53
- Mali-400MP2 GPU
- AXP803 PMIC
- 1GB DDR3 RAM
- 8GB eMMC
- AP6330 Wifi/BLE
- MIPI-DSI
- CSI: OV5640 sensor
- USB OTG
- 12V DC power supply

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
6 years agoSPDX: Fixup tags from latest EFI PR
Tom Rini [Sun, 3 Jun 2018 20:10:22 +0000 (16:10 -0400)]
SPDX: Fixup tags from latest EFI PR

Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agoMerge tag 'signed-efi-next' of git://github.com/agraf/u-boot
Tom Rini [Sun, 3 Jun 2018 16:27:56 +0000 (12:27 -0400)]
Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot

Patch queue for efi - 2018-06-03

A number of fixes and feature completeness work this time around:

  - Fix sunxi GOP reservation
  - Fix cursor position
  - Fix efi_get_variable
  - Allow more selftest parts to build on x86_64
  - Allow unaligned memory access on armv7
  - Implement ReinstallProtocolInterface
  - More sandbox preparation

6 years agoMerge tag 'signed-rpi-next' of git://github.com/agraf/u-boot
Tom Rini [Sun, 3 Jun 2018 16:27:42 +0000 (12:27 -0400)]
Merge tag 'signed-rpi-next' of git://github.com/agraf/u-boot

Patch queue for rpi - 2018-06-03

This pull request only includes a single patch that was left
out in the last one: A fix to have the fdt stay at its original
location in RAM during boot.