Tom Rini [Wed, 14 Nov 2018 23:25:34 +0000 (18:25 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-sunxi
Tom Rini [Wed, 14 Nov 2018 16:30:07 +0000 (11:30 -0500)]
Merge branch 'next'
This brings in the u-boot-net PR from Joe.
Tom Rini [Wed, 14 Nov 2018 16:10:06 +0000 (11:10 -0500)]
Prepare v2018.11
Signed-off-by: Tom Rini <trini@konsulko.com>
Anatolij Gustschin [Thu, 18 Oct 2018 14:15:39 +0000 (16:15 +0200)]
gpio: pca953x_gpio: fix DT GPIO flags translation
Commit
fb01e07a95 accidentally broke initialisation of GPIO
descriptor flags from device tree: currently the active low
flag from gpio-specifier is always ignored. Fix it.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Mario Six <mario.six@gdsys.cc>
Tom Rini [Wed, 14 Nov 2018 00:54:45 +0000 (19:54 -0500)]
configs: Migrate and re-enabled CONFIG_CMD_MTDPARTS
Now that CMD_UBI does not select CMD_MTDPARTS we need to make platforms
that had been enabling it turn it on by hand. This exposed that we had
not yet migrated CMD_MTDPARTS fully, so do so now.
Fixes:
86dfa556d927 ("cmd: ubi: Remove useless call to mtdparts_init()")
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 14 Nov 2018 00:50:01 +0000 (19:50 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-spi
Tom Rini [Wed, 14 Nov 2018 00:44:53 +0000 (19:44 -0500)]
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
Icenowy Zheng [Sun, 28 Oct 2018 21:26:12 +0000 (14:26 -0700)]
sunxi: use 6MHz PLL_VIDEO step for DE2 for higher resolution LCD
DE2 SoCs can support LCDs up to 1080p (e.g. A64), and 3MHz step won't
let PLL_VIDEO be high enough for them.
Use 6MHz step for PLL_VIDEO when using DE2, to satisfy 1080p LCD.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Vasily Khoruzhick <anarsoul@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
Jagan Teki [Mon, 5 Nov 2018 07:50:40 +0000 (13:20 +0530)]
board: allwinner: sun50i-h6: Add Orangepi Lite2 support
OrangePi Lite2 is Allwinner H6 based open-source SBC,
which support:
- Allwinner H6 Quad-core 64-bit ARM Cortex-A53
- GPU Mali-T720
- 1GB LPDDR3 RAM
- AXP805 PMIC
- AP6356S Wifi/BT
- USB 2.0, USB 3.0 Host, OTG
- HDMI port
- 5V/2A DC power supply
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Jagan Teki [Mon, 5 Nov 2018 07:50:39 +0000 (13:20 +0530)]
arm64: allwinner: h6: Add common orangepi nodes into dtsi
Based on the information from hardware schematics and orangepi
vendor orangepi H6 boards, One Plus and Lite2 shares common nodes
like axp805, uart, mmc0 etc. The common differences between them is
- One Plus, has Ethernet
- Lite2, has Wifi, USB3, CSI port.
So, add common orangepi nodes into sun50i-h6-orangepi.dtsi so-that
it case use on respective orangepi h6 board dts files.
Cc: zhaoyifan <zhao_steven@263.net>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Vasily Khoruzhick [Tue, 6 Nov 2018 04:24:31 +0000 (20:24 -0800)]
sunxi: DT: add support for Pinebook
Pinebook is a laptop produced by Pine64, with USB-connected keyboard,
USB-connected touchpad and an eDP LCD panel connected via a RGB-eDP
bridge from Analogix.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Tested-by: Maxime Ripard <maxime.ripard@bootlin.com>
Cc: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Vasily Khoruzhick [Tue, 6 Nov 2018 04:24:30 +0000 (20:24 -0800)]
sun50i: A64: add support for R_I2C controller
Allwinner A64 has a I2C controller, which is in the R_ MMIO zone and has
two groups of pinmuxes on PL bank, so it's called R_I2C.
Add support for this I2C controller and the pinmux which doesn't conflict
with RSB.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Tested-by: Maxime Ripard <maxime.ripard@bootlin.com>
Cc: Vagrant Cascadian <vagrant@debian.org>
Acked-by: Jagan Teki <jagan@openedev.com>
Vasily Khoruzhick [Tue, 6 Nov 2018 04:24:29 +0000 (20:24 -0800)]
dm: video: bridge: don't fail to activate bridge if reset or sleep GPIO is missing
Both GPIOs are optional, so we shouldn't fail if any is missing.
Without this fix reset is not deasserted if sleep GPIO is missing.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Tested-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Cc: Vagrant Cascadian <vagrant@debian.org>
Vasily Khoruzhick [Tue, 6 Nov 2018 04:24:28 +0000 (20:24 -0800)]
mmc: sunxi: add support for automatic delay calibration
A64 and H6 support automatic delay calibration and Linux driver uses it
instead of hardcoded delays. Add support for it to u-boot driver.
Fixes eMMC instability on Pinebook
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Tested-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Cc: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Andre Przywara [Mon, 29 Oct 2018 00:56:50 +0000 (00:56 +0000)]
sunxi: A64: Add Pine64-LTS board
The Pine64 LTS is an updated version of the Pine64, copying the
technical updates from the SoPine platform: LPDDR3 DRAM, eMMC socket and
soldered SPI flash chip, even the broken SD card detect pin has been copied.
Consequently this leads to the .dts (copied from the kernel) just including
the SoPine baseboard .dts, and the defconfig being almost identical.
Nevertheless the boards deserves a separate config.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Andre Przywara [Mon, 29 Oct 2018 00:56:49 +0000 (00:56 +0000)]
sunxi: H3/H5: Update .dts files
Update the .dts/.dtsi files from the Linux sunxi/dt64-for-4.20 tree:
commit
679294497be31596e1c9c61507746d72b6b05f26
Author: Rodrigo Exterckötter Tjäder <rodrigo@tjader.xyz>
Date: Wed Sep 26 19:48:24 2018 +0000
arm64: dts: allwinner: a64: a64-olinuxino: set the PHY TX delay
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Andre Przywara [Mon, 29 Oct 2018 00:56:48 +0000 (00:56 +0000)]
sunxi: A64: Re-add syscon to DT node
The sun50i-a64.dtsi changes introduced in Linux v4.19-rc1 changed the
compatible name for the syscon controller, dropping the generic "syscon"
fallback. Using this new DT node will make the Ethernet driver in every
older kernel (or non-Linux kernels) fail to initialise the MAC device.
To allow booting distribution kernels (from installer images via UEFI,
for instance), re-add the syscon compatible string as a fallback. This
works with both older and newer kernels.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Andre Przywara [Mon, 29 Oct 2018 00:56:47 +0000 (00:56 +0000)]
sunxi: A64: Update .dts/.dtsi files
Update the .dts/.dtsi file from the Linux sunxi/dt64-for-4.20 tree:
commit
679294497be31596e1c9c61507746d72b6b05f26
Author: Rodrigo Exterckötter Tjäder <rodrigo@tjader.xyz>
Date: Wed Sep 26 19:48:24 2018 +0000
arm64: dts: allwinner: a64: a64-olinuxino: set the PHY TX delay
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Marek Vasut [Wed, 10 Oct 2018 16:27:35 +0000 (18:27 +0200)]
sunxi: Imply fitImage support
Enable modern fitImage format on sunxi.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Maxime Ripard <maxime.ripard@bootlin.com>
Cc: Tom Rini <trini@konsulko.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Boris Brezillon [Tue, 13 Nov 2018 11:43:13 +0000 (12:43 +0100)]
mtd: Drop duplicate MTD_PARTITIONS Kconfig option
Commit
9c5b00973bce ("Convert CONFIG_MTD_PARTITIONS et al to Kconfig")
introduced a publicly visible Kconfig entry for the
CONFIG_MTD_PARTITIONS option, while the rework on MTD partitioning
was in progress, and we somehow did not notice that the same Kconfig
entry was added by commit
4048a5c519a8 ("mtd: declare MTD_PARTITIONS
symbol in Kconfig"), but this time as an invisible entry (this can
only be selected by other options).
Keep the non-visible version of this symbol, since MTD_PARTITIONS is
not something the user should be able to enable/disable directly.
Fixes:
4048a5c519a8 ("mtd: declare MTD_PARTITIONS symbol in Kconfig")
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Boris Brezillon [Tue, 13 Nov 2018 11:43:12 +0000 (12:43 +0100)]
cmd: ubi: Remove useless call to mtdparts_init()
Commit
c58fb2cdb3e4 ("cmd: ubi: clean the partition handling")
introduced a call to mtd_probe_devices() in the ubi_attach() path
and this function takes care of parsing mtdparts/mtdids and
creating/registering the associated mtd partitions.
The mtdparts_init() call in the ubi_detach() path is not only
unnecessary but can sometimes print error messages even when things
work properly (that's the case with SPI NAND devices that have not
been probed with 'mtd list'), which is misleading.
Remove this call to mtdparts_init() and drop the dependency on
CMD_MTDPARTS.
Fixes:
c58fb2cdb3e4 ("cmd: ubi: clean the partition handling")
Reported-by: Stefan Roese <sr@denx.de>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Boris Brezillon [Tue, 13 Nov 2018 11:43:11 +0000 (12:43 +0100)]
mtd: Make {MTDIDS, MTDPARTS}_DEFAULT visible when MTD_PARTITIONS is selected
gwventana configs are relying on CMD_UBI to select CMD_MTDPARTS,
which is then making {MTDIDS,MTDPARTS}_DEFAULT options available.
We are about to remove the 'select CMD_MTDPARTS' statement in the
CMD_UBI entry, but if we do that without first making sure
{MTDIDS,MTDPARTS}_DEFAULT are visible, we end up with a build
failure when building gwventana configs.
Address that by adding a depends on MTD_PARTITIONS to
{MTDIDS,MTDPARTS}_DEFAULT which does the trick since CMD_UBI selects
MTD_UBI which in turn selects MTD_PARTITIONS.
We also get rid of the depends on CMD_MTD, since CMD_MTD also selects
MTD_PARTITIONS.
Reported-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Boris Brezillon [Tue, 13 Nov 2018 11:43:10 +0000 (12:43 +0100)]
dfu: nand: Add missing dependency on CMD_MTDPARTS
dfu_fill_entity_nand() uses find_dev_and_part() and mtdparts_init()
which are provided by cmd/mtdparts.c.
Add the dependency to avoid build failures when CMD_MTDPARTS is not
selected.
Reported-by: Jagan Teki <jagan@amarulasolutions.com>
Fixes:
6828e602b722d ("dfu: Migrate to Kconfig")
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Boris Brezillon [Tue, 13 Nov 2018 11:43:09 +0000 (12:43 +0100)]
mtd: Use default mtdparts/mtids when not defined in the environment
U-boot provides a mean to define default values for mtdids and mtdparts
when they're not defined in the environment. Patch mtd_probe_devices()
to use those default values when env_get("mtdparts") or
env_get("mtdids") return NULL.
This implementation is based on the logic found in cmd/mtdparts.c.
Fixes:
5db66b3aee6f ("cmd: mtd: add 'mtd' command")
Reported-by: Stefan Roese <sr@denx.de>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tom Rini [Mon, 12 Nov 2018 13:06:34 +0000 (08:06 -0500)]
Merge tag 'u-boot-imx-
20181112' of git://git.denx.de/u-boot-imx
Fix build vf boards + fix gpr_init()
Marcel Ziswiler [Fri, 9 Nov 2018 14:31:17 +0000 (15:31 +0100)]
imx: mkimage: add size check to the u-boot.imx make target
The make macro to check if the binary exceeds the board size limit is
taken straight from the root Makefile.
Without this and e.g. enabled EFI Vybrid fails booting as the regular
size limit check does not take the final u-boot.imx binary size into
account which is bigger due to alignment as well as IMX header stuff.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Marcel Ziswiler [Fri, 9 Nov 2018 14:31:16 +0000 (15:31 +0100)]
board: toradex: colibri_vf: drop SPI support
Drop SPI support saving precious 4 Kb on boards with tough size
restrictions.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Marcel Ziswiler [Fri, 9 Nov 2018 14:31:15 +0000 (15:31 +0100)]
board: toradex: colibri_vf: unset CONFIG_CMDLINE_EDITING
Unset CONFIG_CMDLINE_EDITING saving precious 4 Kb on boards with tough
size restrictions.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Marcel Ziswiler [Fri, 9 Nov 2018 14:31:14 +0000 (15:31 +0100)]
board: toradex: colibri_vf: efi_loader: unset CONFIG_EFI_UNICODE_CAPITALIZATION
Unset CONFIG_EFI_UNICODE_CAPITALIZATION on boards with tough size
restrictions.
This is analogous to commit
a90bf07afc43
("efi_loader: unset CONFIG_EFI_UNICODE_CAPITALIZATION").
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Marek Vasut [Tue, 6 Nov 2018 22:42:11 +0000 (23:42 +0100)]
mmc: dw_mmc: Add RCRC handling
This patch adds check for command response CRC failure. The driver
is currently ignoring CRC check failure on command resposes which
have CRC atteched to it, which can be potentially dangerous. Even
more grueling problem happens when the command response is followed
by data transfer though, as in that case, the dwmci_data_transfer()
function will spin until it reaches the 240s timeout.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Jun Nie [Tue, 13 Feb 2018 08:07:55 +0000 (16:07 +0800)]
common: build ymodem only on need
Build ymodem only on need to shrink spl image size.
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Lars Povlsen [Tue, 23 Oct 2018 08:21:25 +0000 (10:21 +0200)]
common: Compile error with CONFIG_MULTI_DTB_FIT and not SPL
common/common_fit.c is including <spl.h>, but not actually using it. The
inclusion will cuase compile error on platforms using CONFIG_OF_SEPARATE
and not SPL.
Signed-off-by: Lars Povlsen <lars.povlsen@microsemi.com>
Reviewed-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Andy Shevchenko [Mon, 5 Nov 2018 16:24:03 +0000 (18:24 +0200)]
dm: Fix typo - missed semicolon
The commit
484fdf5ba058 ("dm: Add support for all targets which requires MANUAL_RELOC")
introduces subtle typo, i.e. missed semicolon.
Fixes:
484fdf5ba058 ("dm: Add support for all targets which requires MANUAL_RELOC")
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Simon Goldschmidt [Fri, 2 Nov 2018 20:49:52 +0000 (21:49 +0100)]
spl: fix debug prints for tiny printf
Tiny printf does not support %.*s and %lX. Since tiny printf should
be very common in SPL, replace these by %32s (for printing image
name) and %lx.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Patrick Delaunay [Thu, 8 Nov 2018 16:52:21 +0000 (17:52 +0100)]
MAINTAINERS: Update stm32mp entry
Add mailing list for stm32mp architecture and board.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Stefan Roese [Thu, 8 Nov 2018 06:00:31 +0000 (07:00 +0100)]
fit: Add missing CR in debug output in fit_find_config_node()
Testing has shown that a line-break is missing in one debug line in
fit_find_config_node().
Signed-off-by: Stefan Roese <sr@denx.de>
Christoph Niedermaier [Fri, 19 Oct 2018 15:40:54 +0000 (17:40 +0200)]
imx: imx6: perform gpr_init only on suitable cpu types
If the function gpr_init is used in a common MX6 spl
implementation we have to ensure that it is only called for
suitable cpu types, otherwise it breaks hardware parts like
enet1, can1, can2, etc.
Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.de>
Tom Rini [Thu, 8 Nov 2018 12:15:29 +0000 (07:15 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-ubi
Bin Meng [Wed, 7 Nov 2018 11:50:35 +0000 (03:50 -0800)]
imx8qxp_mek: Disable CONFIG_DISPLAY_CPUINFO
Due to revert of commit
c0434407b595, this board does not build
any more. Disable CONFIG_DISPLAY_CPUINFO for v2018.11 release.
This commit should be reverted after v2018.11 release.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Wed, 7 Nov 2018 11:50:34 +0000 (03:50 -0800)]
Revert "board_f: Use static print_cpuinfo if CONFIG_CPU is active"
This reverts commit
c0434407b595f785fc7401237896c48c791b45fd.
It turns out commit
c0434407b595 broke some boards which have DM CPU
driver with CONFIG_DISPLAY_CPUINFO option on. These boards just fail
to boot when print_cpuinfo() is called during boot.
Fixes are already sent to ML and in u-boot-dm/next, however since
we are getting close to the v2018.11 release, it's safer we revert
the original commit.
This commit should be reverted after v2018.11 release.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Wed, 7 Nov 2018 12:10:02 +0000 (07:10 -0500)]
Merge tag 'xilinx-for-v2018.11-rc3' of git://git.denx.de/u-boot-microblaze
Xilinx fixes for v2018.11-rc3
- Fix fit loading address for Zynq
Michal Simek [Wed, 17 Oct 2018 10:16:12 +0000 (12:16 +0200)]
arm: zynq: Setup non zero SPL FIT load address
Default setup is 0 which is incorrect place because it points to OCM
which is allocated for SPL only in our case.
Use address in DDR.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Paul Davey [Mon, 5 Nov 2018 05:09:29 +0000 (18:09 +1300)]
fs: ubifs: Fix UBIFS decompression on 64 bit
Add local size_t variable to crypto_comp_decompress as intermediate
storage for destination length to avoid memory corruption and incorrect
results on 64 bit targets.
This is what linux does for the various lz compression implementations.
Signed-off-by: Paul Davey <paul.davey@alliedtelesis.co.nz>
Cc: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
Tom Rini [Tue, 6 Nov 2018 16:12:00 +0000 (11:12 -0500)]
Merge tag 'u-boot-imx-
20181106' of git://git.denx.de/u-boot-imx
Fix coverity issues for i.MX8
Tom Rini [Tue, 6 Nov 2018 15:37:31 +0000 (10:37 -0500)]
Merge git://git.denx.de/u-boot-marvell
Tom Rini [Tue, 6 Nov 2018 13:23:32 +0000 (08:23 -0500)]
Merge git://git.denx.de/u-boot-x86
Stefan Roese [Tue, 23 Oct 2018 10:25:16 +0000 (12:25 +0200)]
arm: mvebu: armada-xp-theadorable.dts: Change CS# for 2nd FPGA
The new board version has the 2nd FPGA connected via CS# 0 instead of
2 on SPI bus 1. Change this setup in the DT accordingly. Please note
that this change does still work on the old board version because the
CS signal is not used on this board.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Tue, 23 Oct 2018 10:25:15 +0000 (12:25 +0200)]
arm: mvebu: armada-xp-theadorable.dts: Add "spi-flash" compatible property
Add the "spi-flash" compatible string so that the generic sf_probe
driver can probe the SPI flash on the theadorable Armada-XP board.
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan Roese [Mon, 22 Oct 2018 12:21:17 +0000 (14:21 +0200)]
arm: mvebu: Move PCI(e) MBUS window to end of RAM
With patch
49b23e035d96 (pci: mvebu: Increase size of PCIe default mapping)
the mapping size for each PCI(e) controller was increased from 32MiB to
128MiB. This leads to problems on boards with multiple PCIe slots / ports
which are unable to map all PCIe ports, e.g. the Armada-XP theadorable:
DRAM: 2 GiB (667 MHz, 64-bit, ECC not enabled)
SF: Detected m25p128 with page size 256 Bytes, erase size 256 KiB, total 16 MiB
Cannot add window '4:f8', conflicts with another window
PCIe unable to add mbus window for mem at
f0000000+
08000000
Model: Marvell Armada XP theadorable
This patch moves the base address for the PCI(e) memory spaces from
0xe8000000 to the end of SDRAM (clipped to a max of 0xc0000000 right now).
This gives move room and flexibility for PCI(e) mappings.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: VlaoMao <vlaomao@gmail.com>
Tested-by: VlaoMao <vlaomao at gmail.com>
Peng Fan [Fri, 26 Oct 2018 02:11:42 +0000 (02:11 +0000)]
MAINTAINERS: add NXP linux team maillist as i.MX reviewer
Add NXP linux team upstream maillist as reviewer
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Fabio Estevam [Fri, 26 Oct 2018 00:49:31 +0000 (21:49 -0300)]
ARM: dts: fsl-imx8qxp-mek: Move regulator outside "simple-bus"
Commit
3c28576bb0f0 ("arm: dts: imx8qxp: fix build warining")
fixed the dts warning by removing the unnecessary
#address-cells/#size-cells, but the recommendation for regulators is not
to place them under "simple-bus", so move the reg_usdhc2_vmmc regulator
accordingly.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Fabio Estevam [Fri, 26 Oct 2018 00:23:07 +0000 (21:23 -0300)]
mx8mq_evk: README: Delete file introduced by mistake
board/freescale/mx8mq_evk/README has been introduced by mistake
in commit
d0dd73974c61 ("imx: add i.MX8QXP MEK board support")
Remove it for now as this should be introduced when mx8mq_evk
support is in place.
Reported-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 5 Nov 2018 09:53:31 +0000 (09:53 +0000)]
tools: imx8image: flatten container header only when creating container
If there is no CONTAINER entry, there is no need to flatten container
header.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 5 Nov 2018 09:53:28 +0000 (09:53 +0000)]
tools: imx8image: fix coverity CID 184233
Fix:
CID 184233: (NEGATIVE_RETURNS)
Using variable "container" as an index to array "imx_header.fhdr".
Reported-by: Coverity
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 5 Nov 2018 09:53:25 +0000 (09:53 +0000)]
tools: imx8image: fix coverity CID 184234
Fix:
CID 184234: (TAINTED_SCALAR)
Using tainted variable "header.num_images - 1" as an index into an array "header.img".
Reported-by: Coverity
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 5 Nov 2018 09:53:22 +0000 (09:53 +0000)]
tools: imx8image: check lseek return value
Check lseek return value.
Fix Coverity CID: 184236 184235 184232
Reported-by: Coverity
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Andy Shevchenko [Wed, 31 Oct 2018 17:14:08 +0000 (19:14 +0200)]
x86: acpi: Remove redundant Offset (0x00)
New ACPI assembler issues a warning:
board/intel/edison/dsdt.asl.tmp 13: Offset (0x00),
Remark 2158 - ^ Unnecessary/redundant use of Offset operator
Indeed, in the OperationRegion the offset is 0x00 by default.
Thus, drop unneeded Offset() use as suggested by ACPI assembler.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tom Rini [Mon, 5 Nov 2018 18:32:56 +0000 (13:32 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-net into next
- ftgmac100 improvements
- TI: CPSW improvements
- VSC8584 PHY support
- Add MT7628 ethernet driver
Grygorii Strashko [Wed, 31 Oct 2018 21:21:45 +0000 (16:21 -0500)]
driver: net: ti: keystone_net: switch to use common mdio lib
Update TI Keystone 2 driver to re-use common mdio lib.
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Grygorii Strashko [Wed, 31 Oct 2018 21:21:44 +0000 (16:21 -0500)]
driver: net: ti: cpsw: switch to use common mdio lib
Update TI CPSW driver to re-use common mdio lib
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Grygorii Strashko [Wed, 31 Oct 2018 21:21:43 +0000 (16:21 -0500)]
driver: net: ti: introduce common mdio support library
All existing TI SoCs network HW have similar MDIO implementation, so
introduce common mdio support library which can be reused by TI networking
drivers.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Grygorii Strashko [Wed, 31 Oct 2018 21:21:42 +0000 (16:21 -0500)]
driver: net: ti: cpsw: update to use SPDX identifier
Update to use SPDX license identifier.
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Grygorii Strashko [Wed, 31 Oct 2018 21:21:41 +0000 (16:21 -0500)]
drivers: net: keystone_net: drop non dm code
Networking support for all TI K2 boards converted to use DM model and
CONFIG_DM_ETH enabled in all corresponding defconfig files, hence drop
unused non DM K2 networking code.
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Grygorii Strashko [Wed, 31 Oct 2018 21:21:40 +0000 (16:21 -0500)]
configs: net: convert DRIVER_TI_KEYSTONE_NET kconfig
Convert DRIVER_TI_KEYSTONE_NET to Kconfig.
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Grygorii Strashko [Wed, 31 Oct 2018 21:21:39 +0000 (16:21 -0500)]
driver: net: consolidate ti's code in separate folder
Add drivers/net/ti/ folder and move all TI's code in this folder for better
maintenance.
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Quentin Schulz [Wed, 31 Oct 2018 10:20:39 +0000 (11:20 +0100)]
net: phy: mscc: add support for VSC8574 PHY
The VSC8574 PHY is a 4-port PHY that is 10/100/1000BASE-T, 100BASE-FX,
1000BASE-X and triple-speed copper SFP capable, can communicate with
the MAC via SGMII, QSGMII or 1000BASE-X, supports WOL, downshifting and
can set the blinking pattern of each of its 4 LEDs, supports SyncE as
well as HP Auto-MDIX detection.
This adds support for 10/100/1000BASE-T and SGMII/QSGMII link with the
MAC.
The VSC8574 has also an internal Intel 8051 microcontroller whose
firmware needs to be patched when the PHY is reset. If the 8051's
firmware has the expected CRC, its patching can be skipped. The
microcontroller can be accessed from any port of the PHY, though the CRC
function can only be done through the PHY that is the base PHY of the
package (internal address 0) due to a limitation of the firmware.
The GPIO register bank is a set of registers that are common to all PHYs
in the package. So any modification in any register of this bank affects
all PHYs of the package.
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Quentin Schulz [Wed, 31 Oct 2018 10:20:38 +0000 (11:20 +0100)]
net: phy: mscc: factorize part of config function for VSC8584
Part of the config is common between the VSC8584 and the VSC8574, so to
prepare for the upcoming support of VSC8574, use the phy_device.priv
pointer that will keep the function that holds code that is PHY-specific
and that should be called during config function.
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Quentin Schulz [Wed, 31 Oct 2018 10:20:37 +0000 (11:20 +0100)]
net: phy: mscc: add support for VSC8584 PHY
The VSC8584 PHY is a 4-port PHY that is 10/100/1000BASE-T, 100BASE-FX,
1000BASE-X and triple-speed copper SFP capable, can communicate with the
MAC via SGMII, QSGMII or 1000BASE-X, supports downshifting and can set
the blinking pattern of each of its 4 LEDs, supports hardware offloading
of MACsec and supports SyncE as well as HP Auto-MDIX detection.
This adds support for 10/100/1000BASE-T and SGMII/QSGMII link with the
MAC.
The VSC8584 has also an internal Intel 8051 microcontroller whose
firmware needs to be patched when the PHY is reset. If the 8051's
firmware has the expected CRC, its patching can be skipped. The
microcontroller can be accessed from any port of the PHY, though the CRC
function can only be done through the PHY that is the base PHY of the
package (internal address 0) due to a limitation of the firmware.
The GPIO register bank is a set of registers that are common to all PHYs
in the package. So any modification in any register of this bank affects
all PHYs of the package.
The revA of the VSC8584 PHY (which is not and will not be publicly
released) should NOT patch the firmware of the microcontroller or it'll
make things worse, the easiest way is just to not support it.
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Cédric Le Goater [Mon, 29 Oct 2018 06:06:41 +0000 (07:06 +0100)]
aspeed: ast2500: fix D2-PLL clock setting in RGMII mode
The algorithm in the ast2500_calc_clock_config() routine suffers from
integer rounding and the requested rate does not get the appropriate
set of Numerator, Denumerator, Post Divider parameters.
This is the case for the D2-PLL clock used by the MAC controllers in
RGMII mode. The requested rated is 250MHz but a 251MHz is assigned.
The easiest way to fix this problem is to introduce an array of clock
settings defining the N, M, P parameters for well known frequencies
used by the Aspeed SoC.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Cédric Le Goater [Mon, 29 Oct 2018 06:06:40 +0000 (07:06 +0100)]
aspeed: Activate ethernet devices on the ast2500 Eval Board
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Cédric Le Goater [Mon, 29 Oct 2018 06:06:39 +0000 (07:06 +0100)]
aspeed: Update ast2500 SoC DTS file to Linux v4.17-rc6 level
This is a large update of the AST2500 SoC DTS file bringing it to the
level of commit
927c2fc2db19 :
Author: Joel Stanley <joel@jms.id.au>
Date: Sat Jun 2 01:18:53 2018 -0700
ARM: dts: aspeed: Fix hwrng register address
There are some differences on the compatibility property names. scu,
reset and clock drivers are also different.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Cédric Le Goater [Mon, 29 Oct 2018 06:06:38 +0000 (07:06 +0100)]
net: ftgmac100: Add support for the Aspeed SoC
The Faraday ftgmac100 MAC controllers as found on the Aspeed SoCs have
some slight differences in the HW interface (End-Of-Rx/Tx-Ring bits).
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Cédric Le Goater [Mon, 29 Oct 2018 06:06:37 +0000 (07:06 +0100)]
aspeed: ast2500: fix missing break in D2PLL clock enablement
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Cédric Le Goater [Mon, 29 Oct 2018 06:06:36 +0000 (07:06 +0100)]
net: ftgmac100: add clock support
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Cédric Le Goater [Mon, 29 Oct 2018 06:06:35 +0000 (07:06 +0100)]
net: ftgmac100: handle timeouts when transmitting
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Cédric Le Goater [Mon, 29 Oct 2018 06:06:34 +0000 (07:06 +0100)]
net: ftgmac100: convert the RX/TX descriptor arrays
Use simple arrays under the device priv structure to hold the RX and
TX descriptors and handle memory coherency by invalidating or flushing
the d-cache when required.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Cédric Le Goater [Mon, 29 Oct 2018 06:06:33 +0000 (07:06 +0100)]
net: ftgmac100: add MDIO bus and phylib support
Implement the MDIO bus read/write functions using the readl_poll_timeout()
routine, initialize the bus and scan for the PHY. RGMII and RMII mode
are supported.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Cédric Le Goater [Mon, 29 Oct 2018 06:06:32 +0000 (07:06 +0100)]
net: ftgmac100: use setbits_le32() in the reset method
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Cédric Le Goater [Mon, 29 Oct 2018 06:06:31 +0000 (07:06 +0100)]
net: ftgmac100: convert to driver model
The driver is based on the previous one and the code is only adapted
to fit the driver model. The support for the Faraday ftgmac100
controller is the same with MAC and MDIO bus support for RGMII/RMII
modes.
Configuration is updated to enable compile again. At this stage, the
driver compiles but is not yet functional.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Cédric Le Goater [Mon, 29 Oct 2018 06:06:30 +0000 (07:06 +0100)]
net: ftgmac100: use the aligned() macro
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Cédric Le Goater [Mon, 29 Oct 2018 06:06:29 +0000 (07:06 +0100)]
net: ftgmac100: use the BIT() macro
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Stefan Roese [Fri, 26 Oct 2018 12:53:27 +0000 (14:53 +0200)]
net: Add MT7628 ethernet driver
This patch adds ethernet support for the MIPS based Mediatek MT76xx SoCs
(e.g. MT7628 and MT7688), including a minimum setup of the integrated
switch. This driver is loosly based on the driver version included in
this MediaTek github repository:
https://github.com/MediaTek-Labs/linkit-smart-uboot.git
Tested on the MT7688 LinkIt smart-gateway and on the
Gardena-smart-gateway.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Frank Wunderlich <frankwu@gmx.de>
Cc: Weijie Gao <hackpascal@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Tom Rini [Sun, 4 Nov 2018 13:12:21 +0000 (08:12 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-sh
Tom Rini [Sat, 3 Nov 2018 12:21:05 +0000 (08:21 -0400)]
Merge tag 'mips-fixes-for-v2018.11' of git://git.denx.de/u-boot-mips
- replace the dynamic size of the relocation table
with a fixed but configurable size
- fixes non-working CONFIG_OF_SEPARATE=y due to invalid _end symbol
Daniel Schwierzeck [Thu, 1 Nov 2018 01:02:21 +0000 (02:02 +0100)]
MIPS: make size of relocation table fixed but configurable
Currently the size of the relocation table will be shrunk
to the actual size needed. Although this gives a maximal
space saving, it messes up the _end symbol. This breaks
features like appended DTBs because the _end symbol doesn't
point to the real end of the U-Boot binary.
Remove the size shrinking and make the size of the relocation
table fixed but configurable. This follows the Linux approach
and the user can adjust the size to his needs.
Also rename the relocation table section from .rel to .data.reloc
to follow the Linux approach and to avoid ambiguities with the
.rel.* sections added by the linker.
Reported-by: Lars Povlsen <lars.povlsen@microsemi.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Marek Vasut [Wed, 13 Jun 2018 06:02:55 +0000 (08:02 +0200)]
mmc: tmio: sdhi: Merge DTCNTL access into single register write
It is perfectly fine to write th DTCNTL TAP count and enable the
SCC sampling clock operation in the same write.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Sun, 28 Oct 2018 18:28:56 +0000 (19:28 +0100)]
mmc: tmio: sdhi: Implement waiting for DAT0 line state
When the bus switches to 1.8V mode of operation, it is necessary to
verify that the card correctly initiated and completed the voltage
switch. This is done by reading out the state of DATA0 line.
This patch implement support for reading out the state of the DATA0
line, so the MMC core code can correctly switch to 1.8V mode.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Wed, 13 Jun 2018 06:02:55 +0000 (08:02 +0200)]
mmc: tmio: sdhi: Clear HS400 settings when resetting SCC
Make sure to clear HS400 configuration when resetting the SCC block.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Sun, 28 Oct 2018 14:30:06 +0000 (15:30 +0100)]
mmc: tmio: sdhi: Touch SCC only when UHS capable
Add check to avoid touching the SCC tuning registers in case the IP
doesn't support them or if the support isn't in place yet.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Wed, 13 Jun 2018 06:02:55 +0000 (08:02 +0200)]
mmc: tmio: Preinitialize regulator to 3.3V
Preinitialize the SD card signals regulator to 3.3V, which is the
default post-reset setting, to be sure the regulator is set to a
valid value.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Wed, 13 Jun 2018 06:02:55 +0000 (08:02 +0200)]
mmc: tmio: Configure clock before any other IOS
Configure the clock settings before reconfiguring any other IO settings.
This is required when the clock must be stopped before changing eg. the
pin configuration or any of the other properties of the bus. Running the
clock configuration first allows the MMC core to do just that.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Tue, 30 Oct 2018 21:05:54 +0000 (22:05 +0100)]
mmc: tmio: Silence transfer errors when tuning
In case the controller performs card tuning, that is, sends MMC
command 19 or 21, silence possible CRC error warning prints. The
warnings are bound to happen, since the tuning will fail for some
settings while searching for the optimal configuration of the bus
and that is perfectly OK.
This patch passes around the MMC command structure and adds check
into tmio_sd_check_error() to avoid printing CRC error warning
when the tuning happens.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Tue, 30 Oct 2018 20:53:29 +0000 (21:53 +0100)]
mmc: tmio: Improve error handling
Properly handle return values and abort operations when they are
non-zero. This is a minor improvement, which fixes two remaining
unchecked return values.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Sun, 28 Oct 2018 12:54:10 +0000 (13:54 +0100)]
mmc: tmio: Simplify pinmux handling
The SD UHS SDR12, SDR25, SDR50, SDR104, DDR50 and MMC HS200, HS400
modes all use 1.8V signaling, while all the legacy modes use 3.3V
signaling. While there are extra modes which use 1.2V signaling,
the existing hardware does not support those.
Simplify the pinmux such that 3.3V signaling implies legacy mode
pinmux and the rest implies UHS mode pinmux. This prevents the
massive case statement from growing further. Moreover, it fixes
an edge case where during SD 1.8V switch, the bus mode is still
set to default while the signaling is already set to 1.8V, which
results in an attempt to communicate with a 1.8V card using pins
in 3.3V mode and thus communication failure.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Wed, 31 Oct 2018 14:06:50 +0000 (15:06 +0100)]
ARM: rmobile: Generate fitting mem_map on Gen3
Patch "ARM: rmobile: Mark 4-64GiB as DRAM on Gen3" marked the entire
64bit DRAM space as cachable. On CortexA57, this might result in odd
side effects, where the CPU tries to prefetch from those areas and if
there is no DRAM backing them, CPU bus hang can happen.
This patch fixes it by generating the mem_map structure based on the
actual memory layout obtained from the DT, thus not marking areas
without any DRAM behind them as cachable.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Fixes:
c1ec34763811d ("ARM: rmobile: Mark 4-64GiB as DRAM on Gen3")
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Wed, 31 Oct 2018 19:34:51 +0000 (20:34 +0100)]
pinctrl: renesas: Add POCCTRL handling to r8a77990
Add definition of the POCCTRL register and bits therein to R8A77990 E3
pincontrol driver. This allows the pincontrol driver to configure SDHI
pin voltage according to power-source DT property.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Wed, 13 Jun 2018 06:02:55 +0000 (08:02 +0200)]
pinctrl: renesas: Fix DRV register offset
Use fixed 4bit size for generating the DRV register element mask,
not the size of the value, which can be smaller.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Tom Rini [Fri, 2 Nov 2018 13:39:18 +0000 (09:39 -0400)]
Merge tag 'arc-for-2018.11' of git://git.denx.de/u-boot-arc
Just 2 non-functinal changes:
1. Rename of EMDK to EMSDP so it matches real marketing name
2. Add essential README for IoTDK
Alexey Brodkin [Wed, 31 Oct 2018 15:44:05 +0000 (18:44 +0300)]
iot_dk: Add README
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Alexey Brodkin [Thu, 18 Oct 2018 06:54:58 +0000 (09:54 +0300)]
emdk->emsdp: Rename board
Real marketing name of the board was recently updated so
to accommodate that change renaming the board and all
related to it.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>