oweals/u-boot.git
6 years agowatchdog: cdns: Add comment for expire_now function
Michal Simek [Mon, 16 Jul 2018 11:34:55 +0000 (13:34 +0200)]
watchdog: cdns: Add comment for expire_now function

IP itself has no reg/no bit which can be used for this functionality.
Add this note to the driver to make sure that none will be asking for
that. Current method is to setup 1s timeout and hang() which is done via
wdt_expire_now().

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agomicroblaze: Do not force saving variables to flash
Michal Simek [Mon, 16 Jul 2018 11:37:28 +0000 (13:37 +0200)]
microblaze: Do not force saving variables to flash

There is no reason to save variables to flash only.
Select option via Kconfig instead.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agomicroblaze: Convert generic platform to DM gpio
Michal Simek [Fri, 13 Jul 2018 06:26:28 +0000 (08:26 +0200)]
microblaze: Convert generic platform to DM gpio

Converting GPIO to DM requires to do changes in reset subsystem
that's why support for Microblaze soft reset via sysreset and GPIO
sysreset support was added.
These two patches enables enabling GPIO DM.
Microblaze soft reset is bind at last reset method.

GPIO reset is handled via sysreset with adding this fragment to DT.

gpio-restart {
compatible = "gpio-restart";
gpios = <&reset_gpio 0 0 0>;
/* 3rd cell ACTIVE_HIGH = 0, ACTIVE_LOW = 1 */
};

hard-reset-gpio property is not documented and also handled.
Conversion is required.

Unfortunately do_reset is required for SPL that's why use only soft
microblaze reset for now.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: xilinx: Setup default number of chipselects for zcu100
Michal Simek [Thu, 31 May 2018 07:50:10 +0000 (09:50 +0200)]
arm64: xilinx: Setup default number of chipselects for zcu100

There is only one chipselect on each connector.
Define it directly in board dts file.
There should be an option to use more chipselects via gpios.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agomicroblaze: Enable watchdog via defconfig
Michal Simek [Mon, 16 Jul 2018 11:03:21 +0000 (13:03 +0200)]
microblaze: Enable watchdog via defconfig

DM watchdog should be enabled by default.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agowatchdog: Convert Xilinx Axi watchdog driver to driver model
Shreenidhi Shedi [Sat, 14 Jul 2018 20:35:41 +0000 (02:05 +0530)]
watchdog: Convert Xilinx Axi watchdog driver to driver model

Xilinx Axi wdt driver conversion to driver model & Kconfig update
for the same.

Signed-off-by: Shreenidhi Shedi <yesshedi@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agomicroblaze: Support for watchdog_reset in init
Shreenidhi Shedi [Sat, 14 Jul 2018 20:35:40 +0000 (02:05 +0530)]
microblaze: Support for watchdog_reset in init

We should support watchdog reset so that WATCHDOG_RESET will function
properly.

Signed-off-by: Shreenidhi Shedi <yesshedi@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agomicroblaze: Delete Xilinx watchdog related macros
Shreenidhi Shedi [Sat, 14 Jul 2018 20:35:39 +0000 (02:05 +0530)]
microblaze: Delete Xilinx watchdog related macros

These macros are not required anymore. These will be taken from
configuration file.

Signed-off-by: Shreenidhi Shedi <yesshedi@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agomicroblaze: Cosmetic changes in Microblaze related files
Shreenidhi Shedi [Sat, 14 Jul 2018 21:04:35 +0000 (02:34 +0530)]
microblaze: Cosmetic changes in Microblaze related files

Signed-off-by: Shreenidhi Shedi <yesshedi@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: zynqmp: Changed zynqmp command to handle subcommands with U_BOOT_CMD_MKENT
Vipul Kumar [Wed, 11 Jul 2018 09:48:28 +0000 (15:18 +0530)]
arm64: zynqmp: Changed zynqmp command to handle subcommands with U_BOOT_CMD_MKENT

This patch changed zynqmp command to handle subcommands with
U_BOOT_CMD_MKENT.

Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agogpio: xilinx: Convert driver to DM
Michal Simek [Thu, 12 Jul 2018 14:05:46 +0000 (16:05 +0200)]
gpio: xilinx: Convert driver to DM

This patch is enabling GPIO_DM support to have an option to use this
driver together with zynq gpio driver.
!DM part is kept there till Microblaze is cleanup which will be done
hopefully soon.

Just a note:
There is no reason to initialize uc-priv->name because it is completely
unused.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agosysreset: Add support for Microblaze soft reset jump
Michal Simek [Fri, 13 Jul 2018 15:00:13 +0000 (17:00 +0200)]
sysreset: Add support for Microblaze soft reset jump

Microblaze is storing reset vector at address 0x0.
It means soft reset can be done by just jumping to this address.
This code was in platform code but sysreset interface is providing
enough capabilities to have more options how to reset the system. It can
go from gpio reset through watchdog reset till soft reset.

The driver has not compatible string because this is cpu specific and DM
core is not able to detect compatible string in DT root that's why this
driver will be instantiated from platform code by calling
device_bind_driver(gd->dm_root, "mb_soft_reset", "reset_soft",
NULL);
It should be bind as the last reset method to ensure that hw reset is
called before this.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agosysreset: Add support for gpio-restart
Michal Simek [Fri, 13 Jul 2018 09:04:56 +0000 (11:04 +0200)]
sysreset: Add support for gpio-restart

The Linux kernel has binding for gpio-restart node.
This patch is adding basic support without supporting any optional
properties.
This driver was tested on Microblaze system where gpio is connected to
SoC reset logic.
Output value is handled via gpios cells values.

In gpio_reboot_request() set_value is writing 1 because
dm_gpio_set_value() is capable to changing it when it is ACTIVE_LOW.
...
if (desc->flags & GPIOD_ACTIVE_LOW)
value = !value;
...

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agoarm: zynq: Try to enable the first watchdog via aliases
Michal Simek [Wed, 11 Jul 2018 06:35:22 +0000 (08:35 +0200)]
arm: zynq: Try to enable the first watchdog via aliases

The same change as was done for zynqmp with this description:

Add support for enabling the first watchdog pointed via aliases.

DT fragment:
aliases {
...
watchdog0= &watchdog0;
watchdog1 = &watchdog_lpd;
...
};

<zynqmp example removed>

Till this patch the first watchdog found in DT was used and started
which is not enabling all possible configuration based on user request.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: zynqmp: Try to enable the first watchdog via aliases
Michal Simek [Wed, 11 Jul 2018 06:30:07 +0000 (08:30 +0200)]
arm64: zynqmp: Try to enable the first watchdog via aliases

Add support for enabling the first watchdog pointed via aliases.

DT fragment:
aliases {
...
watchdog0 = &watchdog0;
watchdog1 = &watchdog_lpd;
...
};

dm tree fragment for above configuration with patch applied:
ZynqMP> dm tree
 Class    index  Probed  Driver      Name
-----------------------------------------
...
 watchdog    0  [   ]   cdns_wdt    |   |-- watchdog@ff150000
 watchdog    1  [ + ]   cdns_wdt    |   `-- watchdog@fd4d0000
...

dm uclass fragment:
ZynqMP> dm uclass
...
uclass 75: watchdog
0   watchdog@ff150000 @ 7df02f40, seq -1, (req 1)
1 * watchdog@fd4d0000 @ 7df02ff0, seq 0, (req 0)
...

It is visible that index 1 is IP with seq 0 which means that FPD
watchdog (@fd4d0000) is in DT below LPD watchdog (@ff150000).

Till this patch the first watchdog found in DT was used and started
which is not enabling all possible configuration based on user request.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agogpio: zynq: Setup bank_name to dev->name
Michal Simek [Thu, 21 Jun 2018 11:58:56 +0000 (13:58 +0200)]
gpio: zynq: Setup bank_name to dev->name

There should be proper bank name setup to distinguish between different
gpio drivers. Use dev->name for it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agomicroblaze: Do not call timer init that early
Michal Simek [Wed, 11 Jul 2018 12:08:26 +0000 (14:08 +0200)]
microblaze: Do not call timer init that early

Timer needs to be converted to DM but as of now it can't be called so
early because intc controller is not ready. Call it later in board_r.c.
Before this patch timer_init is called twice which is wrong.
The patch is blocking initialization before relocation.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agogpio: zynq: Read of mach data in platdata with dev_get_driver_data
Michal Simek [Thu, 12 Jul 2018 08:58:04 +0000 (10:58 +0200)]
gpio: zynq: Read of mach data in platdata with dev_get_driver_data

Remove bogus zynq_gpio_getplat_data() and read driver data directly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agogpio: dm: Support manual relocation for gpio
Michal Simek [Thu, 12 Jul 2018 10:42:27 +0000 (12:42 +0200)]
gpio: dm: Support manual relocation for gpio

Relocate gpio ops as was done by:
"dm: Add support for all targets which requires MANUAL_RELOC"
(sha1: 484fdf5ba058b07be5ca82763aa2b72063540ef3)

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agosysreset: dm: Support manual relocation for sysreset
Michal Simek [Thu, 12 Jul 2018 08:36:07 +0000 (10:36 +0200)]
sysreset: dm: Support manual relocation for sysreset

Relocate sysreset ops as was done by:
"dm: Add support for all targets which requires MANUAL_RELOC"
(sha1: 484fdf5ba058b07be5ca82763aa2b72063540ef3)

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agogpio: zynq: Fix typo in one error message
Michal Simek [Thu, 12 Jul 2018 10:30:34 +0000 (12:30 +0200)]
gpio: zynq: Fix typo in one error message

Just fix error message.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agomicroblaze: Remove unused XILINX_BOARD_NAME macro
Michal Simek [Thu, 12 Jul 2018 06:46:11 +0000 (08:46 +0200)]
microblaze: Remove unused XILINX_BOARD_NAME macro

This macro is not used anywhere that's why remove it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm64: zynqmp: Sync defconfigs in connection to DEFINE_TCM_OCM_MMAP
Michal Simek [Thu, 12 Jul 2018 05:50:59 +0000 (07:50 +0200)]
arm64: zynqmp: Sync defconfigs in connection to DEFINE_TCM_OCM_MMAP

CONFIG_MP was added to Kconfig with enabling CONFIG_DEFINE_TCM_OCM_MMAP=y
for zynqmp boards. This option is enabled by default that's why it
shouldn't be in defconfig.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agowatchdog: dm: Support manual relocation for watchdogs
Michal Simek [Wed, 11 Jul 2018 13:42:25 +0000 (15:42 +0200)]
watchdog: dm: Support manual relocation for watchdogs

Relocate watchdog ops as was done by:
"dm: Add support for all targets which requires MANUAL_RELOC"
(sha1: 484fdf5ba058b07be5ca82763aa2b72063540ef3)

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agowatchdog: dm: Change uclass name to watchdog and enable DM_UC_FLAG_SEQ_ALIAS
Michal Simek [Wed, 11 Jul 2018 06:24:43 +0000 (08:24 +0200)]
watchdog: dm: Change uclass name to watchdog and enable DM_UC_FLAG_SEQ_ALIAS

uclass name is used by dev_read_alias_seq which return seq number when
aliases are used.

Code fragment:
168 int dev_read_alias_seq(struct udevice *dev, int *devnump)
169 {
170         ofnode node = dev_ofnode(dev);
171         const char *uc_name = dev->uclass->uc_drv->name;
172         int ret;
173
174         if (ofnode_is_np(node)) {
175                 ret = of_alias_get_id(ofnode_to_np(node), uc_name);

Also this patch enables DM_UC_FLAG_SEQ_ALIAS to be in sync with Linux
which is also using watchdog name for watchdog aliases.

drivers/watchdog/watchdog_core.c:215:
 ret = of_alias_get_id(wdd->parent->of_node, "watchdog");

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agoarm64: zcu100: Enable USB host ether and ASIX via defconfig
Michal Simek [Wed, 27 Jun 2018 13:54:18 +0000 (15:54 +0200)]
arm64: zcu100: Enable USB host ether and ASIX via defconfig

There is no reason to keep these configs in platform config file.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agomicroblaze: Guard do_reset by CONFIG_SYSRESET
Michal Simek [Thu, 28 Jun 2018 08:30:05 +0000 (10:30 +0200)]
microblaze: Guard do_reset by CONFIG_SYSRESET

sysreset uclass have own do_reset function which should be used instead
of board/platform specific.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agomicroblaze: Use default implementation from include/linux/io.h
Michal Simek [Thu, 28 Jun 2018 08:41:56 +0000 (10:41 +0200)]
microblaze: Use default implementation from include/linux/io.h

There is no reason not to use default ioremap/iounmap io functions.
The patch remove Microblaze macros.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoxilinx: zynq: Add support to secure images
Siva Durga Prasad Paladugu [Tue, 26 Jun 2018 09:32:19 +0000 (15:02 +0530)]
xilinx: zynq: Add support to secure images

This patch basically adds two new commands for loadig secure
images.
1. zynq rsa adds support to load secure image which can be both
   authenticated or encrypted or both authenticated and encrypted
   image in xilinx bootimage(BOOT.bin) format.
2. zynq aes command adds support to decrypt and load encrypted
   image back to DDR as per destination address. The image has
   to be encrypted using xilinx bootgen tool and to get only the
   encrypted image from tool use -split option while invoking
   bootgen.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoserial: zynq: Use platdata for storing static data instead of priv
Michal Simek [Thu, 14 Jun 2018 08:32:27 +0000 (10:32 +0200)]
serial: zynq: Use platdata for storing static data instead of priv

Explanation from Simon Glass
"Private data is created when the device is probed and freed when the
device is removed.

Platform data is created when the device is bound, and survives
probe/remove cycles.

Strictly speaking, platform data should be used to hold the decoded
device tree properties. Private data should be used for run-time
things the device needs to keep track of."

Based on description the driver needs to be switch to use platdata
instead of priv.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agousb_kdb: Get stdio_dev directly from sdev pointer
Michal Simek [Wed, 27 Jun 2018 12:35:07 +0000 (14:35 +0200)]
usb_kdb: Get stdio_dev directly from sdev pointer

Driver supports only one instance of usb keyboard.
Remove the first dependency on generic usbkbd DEVNAME.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agousb_kbd: Add support for watchdog
Michal Simek [Wed, 27 Jun 2018 12:16:54 +0000 (14:16 +0200)]
usb_kbd: Add support for watchdog

There is need to service watchdog in while loop or system will be
restarted when idlying.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoclk: zynqmp: Fixed the same if/else part error reported by coverity
Vipul Kumar [Wed, 27 Jun 2018 05:14:45 +0000 (10:44 +0530)]
clk: zynqmp: Fixed the same if/else part error reported by coverity

This patch fixed the same if/else part error by adding the required
source select on the basis of is_pre_src check.

Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoarm/arm64: zynq/zynqmp: pass the PS init file as a kconfig variable
Luca Ceresoli [Fri, 22 Jun 2018 10:40:16 +0000 (12:40 +0200)]
arm/arm64: zynq/zynqmp: pass the PS init file as a kconfig variable

U-Boot needs to link ps7_init_gpl.c on Zynq or psu_init_gpl.c on
ZynqMP (PS init for short). The current logic to locate this file for
both platforms is:

 1. if a board-specific file exists in
    board/xilinx/zynq[mp]/$(CONFIG_DEFAULT_DEVICE_TREE)/ps?_init_gpl.c
    then use it
 2. otherwise use board/xilinx/zynq/ps?_init_gpl.c

In the latter case the file does not exist in the U-Boot sources and
must be copied in the source tree from the outside before starting the
build. This is typical when it is generated from Xilinx tools while
developing a custom hardware. However making sure that a
board-specific file is _not_ found (and used) requires some trickery
such as removing or overwriting all PS init files (e.g.: the current
meta-xilinx yocto layer).

This generates a few problems:

 * if the source tree is shared among different out-of-tree builds,
   they will pollute (and potentially corrupt) each other
 * the source tree cannot be read-only
 * any buildsystem must add a command to copy the PS init file binary
 * overwriting or deleting files in the source tree is ugly as hell

Simplify usage by allowing to pass the path to the desired PS init
file in kconfig variable XILINX_PS_INIT_FILE. It can be an absolute
path or relative to $(srctree). If the variable is set, the
user-specified file will always be used without being copied
around. If the the variable is left empty, for backward compatibility
fall back to the old behaviour.

Since the issue is the same for Zynq and ZynqMP, add one kconfig
variable in a common place and use it for both.

Also use the new kconfig help text to document all the ways to give
U-Boot the PS init file.

Build-tested with all combinations of:
 - platform: zynq or zynqmp
 - PS init file: from XILINX_PS_INIT_FILE (absolute, relative path,
   non-existing), in-tree board-specific, in board/xilinx/zynq[mp]/
 - building in-tree, in subdir, in other directory

Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Nathan Rossi <nathan@nathanrossi.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agohush: Remove default CONFIG_SYS_PROMPT_HUSH_PS2 setting from board files
Michal Simek [Fri, 22 Jun 2018 06:10:41 +0000 (08:10 +0200)]
hush: Remove default CONFIG_SYS_PROMPT_HUSH_PS2 setting from board files

There is no reason to define default option for this macro which is
already done in common/cli_hush.c.

  86 #ifndef CONFIG_SYS_PROMPT_HUSH_PS2
  87 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
  88 #endif

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: York Sun <york.sun@nxp.com>
6 years agocommon: command: Handle USAGE failure separately
Michal Simek [Thu, 21 Jun 2018 12:49:26 +0000 (14:49 +0200)]
common: command: Handle USAGE failure separately

command_ret_t enum contains 3 return values but only two are handled
now. Extend cmd_process_error() and handle CMD_RET_USAGE separately.

These commands are affected by this change.
cmd/demo.c
cmd/efi.c
cmd/gpio.c
cmd/qfw.c
cmd/x86/fsp.c
test/dm/cmd_dm.c

And scripts shouldn't be affected because return value is not 0. But
every command implementation can choose what it is correct to pass.
I would expect that RET_USAGE is called when parameters are not
correctly passed (have incorrect value, missing parameters)
and RET_FAILURE when correct parameters are passed but command fails.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromum.org>
6 years agocommon: command: Use command_ret_t enum values instead of values
Michal Simek [Mon, 4 Jun 2018 11:29:49 +0000 (13:29 +0200)]
common: command: Use command_ret_t enum values instead of values

Use enum command_ret_t types in cmd_process_error().

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromum.org>
6 years agoarm64: zynqmp: Enable usb mass storage command and functionality
Michal Simek [Thu, 21 Jun 2018 12:40:09 +0000 (14:40 +0200)]
arm64: zynqmp: Enable usb mass storage command and functionality

Enable ums command for zcu100 to enable mass storage gadget.
Tested with ums 0 mmc 0 (for SD) and ums 0 usb 0 (for USB flashdisk).

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agogpio: zynq: Use live-tree function
Michal Simek [Thu, 21 Jun 2018 07:21:35 +0000 (09:21 +0200)]
gpio: zynq: Use live-tree function

Use live-tree function.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-sunxi
Tom Rini [Tue, 17 Jul 2018 18:28:47 +0000 (14:28 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-sunxi

6 years agosunxi: Enable eMMC on Libre Computer Board ALL-H3-CC boards
Chen-Yu Tsai [Sat, 14 Jul 2018 13:55:45 +0000 (21:55 +0800)]
sunxi: Enable eMMC on Libre Computer Board ALL-H3-CC boards

The Libretech ALL-H3-CC has a high density connector for attaching
an eMMC module. The module form factor and connection is specific
to Libretech, and has provisions for split vmmc/vqmmc (core and I/O)
voltage supplies, but this board does not wire the vqmmc side. The
H2+/H3/H5 SoCs do not support alternate I/O voltages for eMMC either.
Only 3.3V is supported. A specific module that ties vqmmc to vmmc,
with both at 3.3V, must be used.

Given that a) eMMC is not designed to be hotplugged, b) power is
always provided on the pins, and c) MMC controllers can deal with
missing cards, we can enable this by default. If a module is attached
it will be picked up by the system.

The device tree change was also submitted to the Linux Kernel and
has already been queued up for 4.19.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-spi
Tom Rini [Mon, 16 Jul 2018 13:13:45 +0000 (09:13 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-spi

6 years agosf: add paired dev info for winbond w25q16jv
Ludwig Zenz [Thu, 5 Jul 2018 07:27:47 +0000 (09:27 +0200)]
sf: add paired dev info for winbond w25q16jv

This commit adds paired dev info for winbond w25q16jv
(tested w25q16jvssiq with a i.mx6 board)

Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agosf: add Macronix mx25l1633e entry
Ludwig Zenz [Thu, 5 Jul 2018 07:27:46 +0000 (09:27 +0200)]
sf: add Macronix mx25l1633e entry

Add support for the Macronix mx25l1633e nor flash. (Tested on a imx6 board)

Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agosf: add Gigadevice gd25q16c entry
Ludwig Zenz [Thu, 5 Jul 2018 07:27:45 +0000 (09:27 +0200)]
sf: add Gigadevice gd25q16c entry

Add support for the Gigadevice gd25q16c nor flash. (Tested on a imx6 board)

Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agospi_flash: add a bunch of winbond flashes to id-table
Hannes Schmelzer [Tue, 26 Jun 2018 21:14:07 +0000 (23:14 +0200)]
spi_flash: add a bunch of winbond flashes to id-table

This commit adds the following flashes to the id-table

- W25Q16JV
- W25Q32JV
- W25Q64JV
- W25Q128JV
- W25Q256JV

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agozynqmp: zcu102: Add qspi driver support for ZynqMP zcu102 boards
Siva Durga Prasad Paladugu [Wed, 4 Jul 2018 12:01:24 +0000 (17:31 +0530)]
zynqmp: zcu102: Add qspi driver support for ZynqMP zcu102 boards

This patch adds qspi driver support for all ZynqMP ZCU102
boards.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agospi: zynqmp_gqspi: Add support for ZynqMP qspi driver
Siva Durga Prasad Paladugu [Wed, 4 Jul 2018 12:01:23 +0000 (17:31 +0530)]
spi: zynqmp_gqspi: Add support for ZynqMP qspi driver

This patch adds qspi driver support for ZynqMP SoC. This
driver is responsible for communicating with qspi flash
devices.

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
[jagan: removed GQSPI_MIO_NUM_ macros]
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agospi: xilinx_spi: convert to livetree
Vipul Kumar [Sat, 30 Jun 2018 02:45:20 +0000 (08:15 +0530)]
spi: xilinx_spi: convert to livetree

Update the xilinx spi driver to support a live tree.

Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agospi: xilinx_spi: Added support to read JEDEC-id twice at the boot time
Vipul Kumar [Sat, 30 Jun 2018 02:45:19 +0000 (08:15 +0530)]
spi: xilinx_spi: Added support to read JEDEC-id twice at the boot time

This patch is for the startup block issue in the spi controller.
SPI clock is passing through STARTUP block to FLASH. STARTUP block
don't provide clock as soon as QSPI provides command. So, first
command fails.

This patch added support to read JEDEC id in xilinx_spi_xfer ().

Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agospi: xilinx_spi: Modify transfer logic xilinx_spi_xfer() function
Vipul Kumar [Sat, 30 Jun 2018 02:45:18 +0000 (08:15 +0530)]
spi: xilinx_spi: Modify transfer logic xilinx_spi_xfer() function

This patch modify xilinx_spi_xfer() function and add rxfifo() and
txfifo() functions to add the modularity so that these functions
can be used by other functions within the same file.

This patch also added support to read fifo_size from dts.

Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agospi: xilinx: Read reg base address from DTS file
Michal Simek [Sat, 30 Jun 2018 02:45:17 +0000 (08:15 +0530)]
spi: xilinx: Read reg base address from DTS file

This patch added support to read register base address from DTS file.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agoconfigs: Bananapi_M2_Ultra: enable gigabit ethernet
Lothar Felten [Fri, 13 Jul 2018 08:45:30 +0000 (10:45 +0200)]
configs: Bananapi_M2_Ultra: enable gigabit ethernet

Enable the gigabit ethernet for the Bananapi M2 Ultra board.
Tested on BananaPi M2 Berry (R40), custom board (V40)

Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
6 years agosunxi: R40: add gigabit ethernet devicetree node
Lothar Felten [Fri, 13 Jul 2018 08:45:29 +0000 (10:45 +0200)]
sunxi: R40: add gigabit ethernet devicetree node

Add a device tree node for the Allwinner R40/V40 GMAC gigabit
ethernet interface.
The R40 SoC does not use the syscon register for GMAC settings.
The gigabit ethernet interface can only be routed to a fixed set of
pins.
Updated to match the Linux kernel's device tree.

Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
6 years agonet: sun8i-emac: support R40 GMAC
Lothar Felten [Fri, 13 Jul 2018 08:45:28 +0000 (10:45 +0200)]
net: sun8i-emac: support R40 GMAC

Add support for the GMAC found in the Allwinner R40/V40 SoC.

The R40 GMAC interface is not controlled by the syscon register but
has a separate configuration register in the CCU.
The clock gate and reset bits are in a different register compared
to the other SoCs supported by this driver.
The driver uses the -gmac suffix for the R40 because the R40 also
has a different 100 MBit MAC (EMAC).

Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
6 years agonet: sun8i-emac: set mux and clock by driver data
Lothar Felten [Fri, 13 Jul 2018 08:45:27 +0000 (10:45 +0200)]
net: sun8i-emac: set mux and clock by driver data

Use driver data->variant information to select device specific
pin mux and phy clock settings.

Suggested by Jagan Teki

Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
6 years agonet: sun8i-emac: fix printing NULL character
Lothar Felten [Fri, 13 Jul 2018 08:45:26 +0000 (10:45 +0200)]
net: sun8i-emac: fix printing NULL character

If the variant is not set and therefore NULL, do not attempt to print
the variant.

Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
6 years agosunxi: R40: add gigabit ethernet clocks
Lothar Felten [Fri, 13 Jul 2018 08:45:25 +0000 (10:45 +0200)]
sunxi: R40: add gigabit ethernet clocks

Add clock control entries for the gigabit interface of the Allwinner
R40/V40 CPU

Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
6 years agodm: sunxi: Use DM for MMC and SATA on all A10 boards
Adam Sampson [Sat, 30 Jun 2018 00:02:29 +0000 (01:02 +0100)]
dm: sunxi: Use DM for MMC and SATA on all A10 boards

Use the driver model for MMC and SATA, in preparation for CONFIG_BLK
defaulting to y.

Tested on A10 Cubieboard.

Signed-off-by: Adam Sampson <ats@offog.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
6 years agodm: mmc: sunxi: Add A10/A20 compatible strings
Adam Sampson [Sat, 30 Jun 2018 00:02:28 +0000 (01:02 +0100)]
dm: mmc: sunxi: Add A10/A20 compatible strings

Commit dd27918c2252 ("dm: mmc: sunxi: Add support for driver model")
only added the allwinner,sun5i-a13-mmc compatible string for this
driver. The DM initialisation code here also works with (at least) A10
and A20, so add the appropriate compatible strings as per Linux 4.17's
driver.

Tested on A10 Cubieboard and A20 pcDuino3 Nano with CONFIG_DM_MMC.
(A20 worked already, because sun7i-a20.dtsi specifies both the A13 and
A20 strings.)

Signed-off-by: Adam Sampson <ats@offog.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
6 years agosunxi: DT: A64: add proper SoPine baseboard device tree
Andre Przywara [Wed, 4 Jul 2018 13:16:39 +0000 (14:16 +0100)]
sunxi: DT: A64: add proper SoPine baseboard device tree

When the defconfig for the SoPine baseboard was added, there wasn't any
proper DT for the board yet, so we used the Pine64 DT as a placeholder.
Copy the DT file(s) meanwhile added in Linux over to U-Boot, and use
them in our defconfig.
This is as of v4.18-rc3, exactly Linux commit:
commit 7d556bfc49adddf2beb0d16c91945c3b8b783282
Author: Jagan Teki <jagannadh.teki@gmail.com>
Date:   Mon Dec 4 10:23:07 2017 +0530

    arm64: allwinner: a64-sopine: Fix to use dcdc1 regulator instead of vcc3v3

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agosunxi: DT: H3: update board .dts files from Linux
Andre Przywara [Wed, 4 Jul 2018 13:16:38 +0000 (14:16 +0100)]
sunxi: DT: H3: update board .dts files from Linux

Update the .dts file for the various boards with an Allwinner H3 SoC.
This is as of v4.18-rc3, exactly Linux commit:
commit 721afaa2aeb860067decdddadc84ed16f42f2048 (HEAD)
Merge: 7c00e8ae041b 87815dda5593
Author: Linus Torvalds <torvalds@linux-foundation.org>
Date:   Mon Jun 11 17:57:38 2018 -0700

    Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

This also includes the OrangePi Zero .dts, which technically has an
Allwinner H2+ SoC.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agosunxi: DT: H5: update board .dts files from Linux
Andre Przywara [Wed, 4 Jul 2018 13:16:37 +0000 (14:16 +0100)]
sunxi: DT: H5: update board .dts files from Linux

Update the .dts file for the various boards with an Allwinner H5 SoC.
This is as of v4.18-rc3, exactly Linux commit:
commit af5d05bdc99c211729cba0a3d5417bccfa308caf
Author: Neil Armstrong <narmstrong@baylibre.com>
Date:   Tue Apr 24 13:47:14 2018 +0200

    arm64: dts: allwinner: Add dts file for Libre Computer Board ALL-H3-CC H5 ver.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agosunxi: DT: update device tree files for Allwinner H3 and H5 SoCs
Andre Przywara [Wed, 4 Jul 2018 13:16:36 +0000 (14:16 +0100)]
sunxi: DT: update device tree files for Allwinner H3 and H5 SoCs

Update the device tree files from the Linux tree as of v4.18-rc3,
exactly Linux commit:
commit 55c5ba5e49a0a124ed416880e8227b493474495e
Author: Chen-Yu Tsai <wens@csie.org>
Date:   Tue Apr 24 19:34:22 2018 +0800

    arm64: dts: allwinner: h5: Add cpu0 label for first cpu

Since the H3 and H5 are very similar (aside from the actual ARM cores),
they share most the SoC .dtsi and thus have to be updated together.
One tiny change is the removal of the "arm/" prefix from the include
path in the sun50i-h5.dtsi, which is needed because we don't share the
same sophisticated DT directory layout of Linux.
Also we need to fix up the board .dts files already, since the .dtsi
removes some pins, so the .dts can't reference them anymore. This is to
maintain bisectability.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agosunxi: DT: A64: update board .dts files from Linux
Andre Przywara [Wed, 4 Jul 2018 13:16:35 +0000 (14:16 +0100)]
sunxi: DT: A64: update board .dts files from Linux

Update the .dts files for the various boards with an Allwinner A64 SoC.
This is as of v4.18-rc3, exactly Linux commit:
commit 818668055c9d588c9a9d151e3b258ed1adacba0b
Author: Jagan Teki <jagan@amarulasolutions.com>
Date:   Mon Apr 23 12:02:39 2018 +0530

    arm64: dts: allwinner: a64: bananapi-m64: add usb otg

It updates the existing DT files, adds the newly added axp803.dtsi and
removes our temporary kludge file to get Ethernet support in U-Boot.
I left the amarula-relic alone, as this DT has not reached mainline yet.
The changes are not critical anyway, and the next sync will fix this.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agosunxi: DT: A64: update device tree file for Allwinner A64 SoC
Andre Przywara [Wed, 4 Jul 2018 13:16:34 +0000 (14:16 +0100)]
sunxi: DT: A64: update device tree file for Allwinner A64 SoC

Updates the device tree file from the the Linux tree as of v4.18-rc3,
exactly Linux commit:
commit c1cff65f9b16b31e731e2e75bbe06638c86e1996
Author: Harald Geyer <harald@ccbib.org>
Date:   Thu Mar 15 16:25:08 2018 +0000

    arm64: dts: allwinner: a64: add simplefb for A64 SoC

This also pulls in the newly required include files for the clock and
reset bindings, also removes the now redundant part from our
*-u-boot.dtsi overlay file.
I kept the PWM node from U-Boot, as we recently gained this explicitly
for U-Boot's own usage and I don't want to regress here. This node is in
the queue for mainline Linux already, so the next sync will make it all
equal again.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
6 years agomach-stm32: Rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET
Ley Foon Tan [Wed, 11 Jul 2018 09:56:57 +0000 (17:56 +0800)]
mach-stm32: Rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET

CONFIG_SPL_RESET_SUPPORT has been renamed to CONFIG_SPL_DM_RESET, update
this Kconfig file.

Fixes: bfc6bae8fa1f ("reset: Rename CONFIG_SPL_RESET_SUPPORT to CONFIG_SPL_DM_RESET")
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-socfpga
Tom Rini [Fri, 13 Jul 2018 13:05:05 +0000 (09:05 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-socfpga

- Update SPDX tag in arch/arm/mach-socfpga/spl_a10.c

Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-i2c
Tom Rini [Thu, 12 Jul 2018 14:35:33 +0000 (10:35 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-i2c

6 years agoarm: socfpga: Fixes: include <debug_uart.h>
Ley Foon Tan [Thu, 12 Jul 2018 13:44:24 +0000 (21:44 +0800)]
arm: socfpga: Fixes: include <debug_uart.h>

Fix compilation warning when enable CONFIG_DEBUG_UART.

arch/arm/mach-socfpga/spl_s10.c: In function ‘board_init_f’:
arch/arm/mach-socfpga/spl_s10.c:146:2: warning: implicit declaration of function ‘debug_uart_init’; did you mean ‘part_init’? [-Wimplicit-function-declaration]
  debug_uart_init();

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoarm: socfpga: Fix: Compile MCR instruction on ARM 32-bit only
Ley Foon Tan [Thu, 12 Jul 2018 11:13:34 +0000 (19:13 +0800)]
arm: socfpga: Fix: Compile MCR instruction on ARM 32-bit only

MCR instruction only available in ARM 32-bit. So, compile MCR instruction
when ARM 32-bit is enabled.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoarm: dts: socfpga: stratix10: Fix memory node
Ley Foon Tan [Thu, 12 Jul 2018 11:13:33 +0000 (19:13 +0800)]
arm: dts: socfpga: stratix10: Fix memory node

Commit 5dfd5607af2114047bd ("ARM: socfpga: Pull DRAM size from DT") get
memory size from DT. So, we need to update memory size in memory node.
Otherwise, it cause U-boot hang.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-ubi
Tom Rini [Thu, 12 Jul 2018 13:47:39 +0000 (09:47 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-ubi

6 years agolpi2c: Add bus busy error handling
Ye Li [Sun, 8 Jul 2018 03:46:43 +0000 (11:46 +0800)]
lpi2c: Add bus busy error handling

When doing "i2c dev 4; i2c probe" with ENET daughter card connected
on iMX8QXP MEK board, we met a i2c bus busy issue, that the BBF of
lpi2c always show busy, but the master is idle, and stop is detected
(SDF set).

This patch addes a handling to re-init the lpi2c master for this
case. Then the issue can be worked around.

Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
6 years agolpi2c: Fix bus stop problem in xfer
Ye Li [Sun, 8 Jul 2018 03:46:42 +0000 (11:46 +0800)]
lpi2c: Fix bus stop problem in xfer

In xfer function, both bus_i2c_read and bus_i2c_write will
send a STOP command.  This causes a problem when reading register
data from i2c device.

Generally two operations comprise the register data reading:
   1. Write the register address to i2c device.
      START | chip_addr | W | ACK | register_addr | ACK |

   2. Read the Data from i2c device.
      START | chip_addr | R | ACK | DATA          | NACK | STOP

The STOP command should happen at the end of the transfer, otherwise
we will always get data from register address 0

Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
6 years agoimx: lpi2c: fix clock issue when NACK detected
Gao Pan [Sun, 8 Jul 2018 03:46:41 +0000 (11:46 +0800)]
imx: lpi2c: fix clock issue when NACK detected

For LPI2C IP, NACK is detected by the rising edge of the ninth clock.
In current uboot driver, once NACK is detected, it will reset and then
disable LPI2C master. As a result, we can never see the falling edge
of the ninth clock.

Signed-off-by: Gao Pan <pandy.gao@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
6 years agoimx_lpi2c: Update lpi2c driver to support imx8
Ye Li [Sun, 8 Jul 2018 03:46:40 +0000 (11:46 +0800)]
imx_lpi2c: Update lpi2c driver to support imx8

Add compatible string for i.MX8 and move imx_lpi2c.h from mx7ulp directory
to u-boot include directory as a common header file.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
6 years agoARM: socfpga: Assure correct ACTLR configuration
Marek Vasut [Tue, 29 May 2018 14:16:46 +0000 (16:16 +0200)]
ARM: socfpga: Assure correct ACTLR configuration

Make sure the ARM ACTLR register has correct configuration, otherwise
the Linux kernel refuses to boot. In particular, the "Write Full Line
of Zeroes" bit must be cleared.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
6 years agoARM: socfpga: Make DRAM node available in SPL
Marek Vasut [Tue, 29 May 2018 16:02:22 +0000 (18:02 +0200)]
ARM: socfpga: Make DRAM node available in SPL

The SPL can also parse the DRAM configuration node to figure out the
memory layout, make sure it is available.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
6 years agoARM: socfpga: Pull DRAM size from DT
Marek Vasut [Mon, 28 May 2018 15:09:45 +0000 (17:09 +0200)]
ARM: socfpga: Pull DRAM size from DT

Pull the DRAM size from DT instead of hardcoding it into U-Boot.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
6 years agoddr: altera: Add ECC DRAM scrubbing support for Arria10
Marek Vasut [Mon, 28 May 2018 15:22:47 +0000 (17:22 +0200)]
ddr: altera: Add ECC DRAM scrubbing support for Arria10

The SDRAM must first be rewritten by zeroes if ECC is used to initialize
the ECC metadata. Make the CPU overwrite the DRAM with zeroes in such a
case. This scrubbing implementation turns the caches on temporarily, then
overwrites the whole RAM with zeroes, flushes the caches and turns them
off again. This provides satisfactory performance.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
6 years agoddr: altera: Drop custom dram_bank_mmu_setup() on Arria10
Marek Vasut [Tue, 29 May 2018 16:04:15 +0000 (18:04 +0200)]
ddr: altera: Drop custom dram_bank_mmu_setup() on Arria10

This function was never used in SPL and the default implementation of
dram_bank_mmu_setup() does the same thing. The only difference is the
part which configures OCRAM as cachable, which doesn't really work as
it covers more than the OCRAM.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
6 years agoarm: socfpga: Add do_bridge_reset for Arria 10
Ley Foon Tan [Fri, 1 Jun 2018 08:13:19 +0000 (16:13 +0800)]
arm: socfpga: Add do_bridge_reset for Arria 10

Add do_bridge_reset() function for Arria 10, it is required by misc.c.

arch/arm/mach-socfpga/built-in.o: In function `do_bridge':
arch/arm/mach-socfpga/misc.c:221: undefined reference to `do_bridge_reset'
make[1]: *** [u-boot] Error 1

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoarm: socfpga: stratix10: Enable Stratix10 SoC build
Ley Foon Tan [Wed, 23 May 2018 16:17:32 +0000 (00:17 +0800)]
arm: socfpga: stratix10: Enable Stratix10 SoC build

Add build support for Stratix SoC

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Conflicts:

arch/arm/Kconfig
arch/arm/mach-socfpga/Kconfig

6 years agoboard: altera: stratix10: Add socdk board support for Stratix10 SoC
Ley Foon Tan [Wed, 23 May 2018 16:17:31 +0000 (00:17 +0800)]
board: altera: stratix10: Add socdk board support for Stratix10 SoC

Add socdk board support for Stratix SoC

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoddr: altera: stratix10: Add DDR support for Stratix10 SoC
Ley Foon Tan [Wed, 23 May 2018 16:17:30 +0000 (00:17 +0800)]
ddr: altera: stratix10: Add DDR support for Stratix10 SoC

Add DDR support for Stratix SoC

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoarm: socfpga: stratix10: Add timer support for Stratix10 SoC
Ley Foon Tan [Wed, 23 May 2018 16:17:29 +0000 (00:17 +0800)]
arm: socfpga: stratix10: Add timer support for Stratix10 SoC

Add timer support for Stratix SoC

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Marek Vasut <marex@denx.de>
6 years agoarm: socfpga: stratix10: Add SPL driver for Stratix10 SoC
Ley Foon Tan [Wed, 23 May 2018 16:17:28 +0000 (00:17 +0800)]
arm: socfpga: stratix10: Add SPL driver for Stratix10 SoC

Add SPL driver support for Stratix SoC

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoarm: socfpga: Restructure the SPL file
Ley Foon Tan [Wed, 23 May 2018 16:17:27 +0000 (00:17 +0800)]
arm: socfpga: Restructure the SPL file

Restructure the SPL so each devices such as CV, A10 and S10
will have their own dedicated SPL file. SPL file determine
the HW initialization flow which is device specific

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoarm: socfpga: stratix10: Add MMU support for Stratix10 SoC
Ley Foon Tan [Wed, 23 May 2018 16:17:26 +0000 (00:17 +0800)]
arm: socfpga: stratix10: Add MMU support for Stratix10 SoC

Add MMU memory mapping table for Stratix SoC.

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Acked-by: Marek Vasut <marex@denx.de>
6 years agoarm: socfpga: stratix10: Add mailbox support for Stratix10 SoC
Ley Foon Tan [Wed, 23 May 2018 16:17:25 +0000 (00:17 +0800)]
arm: socfpga: stratix10: Add mailbox support for Stratix10 SoC

Add mailbox support for Stratix SoC

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Reviewed-by: Marek Vasut <marex@denx.de>
6 years agoarm: socfpga: stratix10: Add misc support for Stratix10 SoC
Ley Foon Tan [Wed, 23 May 2018 16:17:24 +0000 (00:17 +0800)]
arm: socfpga: stratix10: Add misc support for Stratix10 SoC

Add misc support such as EMAC and cpu info printout for Stratix SoC

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoarm: socfpga: misc: Move bridge command to misc common
Ley Foon Tan [Wed, 23 May 2018 16:17:23 +0000 (00:17 +0800)]
arm: socfpga: misc: Move bridge command to misc common

Move bridge command to misc common driver, in preparation to used by
other platforms.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agospi: cadence_qspi: Fix warning cast from pointer to integer of different size
Ley Foon Tan [Fri, 1 Jun 2018 08:52:20 +0000 (16:52 +0800)]
spi: cadence_qspi: Fix warning cast from pointer to integer of different size

Use "%p" to print cmdbuf.

Compilation warning as below:

  CC      spl/drivers/spi/cadence_qspi_apb.o
  LD      spl/lib/built-in.o
drivers/spi/cadence_qspi_apb.c: In function ‘cadence_qspi_apb_indirect_write_setup’:
drivers/spi/cadence_qspi_apb.c:696:18: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
          cmdlen, (unsigned int)cmdbuf);

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Acked-by: Marek Vasut <marex@denx.de>
6 years agospi: cadence_qspi: Fix compilation warning
Ley Foon Tan [Fri, 6 Jul 2018 02:39:14 +0000 (10:39 +0800)]
spi: cadence_qspi: Fix compilation warning

Use "%zu" for size_t data type.

Compilation warning as below:

In file included from include/linux/bug.h:7:0,
                 from include/common.h:26,
                 from drivers/spi/cadence_qspi.c:8:
drivers/spi/cadence_qspi.c: In function ‘cadence_spi_xfer’:
drivers/spi/cadence_qspi.c:211:8: warning: format ‘%d’ expects argument of type ‘int’, but argument 3 has type ‘size_t {aka long unsigned int}’ [-Wformat=]
  debug("%s: len=%d [bytes]\n", __func__, data_bytes);
        ^
include/linux/printk.h:37:21: note: in definition of macro ‘pr_fmt’
 #define pr_fmt(fmt) fmt
                     ^~~
include/log.h:142:2: note: in expansion of macro ‘debug_cond’
  debug_cond(_DEBUG, fmt, ##args)
  ^~~~~~~~~~
drivers/spi/cadence_qspi.c:211:2: note: in expansion of macro ‘debug’
  debug("%s: len=%d [bytes]\n", __func__, data_bytes);

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Acked-by: Marek Vasut <marex@denx.de>
6 years agoubifs: remove useless code
Christophe Kerello [Wed, 27 Jun 2018 08:06:59 +0000 (10:06 +0200)]
ubifs: remove useless code

By checking ubifs source code, s_instances parameter is not
used anymore. So, set this parameter and the associated source
code under __UBOOT__ compilation.

Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
6 years agocmd: ubi: Add additional message upon UBI attach error
Stefan Roese [Tue, 26 Jun 2018 06:12:32 +0000 (08:12 +0200)]
cmd: ubi: Add additional message upon UBI attach error

When trying to attach an UBI MTD partition via "ubi part", it may happen
that the MTD partition defined in U-Boot (via mtdparts) is not big
enough than the one, where the UBI device has been created on. This
may lead to errors, which are not really descriptive to debug and
solve this issue, like:

ubi0 error: vtbl_check: too large reserved_pebs 1982, good PEBs 1020
ubi0 error: vtbl_check: volume table check failed: record 0, error 9

or:

ubi0 error: init_volumes: not enough PEBs, required 1738, available 1020
ubi0 error: ubi_wl_init: no enough physical eraseblocks (-718, need 1)
ubi0 error: ubi_attach_mtd_dev: failed to attach mtd1, error -12

Lets add an additional message upon attach failure, to aid the U-Boot
user to solve this problem.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Heiko Schocher <hs@denx.de>
6 years agocmd: ubi: print load size after establishing volume size
Stefan Agner [Mon, 25 Jun 2018 09:19:12 +0000 (11:19 +0200)]
cmd: ubi: print load size after establishing volume size

When using static volumes, the file size stored in the volume is
determined at runtime. Currently the ubi command prints the file
size specified on the console, which leads to a rather confusing
series of messages:
  # ubi read ${fdt_addr_r} testvol
  Read 0 bytes from volume testvol to 82000000
  No size specified -> Using max size (179924992)

Make sure to print the actual size read in any case:
  # ubi read ${fdt_addr_r} testvol
  No size specified -> Using max size (179924992)
  Read 179924992 bytes from volume testvol to 82000000

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-mips
Tom Rini [Thu, 12 Jul 2018 01:55:20 +0000 (21:55 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-mips

6 years agoMerge git://git.denx.de/u-boot-dm
Tom Rini [Wed, 11 Jul 2018 13:40:38 +0000 (09:40 -0400)]
Merge git://git.denx.de/u-boot-dm