Tom Rini [Thu, 11 Jul 2019 22:09:38 +0000 (18:09 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- SPL SATA enhancements to allow booting from RAW SATA device
needed for Clearfog (Baruch)
- Enable SATA booting on Clearfog (Baruch)
- Misc changes to Turris Omnia (Marek)
- Enable CMD_BOOTZ and increase SYS_BOOTM_LEN on crs305-1g-4s
(Luka)
- Enable FIT support for db-xc3-24g4xg (Chris)
- Enable DM_SPI on Keymile Kirkwood board with necessary changes
for this (Pascal)
- Set 38x and 39x AVS on lower frequency (Baruch)
Tom Rini [Thu, 11 Jul 2019 22:08:44 +0000 (18:08 -0400)]
Merge tag 'uniphier-v2019.10' of https://gitlab.denx.de/u-boot/custodians/u-boot-uniphier
UniPhier SoC updates for v2019.10
- import DT updates from Linux
- add UniPhier SPI controller driver
- make U-Boot image for 64bit SoCs position independent
- tidy up various init code for next generation SoCs
- misc cleanups
Tom Rini [Thu, 11 Jul 2019 22:03:52 +0000 (18:03 -0400)]
Merge branch '2019-07-11-master-imports'
- spear platform improvements
- Android BCB support
- Cadence PCIe endpoint driver
Marek Vasut [Sat, 25 May 2019 20:52:20 +0000 (22:52 +0200)]
gpio: pca953x: Add TI TCA9539 compatible string
Add TI TCA9539 compatible string for yet another I2C GPIO expander.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Mario Six <mario.six@gdsys.cc>
Cc: Peng Fan <van.freenix@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Marek Vasut [Sat, 25 May 2019 20:40:35 +0000 (22:40 +0200)]
arm: mach-omap2: am33xx: Init pinmux before clock
The board_early_init_f() inits clock before initing pinmux. However,
the clock configuration code might need to adjust PMIC settings of a
PMIC on I2C bus (e.g. board/ti/am335x/board.c does that). If the I2C
bus pin muxing is not configured before attempting to communicate
with the PMIC, the communication will silently fail and the prcm_init()
may configure fast enough CPU clock that the default voltage provided
by the PMIC would be insufficient and the platform would become
unstable.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
Cc: Tom Rini <trini@konsulko.com>
Eugeniu Rosca [Thu, 23 May 2019 15:32:23 +0000 (17:32 +0200)]
doc: relocate/rename Android README and add BCB overview
Rename:
- doc/{README.avb2 => android/avb2.txt}
- doc/{README.android-fastboot => android/fastboot.txt}
Add a new file documenting the 'bcb' command:
- doc/android/bcb.txt
The new directory structure has been reviewed by Simon in
https://patchwork.ozlabs.org/patch/
1101107/#
2176031 .
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Eugeniu Rosca [Thu, 23 May 2019 15:32:22 +0000 (17:32 +0200)]
cmd: Add 'bcb' command to read/modify/write BCB fields
'Bootloader Control Block' (BCB) is a well established term/acronym in
the Android namespace which refers to a location in a dedicated raw
(i.e. FS-unaware) flash (e.g. eMMC) partition, usually called "misc",
which is used as media for exchanging messages between Android userspace
(particularly recovery [1]) and an Android-capable bootloader.
On higher level, this allows implementing a subset of Android Bootloader
Requirements [2], amongst which is the Android-specific bootloader
flow [3]. Regardless how the latter is implemented in U-Boot ([3] being
the most memorable example), reading/writing/dumping the BCB fields in
the development process from inside the U-Boot is a convenient feature.
Hence, make it available to the users.
Some usage examples of the new command recorded on R-Car H3ULCB-KF
('>>>' is an overlay on top of the original console output):
=> bcb
bcb - Load/set/clear/test/dump/store Android BCB fields
Usage:
bcb load <dev> <part> - load BCB from mmc <dev>:<part>
bcb set <field> <val> - set BCB <field> to <val>
bcb clear [<field>] - clear BCB <field> or all fields
bcb test <field> <op> <val> - test BCB <field> against <val>
bcb dump <field> - dump BCB <field>
bcb store - store BCB back to mmc
Legend:
<dev> - MMC device index containing the BCB partition
<part> - MMC partition index or name containing the BCB
<field> - one of {command,status,recovery,stage,reserved}
<op> - the binary operator used in 'bcb test':
'=' returns true if <val> matches the string stored in <field>
'~' returns true if <val> matches a subset of <field>'s string
<val> - string/text provided as input to bcb {set,test}
NOTE: any ':' character in <val> will be replaced by line feed
during 'bcb set' and used as separator by upper layers
=> bcb dump command
Error: Please, load BCB first!
>>> Users must specify mmc device and partition before any other call
=> bcb load 1 misc
=> bcb load 1 1
>>> The two calls are equivalent (assuming "misc" has index 1)
=> bcb dump command
00000000: 62 6f 6f 74 6f 6e 63 65 2d 73 68 65 6c 6c 00 72 bootonce-shell.r
00000010: 79 00 72 00 00 00 00 00 00 00 00 00 00 00 00 00 y.r.............
>>> The output is in binary/string format for convenience
>>> The output size matches the size of inspected BCB field
>>> (32 bytes in case of 'command')
=> bcb test command = bootonce-shell && echo true
true
=> bcb test command = bootonce-shell- && echo true
=> bcb test command = bootonce-shel && echo true
>>> The '=' operator returns 'true' on perfect match
=> bcb test command ~ bootonce-shel && echo true
true
=> bcb test command ~ bootonce-shell && echo true
true
>>> The '~' operator returns 'true' on substring match
=> bcb set command recovery
=> bcb dump command
00000000: 72 65 63 6f 76 65 72 79 00 73 68 65 6c 6c 00 72 recovery.shell.r
00000010: 79 00 72 00 00 00 00 00 00 00 00 00 00 00 00 00 y.r.............
>>> The new value is NULL-terminated and stored in the BCB field
=> bcb set recovery "msg1:msg2:msg3"
=> bcb dump recovery
00000040: 6d 73 67 31 0a 6d 73 67 32 0a 6d 73 67 33 00 00 msg1.msg2.msg3..
00000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
00000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
>>> --- snip ---
>>> Every ':' is replaced by line-feed '\n' (0xA). The latter is used
>>> as separator between individual commands by Android userspace
=> bcb store
>>> Flush/store the BCB structure to MMC
[1] https://android.googlesource.com/platform/bootable/recovery
[2] https://source.android.com/devices/bootloader
[3] https://patchwork.ozlabs.org/patch/746835/
("[U-Boot,5/6] Initial support for the Android Bootloader flow")
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Eugeniu Rosca [Thu, 23 May 2019 15:32:21 +0000 (17:32 +0200)]
include: android_bootloader_message.h: Minimize the diff to AOSP
Perform the following updates:
- Relocate the commit id from the file to the description of U-Boot
commit. The AOSP commit is
c784ce50e8c10eaf70e1f97e24e8324aef45faf5.
This is done to avoid stale references in the file itself. The
reasoning is in https://patchwork.ozlabs.org/patch/
1098056/#
2170209.
- Minimize the diff to AOSP, to decrease the effort of the next AOSP
backports. The background can be found in:
https://patchwork.ozlabs.org/patch/
1080394/#
2168454.
- Guard the static_assert() calls by #ifndef __UBOOT__ ... #endif,
to avoid compilation failures of files including the header.
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Thu, 23 May 2019 11:14:08 +0000 (07:14 -0400)]
SPL: Default to disabling legacy image support when using FIT
When we have a FIT image being used by SPL by default that means the
most common case is that we'll never run into a legacy image. Disable
legacy image support by default in that case to reclaim space.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 23 May 2019 11:14:07 +0000 (07:14 -0400)]
configs: Rename CONFIG_IMAGE_FORMAT_LEGACY to CONFIG_LEGACY_IMAGE_FORMAT
The name CONFIG_LEGACY_IMAGE_FORMAT reads slightly better along with
allowing us to avoid a rather nasty Kbuild/Kconfig issue down the line
with CONFIG_IS_ENABLED(IMAGE_FORMAT_LEGACY). In a few places outside of
cmd/ switch to using CONFIG_IS_ENABLED() to test what is set.
Signed-off-by: Tom Rini <trini@konsulko.com>
Roman Kapl [Thu, 16 May 2019 16:32:48 +0000 (18:32 +0200)]
tpm: wait for valid status
The TPM specification says that the EXPECT_DATA bit is not valid until
the VALID bit is set. Wait for that bit to be set. Fixes problems with
Ifineon SPI TPM.
Signed-off-by: Roman Kapl <rka@sysgo.com>
Miquel Raynal [Tue, 7 May 2019 12:18:54 +0000 (14:18 +0200)]
arm: spear: Return to BootROM if failing to boot from the main device
Overload the weak function board_boot_order() so that besides choosing
the main boot device, we can fallback on USB boot by returning in the
BootROM, eg. if the NOR flash is empty while it was the primary boot
medium.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Miquel Raynal [Tue, 7 May 2019 12:18:53 +0000 (14:18 +0200)]
arm: spear: Do not link the _main branch
The _main call is not supposed to return at all: don't link the
branch.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Miquel Raynal [Tue, 7 May 2019 12:18:52 +0000 (14:18 +0200)]
arm: spear: Support returning to BootROM
Implement the weak board_return_to_bootrom() function so that when
enabling the spl_bootrom.c driver, one can make use of usbboot on
spear platforms. All necessary information to return to the BootROM
are stored in the BootROM's stack. The SPL stack pointer is reset so
we save the BootROM's stack pointer into the SPL .data section.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Miquel Raynal [Tue, 7 May 2019 12:18:51 +0000 (14:18 +0200)]
arm: spear: Simplify start.S organization
There is no reason to do the few spear-related initialization, in a
different procedure than 'reset'. Spare one branching and get a linear
code flow by removing this indirection.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Miquel Raynal [Tue, 7 May 2019 12:18:50 +0000 (14:18 +0200)]
arm: spear: Reference the link register with LR instead of R14
The link register is stored in R14. ARM assembly code allows to use
the 'lr' name to reference it instead of 'r14' which is not very
meaningful. Do the substitution to ease the reading.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Miquel Raynal [Tue, 7 May 2019 12:18:49 +0000 (14:18 +0200)]
arm: spear: Use PUSH/POP mnemonics when relevant
Quoting ARM "RealView Compilation Tools Assembler Guide v4.0":
PUSH and POP are synonyms for STMDB and LDM (or LDMIA), with
the base register sp (r13), and the adjusted address written
back to the base register.
PUSH and POP are the preferred mnemonic in these cases.
Let's follow this recommandation to ease the reading and substitute
LDMIA/STMDB operations with PUSH/POP mnemonics.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Miquel Raynal [Tue, 7 May 2019 12:18:48 +0000 (14:18 +0200)]
arm: spear: Purely cosmetic changes in start.S
Before cleaning a bit further the spear/start.S file, apply a few
cosmetic changes: capital letters, comment indentation and small
rewriting.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Miquel Raynal [Tue, 7 May 2019 12:18:47 +0000 (14:18 +0200)]
arm: spear: Fix the main comment in start.S
This comment describes the board state at the moment where we enter
the SPL. The description is entirely wrong; re-write it to fit the
reality.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Miquel Raynal [Tue, 7 May 2019 12:18:46 +0000 (14:18 +0200)]
arm: spear: Drop false comment
SPL BSS lies in SRAM and is actually initialized to 0 by the SPL in
arch/arm/lib/crt0.S:_main(), which is called by cpu_init_crit.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Miquel Raynal [Tue, 7 May 2019 12:18:45 +0000 (14:18 +0200)]
arm: spear: Call the SPL 'SPL', not 'Xloader'
Rename Xloader as SPL in comments.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Miquel Raynal [Tue, 7 May 2019 12:18:44 +0000 (14:18 +0200)]
arm: spear: Drop useless board_init_r call
It is clearly stated that board_init_f should *not* call
board_init_r. Indeed, board_init_f should return. The code will
continue through arch/arm/lib/crt0.S which will do more setup before
calling board_init_r.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Miquel Raynal [Tue, 7 May 2019 12:18:43 +0000 (14:18 +0200)]
spl: Fix typo in kernel doc
Fix a tiny typo in boot_from_devices() kernel doc.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Ramon Fried [Sat, 27 Apr 2019 08:15:24 +0000 (11:15 +0300)]
test: pci_ep: add basic pci_ep tests
Add basic PCI endpoint sandbox testing.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Ramon Fried [Sat, 27 Apr 2019 08:15:23 +0000 (11:15 +0300)]
pci_ep: add pci endpoint sandbox driver
Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Ramon Fried [Sat, 27 Apr 2019 08:15:22 +0000 (11:15 +0300)]
pci_ep: add Cadence PCIe endpoint driver
Add Cadence PCIe endpoint driver supporting configuration
of header, bars and MSI for device.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Ramon Fried [Sat, 27 Apr 2019 08:15:21 +0000 (11:15 +0300)]
drivers: pci_ep: Introduce UCLASS_PCI_EP uclass
Introduce new UCLASS_PCI_EP class for handling PCI endpoint
devices, allowing to set various attributes of the PCI endpoint
device, such as:
* configuration space header
* BAR definitions
* outband memory mapping
* start/stop PCI link
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Baruch Siach [Wed, 10 Jul 2019 15:23:04 +0000 (18:23 +0300)]
arm: mvebu: set 38x and 39x AVS on lower frequency
Reduce Auto Voltage Scaling VDD limit when core frequency is lower than
1600MHz. This reduces core voltage level from 1.25V to 1.15V, which
saves power.
The code is taken from Marvell's U-Boot 2013.01 revision 18.06.
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Tested-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
Pascal Linder [Tue, 18 Jun 2019 06:44:02 +0000 (08:44 +0200)]
km/spi: remove deprecated SPI flash driver code for KM Kirkwood boards
KM Kirkwood boards now implement the driver model for its SPI flash
interface. Therefore, the old board specific claim and release functions
can be deleted. The preprocessor definition CONFIG_SYS_KW_SPI_MPP is yet
unused as well. All its appearances and dependencies are removed in the
kirkwood_spi driver, header files and finally the configuration whitelist.
Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch>
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Pascal Linder [Tue, 18 Jun 2019 06:42:59 +0000 (08:42 +0200)]
km/spi: activate driver model for SPI flash on KM Kirkwood boards
The corresponding configurations are selected in the common Kconfig file.
This is easier than changing every affected board default configuration
file. The default configuration for the PORTL2 board, however, still needs
some modifications to correctly use the driver model.
Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch>
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Pascal Linder [Tue, 18 Jun 2019 06:41:03 +0000 (08:41 +0200)]
km/spi: add SPI configuration to KM Kirkwood device tree
In order to migrate the SPI flash interface to the driver model, the SPI
configuration needs to be added in the KM Kirkwood device tree file.
Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch>
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Pascal Linder [Tue, 18 Jun 2019 06:41:02 +0000 (08:41 +0200)]
km/spi: overwrite kirkwood_spi weak functions for KM Kirkwood boards
As the SPI NOR and NAND devices share the same hardware pins, the MPP
configuration has to be changed when claiming/releasing the bus. The
current configuration is saved when claiming and restored when releasing.
Furthermore, a general-purpose output is used to switch the chip-select
signal. This is now also implemented for the DM part of the kirkwood_spi
driver.
Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch>
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Pascal Linder [Tue, 18 Jun 2019 06:41:01 +0000 (08:41 +0200)]
km/spi: add weak functions to kirkwood_spi driver (DM part)
The weak functions, known from the legacy code, are added to the DM part
as well. For this purpose, the release operation first needs to be
implemented. KM Kirkwood boards will overwrite those weak functions to
change the MPP configuration when claiming/releasing the bus, because the
hardware pins are shared between the SPI NOR and NAND devices.
Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch>
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Pascal Linder [Tue, 18 Jun 2019 11:27:47 +0000 (13:27 +0200)]
km: modify Kconfig file organization for KM boards
As preparation for the upcoming transferring of configurations from header
files to Kconfig, a common Kconfig file for all KM boards was created. For
the moment, it only sources the other three, more specific, Kconfig files.
Therefore, the architecture Kconfig files now include the common Kconfig
file. Also, the configuration selection for KM boards was moved from the
architecture Kconfig files to the board specific Kconfig files.
Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch>
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Cc: Mario Six <mario.six@gdsys.cc>
Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Chris Packham [Fri, 28 Jun 2019 00:30:12 +0000 (12:30 +1200)]
ARM: mvebu: Enable FIT support for db-xc3-24g4xg
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Luka Kovacic [Tue, 25 Jun 2019 11:57:53 +0000 (13:57 +0200)]
arm: mvebu: crs305-1g-4s: Enable CMD_BOOTZ and increase SYS_BOOTM_LEN
This change enables CMD_BOOTZ and increases SYS_BOOTM_LEN to
make it easier to work with kernel images.
Signed-off-by: Luka Kovacic <me@lukakovacic.xyz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Marek Behún [Fri, 24 May 2019 12:57:54 +0000 (14:57 +0200)]
arm: mvebu: turris_omnia: fix rescue mode bootcmd bootargs setting
Rescue mode bootcmd currently only appends the "omniarescue" parameter
to the bootargs variable. We do not want the user to be able to change
rescue mode bootargs. Therefore change this so that bootcmd sets the
bootargs variable in an absolute way (adding console device information
and the omniarescue paramterer).
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Marek Behún [Fri, 24 May 2019 12:57:53 +0000 (14:57 +0200)]
arm: mvebu: turris_omnia: call pci_init from board init code
We always want to enumerate PCIe devices, because withouth this they
won't work in Linux.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Marek Behún [Fri, 24 May 2019 12:57:52 +0000 (14:57 +0200)]
arm: mvebu: turris_omnia: prefer SCSI booting before USB
If SCSI and USB boot options are both available, try to boot from SCSI
first.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Marek Behún [Fri, 24 May 2019 12:57:51 +0000 (14:57 +0200)]
arm: mvebu: turris_omnia: remove unneeded macro from board config
This is not needed here since Omnia is using DM_PCI now.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Marek Behún [Fri, 24 May 2019 12:57:50 +0000 (14:57 +0200)]
arm: mvebu: turris_omnia: change environment address in SPI flash
The U-Boot partition is 1 MiB and environment is 64 KiB. It does not
make sense to have environment at 0xc0000 when it could be at 0xf0000
and we can have more space for U-Boot binary.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Marek Behún [Fri, 24 May 2019 12:57:49 +0000 (14:57 +0200)]
arm: mvebu: turris_omnia: fix adapters MAC addresses
The board code reads MAC addresses from the ATSHA204A cryptochip.
For compatibility reasons the ethernet adapters on this SOC are not
enumerated in register address order. But when Omnia was first
manufactured this was done differently.
Change setting of MAC addresses to conform to the description on the
stickers sticked on actual Omnias.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Marek Behún [Fri, 24 May 2019 12:57:48 +0000 (14:57 +0200)]
arm: mvebu: turris_omnia: set default ethernet adapter
Set default value for the ethact variable to the WAN port.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Baruch Siach [Thu, 16 May 2019 10:04:03 +0000 (13:04 +0300)]
arm: mvebu: clearfog: document boot from SATA
Document the main U-Boot image offset when booting from SATA disk on the
Clearfog board.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Baruch Siach [Thu, 16 May 2019 10:04:02 +0000 (13:04 +0300)]
arm: mvebu: clearfog: set U-Boot offset for SATA boot
See the offset of U-Boot in raw SATA disk to the same value as the MMC
offset. That is 0x140 sectors from the beginning of the SPL, which is
0x141 sectors from the beginning of the device (after the MBR sector).
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Baruch Siach [Thu, 16 May 2019 10:04:01 +0000 (13:04 +0300)]
arm: mvebu: clearfog: enable SATA in SPL
Enable SATA peripherals in SPL to allow boot from SATA.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Baruch Siach [Thu, 16 May 2019 10:03:58 +0000 (13:03 +0300)]
arm: mvebu: add support for boot from SATA
Add the required Kconfig and macro definitions to allow boot from SATA
on Armada 38x systems.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Baruch Siach [Thu, 16 May 2019 10:03:57 +0000 (13:03 +0300)]
arm: mvebu: fix ahci mbus config in SPL
SPL does not initialize mbus_dram_info. Don't change the ahci mbus
settings of the ROM. This allows the ahci to work in SPL.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Baruch Siach [Thu, 16 May 2019 10:03:55 +0000 (13:03 +0300)]
spl: sata: don't force FS_FAT support
Allow the code to build when FS_FAT is not enabled, and thus
spl_load_image_fat() is not provided.
A subsequent patch should add alternative raw access U-Boot main image
load method.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
Baruch Siach [Thu, 16 May 2019 10:03:54 +0000 (13:03 +0300)]
spl: sata: fix build with DM_SCSI
The init_sata() routine is only present when DM_SCSI is not enabled.
Don't call init_sata() when DM_SCSI is enabled. The code will fall back
to scsi_scan() in this case.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
Baruch Siach [Thu, 16 May 2019 10:03:53 +0000 (13:03 +0300)]
spl: sata: add default partition and image name
Add sensible defaults for the FAT partition selection and the main
U-Boot image file name. This allows spl_sata to build when the board
headers does not select them explicitly.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
Tom Rini [Wed, 10 Jul 2019 17:51:53 +0000 (13:51 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-i2c
Tom Rini [Wed, 10 Jul 2019 14:40:14 +0000 (10:40 -0400)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-ubi
[trini: Migrate sama5d27_som1_ek_qspiflash/sama5d2_xplained_qspiflash
for CONFIG_ENV_SECT_SIZE]
Signed-off-by: Tom Rini <trini@konsulko.com>
Masahiro Yamada [Wed, 10 Jul 2019 11:07:50 +0000 (20:07 +0900)]
ARM: uniphier: set {kernel, ramdisk, fdt}_addr_r at boot-time
The base of DRAM will be changed for the next generation SoC.
The addresses needed for booting the kernel should be shifted
according to the DRAM base.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 10 Jul 2019 11:07:49 +0000 (20:07 +0900)]
ARM: uniphier: set dram_base environment variable
The base of DRAM will be changed for the next generation SoC.
Set the base address to the 'dram_base' environment variable, which
will be useful for scripting.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 10 Jul 2019 11:07:48 +0000 (20:07 +0900)]
ARM: uniphier: set loadaddr at boot-time
The base of DRAM will be changed for the next generation SoC.
To support it along with existing SoCs in the single defconfig,
set 'loadaddr' at boot-time by adding the offset to the DRAM base.
CONFIG_SYS_LOAD_ADDR is still hard-coded for compilation, but the
value from environment variable 'loadaddr' should be used.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 10 Jul 2019 11:07:47 +0000 (20:07 +0900)]
ARM: uniphier: turn uniphier_set_fdt_file() into void function
For consistency with a function that will be added.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 10 Jul 2019 11:07:46 +0000 (20:07 +0900)]
ARM: uniphier: remove CONFIG_SYS_SDRAM_BASE
The base address of DRAM was 0x80000000 for all the ARM SoCs of this
family in the past. It will be changed to 0x20000000 for a planned new
SoC. To support multiple SoCs by the single uniphier_v8_defconfig, the
base must be run-time determined.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 10 Jul 2019 11:07:45 +0000 (20:07 +0900)]
ARM: uniphier: make mem_map run-time configurable
Currently, mem_map is hard-coded, and it worked well until the last
SoC. For a planned new SoC, the addresses of peripherals and DRAM
will be changed. Set it up run-time.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 10 Jul 2019 11:07:44 +0000 (20:07 +0900)]
ARM: uniphier: make dram_init() more generic
Make this function work with any channel being empty.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 10 Jul 2019 11:07:43 +0000 (20:07 +0900)]
ARM: uniphier: make dram_init() independent of SG_MEMCONF
Currently, dram_init() code relies on the fact the DRAM size
configuration exists in the SG_MEMCONF register.
This will no longer be true for a planned new SoC, which will
replace SG_MEMCONF with a different register.
Refactor the hook in a more generic way.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 10 Jul 2019 11:07:42 +0000 (20:07 +0900)]
ARM: uniphier: detect register base addresses run-time
Until the last SoC, the register addresses have been hard-coded because
they are always constant. For a planned new SoC, the register bases
will be completely changed. I insist on supporting multiple SoCs/boards
by a single defconfig (uniphier_v8_defconfig) since duplicating similar
defconfig files is a maintenance burden. The base addresses must be
fixed-up at run-time somehow.
Previously, the board init code identified the SoC by reading out the
SG_REVISION register. This is much easier than parsing DT.
You cannot do it any more because the base address of SG will be
changed. The SG_REVISION register exists to read out the SoC ID, but
you never know its address before identifying the SoC. Oh well.
So, the possible solution is to parse the DT, and find out the node
with "*-soc-glue" compatible string. Then, sg_base is set to the value
of the "reg" property. The sc_base is set up likewise.
It is worth noting a pit-fall. Having sc_base and sg_base in the global
scope will make the life easier, but the global variables are poorly
supported before the relocation. In fact, the .bss section overwraps
with DT. Allocating them in the .bss section would break DT. So, I gave
dummy initializers to assign them in the .data section.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 10 Jul 2019 11:07:41 +0000 (20:07 +0900)]
ARM: uniphier: de-couple SC macros into base address and offset
The SC_* macros represent the address of SysCtrl registers.
For a planned new SoC, its base address will be changed.
Turn the SC_* macros into the offset from the base address.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 10 Jul 2019 11:07:40 +0000 (20:07 +0900)]
ARM: uniphier: de-couple SG macros into base address and offset
The SG_* macros represent the address of SoC-glue registers.
For a planned new SoC, its base address will be changed.
Turn the SG_* macros into the offset from the base address.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 10 Jul 2019 11:07:39 +0000 (20:07 +0900)]
ARM: uniphier: detect SD boot mode
The planned new SoC supports the SD boot mode. Detect and display it.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 10 Jul 2019 11:07:38 +0000 (20:07 +0900)]
ARM: uniphier: make boot_is_swapped() code optional
The planned new SoC does not have SBC (System Bus Controller) block.
Make boot_is_swapped() an optional hook.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 10 Jul 2019 11:07:37 +0000 (20:07 +0900)]
ARM: uniphier: check DT to determine whether to initialize SBC
If CONFIG_MICRO_SUPPORT_CARD is enabled, U-Boot initialize SBC
(System Bus Controller), which may not be really necessary.
Check the "socionext,uniphier-system-bus" node in DT run-time.
If and only if it is found and its "status" property is okay,
initialize the SBC block.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 10 Jul 2019 11:07:36 +0000 (20:07 +0900)]
ARM: uniphier: check DT to determine whether to use support card
If CONFIG_MICRO_SUPPORT_CARD is enabled, U-Boot tries to get access
to the devices on the support card, which may not actually exist.
Check the DT and search for the on-board devices run-time. If the
nodes are not found in DT, then disable the code.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 10 Jul 2019 11:07:35 +0000 (20:07 +0900)]
clk: uniphier: add EMMC clock for LD11, LD20, and PXs3
I also added comments for NAND clocks.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 10 Jul 2019 11:07:34 +0000 (20:07 +0900)]
ARM: uniphier: include <linux/io.h> from boot-device.c
This file calls readl(), so needs to include <linux/io.h>.
Currently, it relies on someone else including it.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 10 Jul 2019 11:07:33 +0000 (20:07 +0900)]
ARM: uniphier: use bool type for have_internal_stm parameter
This is boolean logic.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 10 Jul 2019 11:07:32 +0000 (20:07 +0900)]
ARM: uniphier: clean up clk/Makefile
Now that 64-bit SoCs of this SoC family no longer support SPL,
this Makefile can be slightly simpler.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 10 Jul 2019 11:07:31 +0000 (20:07 +0900)]
ARM: uniphier: remove unused uniphier_ld11_boot_device_fixup()
The .boot_device_fixup() is only called by SPL.
Now that 64-bit SoCs of this SoC family no longer support SPL,
debug-uart-ld20.c is never compiled.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 10 Jul 2019 11:07:30 +0000 (20:07 +0900)]
ARM: uniphier: remove empty #ifdef block
This is a remnant of commit
f89d6133eef2 ("configs: move
CONFIG_SPL_TEXT_BASE to Kconfig").
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 10 Jul 2019 11:07:29 +0000 (20:07 +0900)]
arm64: dts: uniphier: add reserved-memory for secure memory
[ Linux commit
aa38571246c6ac279ebebd141157297bcb959d76 ]
The memory regions specified by /memreserve/ are passed to
early_init_dt_reserve_memory_arch() with nomap=false, so it is
not suitable for reserving memory for Trusted Firmware-A etc.
Use the more robust /reserved-memory node with the no-map property
to prevent the kernel from mapping it.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Kunihiko Hayashi [Fri, 5 Jul 2019 01:03:18 +0000 (10:03 +0900)]
spi: Add SPI controller driver for UniPhier SoCs
Add SPI controller driver implemented in Socionext UniPhier SoCs.
This controller has the SPI master mode only.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Masahiro Yamada [Wed, 26 Jun 2019 04:51:47 +0000 (13:51 +0900)]
ARM: uniphier_v8_defconfig: make 64bit SoC image position independent
For a planned new SoC in this SoC family, the base address of the
DRAM will be changed from 0x80000000 to 0x20000000.
The PIE support will be useful to maintain multiple similar SoCs
whose DRAM addresses differ.
Now CONFIG_SYS_TEXT_BASE is not important. I just set it to 0
to ensure CONFIG_POSITION_INDEPENDENT is working.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Wed, 26 Jun 2019 04:51:46 +0000 (13:51 +0900)]
arm64: add an option to switch visibility of CONFIG_SYS_INIT_SP_BSS_OFFSET
By default, CONFIG_SYS_INIT_SP_BSS_OFFSET was made invisible by not
giving a prompt to it.
The only way to define it is to hard-code an extra entry in SoC/board
Kconfig, like arch/arm/mach-tegra/tegra{186,210}/Kconfig.
Add a prompt to it in order to allow defconfig files to specify the
value of CONFIG_SYS_INIT_SP_BSS_OFFSET.
With this, CONFIG_SYS_INIT_SP_BSS_OFFSET would become always visible.
So, we need a new bool option to turn it off by default.
I move the 'default 524288' to the common place. This value is not too
big, but is big enough to avoid the overwrap of DT in most platforms.
If 512KB is not a suitable choice for your platform, you can change it
from your defconfig or menuconfig etc.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Tom Rini [Tue, 9 Jul 2019 12:16:50 +0000 (08:16 -0400)]
Merge tag 'u-boot-atmel-2019.10-a' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel
First set of u-boot-atmel features and fixes for 2019.10 cycle
This includes the Atmel QSPI driver and support for the at91 boards.
This is the port of the driver from Linux, mostly done by Tudor Ambarus.
Chuanhua Han [Mon, 8 Jul 2019 03:45:25 +0000 (11:45 +0800)]
rtc: pcf2127: Fixed bug with rtc settings and getting error time
The previous pcf2127 RTC chip could not read and set the correct time.
When reading the data of internal registers, the read address was the
value of register plus 1. This is because this chip requires the host
to send a stop signal after setting the register address and before
reading the register data.
This patch sets the register address using dm_i2c_write and reads
the register data using the original dm_i2c_xfer in order to generate
a stop signal after the register address is set, and fixes the bug of
the original read and write time.
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
Eugen Hristev [Tue, 18 Jun 2019 08:52:11 +0000 (08:52 +0000)]
configs: sama5d2_xplained: add support QSPI flash boot
The spi-nor flash resides on spi bus 1. Update the CONFIG_ENV_SPI_CS
and CONFIG_BOOTCOMMAND accordingly.
Based on original work by Wenyou Yang.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
[tudor.ambarus@microchip.com: amend the commit message.]
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Tudor Ambarus [Tue, 18 Jun 2019 08:52:09 +0000 (08:52 +0000)]
configs: sama5d27_som1_ek: qspi: use common memory layout
Use the qspi memory layout defined in at91-sama5_common - it aligns
with the 8 Mbyte flash (sst26vf064b-104i/sn) available in sama5d27_som1_ek.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Tudor Ambarus [Tue, 18 Jun 2019 08:52:06 +0000 (08:52 +0000)]
configs: sama5d27_som1_ek: add qspiflash_defconfig
Add the default config file of QSPI media. The config is based on
sama5d27_som1_ek_mmc_defconfig.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tudor Ambarus [Tue, 18 Jun 2019 08:52:03 +0000 (08:52 +0000)]
configs: sama5d2_xplained: add qspiflash_defconfig
Add the default config file of QSPI media. The config is based on
sama5d2_xplained_mmc_defconfig.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Cyrille Pitchen [Tue, 18 Jun 2019 08:52:01 +0000 (08:52 +0000)]
ARM: at91: sama5: add common environment for QSPI
Use the same memory layout as we use for the NAND boot on the other boards.
QSPI flashes are present on the following boards:
sama5d2_xplained RevB: 32 Mbyte flash (mx25l3273fm2i-08g)
sama5d2_xplained RevC: 8 Mbyte flash (sst26vf064b-104i/sn)
sama5d27_som1_ek: 8 Mbyte flash (sst26vf064b-104i/sn)
sama5d2_ptc_ek: 8 Mbyte flash (sst26vf064b-104i/sn)
The 8 Mbyte limit is enough to cope with the memory layout used in the NAND
boot. rootfs exceeds the 8 Mbyte limit and will stay in eMMC in the
sama5d2_xplained case. The final scope is to use a single memory layout for
all boot medias.
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@microchip.com>
[tudor.ambarus@microchip.com: change memory layout, add commit message]
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Cyrille Pitchen [Tue, 18 Jun 2019 08:51:58 +0000 (08:51 +0000)]
ARM: dts: at91: sama5d2_xplained: fix QSPI0 node
Fix the following:
- use "jedec,spi-nor" binding, we use jedec compatible flashes
- set bus width to 4, we use quad capable flashes
- differentiate bewteen data and clk and cs pins
- drop partions as we don't use them in u-boot.
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@microchip.com>
[tudor.ambarus@microchip.com: use "jedec,spi-nor", edit commit message]
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Tudor Ambarus [Tue, 18 Jun 2019 08:51:55 +0000 (08:51 +0000)]
configs: sama5d27_som1_ek: enable qspi controller and flashes
We use a sst spi-nor flash memory on sama5d27_som1_ek. Select
the others for testing purposes.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tudor Ambarus [Tue, 18 Jun 2019 08:51:53 +0000 (08:51 +0000)]
configs: sama5d2_xplained: enable qspi controller and flashes
We have a macronix spi-nor flash on sama5d2_xplained RevB and
a sst spi-nor flash on RevC. Select the rest for testing purposes.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tudor Ambarus [Tue, 18 Jun 2019 08:51:50 +0000 (08:51 +0000)]
spi: Add Atmel QuadSPI driver
Backport the driver from linux v5.1-rc5 and adapt it for u-boot.
Tested on sama5d2_xplained Rev B with mx25l25635e spi-nor flash.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Melin Tomas [Fri, 28 Jun 2019 12:08:40 +0000 (12:08 +0000)]
xilinx_xiic: Fix transfer initialisation
Prior to starting a new transfer, conditionally wait for bus to not
be busy.
Reinitialise controller as otherwise operation is not stable.
For reference, see linux kernel
commit
9656eeebf3f1 ("i2c: Revert i2c: xiic: Do not reset controller before every transfer")
hs: Fixed DOS line endings
added missing '\n'
Fixed git commit description style
Signed-off-by: Tomas Melin <tomas.melin@vaisala.com>
Melin Tomas [Fri, 28 Jun 2019 12:08:31 +0000 (12:08 +0000)]
xilinx_xiic: Fix fill tx fifo loop
Comparison should be against the actual message length, not loop index.
len is used for stopping while loop, pos is position in message.
stop should be sent when entire message is sent, not when
len and pos meet.
hs: fixed DOS line endings
Signed-off-by: Tomas Melin <tomas.melin@vaisala.com>
Ley Foon Tan [Wed, 12 Jun 2019 01:48:04 +0000 (09:48 +0800)]
i2c: designware: Get clock rate from clock DM
Get clock rate from clock DM if CONFIG_CLK is enabled.
Otherwise, uses IC_CLK define.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Acked-by: Marek Vasut <marex@denx.de>
Jun Chen [Wed, 5 Jun 2019 07:23:16 +0000 (15:23 +0800)]
i2c: designware_i2c: Restore enable state after set speed
Before calling __dw_i2c_set_bus_speed(),
the I2C could already be set as ether enable or disable,
we should restore the original setting instead of enable i2c anyway.
This patch fix a bug happened in init function:
__dw_i2c_init(){
/* Disable i2c */
...
__dw_i2c_set_bus_speed(i2c_base, NULL, speed);
writel(slaveaddr, &i2c_base->ic_sar);
/* Enable i2c */
}
In this case, enable i2c inside __dw_i2c_set_bus_speed() function
will cause ic_sar write fail.
Signed-off-by: Jun Chen <ptchentw@gmail.com>
Markus Klotzbuecher [Wed, 15 May 2019 13:16:00 +0000 (15:16 +0200)]
ubispl: introduce separate CONFIG_UBI_SPL_SILENCE_MSG
This allows to silence ubi and ubispl individually.
Signed-off-by: Markus Klotzbuecher <markus.klotzbuecher@kistler.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Cc: Kyungmin Park <kmpark@infradead.org>
Hamish Guthrie [Wed, 15 May 2019 13:15:59 +0000 (15:15 +0200)]
ubispl: add support for loading volumes by name
The motivation is to use the UBI atomic volume rename functionality to
allow double copy software updates on UBI. To that end the SPL is
configured to always load the same volume name (e.g. "u-boot"),
whereas a software updater always installs into the secondary volume
"u-boot_r". After successful installation, these two volume names are
switched.
This extension is protected by #ifdefs as it will somewhat slow down
loading of volumes by id. This is because the code needs to disable
the optimization of ignoring all volume ids which are not
to-be-loaded, since these can only be resolved after attaching.
This adds two vtbl related functions from Linux, which are taken from
the same kernel version as the current main U-Boot UBI code (Linux 4.2
64291f7db5bd8).
Signed-off-by: Hamish Guthrie <hamish.guthrie@kistler.com>
Signed-off-by: Markus Klotzbuecher <markus.klotzbuecher@kistler.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Cc: Kyungmin Park <kmpark@infradead.org>
Markus Klotzbuecher [Wed, 15 May 2019 13:15:58 +0000 (15:15 +0200)]
configs: migrate ubispl boards to KConfig
Migrate the ubispl configuration for the omap3_igep00x0 and
am335x_igep003x boards to KConfig. Both boards were built with
SOURCE_DATE_EPOCH=0 and found to be equal before and after.
Signed-off-by: Markus Klotzbuecher <markus.klotzbuecher@kistler.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Kyungmin Park <kmpark@infradead.org>
Cc: Javier MartÃnez Canillas <javier@dowhile0.org>
Cc: Enric Balletbo i Serra <eballetbo@gmail.com>
Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Markus Klotzbuecher [Wed, 15 May 2019 13:15:57 +0000 (15:15 +0200)]
ubispl: migrate configuration to Kconfig
Move the ubispl configuration to KConfig and drop them from the
whitelist.
Signed-off-by: Markus Klotzbuecher <markus.klotzbuecher@kistler.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Kyungmin Park <kmpark@infradead.org>
Cc: Javier MartÃnez Canillas <javier@dowhile0.org>
Cc: Enric Balletbo i Serra <eballetbo@gmail.com>
Markus Klotzbuecher [Wed, 15 May 2019 13:15:56 +0000 (15:15 +0200)]
ubi: fix UBI_SILENCE_MSG
- drop CONFIG_ prefix from kconfig entry
- fix small compilation issue with CONFIG_UBI_SILENCE_MSG
Signed-off-by: Markus Klotzbuecher <markus.klotzbuecher@kistler.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Cc: Kyungmin Park <kmpark@infradead.org>
Hamish Guthrie [Wed, 15 May 2019 13:15:55 +0000 (15:15 +0200)]
env: ubi: support configurable VID offset
Introduce KConfig CONFIG_ENV_UBI_VID_OFFSET to allow providing custom
VID header offsets for the environment on UBI.
Signed-off-by: Hamish Guthrie <hamish.guthrie@kistler.com>
Signed-off-by: Markus Klotzbuecher <markus.klotzbuecher@kistler.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Cc: Kyungmin Park <kmpark@infradead.org>
Markus Klotzbuecher [Wed, 15 May 2019 13:15:54 +0000 (15:15 +0200)]
at91, omap2plus: configs: migrate CONFIG_ENV_ to defconfigs
Enable the extended ENV options for AT91 and OMAP2PLUS in order to be
able to use CONFIG_ENV_UBI_* on these architectures.
As this change also makes the configs ENV_SIZE, ENV_SECT_SIZE,
ENV_OFFSET visible to AT91 and OMAP2PLUS, migrate users of these to
KConfig.
This migration was run using an extended moveconfig.py which evaluates
expressions such as "(512 << 10)". See patch ("moveconfig: expand
simple expressions").
All modified boards were built with SOURCE_DATE_EPOCH=0 before and
after the change and successfully confirmed that the identical binary
is generated (the only exception was igep00x0, which does not define
CONFIG_ENV_IS_IN_UBI in the original board header. Once that is
defined, the test passes too).
hs: rebased patch to:
68b90e57bc: "configs: tinker-rk3288 disable CONFIG_SPL_I2C_SUPPORT"
Signed-off-by: Markus Klotzbuecher <markus.klotzbuecher@kistler.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Tom Rini <trini@konsulko.com>