oweals/u-boot.git
5 years agortc: Allow child drivers
Simon Glass [Sun, 18 Nov 2018 15:14:35 +0000 (08:14 -0700)]
rtc: Allow child drivers

Some RTC chips have child drivers, e.g. to provide access to their
non-volatile RAM. Scan for these when binding.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agodm: sandbox: i2c: Use new emulator parent uclass
Simon Glass [Sun, 18 Nov 2018 15:14:34 +0000 (08:14 -0700)]
dm: sandbox: i2c: Use new emulator parent uclass

Update the device tree, sandbox i2c driver and tests to use the new
emulation parent to hold emulators.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agodm: sandbox: i2c: Add a new 'emulation parent' uclass
Simon Glass [Sun, 18 Nov 2018 15:14:33 +0000 (08:14 -0700)]
dm: sandbox: i2c: Add a new 'emulation parent' uclass

Sandbox i2c works using emulation drivers which are currently children of
the i2c device:

rtc_0: rtc@43 {
reg = <0x43>;
compatible = "sandbox-rtc";
emul {
compatible = "sandbox,i2c-rtc";
};
};

In this case the emulation device is attached to i2c bus on address 0x43
and provides the Real-Time-Clock (RTC) functionality.

However this is not ideal, since every device on an I2C bus has a child
device. This is only really the case for sandbox, but we want to avoid
special-case code for sandbox.

A better approach seems to be to add a separate node on the bus, an
'emulation parent'. This can be given a bogus address (such as 0xff) and
hides all the emulators away. Then we can use a phandle to point from the
device to the correct emualtor, and only on sandbox. The code to find an
emulator does not interfere with normal i2c operation.

Add a new UCLASS_I2C_EMUL_PARENT uclass which allows finding an emulator
given a bus, and finding a bus given an emulator. This will be used in a
follow-on patch.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agodm: core: Put UCLASS_SIMPLE_BUS in order
Simon Glass [Sun, 18 Nov 2018 15:14:32 +0000 (08:14 -0700)]
dm: core: Put UCLASS_SIMPLE_BUS in order

This is currently at the top in the space for internal use. But this
uclass is used outside driver model and test code. Move it into the
correct alpha order.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agodm: core: Add a few more specific child-finding functions
Simon Glass [Sun, 18 Nov 2018 15:14:31 +0000 (08:14 -0700)]
dm: core: Add a few more specific child-finding functions

Add two functions which can find a child device by uclass or by name.
The first is useful with Multi-Function-Devices (MFDs) to find one of a
particular type. The second is useful when only the name is known.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agodm: core: Export uclass_find_device_by_phandle()
Simon Glass [Sun, 18 Nov 2018 15:14:30 +0000 (08:14 -0700)]
dm: core: Export uclass_find_device_by_phandle()

This function may be useful to code outside of the code driver-model
implementation. Export it and add a test.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agotest: Add a 'make qcheck' target for quicker testing
Simon Glass [Sun, 18 Nov 2018 15:14:29 +0000 (08:14 -0700)]
test: Add a 'make qcheck' target for quicker testing

At present tests are quite slow to run, over a minute on my machine. This
presents a considerable barrier to bisecting for failures.

The slowest tests are the filesystem ones and the buildman --fetch-arch
test. Add a new 'qcheck' target that skips these tests. This reduces test
time down to about 40 second, still too long, but bearable.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agopower: pmic: Correct debug/error output
Simon Glass [Sun, 18 Nov 2018 15:14:28 +0000 (08:14 -0700)]
power: pmic: Correct debug/error output

There is a newline missing from quite a few printf() strings in these pmic
files. Fix them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
5 years agomalloc_simple: Add logging of allocations
Simon Glass [Sun, 18 Nov 2018 15:14:26 +0000 (08:14 -0700)]
malloc_simple: Add logging of allocations

It is sometimes useful to see what memory is being allocated early during
boot. Add logging to support this, using a new LOGC_ALLOC category.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agoMerge branch '2018-11-28-master-imports'
Tom Rini [Thu, 29 Nov 2018 04:04:58 +0000 (23:04 -0500)]
Merge branch '2018-11-28-master-imports'

- Add MediaTek support

5 years agoMAINTAINERS: add an entry for MediaTek
Ryder Lee [Thu, 15 Nov 2018 02:08:06 +0000 (10:08 +0800)]
MAINTAINERS: add an entry for MediaTek

This patch adds an entry for MediaTek.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agodoc: README.mediatek: Add a simple README for MediaTek
Ryder Lee [Thu, 15 Nov 2018 02:08:05 +0000 (10:08 +0800)]
doc: README.mediatek: Add a simple README for MediaTek

Add a few notes on how to try out the MediaTek support so far.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agommc: mtk-sd: add SD/MMC host controller driver for MT7623 SoC
Weijie Gao [Thu, 15 Nov 2018 02:08:04 +0000 (10:08 +0800)]
mmc: mtk-sd: add SD/MMC host controller driver for MT7623 SoC

This patch adds MT7623 host controller driver for accessing SD/MMC.

Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Tested-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agoram: MediaTek: add DDR3 driver for MT7629 SoC
Ryder Lee [Thu, 15 Nov 2018 02:08:03 +0000 (10:08 +0800)]
ram: MediaTek: add DDR3 driver for MT7629 SoC

This patch adds a DDR3 driver for MT7629 SoC.

Signed-off-by: Wu Zou <wu.zou@mediatek.com>
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agoserial: MediaTek: add high-speed uart driver for MediaTek SoCs
Ryder Lee [Thu, 15 Nov 2018 02:08:02 +0000 (10:08 +0800)]
serial: MediaTek: add high-speed uart driver for MediaTek SoCs

Many SoCs from MediaTek have a high-speed uart. This UART is compatible
with the ns16550 in legacy mode. It has extra registers for high-speed
mode which can reach a maximum baudrate at 921600.

However this UART will no longer be compatible if it's in high-speed mode.
Some BootROM of MediaTek's SoCs will change the UART into high-speed mode
and the U-Boot must use this driver to initialize the UART.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Ryder Lee <ryder.lee@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agopower domain: MediaTek: add power domain driver for MT7623 SoC
Ryder Lee [Thu, 15 Nov 2018 02:08:01 +0000 (10:08 +0800)]
power domain: MediaTek: add power domain driver for MT7623 SoC

This adds power domain (scpsys) support for MT7623 SoC.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agopower domain: MediaTek: add power domain driver for MT7629 SoC
Ryder Lee [Thu, 15 Nov 2018 02:08:00 +0000 (10:08 +0800)]
power domain: MediaTek: add power domain driver for MT7629 SoC

This adds a power domain driver for the Mediatek SCPSYS unit.

The System Control Processor System (SCPSYS) has several power
management related tasks in the system. The tasks include thermal
measurement, dynamic voltage frequency scaling (DVFS), interrupt
filter and lowlevel sleep control. The System Power Manager (SPM)
inside the SCPSYS is for the MTCMOS power domain control.

For now this driver only adds power domain support.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agopinctrl: MediaTek: add pinctrl driver for MT7623 SoC
Ryder Lee [Thu, 15 Nov 2018 02:07:59 +0000 (10:07 +0800)]
pinctrl: MediaTek: add pinctrl driver for MT7623 SoC

This patch adds pinctrl support for MT7623 SoC. And most of the
structures are used to hold the hardware configuration for each
pin.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Tested-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agopinctrl: MediaTek: add pinctrl driver for MT7629 SoC
Ryder Lee [Thu, 15 Nov 2018 02:07:58 +0000 (10:07 +0800)]
pinctrl: MediaTek: add pinctrl driver for MT7629 SoC

This patch adds pinctrl support for MT7629 SoC. The IO core found on
the SoC has the registers for pinctrl, pinconf and gpio mixed up in
the same register range.  Hence the driver also implements the gpio
functionality through UCLASS_GPIO.

This also creates a common file as there might be other chips that use
the same binding and driver, then being a little more abstract could
help in the long run.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agowatchdog: MediaTek: add watchdog driver for MediaTek SoCs
Ryder Lee [Thu, 15 Nov 2018 02:07:57 +0000 (10:07 +0800)]
watchdog: MediaTek: add watchdog driver for MediaTek SoCs

This patch adds a common driver for the Mediatek SoC integrated
watchdog.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Tested-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agotimer: MediaTek: add timer driver for MediaTek SoCs
Ryder Lee [Thu, 15 Nov 2018 02:07:56 +0000 (10:07 +0800)]
timer: MediaTek: add timer driver for MediaTek SoCs

This patch adds clock source and clock event for the timer found
on the Mediatek SoCs.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Tested-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agoclk: MediaTek: add clock driver for MT7623 SoC.
Ryder Lee [Thu, 15 Nov 2018 02:07:55 +0000 (10:07 +0800)]
clk: MediaTek: add clock driver for MT7623 SoC.

This patch adds a driver for MT7623 clock blocks.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Tested-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agoclk: MediaTek: add clock driver for MT7629 SoC.
Ryder Lee [Thu, 15 Nov 2018 02:07:54 +0000 (10:07 +0800)]
clk: MediaTek: add clock driver for MT7629 SoC.

This patch adds clock modules for MediaTek SoCs:
- Shared part: a common driver which contains the general operations
for plls, muxes, dividers and gates so that we can reuse it in future.

- Specific SoC part: the group of structures used to hold the hardware
configuration for each SoC.

We take MT7629 as an example to demonstrate how to implement driver if
any other MediaTek chips would like to use it.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agoarm: MediaTek: add basic support for MT7623 boards
Weijie Gao [Thu, 15 Nov 2018 02:07:53 +0000 (10:07 +0800)]
arm: MediaTek: add basic support for MT7623 boards

This adds a general board file based on MT7623 SoCs from MediaTek.

As this u-boot is loaded by MTK proprietary preloader, there is no
low level initializtion codes.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Tested-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agoarm: MediaTek: add basic support for MT7629 boards
Ryder Lee [Thu, 15 Nov 2018 02:07:52 +0000 (10:07 +0800)]
arm: MediaTek: add basic support for MT7629 boards

This adds a general board file based on MT7629 SoCs from MediaTek.

Apart from the generic parts (cpu) we add some low level init codes
and initialize the early clocks.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agoarm: dts: MediaTek: add device tree for MT7623
Ryder Lee [Thu, 15 Nov 2018 02:07:51 +0000 (10:07 +0800)]
arm: dts: MediaTek: add device tree for MT7623

This adds device tree for MT7623 development board - Bananapi R2
Detailed hardware information for BPI-R2 which could be found on
http://wiki.banana-pi.org/Banana_Pi_BPI-R2.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Tested-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agoarm: dts: MediaTek: add device tree for MT7629
Ryder Lee [Thu, 15 Nov 2018 02:07:50 +0000 (10:07 +0800)]
arm: dts: MediaTek: add device tree for MT7629

This patch adds MT7629 device tree and the includes it needs.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agotools: MediaTek: add MTK boot header generation to mkimage
Ryder Lee [Thu, 15 Nov 2018 02:07:49 +0000 (10:07 +0800)]
tools: MediaTek: add MTK boot header generation to mkimage

This patch adds support for MTK boot image generation.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agoMerge branch 'master' of git://git.denx.de/u-boot-usb
Tom Rini [Tue, 27 Nov 2018 19:01:45 +0000 (14:01 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-usb

- Introduce CONFIG_SPL_DM_USB

5 years agoMerge branch '2018-11-26-master-imports'
Tom Rini [Tue, 27 Nov 2018 03:52:19 +0000 (22:52 -0500)]
Merge branch '2018-11-26-master-imports'

- chiliboard updates
- misc TI platform updates

5 years agoARM: chiliboard: remove dead !CONFIG_DM_SERIAL code
Marcin Niestroj [Wed, 21 Nov 2018 19:32:03 +0000 (20:32 +0100)]
ARM: chiliboard: remove dead !CONFIG_DM_SERIAL code

DM_SERIAL is selected by TARGET_CHILIBOARD, so there is no reason to
keep code that will not be built. Remove it.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
5 years agoARM: chiliboard: move towards driver model and device-tree boot
Marcin Niestroj [Wed, 21 Nov 2018 19:32:02 +0000 (20:32 +0100)]
ARM: chiliboard: move towards driver model and device-tree boot

This patch mostly enables DM drivers in board defconfig and all their
dependencies. Additionally we remove ethernet platform data, as all
details are in device-tree now.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
5 years agoARM: dts: am335x-chiliboard: add /chosen/stdout-path
Marcin Niestroj [Wed, 21 Nov 2018 19:32:01 +0000 (20:32 +0100)]
ARM: dts: am335x-chiliboard: add /chosen/stdout-path

Add that node path in u-boot overlay dtsi file for now to keep
am335x-chiliboard.dts in sync with Linux.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
5 years agoARM: dts: am335x-chili*: add chiliSOM and chiliboard DTS files
Marcin Niestroj [Wed, 21 Nov 2018 19:32:00 +0000 (20:32 +0100)]
ARM: dts: am335x-chili*: add chiliSOM and chiliboard DTS files

Import chiliSOM and chiliboard dts files from Linux v4.19. They will
be used after transition to driver model and device-tree based boot.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
5 years agoconfigs: Remove CONFIG_MARVELL
Chris Packham [Wed, 21 Nov 2018 07:24:51 +0000 (20:24 +1300)]
configs: Remove CONFIG_MARVELL

This option is defined by a few boards but doesn't guard any code.
Remove it from the boards and config_whitelist.txt.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
5 years agoARM: vexpress_*_defconfig: Enable CMD_UBI support
Otavio Salvador [Tue, 20 Nov 2018 18:47:12 +0000 (16:47 -0200)]
ARM: vexpress_*_defconfig: Enable CMD_UBI support

This allow for convenient use of QEMU machine to test loading of UBI
filesystem. There are a couple of changes made together of this which
are required:

 1) The malloc must be at least 512 KiB to allow the use of UBI
    filesystem. We are going to enable it in a next patch.

 2) MTD_DEVICE must be enabled, otherwise we get missing symbols
    during the build

Following configs were change:

 - vexpress_aemv8a_dram_defconfig
 - vexpress_aemv8a_juno_defconfig
 - vexpress_aemv8a_semi_defconfig
 - vexpress_ca15_tc2_defconfig
 - vexpress_ca5x2_defconfig
 - vexpress_ca9x4_defconfig

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
5 years agoboard: da8xxevm: Fix Environmental CRC error
Adam Ford [Tue, 20 Nov 2018 14:43:13 +0000 (08:43 -0600)]
board: da8xxevm: Fix Environmental CRC error

When the spi_flash_probe_bus_cs() was previously called, it was
called using 0's for two values where CONFIG_ENV_SPI_MAX_HZ and
CONFIG_ENV_SPI_MODE are now used.  When changed this
caused the environment to fail the CRC check and the default
was used.  This patch defines both of these values back 0.

Fixes: 25a17652c9c2 ("fix: env: Fix the SPI flash device setup
for DM mode")

Signed-off-by: Adam Ford <aford173@gmail.com>
5 years agoARM: armv7: Add early stack for erratum workarounds
Andrew F. Davis [Mon, 19 Nov 2018 20:47:53 +0000 (14:47 -0600)]
ARM: armv7: Add early stack for erratum workarounds

Some erratum workarounds call into C code before the stack
is setup, this can lead to values pushed onto the stack
being lost, firewall exceptions, and other undefined behavior.

Setup a temporary stack to allow these functions to work
correctly.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Acked-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
5 years agotools/file2include: don't use malloc.h for malloc
Jonathan Gray [Sun, 18 Nov 2018 02:03:39 +0000 (13:03 +1100)]
tools/file2include: don't use malloc.h for malloc

stdlib.h is the header for malloc since at least c89/c90.
Previously this would fail to build on OpenBSD and fallback to the wrong
header:

In file included from u-boot/tools/file2include.c:21:
u-boot/include/malloc.h:875:5: error: function-like macro
      'CONFIG_IS_ENABLED' is not defined

Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
5 years agoarm: ti: boot: Fix U-Boot environment partition address
Sam Protsenko [Thu, 15 Nov 2018 20:26:17 +0000 (22:26 +0200)]
arm: ti: boot: Fix U-Boot environment partition address

Recent removal of obsolete partition led to shifting of starting address
of "reserved" partition (which reflects U-Boot environment). Fix its
start address to keep it in sync with ENV_OFFSET and DFU environment.

This patch also provides fixed start address for "reserved" partition,
so that we can track when it's shifted next time.

While at it, move it before "misc" partition to keep all Android
partitions together.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Acked-By: Praneeth Bajjuri <praneeth@ti.com>
5 years agoarmv7r: K3: Allow SPL to run only on core 0
Lokesh Vutla [Thu, 15 Nov 2018 05:34:50 +0000 (11:04 +0530)]
armv7r: K3: Allow SPL to run only on core 0

Based on the MCU R5 efuse settings, R5F cores in MCU domain
either work in split mode or in lock step mode.

If efuse settings are in lockstep mode: ROM release R5 cores
and SPL continues to run on the R5 core is lockstep mode.

If efuse settings are in split mode: ROM releases both the R5
cores simultaneously and allow SPL to run on both the cores.
In this case it is bootloader's responsibility to detect core
1 and park it. Else both the core will be running bootloader
independently which might result in an unexpected behaviour.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
5 years agoadd default-option to bootmenu
Frank Wunderlich [Fri, 5 Oct 2018 09:41:59 +0000 (11:41 +0200)]
add default-option to bootmenu

with this patch the selected Entry in bootmenu can be set by
environment-var bootmenu_default=<number>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
5 years agoMerge branch 'master' of git://git.denx.de/u-boot-video
Tom Rini [Mon, 26 Nov 2018 20:52:51 +0000 (15:52 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-video

5 years agoMerge branch 'master' of git://git.denx.de/u-boot-sunxi
Tom Rini [Mon, 26 Nov 2018 20:52:47 +0000 (15:52 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-sunxi

5 years agoMerge git://git.denx.de/u-boot-riscv
Tom Rini [Mon, 26 Nov 2018 18:45:29 +0000 (13:45 -0500)]
Merge git://git.denx.de/u-boot-riscv

5 years agousb: storage: s/CONFIG_BLK/CONFIG_IS_ENABLED(BLK)/
Sven Schwermer [Wed, 21 Nov 2018 07:43:57 +0000 (08:43 +0100)]
usb: storage: s/CONFIG_BLK/CONFIG_IS_ENABLED(BLK)/

This fixes link issues when building the SPL without USB driver model
but with USB storage support. CONFIG_BLK can be enabled and disabled
independently for SPL and non-SPL builds. We leverage that existing
functionality here.

Signed-off-by: Sven Schwermer <sven@svenschwermer.de>
5 years agousb: s/CONFIG_DM_USB/CONFIG_IS_ENABLED(DM_USB)/
Sven Schwermer [Wed, 21 Nov 2018 07:43:56 +0000 (08:43 +0100)]
usb: s/CONFIG_DM_USB/CONFIG_IS_ENABLED(DM_USB)/

This allows to disable the USB driver model in SPL because it checks
the CONFIG_SPL_DM_USB variable for SPL builds. Nothing changes for
regular non-SPL builds.

Signed-off-by: Sven Schwermer <sven@svenschwermer.de>
5 years agousb: Remove CMD_USB dependency for common code
Sven Schwermer [Wed, 21 Nov 2018 07:43:55 +0000 (08:43 +0100)]
usb: Remove CMD_USB dependency for common code

Common USB code is built whenever USB is enabled (in non-SPL builds).
The USB uclass is built whenever (SPL_)DM_USB is enabled. Both need to
be independent from CMD_USB.

Signed-off-by: Sven Schwermer <sven@svenschwermer.de>
5 years agousb: am335x_evm: Disable CONFIG_SPL_DM_USB
Sven Schwermer [Wed, 21 Nov 2018 07:43:54 +0000 (08:43 +0100)]
usb: am335x_evm: Disable CONFIG_SPL_DM_USB

This configuration doesn't use USB in the SPL, so we need to disable
driver model for USB in the SPL.

Signed-off-by: Sven Schwermer <sven@svenschwermer.de>
5 years agousb: Introduce CONFIG_SPL_DM_USB
Sven Schwermer [Wed, 21 Nov 2018 07:43:53 +0000 (08:43 +0100)]
usb: Introduce CONFIG_SPL_DM_USB

This allows building the SPL without driver model for USB. Since
CONFIG_SPL_DM_USB is enabled if and only if CONFIG_DM_USB was enabled
before, this patch does not change the build behaviour.

Signed-off-by: Sven Schwermer <sven@svenschwermer.de>
5 years agoMerge branch '2018-11-25-master-imports'
Tom Rini [Mon, 26 Nov 2018 17:40:22 +0000 (12:40 -0500)]
Merge branch '2018-11-25-master-imports'

- Bring in the series from Simon for SPL logging support and bloblist

5 years agospl: Add support for passing handoff info to U-Boot proper
Simon Glass [Fri, 16 Nov 2018 01:44:09 +0000 (18:44 -0700)]
spl: Add support for passing handoff info to U-Boot proper

There is some basic informaton that SPL normally wants to pass through to
U-Boot, such as the SDRAM size and bank information.

Mkae use of the new bloblist structure for this. Add a new 'handoff' blob
which is set up in SPL and passed to U-Boot proper. Also adda  test for
sandbox_spl that checks that this works correctly and a new 'sb' command
to show the information passed from SPL.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agosandbox: Boot in U-Boot through the standard call
Simon Glass [Fri, 16 Nov 2018 01:44:08 +0000 (18:44 -0700)]
sandbox: Boot in U-Boot through the standard call

Most architectures use jump_to_image_no_args() to jump from SPL to U-Boot.
At present sandbox is special in that it jumps in its
spl_board_load_image() call. This is not strictly correct, and means that
sandbox misses out some parts of board_init_r(), just as calling
bloblist_finish(), for example.

Change spl_board_load_image() to just identify the filename to boot, and
implement jump_to_image_no_args() to actually jump to it.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agosandbox: Filter arguments when starting U-Boot
Simon Glass [Fri, 16 Nov 2018 01:44:07 +0000 (18:44 -0700)]
sandbox: Filter arguments when starting U-Boot

The current method of starting U-Boot from U-Boot adds arguments to pass
the memory file through, so that memory is preserved. This is fine for a
single call, but if we call from TPL -> SPL -> U-Boot the arguments build
up and we have several memory files in the argument list.

Adjust the implementation to filter out arguments that we want to replace
with new ones. Also print a useful error if the exec() call fails.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agosandbox: Use malloc() and free() from os layer
Simon Glass [Fri, 16 Nov 2018 01:44:06 +0000 (18:44 -0700)]
sandbox: Use malloc() and free() from os layer

At present sandbox calls malloc() from various places in the OS layer and
this results in calls to U-Boot's malloc() implementation. It is better to
use the on in the OS layer, since it does not mix allocations with the
main U-Boot code.

Fix this by replacing calls with malloc() to os_malloc(), etc.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agosandbox: Refactor code to create os_jump_to_file()
Simon Glass [Fri, 16 Nov 2018 01:44:05 +0000 (18:44 -0700)]
sandbox: Refactor code to create os_jump_to_file()

At present os_jump_to_image() jumps to a given image, and this is written
to a file. But it is useful to be able to jump to a file also.

To avoid duplicating code, split out the implementation of
os_jump_to_image() into a new function that jumps to a file.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agosandbox: Allow puts() output before global_data is set up
Simon Glass [Fri, 16 Nov 2018 01:44:04 +0000 (18:44 -0700)]
sandbox: Allow puts() output before global_data is set up

We support putc() in this case but not puts(), but this is more useful
since it is what printf() uses.

This particularly affects debugging early in SPL, where currently printf()
statements result in no output. Fix this by adding a special case into
puts() for sandbox, just like putc().

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
5 years agosandbox: Add a new 'sb' command
Simon Glass [Fri, 16 Nov 2018 01:44:03 +0000 (18:44 -0700)]
sandbox: Add a new 'sb' command

The old 'sb' command was deprecated in 2015 and replaced with 'host'. It
is useful to be able to access some internal sandbox state, particularly
for testing.

Resurrect the old command and provide a way to print some basic state
information (currently just the arguments to sandbox).

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agosandbox: Drop the deprecated 'sb' command
Simon Glass [Fri, 16 Nov 2018 01:44:02 +0000 (18:44 -0700)]
sandbox: Drop the deprecated 'sb' command

The old 'sb' command was deprecated in 2015 and replaced with 'host'.
Remove the remaining users and the command, so that the name is available
for other purposes.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agosandbox: Add an option to display of-platdata in SPL
Simon Glass [Fri, 16 Nov 2018 01:44:01 +0000 (18:44 -0700)]
sandbox: Add an option to display of-platdata in SPL

At present we don't have a test that of-platdata can be accessed in SPL.
Add this in as a command-line option to SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agotest/py: Add a way to pass flags to sandbox
Simon Glass [Fri, 16 Nov 2018 01:44:00 +0000 (18:44 -0700)]
test/py: Add a way to pass flags to sandbox

It is sometimes useful to restart sandbox with some particular flags to
test certain functionality. Add a new method to ConsoleSandbox to handle
this, without changing the existing APIs.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
5 years agosandbox: Add a memory map to the sandbox README
Simon Glass [Fri, 16 Nov 2018 01:43:59 +0000 (18:43 -0700)]
sandbox: Add a memory map to the sandbox README

We have a few things in the memory map now, so add documentation for this
to avoid confusion. Also note that it is possible to run all tests now.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agospl: Add a comment to spl_set_bd()
Simon Glass [Fri, 16 Nov 2018 01:43:58 +0000 (18:43 -0700)]
spl: Add a comment to spl_set_bd()

There is a strange feature to set global_data to a data-section variable
early in SPL. This only works if SPL actually has access to SRAM which is
not the case on x86, for eaxmple. Add a comment to this effect.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agospl: Make SPL_DISABLE_BANNER_PRINT a positive option
Simon Glass [Fri, 16 Nov 2018 01:43:57 +0000 (18:43 -0700)]
spl: Make SPL_DISABLE_BANNER_PRINT a positive option

Rather than having a negative option, make this a positive option and
enable it by default. This makes it easier to understand.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agospl: Add a define for SPL_TPL_PROMPT
Simon Glass [Fri, 16 Nov 2018 01:43:56 +0000 (18:43 -0700)]
spl: Add a define for SPL_TPL_PROMPT

We should use a macro rather than hard-coding the SPL prompt to 'spl'
since the code can be used by TPL too. Add a macro that works for both
and use it in various places.

This allows TPL to use the same code without printing confusing messages.

Note that the string is lower case ('spl', 'tpl') which is a change from
previously.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agospl: Support hash, input, pch, pci, rtc, tpm in SPL
Simon Glass [Fri, 16 Nov 2018 01:43:55 +0000 (18:43 -0700)]
spl: Support hash, input, pch, pci, rtc, tpm in SPL

At present these subsystems are only supported in U-Boot proper but it is
sometimes necessary to support them in SPL, or even TPL. Update the
Kconfig and Makefile to support this. Also adjust GPIO so that it can be
used in TPL if required.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agoAdd bloblist documentation
Simon Glass [Fri, 16 Nov 2018 01:43:54 +0000 (18:43 -0700)]
Add bloblist documentation

Add a description of the purpose of bloblist and how to use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agotest: Add a simple test for bloblist
Simon Glass [Fri, 16 Nov 2018 01:43:53 +0000 (18:43 -0700)]
test: Add a simple test for bloblist

Add a unit test for the bloblist functionality and enable bloblist for
sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agobloblist: Locate bloblist in U-Boot
Simon Glass [Fri, 16 Nov 2018 01:43:52 +0000 (18:43 -0700)]
bloblist: Locate bloblist in U-Boot

Add support for locating a bloblist in U-Boot that has been set up by SPL.
It is copied into RAM during relocation.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agospl: Set up the bloblist in SPL
Simon Glass [Fri, 16 Nov 2018 01:43:51 +0000 (18:43 -0700)]
spl: Set up the bloblist in SPL

The bloblist is normally set up in SPL ready for use by U-Boot. Add
a simple implementation of this to the common SPL code.

Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agoAdd core support for a bloblist to convey data from SPL
Simon Glass [Fri, 16 Nov 2018 01:43:50 +0000 (18:43 -0700)]
Add core support for a bloblist to convey data from SPL

At present there is no standard way in U-Boot to pass information from SPL
to U-Boot proper. But sometimes SPL wants to convey information to U-Boot
that U-Boot cannot easily figure out. For example, if SPL sets up SDRAM
then it might want to pass the size of SDRAM, or the location of each
bank, to U-Boot proper.

Add a new 'bloblist' feature which provides this. A bloblist is set up in
the first phase of U-Boot that runs (i.e. TPL or SPL). The location of
this info may be in SRAM or CAR (x86 cache-as-RAM) or somewhere else.

Information placed in this region is preserved (with a checksum) through
TPL and SPL and ends up in U-Boot. At this point it is copied into SDRAM
so it can be used after relocation.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Andreas Dannenberg <dannenberg@ti.com>
5 years agospl: Add support for logging in SPL and TPL
Simon Glass [Fri, 16 Nov 2018 01:43:49 +0000 (18:43 -0700)]
spl: Add support for logging in SPL and TPL

It is sometimes useful to log information in SPL and TPL. Add support for
this.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
5 years agofs-test.sh: Update to use 'host' not 'sb'
Tom Rini [Mon, 26 Nov 2018 13:24:51 +0000 (08:24 -0500)]
fs-test.sh: Update to use 'host' not 'sb'

For a long time now, 'sb' has been deprecated as a command in favor of
using 'host' for the sandbox hostfs interface, switch.

Signed-off-by: Tom Rini <trini@konsulko.com>
5 years agoriscv: cache: Implement i/dcache [status, enable, disable]
Rick Chen [Wed, 7 Nov 2018 01:34:06 +0000 (09:34 +0800)]
riscv: cache: Implement i/dcache [status, enable, disable]

AndeStar RISC-V(V5) provide mcache_ctl register which
can configure I/D cache as enabled or disabled.

This CSR will be encapsulated by CONFIG_RISCV_NDS.
If you want to configure cache on AndeStar V5
AE350 platform. YOu can enable [*] AndeStar V5 ISA support
by make menuconfig.

This approach also provide the expansion when the
vender specific features are going to join in.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
5 years agoriscv: dts: Add ae350_32.dts for RV32I
Rick Chen [Tue, 13 Nov 2018 08:33:29 +0000 (16:33 +0800)]
riscv: dts: Add ae350_32.dts for RV32I

Add ae350_32.dts for 32 bit. And also rename
ae350.dts to ae350_64.dts for 64 bit.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
5 years agoconfigs: ax25-ae350: Separate ax25-ae350 for RV32/64I.
Rick Chen [Tue, 13 Nov 2018 08:15:20 +0000 (16:15 +0800)]
configs: ax25-ae350: Separate ax25-ae350 for RV32/64I.

Separate ax25-ae350 from one to two for
32 and 64 bit individually. And also select
different dts for 32 and 64 bit.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
5 years agoriscv: dts: Sync to Linux Kernel ae350 dts.
Rick Chen [Tue, 13 Nov 2018 07:13:34 +0000 (15:13 +0800)]
riscv: dts: Sync to Linux Kernel ae350 dts.

Use same dts to boot U-Boot and Kernel.

Following are the change notes :
1 Remove early printk bootargs.
2 Timer frequency are changed to 60MHz.
3 Add dma, snd, lcd, virtio nodes which are used
  in kernel drivers. They does not been used by U-Boot.
4 Change spi irq from 3 to 4.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
5 years agoriscv: qemu: clear kernel-start/-end in device tree as workaround for BBL
Lukas Auer [Thu, 22 Nov 2018 10:26:37 +0000 (11:26 +0100)]
riscv: qemu: clear kernel-start/-end in device tree as workaround for BBL

QEMU specifies the location of Linux (supplied with the -kernel
argument) in the device tree using the riscv,kernel-start and
riscv,kernel-end properties. We currently rely on the SBI implementation
of BBL to run Linux and therefore embed Linux as payload in BBL. This
causes an issue, because BBL detects the kernel properties in the device
tree and ignores the Linux payload as a result.
Work around this issue by clearing the kernel properties in the device
tree before booting Linux.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agoriscv: qemu: detect and boot the kernel passed by QEMU
Lukas Auer [Thu, 22 Nov 2018 10:26:36 +0000 (11:26 +0100)]
riscv: qemu: detect and boot the kernel passed by QEMU

QEMU embeds the location of the kernel image in the device tree. Store
this address in the environment as variable kernel_start. It is used in
the board-local distro boot command QEMU to boot the kernel with the
U-Boot device tree. The QEMU boot command is added as the first boot
target device.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
5 years agodm: core: add missing prototype for ofnode_read_u64
Lukas Auer [Thu, 22 Nov 2018 10:26:35 +0000 (11:26 +0100)]
dm: core: add missing prototype for ofnode_read_u64

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
5 years agoriscv: qemu: enable distro boot
Lukas Auer [Thu, 22 Nov 2018 10:26:34 +0000 (11:26 +0100)]
riscv: qemu: enable distro boot

Enable distro boot on the qemu-riscv32/64 boards. Supported boot target
devices are VirtIO and DHCP.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
5 years agodistro_bootcmd: add VirtIO distro boot command
Lukas Auer [Thu, 22 Nov 2018 10:26:33 +0000 (11:26 +0100)]
distro_bootcmd: add VirtIO distro boot command

Add a boot command to distro boot to support disks connected over the
VirtIO bus. The boot command uses the shared block environment.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
5 years agoriscv: align bootm implementation with that of other architectures
Lukas Auer [Thu, 22 Nov 2018 10:26:32 +0000 (11:26 +0100)]
riscv: align bootm implementation with that of other architectures

The bootm implementation of RISC-V diverges from that of other
architectures. Update it to match the implementation of other
architectures. The ARM implementation is used as a reference.

This adds the following features and changes to RISC-V.
* Add support for the BOOTM_STATE_OS_FAKE_GO command
* Call the remove function on devices with the removal flag set before
booting Linux
* Force disconnect USB devices from the host before booting Linux
* Print and add bootstage information to the device tree before booting
Linux

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agoriscv: qemu: support booting Linux
Lukas Auer [Thu, 22 Nov 2018 10:26:31 +0000 (11:26 +0100)]
riscv: qemu: support booting Linux

Support booting Linux (as payload of BBL) from FIT images. For this, the
default CONFIG_SYS_BOOTM_LEN is increased to 16 MB, and the environment
variables fdt_high and initrd_high are set to mark the device tree and
initrd as in-place.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agoriscv: qemu: use device tree passed by prior boot stage
Lukas Auer [Thu, 22 Nov 2018 10:26:30 +0000 (11:26 +0100)]
riscv: qemu: use device tree passed by prior boot stage

QEMU provides a device tree, which is passed to U-Boot using register
a1. We are now able to directly select the device tree with the
configuration CONFIG_OF_PRIOR_STAGE. Replace the hard-coded address in
qemu-riscv with it.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
5 years agoriscv: save hart ID and device tree passed by prior boot stage
Lukas Auer [Thu, 22 Nov 2018 10:26:29 +0000 (11:26 +0100)]
riscv: save hart ID and device tree passed by prior boot stage

Store the hart ID and device tree passed by the prior boot stage (in a0
and a1) in registers s0 and s1. Replace one use of s1 in start.S to
avoid overwriting it.

The device tree is also stored in memory to make it available to U-Boot
with the configuration CONFIG_OF_PRIOR_STAGE.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
5 years agoriscv: do not blindly modify the mstatus CSR
Lukas Auer [Thu, 22 Nov 2018 10:26:28 +0000 (11:26 +0100)]
riscv: do not blindly modify the mstatus CSR

The mstatus CSR includes WPRI (writes preserve values, reads ignore
values) fields and must therefore not be set to zero without preserving
these fields. It is not apparent why mstatus is set to zero here since
it is not required for U-Boot to run. Remove it.

This instruction and others encode zero as an immediate.  RISC-V has the
zero register for this purpose. Replace the immediates with the zero
register.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
5 years agoriscv: remove unused labels in start.S
Lukas Auer [Thu, 22 Nov 2018 10:26:27 +0000 (11:26 +0100)]
riscv: remove unused labels in start.S

The labels nmi_vector, trap_vector and handle_reset in start.S are not
used for RISC-V. Remove them.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agoDrop CONFIG_INIT_CRITICAL
Bin Meng [Thu, 22 Nov 2018 10:26:26 +0000 (11:26 +0100)]
Drop CONFIG_INIT_CRITICAL

This is now deprecated and no board is using it. Drop it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
5 years agoriscv: align mtvec on a 4-byte boundary
Lukas Auer [Thu, 22 Nov 2018 10:26:25 +0000 (11:26 +0100)]
riscv: align mtvec on a 4-byte boundary

The machine trap-vector base address (mtvec) must be aligned on a 4-byte
boundary. Add the necessary align directive to trap_entry.

This patch also removes the global directive for trap_entry, which is
not required.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agoriscv: fix inconsistent use of spaces and tabs in start.S
Lukas Auer [Thu, 22 Nov 2018 10:26:24 +0000 (11:26 +0100)]
riscv: fix inconsistent use of spaces and tabs in start.S

start.S uses both tabs and spaces after instructions. Fix this by only
using tabs after instructions.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
5 years agoriscv: implement the invalidate_icache_* functions
Lukas Auer [Thu, 22 Nov 2018 10:26:23 +0000 (11:26 +0100)]
riscv: implement the invalidate_icache_* functions

Implement the functions invalidate_icache_range() and
invalidate_icache_all().

RISC-V does not have instructions for explicit cache-control. The
functions in this patch are implemented with the memory ordering
instruction for synchronizing the instruction and data streams. This may
be implemented as a cache flush or invalidate on simple processors,
others may only invalidate the relevant cache lines.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
5 years agoriscv: hang on unhandled exceptions
Lukas Auer [Thu, 22 Nov 2018 10:26:22 +0000 (11:26 +0100)]
riscv: hang on unhandled exceptions

Hang on unhandled exceptions to prevent execution in a faulty state.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
5 years agoriscv: treat undefined exception codes as reserved
Lukas Auer [Thu, 22 Nov 2018 10:26:21 +0000 (11:26 +0100)]
riscv: treat undefined exception codes as reserved

Undefined exception codes currently lead to an out-of-bounds array
access. Prevent this by treating undefined exception codes as
"reserved".

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
5 years agoriscv: complete the list of exception codes
Lukas Auer [Thu, 22 Nov 2018 10:26:20 +0000 (11:26 +0100)]
riscv: complete the list of exception codes

Only the first four exception codes are defined. Add the missing
exception codes from the definition in RISC-V Privileged Architecture
Version 1.10.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
5 years agoriscv: do not reimplement generic io functions
Lukas Auer [Thu, 22 Nov 2018 10:26:19 +0000 (11:26 +0100)]
riscv: do not reimplement generic io functions

RISC-V U-Boot reimplements the generic io functions from
asm-generic/io.h. Remove the redundant implementation and include the
generic io.h instead.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
5 years agoriscv: make use of the barrier functions from Linux
Lukas Auer [Thu, 22 Nov 2018 10:26:18 +0000 (11:26 +0100)]
riscv: make use of the barrier functions from Linux

Replace the barrier functions in arch/riscv/include/asm/io.h with those
defined in barrier.h, which is imported from Linux. This version is
modified to remove the include statement of asm-generic/barrier.h, which
is not available in U-Boot or required.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
5 years agoriscv: fix use of incorrectly sized variables
Lukas Auer [Thu, 22 Nov 2018 10:26:17 +0000 (11:26 +0100)]
riscv: fix use of incorrectly sized variables

The RISC-V arch incorrectly uses 32-bit instead of 64-bit variables in
several places. Fix this.
In addition, BITS_PER_LONG is set to 64 on RV64I systems.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
5 years agoriscv: enable -fdata-sections
Lukas Auer [Thu, 22 Nov 2018 10:26:16 +0000 (11:26 +0100)]
riscv: enable -fdata-sections

Enable the -fdata-sections compiler option for RISC-V. Buildman reports
the binary size decrease from this as 8365.3 bytes.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
5 years agoriscv: set -march and -mabi based on the Kconfig configuration
Lukas Auer [Thu, 22 Nov 2018 10:26:15 +0000 (11:26 +0100)]
riscv: set -march and -mabi based on the Kconfig configuration

Use the new Kconfig entries to construct the ISA string for the -march
compiler flag. The -mabi compiler flag is selected based on the base
integer instruction set.

With this change, the C (compressed instructions) ISA extension is now
enabled for all boards with CONFIG_RISCV_ISA_C set. Buildman reports a
decrease in binary size of 71590 bytes.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>